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Magnus Dammd28bdf02010-05-11 13:29:17 +00001#ifndef __SH_CLOCK_H
2#define __SH_CLOCK_H
3
4#include <linux/list.h>
5#include <linux/seq_file.h>
6#include <linux/cpufreq.h>
Paul Mundt28085bc2010-10-15 16:46:37 +09007#include <linux/types.h>
8#include <linux/kref.h>
Magnus Dammd28bdf02010-05-11 13:29:17 +00009#include <linux/clk.h>
10#include <linux/err.h>
11
12struct clk;
13
Paul Mundt28085bc2010-10-15 16:46:37 +090014struct clk_mapping {
15 phys_addr_t phys;
16 void __iomem *base;
17 unsigned long len;
18 struct kref ref;
19};
20
Magnus Dammd28bdf02010-05-11 13:29:17 +000021struct clk_ops {
Paul Mundt549015c2010-11-15 18:48:25 +090022#ifdef CONFIG_SH_CLK_CPG_LEGACY
Magnus Dammd28bdf02010-05-11 13:29:17 +000023 void (*init)(struct clk *clk);
Paul Mundt549015c2010-11-15 18:48:25 +090024#endif
Magnus Dammd28bdf02010-05-11 13:29:17 +000025 int (*enable)(struct clk *clk);
26 void (*disable)(struct clk *clk);
27 unsigned long (*recalc)(struct clk *clk);
Paul Mundt35a96c72010-11-15 18:18:32 +090028 int (*set_rate)(struct clk *clk, unsigned long rate);
Magnus Dammd28bdf02010-05-11 13:29:17 +000029 int (*set_parent)(struct clk *clk, struct clk *parent);
30 long (*round_rate)(struct clk *clk, unsigned long rate);
31};
32
33struct clk {
34 struct list_head node;
Magnus Dammd28bdf02010-05-11 13:29:17 +000035 struct clk *parent;
Guennadi Liakhovetskib5272b502010-07-21 10:13:06 +000036 struct clk **parent_table; /* list of parents to */
37 unsigned short parent_num; /* choose between */
38 unsigned char src_shift; /* source clock field in the */
39 unsigned char src_width; /* configuration register */
Magnus Dammd28bdf02010-05-11 13:29:17 +000040 struct clk_ops *ops;
41
42 struct list_head children;
43 struct list_head sibling; /* node for children */
44
45 int usecount;
46
47 unsigned long rate;
48 unsigned long flags;
49
50 void __iomem *enable_reg;
51 unsigned int enable_bit;
52
53 unsigned long arch_flags;
54 void *priv;
55 struct dentry *dentry;
Paul Mundt28085bc2010-10-15 16:46:37 +090056 struct clk_mapping *mapping;
Magnus Dammd28bdf02010-05-11 13:29:17 +000057 struct cpufreq_frequency_table *freq_table;
Paul Mundtf5869032010-10-15 18:17:35 +090058 unsigned int nr_freqs;
Magnus Dammd28bdf02010-05-11 13:29:17 +000059};
60
61#define CLK_ENABLE_ON_INIT (1 << 0)
62
Paul Mundta71ba092010-05-13 18:42:25 +090063/* drivers/sh/clk.c */
Magnus Dammd28bdf02010-05-11 13:29:17 +000064unsigned long followparent_recalc(struct clk *);
65void recalculate_root_clocks(void);
66void propagate_rate(struct clk *);
67int clk_reparent(struct clk *child, struct clk *parent);
68int clk_register(struct clk *);
69void clk_unregister(struct clk *);
Magnus Damm8b5ee112010-05-11 13:29:25 +000070void clk_enable_init_clocks(void);
Magnus Dammd28bdf02010-05-11 13:29:17 +000071
Magnus Dammd28bdf02010-05-11 13:29:17 +000072struct clk_div_mult_table {
73 unsigned int *divisors;
74 unsigned int nr_divisors;
75 unsigned int *multipliers;
76 unsigned int nr_multipliers;
77};
78
79struct cpufreq_frequency_table;
80void clk_rate_table_build(struct clk *clk,
81 struct cpufreq_frequency_table *freq_table,
82 int nr_freqs,
83 struct clk_div_mult_table *src_table,
84 unsigned long *bitmap);
85
86long clk_rate_table_round(struct clk *clk,
87 struct cpufreq_frequency_table *freq_table,
88 unsigned long rate);
89
90int clk_rate_table_find(struct clk *clk,
91 struct cpufreq_frequency_table *freq_table,
92 unsigned long rate);
93
Paul Mundt8e122db2010-10-15 18:33:24 +090094long clk_rate_div_range_round(struct clk *clk, unsigned int div_min,
95 unsigned int div_max, unsigned long rate);
96
Guennadi Liakhovetski6af26c62010-11-02 11:27:24 +000097long clk_round_parent(struct clk *clk, unsigned long target,
98 unsigned long *best_freq, unsigned long *parent_freq,
99 unsigned int div_min, unsigned int div_max);
100
Magnus Dammd28bdf02010-05-11 13:29:17 +0000101#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
102{ \
103 .parent = _parent, \
104 .enable_reg = (void __iomem *)_enable_reg, \
105 .enable_bit = _enable_bit, \
106 .flags = _flags, \
107}
108
109int sh_clk_mstp32_register(struct clk *clks, int nr);
110
111#define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \
112{ \
113 .parent = _parent, \
114 .enable_reg = (void __iomem *)_reg, \
115 .enable_bit = _shift, \
116 .arch_flags = _div_bitmap, \
117 .flags = _flags, \
118}
119
120struct clk_div4_table {
121 struct clk_div_mult_table *div_mult_table;
122 void (*kick)(struct clk *clk);
123};
124
125int sh_clk_div4_register(struct clk *clks, int nr,
126 struct clk_div4_table *table);
127int sh_clk_div4_enable_register(struct clk *clks, int nr,
128 struct clk_div4_table *table);
129int sh_clk_div4_reparent_register(struct clk *clks, int nr,
130 struct clk_div4_table *table);
131
Guennadi Liakhovetskib3dd51a2010-07-21 10:13:10 +0000132#define SH_CLK_DIV6_EXT(_parent, _reg, _flags, _parents, \
133 _num_parents, _src_shift, _src_width) \
134{ \
135 .parent = _parent, \
136 .enable_reg = (void __iomem *)_reg, \
137 .flags = _flags, \
138 .parent_table = _parents, \
139 .parent_num = _num_parents, \
140 .src_shift = _src_shift, \
141 .src_width = _src_width, \
Magnus Dammd28bdf02010-05-11 13:29:17 +0000142}
143
Guennadi Liakhovetskib3dd51a2010-07-21 10:13:10 +0000144#define SH_CLK_DIV6(_parent, _reg, _flags) \
145 SH_CLK_DIV6_EXT(_parent, _reg, _flags, NULL, 0, 0, 0)
146
Magnus Dammd28bdf02010-05-11 13:29:17 +0000147int sh_clk_div6_register(struct clk *clks, int nr);
Guennadi Liakhovetskib3dd51a2010-07-21 10:13:10 +0000148int sh_clk_div6_reparent_register(struct clk *clks, int nr);
Magnus Dammd28bdf02010-05-11 13:29:17 +0000149
Kuninori Morimoto15220432011-07-06 02:54:11 +0000150#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
151#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
152#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
153
Magnus Dammd28bdf02010-05-11 13:29:17 +0000154#endif /* __SH_CLOCK_H */