blob: ce3b56fb913286e1b9e37816bc8b44f7e01f5d70 [file] [log] [blame]
Arnd Bergmann5d0769f2012-03-02 23:07:21 +00001/*
2 * Copyright 2012 Linaro Ltd
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 soc-u9500 {
16 #address-cells = <1>;
17 #size-cells = <1>;
Lee Jones7e0ce272012-03-15 16:46:17 +000018 compatible = "stericsson,db8500";
Lee Jonesdab64872012-03-07 17:22:30 +000019 interrupt-parent = <&intc>;
Arnd Bergmann5d0769f2012-03-02 23:07:21 +000020 ranges;
Lee Jones7e0ce272012-03-15 16:46:17 +000021
Lee Jonesdab64872012-03-07 17:22:30 +000022 intc: interrupt-controller@a0411000 {
23 compatible = "arm,cortex-a9-gic";
24 #interrupt-cells = <3>;
25 #address-cells = <1>;
26 interrupt-controller;
27 interrupt-parent;
28 reg = <0xa0411000 0x1000>,
29 <0xa0410100 0x100>;
30 };
31
Lee Jonesf1949ea2012-03-08 09:02:02 +000032 L2: l2-cache {
33 compatible = "arm,pl310-cache";
34 reg = <0xa0412000 0x1000>;
35 interrupts = <0 13 4>;
36 cache-unified;
37 cache-level = <2>;
38 };
39
Lee Jones7e0ce272012-03-15 16:46:17 +000040 pmu {
41 compatible = "arm,cortex-a9-pmu";
42 interrupts = <0 7 0x4>;
43 };
44
45 rtc@80154000 {
46 compatible = "stericsson,db8500-rtc";
47 reg = <0x80154000 0x1000>;
48 interrupts = <0 18 0x4>;
49 };
50
51 gpio0: gpio@8012e000 {
52 compatible = "stericsson,db8500-gpio",
53 "stmicroelectronics,nomadik-gpio";
54 reg = <0x8012e000 0x80>;
55 interrupts = <0 119 0x4>;
56 supports-sleepmode;
57 gpio-controller;
58 };
59
60 gpio1: gpio@8012e080 {
61 compatible = "stericsson,db8500-gpio",
62 "stmicroelectronics,nomadik-gpio";
63 reg = <0x8012e080 0x80>;
64 interrupts = <0 120 0x4>;
65 supports-sleepmode;
66 gpio-controller;
67 };
68
69 gpio2: gpio@8000e000 {
70 compatible = "stericsson,db8500-gpio",
71 "stmicroelectronics,nomadik-gpio";
72 reg = <0x8000e000 0x80>;
73 interrupts = <0 121 0x4>;
74 supports-sleepmode;
75 gpio-controller;
76 };
77
78 gpio3: gpio@8000e080 {
79 compatible = "stericsson,db8500-gpio",
80 "stmicroelectronics,nomadik-gpio";
81 reg = <0x8000e080 0x80>;
82 interrupts = <0 122 0x4>;
83 supports-sleepmode;
84 gpio-controller;
85 };
86
87 gpio4: gpio@8000e100 {
88 compatible = "stericsson,db8500-gpio",
89 "stmicroelectronics,nomadik-gpio";
90 reg = <0x8000e100 0x80>;
91 interrupts = <0 123 0x4>;
92 supports-sleepmode;
93 gpio-controller;
94 };
95
96 gpio5: gpio@8000e180 {
97 compatible = "stericsson,db8500-gpio",
98 "stmicroelectronics,nomadik-gpio";
99 reg = <0x8000e180 0x80>;
100 interrupts = <0 124 0x4>;
101 supports-sleepmode;
102 gpio-controller;
103 };
104
105 gpio6: gpio@8011e000 {
106 compatible = "stericsson,db8500-gpio",
107 "stmicroelectronics,nomadik-gpio";
108 reg = <0x8011e000 0x80>;
109 interrupts = <0 125 0x4>;
110 supports-sleepmode;
111 gpio-controller;
112 };
113
114 gpio7: gpio@8011e080 {
115 compatible = "stericsson,db8500-gpio",
116 "stmicroelectronics,nomadik-gpio";
117 reg = <0x8011e080 0x80>;
118 interrupts = <0 126 0x4>;
119 supports-sleepmode;
120 gpio-controller;
121 };
122
123 gpio8: gpio@a03fe000 {
124 compatible = "stericsson,db8500-gpio",
125 "stmicroelectronics,nomadik-gpio";
126 reg = <0xa03fe000 0x80>;
127 interrupts = <0 127 0x4>;
128 supports-sleepmode;
129 gpio-controller;
130 };
131
132 usb@a03e0000 {
133 compatible = "stericsson,db8500-musb",
134 "mentor,musb";
135 reg = <0xa03e0000 0x10000>;
136 interrupts = <0 23 0x4>;
137 };
138
139 dma-controller@801C0000 {
140 compatible = "stericsson,db8500-dma40",
141 "stericsson,dma40";
142 reg = <0x801C0000 0x1000 0x40010000 0x800>;
143 interrupts = <0 25 0x4>;
144 };
145
146 prcmu@80157000 {
147 compatible = "stericsson,db8500-prcmu";
148 reg = <0x80157000 0x1000>;
149 interrupts = <46 47>;
150 #address-cells = <1>;
151 #size-cells = <0>;
152
153 ab8500@5 {
154 compatible = "stericsson,ab8500";
155 reg = <5>; /* mailbox 5 is i2c */
156 interrupts = <0 40 0x4>;
157 };
158 };
159
160 i2c@80004000 {
161 compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
162 reg = <0x80004000 0x1000>;
163 interrupts = <0 21 0x4>;
164 #address-cells = <1>;
165 #size-cells = <0>;
166 };
167
168 i2c@80122000 {
169 compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
170 reg = <0x80122000 0x1000>;
171 interrupts = <0 22 0x4>;
172 #address-cells = <1>;
173 #size-cells = <0>;
174 };
175
176 i2c@80128000 {
177 compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
178 reg = <0x80128000 0x1000>;
179 interrupts = <0 55 0x4>;
180 #address-cells = <1>;
181 #size-cells = <0>;
182 };
183
184 i2c@80110000 {
185 compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
186 reg = <0x80110000 0x1000>;
187 interrupts = <0 12 0x4>;
188 #address-cells = <1>;
189 #size-cells = <0>;
190 };
191
192 i2c@8012a000 {
193 compatible = "stericsson,db8500-i2c", "stmicroelectronics,nomadik-i2c";
194 reg = <0x8012a000 0x1000>;
195 interrupts = <0 51 0x4>;
196 #address-cells = <1>;
197 #size-cells = <0>;
198 };
199
200 ssp@80002000 {
201 compatible = "arm,pl022", "arm,primecell";
202 reg = <80002000 0x1000>;
203 interrupts = <0 14 0x4>;
204 #address-cells = <1>;
205 #size-cells = <0>;
206 status = "disabled";
207 cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
208 };
209
210 uart@80120000 {
211 compatible = "arm,pl011", "arm,primecell";
212 reg = <0x80120000 0x1000>;
213 interrupts = <0 11 0x4>;
214 status = "disabled";
215 };
216 uart@80121000 {
217 compatible = "arm,pl011", "arm,primecell";
218 reg = <0x80121000 0x1000>;
219 interrupts = <0 19 0x4>;
220 status = "disabled";
221 };
222 uart@80007000 {
223 compatible = "arm,pl011", "arm,primecell";
224 reg = <0x80007000 0x1000>;
225 interrupts = <0 26 0x4>;
226 status = "disabled";
227 };
228
229 sdi@80126000 {
230 compatible = "arm,pl18x", "arm,primecell";
231 reg = <0x80126000 0x1000>;
232 interrupts = <0 60 0x4>;
233 status = "disabled";
234 };
235 sdi@80118000 {
236 compatible = "arm,pl18x", "arm,primecell";
237 reg = <0x80118000 0x1000>;
238 interrupts = <0 50 0x4>;
239 status = "disabled";
240 };
241 sdi@80005000 {
242 compatible = "arm,pl18x", "arm,primecell";
243 reg = <0x80005000 0x1000>;
244 interrupts = <0 41 0x4>;
245 status = "disabled";
246 };
247 sdi@80119000 {
248 compatible = "arm,pl18x", "arm,primecell";
249 reg = <0x80119000 0x1000>;
250 interrupts = <0 59 0x4>;
251 status = "disabled";
252 };
253 sdi@80114000 {
254 compatible = "arm,pl18x", "arm,primecell";
255 reg = <0x80114000 0x1000>;
256 interrupts = <0 99 0x4>;
257 status = "disabled";
258 };
259 sdi@80008000 {
260 compatible = "arm,pl18x", "arm,primecell";
261 reg = <0x80114000 0x1000>;
262 interrupts = <0 100 0x4>;
263 status = "disabled";
264 };
Arnd Bergmann5d0769f2012-03-02 23:07:21 +0000265 };
266};