Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / 161d540c8ef31e5adbced3248873024476e2c26f / . / drivers / net / wireless / b43 / phy_n.c
blob: 8690551f087c5b3c85091e2c8b4b3407042e8b8c [file] [log] [blame]
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n PHY support
5
6 Copyright (c) 2008 Michael Buesch <mb@bu3sch.de>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; see the file COPYING. If not, write to
20 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
21 Boston, MA 02110-1301, USA.
22
23*/
24
John W. Linville819d7722008-01-17 16:57:10 -0500[diff] [blame]25#include <linux/delay.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +0900[diff] [blame]26#include <linux/slab.h>
John W. Linville819d7722008-01-17 16:57:10 -0500[diff] [blame]27#include <linux/types.h>
28
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]29#include "b43.h"
Michael Buesch3d0da752008-08-30 02:27:19 +0200[diff] [blame]30#include "phy_n.h"
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]31#include "tables_nphy.h"
Rafał Miłecki6db507f2010-10-14 19:33:36 +0200[diff] [blame]32#include "radio_2055.h"
Rafał Miłecki5161bec2010-10-14 21:16:33 +0200[diff] [blame]33#include "radio_2056.h"
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]34#include "main.h"
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]35
Rafał Miłeckif8187b52010-01-15 12:34:21 +0100[diff] [blame]36struct nphy_txgains {
37 u16 txgm[2];
38 u16 pga[2];
39 u16 pad[2];
40 u16 ipa[2];
41};
42
43struct nphy_iqcal_params {
44 u16 txgm;
45 u16 pga;
46 u16 pad;
47 u16 ipa;
48 u16 cal_gain;
49 u16 ncorr[5];
50};
51
52struct nphy_iq_est {
53 s32 iq0_prod;
54 u32 i0_pwr;
55 u32 q0_pwr;
56 s32 iq1_prod;
57 u32 i1_pwr;
58 u32 q1_pwr;
59};
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]60
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]61enum b43_nphy_rf_sequence {
62 B43_RFSEQ_RX2TX,
63 B43_RFSEQ_TX2RX,
64 B43_RFSEQ_RESET2RX,
65 B43_RFSEQ_UPDATE_GAINH,
66 B43_RFSEQ_UPDATE_GAINL,
67 B43_RFSEQ_UPDATE_GAINU,
68};
69
Rafał Miłecki161d5402010-11-28 12:59:43 +0100[diff] [blame^]70static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev,
71 bool enable);
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]72static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
73 u8 *events, u8 *delays, u8 length);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]74static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
75 enum b43_nphy_rf_sequence seq);
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]76static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
77 u16 value, u8 core, bool off);
78static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
79 u16 value, u8 core);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]80
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200[diff] [blame]81static inline bool b43_channel_type_is_40mhz(
82 enum nl80211_channel_type channel_type)
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]83{
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200[diff] [blame]84 return (channel_type == NL80211_CHAN_HT40MINUS ||
85 channel_type == NL80211_CHAN_HT40PLUS);
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]86}
87
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]88void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
89{//TODO
90}
91
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]92static void b43_nphy_op_adjust_txpower(struct b43_wldev *dev)
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]93{//TODO
94}
95
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]96static enum b43_txpwr_result b43_nphy_op_recalc_txpower(struct b43_wldev *dev,
97 bool ignore_tssi)
98{//TODO
99 return B43_TXPWR_RES_DONE;
100}
101
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]102static void b43_chantab_radio_upload(struct b43_wldev *dev,
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]103 const struct b43_nphy_channeltab_entry_rev2 *e)
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]104{
Rafał Miłeckie5255ccc2010-02-27 13:03:35 +0100[diff] [blame]105 b43_radio_write(dev, B2055_PLL_REF, e->radio_pll_ref);
106 b43_radio_write(dev, B2055_RF_PLLMOD0, e->radio_rf_pllmod0);
107 b43_radio_write(dev, B2055_RF_PLLMOD1, e->radio_rf_pllmod1);
108 b43_radio_write(dev, B2055_VCO_CAPTAIL, e->radio_vco_captail);
109 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
110
111 b43_radio_write(dev, B2055_VCO_CAL1, e->radio_vco_cal1);
112 b43_radio_write(dev, B2055_VCO_CAL2, e->radio_vco_cal2);
113 b43_radio_write(dev, B2055_PLL_LFC1, e->radio_pll_lfc1);
114 b43_radio_write(dev, B2055_PLL_LFR1, e->radio_pll_lfr1);
115 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
116
117 b43_radio_write(dev, B2055_PLL_LFC2, e->radio_pll_lfc2);
118 b43_radio_write(dev, B2055_LGBUF_CENBUF, e->radio_lgbuf_cenbuf);
119 b43_radio_write(dev, B2055_LGEN_TUNE1, e->radio_lgen_tune1);
120 b43_radio_write(dev, B2055_LGEN_TUNE2, e->radio_lgen_tune2);
121 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
122
123 b43_radio_write(dev, B2055_C1_LGBUF_ATUNE, e->radio_c1_lgbuf_atune);
124 b43_radio_write(dev, B2055_C1_LGBUF_GTUNE, e->radio_c1_lgbuf_gtune);
125 b43_radio_write(dev, B2055_C1_RX_RFR1, e->radio_c1_rx_rfr1);
126 b43_radio_write(dev, B2055_C1_TX_PGAPADTN, e->radio_c1_tx_pgapadtn);
127 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
128
129 b43_radio_write(dev, B2055_C1_TX_MXBGTRIM, e->radio_c1_tx_mxbgtrim);
130 b43_radio_write(dev, B2055_C2_LGBUF_ATUNE, e->radio_c2_lgbuf_atune);
131 b43_radio_write(dev, B2055_C2_LGBUF_GTUNE, e->radio_c2_lgbuf_gtune);
132 b43_radio_write(dev, B2055_C2_RX_RFR1, e->radio_c2_rx_rfr1);
133 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
134
135 b43_radio_write(dev, B2055_C2_TX_PGAPADTN, e->radio_c2_tx_pgapadtn);
136 b43_radio_write(dev, B2055_C2_TX_MXBGTRIM, e->radio_c2_tx_mxbgtrim);
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]137}
138
139static void b43_chantab_phy_upload(struct b43_wldev *dev,
Rafał Miłeckib15b3032010-03-29 00:53:13 +0200[diff] [blame]140 const struct b43_phy_n_sfo_cfg *e)
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]141{
142 b43_phy_write(dev, B43_NPHY_BW1A, e->phy_bw1a);
143 b43_phy_write(dev, B43_NPHY_BW2, e->phy_bw2);
144 b43_phy_write(dev, B43_NPHY_BW3, e->phy_bw3);
145 b43_phy_write(dev, B43_NPHY_BW4, e->phy_bw4);
146 b43_phy_write(dev, B43_NPHY_BW5, e->phy_bw5);
147 b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6);
148}
149
Rafał Miłecki161d5402010-11-28 12:59:43 +0100[diff] [blame^]150/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrCtrlEnable */
151static void b43_nphy_tx_power_ctrl(struct b43_wldev *dev, bool enable)
152{
153 struct b43_phy_n *nphy = dev->phy.n;
154 u8 i;
155 u16 tmp;
156
157 if (nphy->hang_avoid)
158 b43_nphy_stay_in_carrier_search(dev, 1);
159
160 nphy->txpwrctrl = enable;
161 if (!enable) {
162 if (dev->phy.rev >= 3)
163 ; /* TODO */
164
165 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6840);
166 for (i = 0; i < 84; i++)
167 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0);
168
169 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6C40);
170 for (i = 0; i < 84; i++)
171 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0);
172
173 tmp = B43_NPHY_TXPCTL_CMD_COEFF | B43_NPHY_TXPCTL_CMD_HWPCTLEN;
174 if (dev->phy.rev >= 3)
175 tmp |= B43_NPHY_TXPCTL_CMD_PCTLEN;
176 b43_phy_mask(dev, B43_NPHY_TXPCTL_CMD, ~tmp);
177
178 if (dev->phy.rev >= 3) {
179 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0100);
180 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0100);
181 } else {
182 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4000);
183 }
184
185 if (dev->phy.rev == 2)
186 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
187 ~B43_NPHY_BPHY_CTL3_SCALE, 0x53);
188 else if (dev->phy.rev < 2)
189 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
190 ~B43_NPHY_BPHY_CTL3_SCALE, 0x5A);
191
192 if (dev->phy.rev < 2 && 0)
193 ; /* TODO */
194 } else {
195 b43err(dev->wl, "enabling tx pwr ctrl not implemented yet\n");
196 }
197
198 if (nphy->hang_avoid)
199 b43_nphy_stay_in_carrier_search(dev, 0);
200}
201
202/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrFix */
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]203static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
204{
Rafał Miłecki161d5402010-11-28 12:59:43 +0100[diff] [blame^]205 struct b43_phy_n *nphy = dev->phy.n;
206 struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
207
208 u8 txpi[2], bbmult, i;
209 u16 tmp, radio_gain, dac_gain;
210 u16 freq = dev->phy.channel_freq;
211 u32 txgain;
212 /* u32 gaintbl; rev3+ */
213
214 if (nphy->hang_avoid)
215 b43_nphy_stay_in_carrier_search(dev, 1);
216
217 if (dev->phy.rev >= 3) {
218 txpi[0] = 40;
219 txpi[1] = 40;
220 } else if (sprom->revision < 4) {
221 txpi[0] = 72;
222 txpi[1] = 72;
223 } else {
224 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
225 txpi[0] = sprom->txpid2g[0];
226 txpi[1] = sprom->txpid2g[1];
227 } else if (freq >= 4900 && freq < 5100) {
228 txpi[0] = sprom->txpid5gl[0];
229 txpi[1] = sprom->txpid5gl[1];
230 } else if (freq >= 5100 && freq < 5500) {
231 txpi[0] = sprom->txpid5g[0];
232 txpi[1] = sprom->txpid5g[1];
233 } else if (freq >= 5500) {
234 txpi[0] = sprom->txpid5gh[0];
235 txpi[1] = sprom->txpid5gh[1];
236 } else {
237 txpi[0] = 91;
238 txpi[1] = 91;
239 }
240 }
241
242 /*
243 for (i = 0; i < 2; i++) {
244 nphy->txpwrindex[i].index_internal = txpi[i];
245 nphy->txpwrindex[i].index_internal_save = txpi[i];
246 }
247 */
248
249 for (i = 0; i < 2; i++) {
250 if (dev->phy.rev >= 3) {
251 /* TODO */
252 radio_gain = (txgain >> 16) & 0x1FFFF;
253 } else {
254 txgain = b43_ntab_tx_gain_rev0_1_2[txpi[i]];
255 radio_gain = (txgain >> 16) & 0x1FFF;
256 }
257
258 dac_gain = (txgain >> 8) & 0x3F;
259 bbmult = txgain & 0xFF;
260
261 if (dev->phy.rev >= 3) {
262 if (i == 0)
263 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0100);
264 else
265 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0100);
266 } else {
267 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4000);
268 }
269
270 if (i == 0)
271 b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN1, dac_gain);
272 else
273 b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN2, dac_gain);
274
275 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D10 + i);
276 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, radio_gain);
277
278 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C57);
279 tmp = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
280
281 if (i == 0)
282 tmp = (tmp & 0x00FF) | (bbmult << 8);
283 else
284 tmp = (tmp & 0xFF00) | bbmult;
285
286 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C57);
287 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, tmp);
288
289 if (0)
290 ; /* TODO */
291 }
292
293 b43_phy_mask(dev, B43_NPHY_BPHY_CTL2, ~B43_NPHY_BPHY_CTL2_LUT);
294
295 if (nphy->hang_avoid)
296 b43_nphy_stay_in_carrier_search(dev, 0);
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]297}
298
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]299
300/* http://bcm-v4.sipsolutions.net/802.11/PHY/Radio/2055Setup */
301static void b43_radio_2055_setup(struct b43_wldev *dev,
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]302 const struct b43_nphy_channeltab_entry_rev2 *e)
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]303{
304 B43_WARN_ON(dev->phy.rev >= 3);
305
306 b43_chantab_radio_upload(dev, e);
307 udelay(50);
Rafał Miłeckie58b1252010-03-29 00:53:16 +0200[diff] [blame]308 b43_radio_write(dev, B2055_VCO_CAL10, 0x05);
309 b43_radio_write(dev, B2055_VCO_CAL10, 0x45);
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]310 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
Rafał Miłeckie58b1252010-03-29 00:53:16 +0200[diff] [blame]311 b43_radio_write(dev, B2055_VCO_CAL10, 0x65);
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]312 udelay(300);
313}
314
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]315static void b43_radio_init2055_pre(struct b43_wldev *dev)
316{
317 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
318 ~B43_NPHY_RFCTL_CMD_PORFORCE);
319 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
320 B43_NPHY_RFCTL_CMD_CHIP0PU |
321 B43_NPHY_RFCTL_CMD_OEPORFORCE);
322 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
323 B43_NPHY_RFCTL_CMD_PORFORCE);
324}
325
326static void b43_radio_init2055_post(struct b43_wldev *dev)
327{
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]328 struct b43_phy_n *nphy = dev->phy.n;
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]329 struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
330 struct ssb_boardinfo *binfo = &(dev->dev->bus->boardinfo);
331 int i;
332 u16 val;
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]333 bool workaround = false;
334
335 if (sprom->revision < 4)
336 workaround = (binfo->vendor != PCI_VENDOR_ID_BROADCOM ||
337 binfo->type != 0x46D ||
338 binfo->rev < 0x41);
339 else
Rafał Miłecki7a4db8f2010-10-22 17:43:48 +0200[diff] [blame]340 workaround =
341 !(sprom->boardflags2_lo & B43_BFL2_RXBB_INT_REG_DIS);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]342
343 b43_radio_mask(dev, B2055_MASTER1, 0xFFF3);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]344 if (workaround) {
345 b43_radio_mask(dev, B2055_C1_RX_BB_REG, 0x7F);
346 b43_radio_mask(dev, B2055_C2_RX_BB_REG, 0x7F);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]347 }
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]348 b43_radio_maskset(dev, B2055_RRCCAL_NOPTSEL, 0xFFC0, 0x2C);
349 b43_radio_write(dev, B2055_CAL_MISC, 0x3C);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]350 b43_radio_mask(dev, B2055_CAL_MISC, 0xFFBE);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]351 b43_radio_set(dev, B2055_CAL_LPOCTL, 0x80);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]352 b43_radio_set(dev, B2055_CAL_MISC, 0x1);
353 msleep(1);
354 b43_radio_set(dev, B2055_CAL_MISC, 0x40);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]355 for (i = 0; i < 200; i++) {
356 val = b43_radio_read(dev, B2055_CAL_COUT2);
357 if (val & 0x80) {
358 i = 0;
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]359 break;
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]360 }
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]361 udelay(10);
362 }
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]363 if (i)
364 b43err(dev->wl, "radio post init timeout\n");
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]365 b43_radio_mask(dev, B2055_CAL_LPOCTL, 0xFF7F);
Rafał Miłecki78159782010-10-06 07:50:08 +0200[diff] [blame]366 b43_switch_channel(dev, dev->phy.channel);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]367 b43_radio_write(dev, B2055_C1_RX_BB_LPF, 0x9);
368 b43_radio_write(dev, B2055_C2_RX_BB_LPF, 0x9);
369 b43_radio_write(dev, B2055_C1_RX_BB_MIDACHP, 0x83);
370 b43_radio_write(dev, B2055_C2_RX_BB_MIDACHP, 0x83);
371 b43_radio_maskset(dev, B2055_C1_LNA_GAINBST, 0xFFF8, 0x6);
372 b43_radio_maskset(dev, B2055_C2_LNA_GAINBST, 0xFFF8, 0x6);
373 if (!nphy->gain_boost) {
374 b43_radio_set(dev, B2055_C1_RX_RFSPC1, 0x2);
375 b43_radio_set(dev, B2055_C2_RX_RFSPC1, 0x2);
376 } else {
377 b43_radio_mask(dev, B2055_C1_RX_RFSPC1, 0xFFFD);
378 b43_radio_mask(dev, B2055_C2_RX_RFSPC1, 0xFFFD);
379 }
380 udelay(2);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]381}
382
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]383/*
384 * Initialize a Broadcom 2055 N-radio
385 * http://bcm-v4.sipsolutions.net/802.11/Radio/2055/Init
386 */
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]387static void b43_radio_init2055(struct b43_wldev *dev)
388{
389 b43_radio_init2055_pre(dev);
Rafał Miłeckia2d9bc62010-10-22 17:43:49 +0200[diff] [blame]390 if (b43_status(dev) < B43_STAT_INITIALIZED) {
391 /* Follow wl, not specs. Do not force uploading all regs */
392 b2055_upload_inittab(dev, 0, 0);
393 } else {
394 bool ghz5 = b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ;
395 b2055_upload_inittab(dev, ghz5, 0);
396 }
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]397 b43_radio_init2055_post(dev);
398}
399
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]400/*
Rafał Miłeckid817f4e2010-03-29 00:53:12 +0200[diff] [blame]401 * Initialize a Broadcom 2056 N-radio
402 * http://bcm-v4.sipsolutions.net/802.11/Radio/2056/Init
403 */
404static void b43_radio_init2056(struct b43_wldev *dev)
405{
406 /* TODO */
407}
408
409
410/*
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]411 * Upload the N-PHY tables.
412 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/InitTables
413 */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]414static void b43_nphy_tables_init(struct b43_wldev *dev)
415{
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]416 if (dev->phy.rev < 3)
417 b43_nphy_rev0_1_2_tables_init(dev);
418 else
419 b43_nphy_rev3plus_tables_init(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]420}
421
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]422/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/PA%20override */
423static void b43_nphy_pa_override(struct b43_wldev *dev, bool enable)
424{
425 struct b43_phy_n *nphy = dev->phy.n;
426 enum ieee80211_band band;
427 u16 tmp;
428
429 if (!enable) {
430 nphy->rfctrl_intc1_save = b43_phy_read(dev,
431 B43_NPHY_RFCTL_INTC1);
432 nphy->rfctrl_intc2_save = b43_phy_read(dev,
433 B43_NPHY_RFCTL_INTC2);
434 band = b43_current_band(dev->wl);
435 if (dev->phy.rev >= 3) {
436 if (band == IEEE80211_BAND_5GHZ)
437 tmp = 0x600;
438 else
439 tmp = 0x480;
440 } else {
441 if (band == IEEE80211_BAND_5GHZ)
442 tmp = 0x180;
443 else
444 tmp = 0x120;
445 }
446 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp);
447 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp);
448 } else {
449 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1,
450 nphy->rfctrl_intc1_save);
451 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2,
452 nphy->rfctrl_intc2_save);
453 }
454}
455
Rafał Miłeckife3e46e2010-01-15 15:51:55 +0100[diff] [blame]456/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxLpFbw */
457static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev)
458{
459 struct b43_phy_n *nphy = dev->phy.n;
460 u16 tmp;
461 enum ieee80211_band band = b43_current_band(dev->wl);
462 bool ipa = (nphy->ipa2g_on && band == IEEE80211_BAND_2GHZ) ||
463 (nphy->ipa5g_on && band == IEEE80211_BAND_5GHZ);
464
465 if (dev->phy.rev >= 3) {
466 if (ipa) {
467 tmp = 4;
468 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S2,
469 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp);
470 }
471
472 tmp = 1;
473 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S2,
474 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp);
475 }
476}
477
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]478/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */
479static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
480{
481 u32 tmslow;
482
483 if (dev->phy.type != B43_PHYTYPE_N)
484 return;
485
486 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
487 if (force)
488 tmslow |= SSB_TMSLOW_FGC;
489 else
490 tmslow &= ~SSB_TMSLOW_FGC;
491 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
492}
493
494/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]495static void b43_nphy_reset_cca(struct b43_wldev *dev)
496{
497 u16 bbcfg;
498
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]499 b43_nphy_bmac_clock_fgc(dev, 1);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]500 bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG);
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]501 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA);
502 udelay(1);
503 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA);
504 b43_nphy_bmac_clock_fgc(dev, 0);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]505 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]506}
507
Rafał Miłeckiad9716e2010-01-17 13:03:40 +0100[diff] [blame]508/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MIMOConfig */
509static void b43_nphy_update_mimo_config(struct b43_wldev *dev, s32 preamble)
510{
511 u16 mimocfg = b43_phy_read(dev, B43_NPHY_MIMOCFG);
512
513 mimocfg |= B43_NPHY_MIMOCFG_AUTO;
514 if (preamble == 1)
515 mimocfg |= B43_NPHY_MIMOCFG_GFMIX;
516 else
517 mimocfg &= ~B43_NPHY_MIMOCFG_GFMIX;
518
519 b43_phy_write(dev, B43_NPHY_MIMOCFG, mimocfg);
520}
521
Rafał Miłecki4f4ab6c2010-01-17 13:03:55 +0100[diff] [blame]522/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Chains */
523static void b43_nphy_update_txrx_chain(struct b43_wldev *dev)
524{
525 struct b43_phy_n *nphy = dev->phy.n;
526
527 bool override = false;
528 u16 chain = 0x33;
529
530 if (nphy->txrx_chain == 0) {
531 chain = 0x11;
532 override = true;
533 } else if (nphy->txrx_chain == 1) {
534 chain = 0x22;
535 override = true;
536 }
537
538 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
539 ~(B43_NPHY_RFSEQCA_TXEN | B43_NPHY_RFSEQCA_RXEN),
540 chain);
541
542 if (override)
543 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
544 B43_NPHY_RFSEQMODE_CAOVER);
545 else
546 b43_phy_mask(dev, B43_NPHY_RFSEQMODE,
547 ~B43_NPHY_RFSEQMODE_CAOVER);
548}
549
Rafał Miłecki2faa6b82010-01-15 15:26:12 +0100[diff] [blame]550/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqEst */
551static void b43_nphy_rx_iq_est(struct b43_wldev *dev, struct nphy_iq_est *est,
552 u16 samps, u8 time, bool wait)
553{
554 int i;
555 u16 tmp;
556
557 b43_phy_write(dev, B43_NPHY_IQEST_SAMCNT, samps);
558 b43_phy_maskset(dev, B43_NPHY_IQEST_WT, ~B43_NPHY_IQEST_WT_VAL, time);
559 if (wait)
560 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_MODE);
561 else
562 b43_phy_mask(dev, B43_NPHY_IQEST_CMD, ~B43_NPHY_IQEST_CMD_MODE);
563
564 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_START);
565
566 for (i = 1000; i; i--) {
567 tmp = b43_phy_read(dev, B43_NPHY_IQEST_CMD);
568 if (!(tmp & B43_NPHY_IQEST_CMD_START)) {
569 est->i0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI0) << 16) |
570 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO0);
571 est->q0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI0) << 16) |
572 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO0);
573 est->iq0_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI0) << 16) |
574 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO0);
575
576 est->i1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI1) << 16) |
577 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO1);
578 est->q1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI1) << 16) |
579 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO1);
580 est->iq1_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI1) << 16) |
581 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO1);
582 return;
583 }
584 udelay(10);
585 }
586 memset(est, 0, sizeof(*est));
587}
588
Rafał Miłeckia67162a2010-01-15 15:16:25 +0100[diff] [blame]589/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqCoeffs */
590static void b43_nphy_rx_iq_coeffs(struct b43_wldev *dev, bool write,
591 struct b43_phy_n_iq_comp *pcomp)
592{
593 if (write) {
594 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPA0, pcomp->a0);
595 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPB0, pcomp->b0);
596 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPA1, pcomp->a1);
597 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPB1, pcomp->b1);
598 } else {
599 pcomp->a0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPA0);
600 pcomp->b0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPB0);
601 pcomp->a1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPA1);
602 pcomp->b1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPB1);
603 }
604}
605
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]606/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhyCleanup */
607static void b43_nphy_rx_cal_phy_cleanup(struct b43_wldev *dev, u8 core)
608{
609 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
610
611 b43_phy_write(dev, B43_NPHY_RFSEQCA, regs[0]);
612 if (core == 0) {
613 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[1]);
614 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]);
615 } else {
616 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]);
617 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]);
618 }
619 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[3]);
620 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[4]);
621 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, regs[5]);
622 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, regs[6]);
623 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, regs[7]);
624 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, regs[8]);
625 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]);
626 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]);
627}
628
629/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhySetup */
630static void b43_nphy_rx_cal_phy_setup(struct b43_wldev *dev, u8 core)
631{
632 u8 rxval, txval;
633 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
634
635 regs[0] = b43_phy_read(dev, B43_NPHY_RFSEQCA);
636 if (core == 0) {
637 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
638 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
639 } else {
640 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
641 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
642 }
643 regs[3] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
644 regs[4] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
645 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1);
646 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2);
647 regs[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S1);
648 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER);
649 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0);
650 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1);
651
652 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);
653 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);
654
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]655 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
656 ~B43_NPHY_RFSEQCA_RXDIS & 0xFFFF,
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]657 ((1 - core) << B43_NPHY_RFSEQCA_RXDIS_SHIFT));
658 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN,
659 ((1 - core) << B43_NPHY_RFSEQCA_TXEN_SHIFT));
660 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN,
661 (core << B43_NPHY_RFSEQCA_RXEN_SHIFT));
662 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXDIS,
663 (core << B43_NPHY_RFSEQCA_TXDIS_SHIFT));
664
665 if (core == 0) {
666 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x0007);
667 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0007);
668 } else {
669 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x0007);
670 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0007);
671 }
672
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]673 b43_nphy_rf_control_intc_override(dev, 2, 0, 3);
674 b43_nphy_rf_control_override(dev, 8, 0, 3, false);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]675 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]676
677 if (core == 0) {
678 rxval = 1;
679 txval = 8;
680 } else {
681 rxval = 4;
682 txval = 2;
683 }
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]684 b43_nphy_rf_control_intc_override(dev, 1, rxval, (core + 1));
685 b43_nphy_rf_control_intc_override(dev, 1, txval, (2 - core));
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]686}
687
Rafał Miłecki34a56f22010-01-15 15:29:05 +0100[diff] [blame]688/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalcRxIqComp */
689static void b43_nphy_calc_rx_iq_comp(struct b43_wldev *dev, u8 mask)
690{
691 int i;
692 s32 iq;
693 u32 ii;
694 u32 qq;
695 int iq_nbits, qq_nbits;
696 int arsh, brsh;
697 u16 tmp, a, b;
698
699 struct nphy_iq_est est;
700 struct b43_phy_n_iq_comp old;
701 struct b43_phy_n_iq_comp new = { };
702 bool error = false;
703
704 if (mask == 0)
705 return;
706
707 b43_nphy_rx_iq_coeffs(dev, false, &old);
708 b43_nphy_rx_iq_coeffs(dev, true, &new);
709 b43_nphy_rx_iq_est(dev, &est, 0x4000, 32, false);
710 new = old;
711
712 for (i = 0; i < 2; i++) {
713 if (i == 0 && (mask & 1)) {
714 iq = est.iq0_prod;
715 ii = est.i0_pwr;
716 qq = est.q0_pwr;
717 } else if (i == 1 && (mask & 2)) {
718 iq = est.iq1_prod;
719 ii = est.i1_pwr;
720 qq = est.q1_pwr;
721 } else {
Rafał Miłecki34a56f22010-01-15 15:29:05 +0100[diff] [blame]722 continue;
723 }
724
725 if (ii + qq < 2) {
726 error = true;
727 break;
728 }
729
730 iq_nbits = fls(abs(iq));
731 qq_nbits = fls(qq);
732
733 arsh = iq_nbits - 20;
734 if (arsh >= 0) {
735 a = -((iq << (30 - iq_nbits)) + (ii >> (1 + arsh)));
736 tmp = ii >> arsh;
737 } else {
738 a = -((iq << (30 - iq_nbits)) + (ii << (-1 - arsh)));
739 tmp = ii << -arsh;
740 }
741 if (tmp == 0) {
742 error = true;
743 break;
744 }
745 a /= tmp;
746
747 brsh = qq_nbits - 11;
748 if (brsh >= 0) {
749 b = (qq << (31 - qq_nbits));
750 tmp = ii >> brsh;
751 } else {
752 b = (qq << (31 - qq_nbits));
753 tmp = ii << -brsh;
754 }
755 if (tmp == 0) {
756 error = true;
757 break;
758 }
759 b = int_sqrt(b / tmp - a * a) - (1 << 10);
760
761 if (i == 0 && (mask & 0x1)) {
762 if (dev->phy.rev >= 3) {
763 new.a0 = a & 0x3FF;
764 new.b0 = b & 0x3FF;
765 } else {
766 new.a0 = b & 0x3FF;
767 new.b0 = a & 0x3FF;
768 }
769 } else if (i == 1 && (mask & 0x2)) {
770 if (dev->phy.rev >= 3) {
771 new.a1 = a & 0x3FF;
772 new.b1 = b & 0x3FF;
773 } else {
774 new.a1 = b & 0x3FF;
775 new.b1 = a & 0x3FF;
776 }
777 }
778 }
779
780 if (error)
781 new = old;
782
783 b43_nphy_rx_iq_coeffs(dev, true, &new);
784}
785
Rafał Miłecki09146402010-01-15 15:17:10 +0100[diff] [blame]786/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxIqWar */
787static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev)
788{
789 u16 array[4];
790 int i;
791
792 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C50);
793 for (i = 0; i < 4; i++)
794 array[i] = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
795
796 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW0, array[0]);
797 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW1, array[1]);
798 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW2, array[2]);
799 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW3, array[3]);
800}
801
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]802/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame]803static void b43_nphy_write_clip_detection(struct b43_wldev *dev,
804 const u16 *clip_st)
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]805{
806 b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]);
807 b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]);
808}
809
810/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
811static void b43_nphy_read_clip_detection(struct b43_wldev *dev, u16 *clip_st)
812{
813 clip_st[0] = b43_phy_read(dev, B43_NPHY_C1_CLIP1THRES);
814 clip_st[1] = b43_phy_read(dev, B43_NPHY_C2_CLIP1THRES);
815}
816
Rafał Miłecki8987a9e2010-02-27 13:03:33 +0100[diff] [blame]817/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SuperSwitchInit */
818static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
819{
820 if (dev->phy.rev >= 3) {
821 if (!init)
822 return;
823 if (0 /* FIXME */) {
824 b43_ntab_write(dev, B43_NTAB16(9, 2), 0x211);
825 b43_ntab_write(dev, B43_NTAB16(9, 3), 0x222);
826 b43_ntab_write(dev, B43_NTAB16(9, 8), 0x144);
827 b43_ntab_write(dev, B43_NTAB16(9, 12), 0x188);
828 }
829 } else {
830 b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0);
831 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
832
833 ssb_chipco_gpio_control(&dev->dev->bus->chipco, 0xFC00,
834 0xFC00);
835 b43_write32(dev, B43_MMIO_MACCTL,
836 b43_read32(dev, B43_MMIO_MACCTL) &
837 ~B43_MACCTL_GPOUTSMSK);
838 b43_write16(dev, B43_MMIO_GPIO_MASK,
839 b43_read16(dev, B43_MMIO_GPIO_MASK) | 0xFC00);
840 b43_write16(dev, B43_MMIO_GPIO_CONTROL,
841 b43_read16(dev, B43_MMIO_GPIO_CONTROL) & ~0xFC00);
842
843 if (init) {
844 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
845 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
846 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
847 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
848 }
849 }
850}
851
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]852/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/classifier */
853static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
854{
855 u16 tmp;
856
857 if (dev->dev->id.revision == 16)
858 b43_mac_suspend(dev);
859
860 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL);
861 tmp &= (B43_NPHY_CLASSCTL_CCKEN | B43_NPHY_CLASSCTL_OFDMEN |
862 B43_NPHY_CLASSCTL_WAITEDEN);
863 tmp &= ~mask;
864 tmp |= (val & mask);
865 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp);
866
867 if (dev->dev->id.revision == 16)
868 b43_mac_enable(dev);
869
870 return tmp;
871}
872
Rafał Miłecki5c1a1402010-01-15 15:10:54 +0100[diff] [blame]873/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/carriersearch */
874static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, bool enable)
875{
876 struct b43_phy *phy = &dev->phy;
877 struct b43_phy_n *nphy = phy->n;
878
879 if (enable) {
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame]880 static const u16 clip[] = { 0xFFFF, 0xFFFF };
Rafał Miłecki5c1a1402010-01-15 15:10:54 +0100[diff] [blame]881 if (nphy->deaf_count++ == 0) {
882 nphy->classifier_state = b43_nphy_classifier(dev, 0, 0);
883 b43_nphy_classifier(dev, 0x7, 0);
884 b43_nphy_read_clip_detection(dev, nphy->clip_state);
885 b43_nphy_write_clip_detection(dev, clip);
886 }
887 b43_nphy_reset_cca(dev);
888 } else {
889 if (--nphy->deaf_count == 0) {
890 b43_nphy_classifier(dev, 0x7, nphy->classifier_state);
891 b43_nphy_write_clip_detection(dev, nphy->clip_state);
892 }
893 }
894}
895
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]896/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/stop-playback */
897static void b43_nphy_stop_playback(struct b43_wldev *dev)
898{
899 struct b43_phy_n *nphy = dev->phy.n;
900 u16 tmp;
901
902 if (nphy->hang_avoid)
903 b43_nphy_stay_in_carrier_search(dev, 1);
904
905 tmp = b43_phy_read(dev, B43_NPHY_SAMP_STAT);
906 if (tmp & 0x1)
907 b43_phy_set(dev, B43_NPHY_SAMP_CMD, B43_NPHY_SAMP_CMD_STOP);
908 else if (tmp & 0x2)
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]909 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]910
911 b43_phy_mask(dev, B43_NPHY_SAMP_CMD, ~0x0004);
912
913 if (nphy->bb_mult_save & 0x80000000) {
914 tmp = nphy->bb_mult_save & 0xFFFF;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]915 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]916 nphy->bb_mult_save = 0;
917 }
918
919 if (nphy->hang_avoid)
920 b43_nphy_stay_in_carrier_search(dev, 0);
921}
922
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]923/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SpurWar */
924static void b43_nphy_spur_workaround(struct b43_wldev *dev)
925{
926 struct b43_phy_n *nphy = dev->phy.n;
927
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]928 u8 channel = dev->phy.channel;
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]929 int tone[2] = { 57, 58 };
930 u32 noise[2] = { 0x3FF, 0x3FF };
931
932 B43_WARN_ON(dev->phy.rev < 3);
933
934 if (nphy->hang_avoid)
935 b43_nphy_stay_in_carrier_search(dev, 1);
936
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]937 if (nphy->gband_spurwar_en) {
938 /* TODO: N PHY Adjust Analog Pfbw (7) */
939 if (channel == 11 && dev->phy.is_40mhz)
940 ; /* TODO: N PHY Adjust Min Noise Var(2, tone, noise)*/
941 else
942 ; /* TODO: N PHY Adjust Min Noise Var(0, NULL, NULL)*/
943 /* TODO: N PHY Adjust CRS Min Power (0x1E) */
944 }
945
946 if (nphy->aband_spurwar_en) {
947 if (channel == 54) {
948 tone[0] = 0x20;
949 noise[0] = 0x25F;
950 } else if (channel == 38 || channel == 102 || channel == 118) {
951 if (0 /* FIXME */) {
952 tone[0] = 0x20;
953 noise[0] = 0x21F;
954 } else {
955 tone[0] = 0;
956 noise[0] = 0;
957 }
958 } else if (channel == 134) {
959 tone[0] = 0x20;
960 noise[0] = 0x21F;
961 } else if (channel == 151) {
962 tone[0] = 0x10;
963 noise[0] = 0x23F;
964 } else if (channel == 153 || channel == 161) {
965 tone[0] = 0x30;
966 noise[0] = 0x23F;
967 } else {
968 tone[0] = 0;
969 noise[0] = 0;
970 }
971
972 if (!tone[0] && !noise[0])
973 ; /* TODO: N PHY Adjust Min Noise Var(1, tone, noise)*/
974 else
975 ; /* TODO: N PHY Adjust Min Noise Var(0, NULL, NULL)*/
976 }
977
978 if (nphy->hang_avoid)
979 b43_nphy_stay_in_carrier_search(dev, 0);
980}
981
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]982/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/AdjustLnaGainTbl */
983static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
984{
985 struct b43_phy_n *nphy = dev->phy.n;
986
987 u8 i;
988 s16 tmp;
989 u16 data[4];
990 s16 gain[2];
991 u16 minmax[2];
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame]992 static const u16 lna_gain[4] = { -2, 10, 19, 25 };
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]993
994 if (nphy->hang_avoid)
995 b43_nphy_stay_in_carrier_search(dev, 1);
996
997 if (nphy->gain_boost) {
998 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
999 gain[0] = 6;
1000 gain[1] = 6;
1001 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]1002 tmp = 40370 - 315 * dev->phy.channel;
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]1003 gain[0] = ((tmp >> 13) + ((tmp >> 12) & 1));
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]1004 tmp = 23242 - 224 * dev->phy.channel;
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]1005 gain[1] = ((tmp >> 13) + ((tmp >> 12) & 1));
1006 }
1007 } else {
1008 gain[0] = 0;
1009 gain[1] = 0;
1010 }
1011
1012 for (i = 0; i < 2; i++) {
1013 if (nphy->elna_gain_config) {
1014 data[0] = 19 + gain[i];
1015 data[1] = 25 + gain[i];
1016 data[2] = 25 + gain[i];
1017 data[3] = 25 + gain[i];
1018 } else {
1019 data[0] = lna_gain[0] + gain[i];
1020 data[1] = lna_gain[1] + gain[i];
1021 data[2] = lna_gain[2] + gain[i];
1022 data[3] = lna_gain[3] + gain[i];
1023 }
Rafał Miłeckic0f05b92010-11-18 13:27:58 +0100[diff] [blame]1024 b43_ntab_write_bulk(dev, B43_NTAB16(i, 8), 4, data);
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]1025
1026 minmax[i] = 23 + gain[i];
1027 }
1028
1029 b43_phy_maskset(dev, B43_NPHY_C1_MINMAX_GAIN, ~B43_NPHY_C1_MINGAIN,
1030 minmax[0] << B43_NPHY_C1_MINGAIN_SHIFT);
1031 b43_phy_maskset(dev, B43_NPHY_C2_MINMAX_GAIN, ~B43_NPHY_C2_MINGAIN,
1032 minmax[1] << B43_NPHY_C2_MINGAIN_SHIFT);
1033
1034 if (nphy->hang_avoid)
1035 b43_nphy_stay_in_carrier_search(dev, 0);
1036}
1037
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1038/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/WorkaroundsGainCtrl */
Gábor Stefanike723ef32010-08-16 22:39:15 +0200[diff] [blame]1039static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1040{
1041 struct b43_phy_n *nphy = dev->phy.n;
1042 u8 i, j;
1043 u8 code;
Rafał Miłeckic0f05b92010-11-18 13:27:58 +0100[diff] [blame]1044 u16 tmp;
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1045
1046 /* TODO: for PHY >= 3
1047 s8 *lna1_gain, *lna2_gain;
1048 u8 *gain_db, *gain_bits;
1049 u16 *rfseq_init;
1050 u8 lpf_gain[6] = { 0x00, 0x06, 0x0C, 0x12, 0x12, 0x12 };
1051 u8 lpf_bits[6] = { 0, 1, 2, 3, 3, 3 };
1052 */
1053
1054 u8 rfseq_events[3] = { 6, 8, 7 };
1055 u8 rfseq_delays[3] = { 10, 30, 1 };
1056
1057 if (dev->phy.rev >= 3) {
1058 /* TODO */
1059 } else {
1060 /* Set Clip 2 detect */
1061 b43_phy_set(dev, B43_NPHY_C1_CGAINI,
1062 B43_NPHY_C1_CGAINI_CL2DETECT);
1063 b43_phy_set(dev, B43_NPHY_C2_CGAINI,
1064 B43_NPHY_C2_CGAINI_CL2DETECT);
1065
1066 /* Set narrowband clip threshold */
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]1067 b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84);
1068 b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1069
1070 if (!dev->phy.is_40mhz) {
1071 /* Set dwell lengths */
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]1072 b43_phy_write(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B);
1073 b43_phy_write(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B);
1074 b43_phy_write(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009);
1075 b43_phy_write(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1076 }
1077
1078 /* Set wideband clip 2 threshold */
1079 b43_phy_maskset(dev, B43_NPHY_C1_CLIPWBTHRES,
1080 ~B43_NPHY_C1_CLIPWBTHRES_CLIP2,
1081 21);
1082 b43_phy_maskset(dev, B43_NPHY_C2_CLIPWBTHRES,
1083 ~B43_NPHY_C2_CLIPWBTHRES_CLIP2,
1084 21);
1085
1086 if (!dev->phy.is_40mhz) {
1087 b43_phy_maskset(dev, B43_NPHY_C1_CGAINI,
1088 ~B43_NPHY_C1_CGAINI_GAINBKOFF, 0x1);
1089 b43_phy_maskset(dev, B43_NPHY_C2_CGAINI,
1090 ~B43_NPHY_C2_CGAINI_GAINBKOFF, 0x1);
1091 b43_phy_maskset(dev, B43_NPHY_C1_CCK_CGAINI,
1092 ~B43_NPHY_C1_CCK_CGAINI_GAINBKOFF, 0x1);
1093 b43_phy_maskset(dev, B43_NPHY_C2_CCK_CGAINI,
1094 ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1);
1095 }
1096
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]1097 b43_phy_write(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1098
1099 if (nphy->gain_boost) {
1100 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ &&
1101 dev->phy.is_40mhz)
1102 code = 4;
1103 else
1104 code = 5;
1105 } else {
1106 code = dev->phy.is_40mhz ? 6 : 7;
1107 }
1108
1109 /* Set HPVGA2 index */
1110 b43_phy_maskset(dev, B43_NPHY_C1_INITGAIN,
1111 ~B43_NPHY_C1_INITGAIN_HPVGA2,
1112 code << B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT);
1113 b43_phy_maskset(dev, B43_NPHY_C2_INITGAIN,
1114 ~B43_NPHY_C2_INITGAIN_HPVGA2,
1115 code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT);
1116
1117 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]1118 /* specs say about 2 loops, but wl does 4 */
1119 for (i = 0; i < 4; i++)
1120 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1121 (code << 8 | 0x7C));
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1122
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]1123 b43_nphy_adjust_lna_gain_table(dev);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1124
1125 if (nphy->elna_gain_config) {
1126 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0808);
1127 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
1128 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
1129 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
1130 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
1131
1132 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0C08);
1133 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
1134 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
1135 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
1136 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
1137
1138 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]1139 /* specs say about 2 loops, but wl does 4 */
1140 for (i = 0; i < 4; i++)
1141 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1142 (code << 8 | 0x74));
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1143 }
1144
1145 if (dev->phy.rev == 2) {
1146 for (i = 0; i < 4; i++) {
1147 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1148 (0x0400 * i) + 0x0020);
Rafał Miłeckic0f05b92010-11-18 13:27:58 +0100[diff] [blame]1149 for (j = 0; j < 21; j++) {
1150 tmp = j * (i < 2 ? 3 : 1);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1151 b43_phy_write(dev,
Rafał Miłeckic0f05b92010-11-18 13:27:58 +0100[diff] [blame]1152 B43_NPHY_TABLE_DATALO, tmp);
1153 }
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1154 }
1155
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1156 b43_nphy_set_rf_sequence(dev, 5,
1157 rfseq_events, rfseq_delays, 3);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1158 b43_phy_maskset(dev, B43_NPHY_OVER_DGAIN1,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]1159 ~B43_NPHY_OVER_DGAIN_CCKDGECV & 0xFFFF,
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1160 0x5A << B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT);
1161
1162 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
1163 b43_phy_maskset(dev, B43_PHY_N(0xC5D),
1164 0xFF80, 4);
1165 }
1166 }
1167}
1168
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1169/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */
1170static void b43_nphy_workarounds(struct b43_wldev *dev)
1171{
1172 struct ssb_bus *bus = dev->dev->bus;
1173 struct b43_phy *phy = &dev->phy;
1174 struct b43_phy_n *nphy = phy->n;
1175
1176 u8 events1[7] = { 0x0, 0x1, 0x2, 0x8, 0x4, 0x5, 0x3 };
1177 u8 delays1[7] = { 0x8, 0x6, 0x6, 0x2, 0x4, 0x3C, 0x1 };
1178
1179 u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 };
1180 u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 };
1181
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]1182 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1183 b43_nphy_classifier(dev, 1, 0);
1184 else
1185 b43_nphy_classifier(dev, 1, 1);
1186
1187 if (nphy->hang_avoid)
1188 b43_nphy_stay_in_carrier_search(dev, 1);
1189
1190 b43_phy_set(dev, B43_NPHY_IQFLIP,
1191 B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2);
1192
1193 if (dev->phy.rev >= 3) {
1194 /* TODO */
1195 } else {
1196 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ &&
1197 nphy->band5g_pwrgain) {
1198 b43_radio_mask(dev, B2055_C1_TX_RF_SPARE, ~0x8);
1199 b43_radio_mask(dev, B2055_C2_TX_RF_SPARE, ~0x8);
1200 } else {
1201 b43_radio_set(dev, B2055_C1_TX_RF_SPARE, 0x8);
1202 b43_radio_set(dev, B2055_C2_TX_RF_SPARE, 0x8);
1203 }
1204
1205 /* TODO: convert to b43_ntab_write? */
1206 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2000);
1207 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
1208 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2010);
1209 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
1210 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2002);
1211 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
1212 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2012);
1213 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
1214
1215 if (dev->phy.rev < 2) {
1216 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2008);
1217 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
1218 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2018);
1219 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
1220 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2007);
1221 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
1222 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2017);
1223 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
1224 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2006);
1225 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
1226 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2016);
1227 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
1228 }
1229
1230 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
1231 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
1232 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
1233 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
1234
1235 if (bus->sprom.boardflags2_lo & 0x100 &&
1236 bus->boardinfo.type == 0x8B) {
1237 delays1[0] = 0x1;
1238 delays1[5] = 0x14;
1239 }
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1240 b43_nphy_set_rf_sequence(dev, 0, events1, delays1, 7);
1241 b43_nphy_set_rf_sequence(dev, 1, events2, delays2, 7);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1242
Gábor Stefanike723ef32010-08-16 22:39:15 +0200[diff] [blame]1243 b43_nphy_gain_ctrl_workarounds(dev);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1244
1245 if (dev->phy.rev < 2) {
1246 if (b43_phy_read(dev, B43_NPHY_RXCTL) & 0x2)
Gábor Stefanike7f45d32010-08-16 22:39:14 +0200[diff] [blame]1247 b43_hf_write(dev, b43_hf_read(dev) |
1248 B43_HF_MLADVW);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1249 } else if (dev->phy.rev == 2) {
1250 b43_phy_write(dev, B43_NPHY_CRSCHECK2, 0);
1251 b43_phy_write(dev, B43_NPHY_CRSCHECK3, 0);
1252 }
1253
1254 if (dev->phy.rev < 2)
1255 b43_phy_mask(dev, B43_NPHY_SCRAM_SIGCTL,
1256 ~B43_NPHY_SCRAM_SIGCTL_SCM);
1257
1258 /* Set phase track alpha and beta */
1259 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x125);
1260 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x1B3);
1261 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x105);
1262 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x16E);
1263 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0xCD);
1264 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20);
1265
1266 b43_phy_mask(dev, B43_NPHY_PIL_DW1,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]1267 ~B43_NPHY_PIL_DW_64QAM & 0xFFFF);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1268 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B1, 0xB5);
1269 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B2, 0xA4);
1270 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B3, 0x00);
1271
1272 if (dev->phy.rev == 2)
1273 b43_phy_set(dev, B43_NPHY_FINERX2_CGC,
1274 B43_NPHY_FINERX2_CGC_DECGC);
1275 }
1276
1277 if (nphy->hang_avoid)
1278 b43_nphy_stay_in_carrier_search(dev, 0);
1279}
1280
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1281/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/LoadSampleTable */
1282static int b43_nphy_load_samples(struct b43_wldev *dev,
1283 struct b43_c32 *samples, u16 len) {
1284 struct b43_phy_n *nphy = dev->phy.n;
1285 u16 i;
1286 u32 *data;
1287
1288 data = kzalloc(len * sizeof(u32), GFP_KERNEL);
1289 if (!data) {
1290 b43err(dev->wl, "allocation for samples loading failed\n");
1291 return -ENOMEM;
1292 }
1293 if (nphy->hang_avoid)
1294 b43_nphy_stay_in_carrier_search(dev, 1);
1295
1296 for (i = 0; i < len; i++) {
1297 data[i] = (samples[i].i & 0x3FF << 10);
1298 data[i] |= samples[i].q & 0x3FF;
1299 }
1300 b43_ntab_write_bulk(dev, B43_NTAB32(17, 0), len, data);
1301
1302 kfree(data);
1303 if (nphy->hang_avoid)
1304 b43_nphy_stay_in_carrier_search(dev, 0);
1305 return 0;
1306}
1307
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1308/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GenLoadSamples */
1309static u16 b43_nphy_gen_load_samples(struct b43_wldev *dev, u32 freq, u16 max,
1310 bool test)
1311{
1312 int i;
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1313 u16 bw, len, rot, angle;
Larry Fingerda860472010-01-26 16:42:02 -0600[diff] [blame]1314 struct b43_c32 *samples;
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1315
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1316
1317 bw = (dev->phy.is_40mhz) ? 40 : 20;
1318 len = bw << 3;
1319
1320 if (test) {
1321 if (b43_phy_read(dev, B43_NPHY_BBCFG) & B43_NPHY_BBCFG_RSTRX)
1322 bw = 82;
1323 else
1324 bw = 80;
1325
1326 if (dev->phy.is_40mhz)
1327 bw <<= 1;
1328
1329 len = bw << 1;
1330 }
1331
Joe Perchesbaeb2ff2010-08-11 07:02:48 +0000[diff] [blame]1332 samples = kcalloc(len, sizeof(struct b43_c32), GFP_KERNEL);
Rafał Miłecki40bd5202010-02-04 13:11:54 +0100[diff] [blame]1333 if (!samples) {
1334 b43err(dev->wl, "allocation for samples generation failed\n");
1335 return 0;
1336 }
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1337 rot = (((freq * 36) / bw) << 16) / 100;
1338 angle = 0;
1339
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1340 for (i = 0; i < len; i++) {
1341 samples[i] = b43_cordic(angle);
1342 angle += rot;
1343 samples[i].q = CORDIC_CONVERT(samples[i].q * max);
1344 samples[i].i = CORDIC_CONVERT(samples[i].i * max);
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1345 }
1346
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1347 i = b43_nphy_load_samples(dev, samples, len);
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1348 kfree(samples);
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1349 return (i < 0) ? 0 : len;
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1350}
1351
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]1352/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RunSamples */
1353static void b43_nphy_run_samples(struct b43_wldev *dev, u16 samps, u16 loops,
1354 u16 wait, bool iqmode, bool dac_test)
1355{
1356 struct b43_phy_n *nphy = dev->phy.n;
1357 int i;
1358 u16 seq_mode;
1359 u32 tmp;
1360
1361 if (nphy->hang_avoid)
1362 b43_nphy_stay_in_carrier_search(dev, true);
1363
1364 if ((nphy->bb_mult_save & 0x80000000) == 0) {
1365 tmp = b43_ntab_read(dev, B43_NTAB16(15, 87));
1366 nphy->bb_mult_save = (tmp & 0xFFFF) | 0x80000000;
1367 }
1368
1369 if (!dev->phy.is_40mhz)
1370 tmp = 0x6464;
1371 else
1372 tmp = 0x4747;
1373 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp);
1374
1375 if (nphy->hang_avoid)
1376 b43_nphy_stay_in_carrier_search(dev, false);
1377
1378 b43_phy_write(dev, B43_NPHY_SAMP_DEPCNT, (samps - 1));
1379
1380 if (loops != 0xFFFF)
1381 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, (loops - 1));
1382 else
1383 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, loops);
1384
1385 b43_phy_write(dev, B43_NPHY_SAMP_WAITCNT, wait);
1386
1387 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
1388
1389 b43_phy_set(dev, B43_NPHY_RFSEQMODE, B43_NPHY_RFSEQMODE_CAOVER);
1390 if (iqmode) {
1391 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF);
1392 b43_phy_set(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8000);
1393 } else {
1394 if (dac_test)
1395 b43_phy_write(dev, B43_NPHY_SAMP_CMD, 5);
1396 else
1397 b43_phy_write(dev, B43_NPHY_SAMP_CMD, 1);
1398 }
1399 for (i = 0; i < 100; i++) {
1400 if (b43_phy_read(dev, B43_NPHY_RFSEQST) & 1) {
1401 i = 0;
1402 break;
1403 }
1404 udelay(10);
1405 }
1406 if (i)
1407 b43err(dev->wl, "run samples timeout\n");
1408
1409 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
1410}
1411
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1412/*
1413 * Transmits a known value for LO calibration
1414 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/TXTone
1415 */
1416static int b43_nphy_tx_tone(struct b43_wldev *dev, u32 freq, u16 max_val,
1417 bool iqmode, bool dac_test)
1418{
1419 u16 samp = b43_nphy_gen_load_samples(dev, freq, max_val, dac_test);
1420 if (samp == 0)
1421 return -1;
1422 b43_nphy_run_samples(dev, samp, 0xFFFF, 0, iqmode, dac_test);
1423 return 0;
1424}
1425
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]1426/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrCtrlCoefSetup */
1427static void b43_nphy_tx_pwr_ctrl_coef_setup(struct b43_wldev *dev)
1428{
1429 struct b43_phy_n *nphy = dev->phy.n;
1430 int i, j;
1431 u32 tmp;
1432 u32 cur_real, cur_imag, real_part, imag_part;
1433
1434 u16 buffer[7];
1435
1436 if (nphy->hang_avoid)
1437 b43_nphy_stay_in_carrier_search(dev, true);
1438
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]1439 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]1440
1441 for (i = 0; i < 2; i++) {
1442 tmp = ((buffer[i * 2] & 0x3FF) << 10) |
1443 (buffer[i * 2 + 1] & 0x3FF);
1444 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1445 (((i + 26) << 10) | 320));
1446 for (j = 0; j < 128; j++) {
1447 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI,
1448 ((tmp >> 16) & 0xFFFF));
1449 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1450 (tmp & 0xFFFF));
1451 }
1452 }
1453
1454 for (i = 0; i < 2; i++) {
1455 tmp = buffer[5 + i];
1456 real_part = (tmp >> 8) & 0xFF;
1457 imag_part = (tmp & 0xFF);
1458 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1459 (((i + 26) << 10) | 448));
1460
1461 if (dev->phy.rev >= 3) {
1462 cur_real = real_part;
1463 cur_imag = imag_part;
1464 tmp = ((cur_real & 0xFF) << 8) | (cur_imag & 0xFF);
1465 }
1466
1467 for (j = 0; j < 128; j++) {
1468 if (dev->phy.rev < 3) {
1469 cur_real = (real_part * loscale[j] + 128) >> 8;
1470 cur_imag = (imag_part * loscale[j] + 128) >> 8;
1471 tmp = ((cur_real & 0xFF) << 8) |
1472 (cur_imag & 0xFF);
1473 }
1474 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI,
1475 ((tmp >> 16) & 0xFFFF));
1476 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1477 (tmp & 0xFFFF));
1478 }
1479 }
1480
1481 if (dev->phy.rev >= 3) {
1482 b43_shm_write16(dev, B43_SHM_SHARED,
1483 B43_SHM_SH_NPHY_TXPWR_INDX0, 0xFFFF);
1484 b43_shm_write16(dev, B43_SHM_SHARED,
1485 B43_SHM_SH_NPHY_TXPWR_INDX1, 0xFFFF);
1486 }
1487
1488 if (nphy->hang_avoid)
1489 b43_nphy_stay_in_carrier_search(dev, false);
1490}
1491
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1492/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRfSeq */
1493static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
1494 u8 *events, u8 *delays, u8 length)
1495{
1496 struct b43_phy_n *nphy = dev->phy.n;
1497 u8 i;
1498 u8 end = (dev->phy.rev >= 3) ? 0x1F : 0x0F;
1499 u16 offset1 = cmd << 4;
1500 u16 offset2 = offset1 + 0x80;
1501
1502 if (nphy->hang_avoid)
1503 b43_nphy_stay_in_carrier_search(dev, true);
1504
1505 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset1), length, events);
1506 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset2), length, delays);
1507
1508 for (i = length; i < 16; i++) {
1509 b43_ntab_write(dev, B43_NTAB8(7, offset1 + i), end);
1510 b43_ntab_write(dev, B43_NTAB8(7, offset2 + i), 1);
1511 }
1512
1513 if (nphy->hang_avoid)
1514 b43_nphy_stay_in_carrier_search(dev, false);
1515}
1516
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]1517/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ForceRFSeq */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1518static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
1519 enum b43_nphy_rf_sequence seq)
1520{
1521 static const u16 trigger[] = {
1522 [B43_RFSEQ_RX2TX] = B43_NPHY_RFSEQTR_RX2TX,
1523 [B43_RFSEQ_TX2RX] = B43_NPHY_RFSEQTR_TX2RX,
1524 [B43_RFSEQ_RESET2RX] = B43_NPHY_RFSEQTR_RST2RX,
1525 [B43_RFSEQ_UPDATE_GAINH] = B43_NPHY_RFSEQTR_UPGH,
1526 [B43_RFSEQ_UPDATE_GAINL] = B43_NPHY_RFSEQTR_UPGL,
1527 [B43_RFSEQ_UPDATE_GAINU] = B43_NPHY_RFSEQTR_UPGU,
1528 };
1529 int i;
Rafał Miłeckic57199b2010-01-17 13:04:08 +0100[diff] [blame]1530 u16 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1531
1532 B43_WARN_ON(seq >= ARRAY_SIZE(trigger));
1533
1534 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
1535 B43_NPHY_RFSEQMODE_CAOVER | B43_NPHY_RFSEQMODE_TROVER);
1536 b43_phy_set(dev, B43_NPHY_RFSEQTR, trigger[seq]);
1537 for (i = 0; i < 200; i++) {
1538 if (!(b43_phy_read(dev, B43_NPHY_RFSEQST) & trigger[seq]))
1539 goto ok;
1540 msleep(1);
1541 }
1542 b43err(dev->wl, "RF sequence status timeout\n");
1543ok:
Rafał Miłeckic57199b2010-01-17 13:04:08 +0100[diff] [blame]1544 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1545}
1546
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]1547/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlOverride */
1548static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
1549 u16 value, u8 core, bool off)
1550{
1551 int i;
1552 u8 index = fls(field);
1553 u8 addr, en_addr, val_addr;
1554 /* we expect only one bit set */
Rafał Miłecki3ed0fac2010-01-25 18:59:58 +0100[diff] [blame]1555 B43_WARN_ON(field & (~(1 << (index - 1))));
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]1556
1557 if (dev->phy.rev >= 3) {
1558 const struct nphy_rf_control_override_rev3 *rf_ctrl;
1559 for (i = 0; i < 2; i++) {
1560 if (index == 0 || index == 16) {
1561 b43err(dev->wl,
1562 "Unsupported RF Ctrl Override call\n");
1563 return;
1564 }
1565
1566 rf_ctrl = &tbl_rf_control_override_rev3[index - 1];
1567 en_addr = B43_PHY_N((i == 0) ?
1568 rf_ctrl->en_addr0 : rf_ctrl->en_addr1);
1569 val_addr = B43_PHY_N((i == 0) ?
1570 rf_ctrl->val_addr0 : rf_ctrl->val_addr1);
1571
1572 if (off) {
1573 b43_phy_mask(dev, en_addr, ~(field));
1574 b43_phy_mask(dev, val_addr,
1575 ~(rf_ctrl->val_mask));
1576 } else {
1577 if (core == 0 || ((1 << core) & i) != 0) {
1578 b43_phy_set(dev, en_addr, field);
1579 b43_phy_maskset(dev, val_addr,
1580 ~(rf_ctrl->val_mask),
1581 (value << rf_ctrl->val_shift));
1582 }
1583 }
1584 }
1585 } else {
1586 const struct nphy_rf_control_override_rev2 *rf_ctrl;
1587 if (off) {
1588 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~(field));
1589 value = 0;
1590 } else {
1591 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, field);
1592 }
1593
1594 for (i = 0; i < 2; i++) {
1595 if (index <= 1 || index == 16) {
1596 b43err(dev->wl,
1597 "Unsupported RF Ctrl Override call\n");
1598 return;
1599 }
1600
1601 if (index == 2 || index == 10 ||
1602 (index >= 13 && index <= 15)) {
1603 core = 1;
1604 }
1605
1606 rf_ctrl = &tbl_rf_control_override_rev2[index - 2];
1607 addr = B43_PHY_N((i == 0) ?
1608 rf_ctrl->addr0 : rf_ctrl->addr1);
1609
1610 if ((core & (1 << i)) != 0)
1611 b43_phy_maskset(dev, addr, ~(rf_ctrl->bmask),
1612 (value << rf_ctrl->shift));
1613
1614 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, 0x1);
1615 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1616 B43_NPHY_RFCTL_CMD_START);
1617 udelay(1);
1618 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, 0xFFFE);
1619 }
1620 }
1621}
1622
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]1623/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlIntcOverride */
1624static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
1625 u16 value, u8 core)
1626{
1627 u8 i, j;
1628 u16 reg, tmp, val;
1629
1630 B43_WARN_ON(dev->phy.rev < 3);
1631 B43_WARN_ON(field > 4);
1632
1633 for (i = 0; i < 2; i++) {
1634 if ((core == 1 && i == 1) || (core == 2 && !i))
1635 continue;
1636
1637 reg = (i == 0) ?
1638 B43_NPHY_RFCTL_INTC1 : B43_NPHY_RFCTL_INTC2;
1639 b43_phy_mask(dev, reg, 0xFBFF);
1640
1641 switch (field) {
1642 case 0:
1643 b43_phy_write(dev, reg, 0);
1644 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
1645 break;
1646 case 1:
1647 if (!i) {
1648 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC1,
1649 0xFC3F, (value << 6));
1650 b43_phy_maskset(dev, B43_NPHY_TXF_40CO_B1S1,
1651 0xFFFE, 1);
1652 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1653 B43_NPHY_RFCTL_CMD_START);
1654 for (j = 0; j < 100; j++) {
1655 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_START) {
1656 j = 0;
1657 break;
1658 }
1659 udelay(10);
1660 }
1661 if (j)
1662 b43err(dev->wl,
1663 "intc override timeout\n");
1664 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1,
1665 0xFFFE);
1666 } else {
1667 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC2,
1668 0xFC3F, (value << 6));
1669 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
1670 0xFFFE, 1);
1671 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1672 B43_NPHY_RFCTL_CMD_RXTX);
1673 for (j = 0; j < 100; j++) {
1674 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_RXTX) {
1675 j = 0;
1676 break;
1677 }
1678 udelay(10);
1679 }
1680 if (j)
1681 b43err(dev->wl,
1682 "intc override timeout\n");
1683 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,
1684 0xFFFE);
1685 }
1686 break;
1687 case 2:
1688 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1689 tmp = 0x0020;
1690 val = value << 5;
1691 } else {
1692 tmp = 0x0010;
1693 val = value << 4;
1694 }
1695 b43_phy_maskset(dev, reg, ~tmp, val);
1696 break;
1697 case 3:
1698 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1699 tmp = 0x0001;
1700 val = value;
1701 } else {
1702 tmp = 0x0004;
1703 val = value << 2;
1704 }
1705 b43_phy_maskset(dev, reg, ~tmp, val);
1706 break;
1707 case 4:
1708 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1709 tmp = 0x0002;
1710 val = value << 1;
1711 } else {
1712 tmp = 0x0008;
1713 val = value << 3;
1714 }
1715 b43_phy_maskset(dev, reg, ~tmp, val);
1716 break;
1717 }
1718 }
1719}
1720
Rafał Miłeckibec18642010-11-18 13:28:00 +0100[diff] [blame]1721/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BPHYInit */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1722static void b43_nphy_bphy_init(struct b43_wldev *dev)
1723{
1724 unsigned int i;
1725 u16 val;
1726
1727 val = 0x1E1F;
Rafał Miłeckifee613b2010-11-18 21:11:41 +0100[diff] [blame]1728 for (i = 0; i < 16; i++) {
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1729 b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val);
1730 val -= 0x202;
1731 }
1732 val = 0x3E3F;
1733 for (i = 0; i < 16; i++) {
Rafał Miłeckifee613b2010-11-18 21:11:41 +0100[diff] [blame]1734 b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1735 val -= 0x202;
1736 }
1737 b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);
1738}
1739
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1740/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ScaleOffsetRssi */
1741static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
1742 s8 offset, u8 core, u8 rail, u8 type)
1743{
1744 u16 tmp;
1745 bool core1or5 = (core == 1) || (core == 5);
1746 bool core2or5 = (core == 2) || (core == 5);
1747
1748 offset = clamp_val(offset, -32, 31);
1749 tmp = ((scale & 0x3F) << 8) | (offset & 0x3F);
1750
1751 if (core1or5 && (rail == 0) && (type == 2))
1752 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp);
1753 if (core1or5 && (rail == 1) && (type == 2))
1754 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp);
1755 if (core2or5 && (rail == 0) && (type == 2))
1756 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp);
1757 if (core2or5 && (rail == 1) && (type == 2))
1758 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp);
1759 if (core1or5 && (rail == 0) && (type == 0))
1760 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp);
1761 if (core1or5 && (rail == 1) && (type == 0))
1762 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp);
1763 if (core2or5 && (rail == 0) && (type == 0))
1764 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp);
1765 if (core2or5 && (rail == 1) && (type == 0))
1766 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp);
1767 if (core1or5 && (rail == 0) && (type == 1))
1768 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp);
1769 if (core1or5 && (rail == 1) && (type == 1))
1770 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp);
1771 if (core2or5 && (rail == 0) && (type == 1))
1772 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp);
1773 if (core2or5 && (rail == 1) && (type == 1))
1774 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp);
1775 if (core1or5 && (rail == 0) && (type == 6))
1776 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp);
1777 if (core1or5 && (rail == 1) && (type == 6))
1778 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp);
1779 if (core2or5 && (rail == 0) && (type == 6))
1780 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp);
1781 if (core2or5 && (rail == 1) && (type == 6))
1782 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp);
1783 if (core1or5 && (rail == 0) && (type == 3))
1784 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp);
1785 if (core1or5 && (rail == 1) && (type == 3))
1786 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp);
1787 if (core2or5 && (rail == 0) && (type == 3))
1788 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp);
1789 if (core2or5 && (rail == 1) && (type == 3))
1790 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp);
1791 if (core1or5 && (type == 4))
1792 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp);
1793 if (core2or5 && (type == 4))
1794 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp);
1795 if (core1or5 && (type == 5))
1796 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp);
1797 if (core2or5 && (type == 5))
1798 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp);
1799}
1800
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1801static void b43_nphy_rev2_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1802{
1803 u16 val;
1804
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1805 if (type < 3)
1806 val = 0;
1807 else if (type == 6)
1808 val = 1;
1809 else if (type == 3)
1810 val = 2;
1811 else
1812 val = 3;
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1813
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1814 val = (val << 12) | (val << 14);
1815 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, val);
1816 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, val);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1817
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1818 if (type < 3) {
1819 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO1, 0xFFCF,
1820 (type + 1) << 4);
1821 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO2, 0xFFCF,
1822 (type + 1) << 4);
1823 }
1824
1825 /* TODO use some definitions */
1826 if (code == 0) {
1827 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1828 if (type < 3) {
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1829 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFEC7, 0);
1830 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xEFDC, 0);
1831 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0);
1832 udelay(20);
1833 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1834 }
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1835 } else {
1836 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF,
1837 0x3000);
1838 if (type < 3) {
1839 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD,
1840 0xFEC7, 0x0180);
1841 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
1842 0xEFDC, (code << 1 | 0x1021));
1843 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0x1);
1844 udelay(20);
1845 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1846 }
1847 }
1848}
1849
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1850static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1851{
Rafał Miłecki6e3b15a2010-01-30 20:18:04 +0100[diff] [blame]1852 struct b43_phy_n *nphy = dev->phy.n;
1853 u8 i;
1854 u16 reg, val;
1855
1856 if (code == 0) {
1857 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, 0xFDFF);
1858 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, 0xFDFF);
1859 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, 0xFCFF);
1860 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, 0xFCFF);
1861 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S0, 0xFFDF);
1862 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B32S1, 0xFFDF);
1863 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0xFFC3);
1864 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0xFFC3);
1865 } else {
1866 for (i = 0; i < 2; i++) {
1867 if ((code == 1 && i == 1) || (code == 2 && !i))
1868 continue;
1869
1870 reg = (i == 0) ?
1871 B43_NPHY_AFECTL_OVER1 : B43_NPHY_AFECTL_OVER;
1872 b43_phy_maskset(dev, reg, 0xFDFF, 0x0200);
1873
1874 if (type < 3) {
1875 reg = (i == 0) ?
1876 B43_NPHY_AFECTL_C1 :
1877 B43_NPHY_AFECTL_C2;
1878 b43_phy_maskset(dev, reg, 0xFCFF, 0);
1879
1880 reg = (i == 0) ?
1881 B43_NPHY_RFCTL_LUT_TRSW_UP1 :
1882 B43_NPHY_RFCTL_LUT_TRSW_UP2;
1883 b43_phy_maskset(dev, reg, 0xFFC3, 0);
1884
1885 if (type == 0)
1886 val = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ? 4 : 8;
1887 else if (type == 1)
1888 val = 16;
1889 else
1890 val = 32;
1891 b43_phy_set(dev, reg, val);
1892
1893 reg = (i == 0) ?
1894 B43_NPHY_TXF_40CO_B1S0 :
1895 B43_NPHY_TXF_40CO_B32S1;
1896 b43_phy_set(dev, reg, 0x0020);
1897 } else {
1898 if (type == 6)
1899 val = 0x0100;
1900 else if (type == 3)
1901 val = 0x0200;
1902 else
1903 val = 0x0300;
1904
1905 reg = (i == 0) ?
1906 B43_NPHY_AFECTL_C1 :
1907 B43_NPHY_AFECTL_C2;
1908
1909 b43_phy_maskset(dev, reg, 0xFCFF, val);
1910 b43_phy_maskset(dev, reg, 0xF3FF, val << 2);
1911
1912 if (type != 3 && type != 6) {
1913 enum ieee80211_band band =
1914 b43_current_band(dev->wl);
1915
1916 if ((nphy->ipa2g_on &&
1917 band == IEEE80211_BAND_2GHZ) ||
1918 (nphy->ipa5g_on &&
1919 band == IEEE80211_BAND_5GHZ))
1920 val = (band == IEEE80211_BAND_5GHZ) ? 0xC : 0xE;
1921 else
1922 val = 0x11;
1923 reg = (i == 0) ? 0x2000 : 0x3000;
1924 reg |= B2055_PADDRV;
1925 b43_radio_write16(dev, reg, val);
1926
1927 reg = (i == 0) ?
1928 B43_NPHY_AFECTL_OVER1 :
1929 B43_NPHY_AFECTL_OVER;
1930 b43_phy_set(dev, reg, 0x0200);
1931 }
1932 }
1933 }
1934 }
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1935}
1936
1937/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSISel */
1938static void b43_nphy_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1939{
1940 if (dev->phy.rev >= 3)
1941 b43_nphy_rev3_rssi_select(dev, code, type);
1942 else
1943 b43_nphy_rev2_rssi_select(dev, code, type);
1944}
1945
Rafał Miłeckidfb4aa52010-01-15 14:45:13 +0100[diff] [blame]1946/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRssi2055Vcm */
1947static void b43_nphy_set_rssi_2055_vcm(struct b43_wldev *dev, u8 type, u8 *buf)
1948{
1949 int i;
1950 for (i = 0; i < 2; i++) {
1951 if (type == 2) {
1952 if (i == 0) {
1953 b43_radio_maskset(dev, B2055_C1_B0NB_RSSIVCM,
1954 0xFC, buf[0]);
1955 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5,
1956 0xFC, buf[1]);
1957 } else {
1958 b43_radio_maskset(dev, B2055_C2_B0NB_RSSIVCM,
1959 0xFC, buf[2 * i]);
1960 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5,
1961 0xFC, buf[2 * i + 1]);
1962 }
1963 } else {
1964 if (i == 0)
1965 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5,
1966 0xF3, buf[0] << 2);
1967 else
1968 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5,
1969 0xF3, buf[2 * i + 1] << 2);
1970 }
1971 }
1972}
1973
1974/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/PollRssi */
1975static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf,
1976 u8 nsamp)
1977{
1978 int i;
1979 int out;
1980 u16 save_regs_phy[9];
1981 u16 s[2];
1982
1983 if (dev->phy.rev >= 3) {
1984 save_regs_phy[0] = b43_phy_read(dev,
1985 B43_NPHY_RFCTL_LUT_TRSW_UP1);
1986 save_regs_phy[1] = b43_phy_read(dev,
1987 B43_NPHY_RFCTL_LUT_TRSW_UP2);
1988 save_regs_phy[2] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
1989 save_regs_phy[3] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
1990 save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
1991 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
1992 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0);
1993 save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1);
Rafał Miłeckia529cec2010-11-18 21:11:42 +0100[diff] [blame]1994 } else if (dev->phy.rev == 2) {
1995 save_regs_phy[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
1996 save_regs_phy[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
1997 save_regs_phy[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
1998 save_regs_phy[3] = b43_phy_read(dev, B43_NPHY_RFCTL_CMD);
1999 save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER);
2000 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1);
2001 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2);
Rafał Miłeckidfb4aa52010-01-15 14:45:13 +0100[diff] [blame]2002 }
2003
2004 b43_nphy_rssi_select(dev, 5, type);
2005
2006 if (dev->phy.rev < 2) {
2007 save_regs_phy[8] = b43_phy_read(dev, B43_NPHY_GPIO_SEL);
2008 b43_phy_write(dev, B43_NPHY_GPIO_SEL, 5);
2009 }
2010
2011 for (i = 0; i < 4; i++)
2012 buf[i] = 0;
2013
2014 for (i = 0; i < nsamp; i++) {
2015 if (dev->phy.rev < 2) {
2016 s[0] = b43_phy_read(dev, B43_NPHY_GPIO_LOOUT);
2017 s[1] = b43_phy_read(dev, B43_NPHY_GPIO_HIOUT);
2018 } else {
2019 s[0] = b43_phy_read(dev, B43_NPHY_RSSI1);
2020 s[1] = b43_phy_read(dev, B43_NPHY_RSSI2);
2021 }
2022
2023 buf[0] += ((s8)((s[0] & 0x3F) << 2)) >> 2;
2024 buf[1] += ((s8)(((s[0] >> 8) & 0x3F) << 2)) >> 2;
2025 buf[2] += ((s8)((s[1] & 0x3F) << 2)) >> 2;
2026 buf[3] += ((s8)(((s[1] >> 8) & 0x3F) << 2)) >> 2;
2027 }
2028 out = (buf[0] & 0xFF) << 24 | (buf[1] & 0xFF) << 16 |
2029 (buf[2] & 0xFF) << 8 | (buf[3] & 0xFF);
2030
2031 if (dev->phy.rev < 2)
2032 b43_phy_write(dev, B43_NPHY_GPIO_SEL, save_regs_phy[8]);
2033
2034 if (dev->phy.rev >= 3) {
2035 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1,
2036 save_regs_phy[0]);
2037 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2,
2038 save_regs_phy[1]);
2039 b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[2]);
2040 b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[3]);
2041 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, save_regs_phy[4]);
2042 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]);
2043 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]);
2044 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]);
Rafał Miłeckia529cec2010-11-18 21:11:42 +0100[diff] [blame]2045 } else if (dev->phy.rev == 2) {
2046 b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[0]);
2047 b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[1]);
2048 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[2]);
2049 b43_phy_write(dev, B43_NPHY_RFCTL_CMD, save_regs_phy[3]);
2050 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, save_regs_phy[4]);
2051 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, save_regs_phy[5]);
2052 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, save_regs_phy[6]);
Rafał Miłeckidfb4aa52010-01-15 14:45:13 +0100[diff] [blame]2053 }
2054
2055 return out;
2056}
2057
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]2058/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICal */
2059static void b43_nphy_rev2_rssi_cal(struct b43_wldev *dev, u8 type)
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]2060{
Rafał Miłecki90b97382010-01-15 14:48:21 +0100[diff] [blame]2061 int i, j;
2062 u8 state[4];
2063 u8 code, val;
2064 u16 class, override;
2065 u8 regs_save_radio[2];
2066 u16 regs_save_phy[2];
2067 s8 offset[4];
2068
2069 u16 clip_state[2];
2070 u16 clip_off[2] = { 0xFFFF, 0xFFFF };
2071 s32 results_min[4] = { };
2072 u8 vcm_final[4] = { };
2073 s32 results[4][4] = { };
2074 s32 miniq[4][2] = { };
2075
2076 if (type == 2) {
2077 code = 0;
2078 val = 6;
2079 } else if (type < 2) {
2080 code = 25;
2081 val = 4;
2082 } else {
2083 B43_WARN_ON(1);
2084 return;
2085 }
2086
2087 class = b43_nphy_classifier(dev, 0, 0);
2088 b43_nphy_classifier(dev, 7, 4);
2089 b43_nphy_read_clip_detection(dev, clip_state);
2090 b43_nphy_write_clip_detection(dev, clip_off);
2091
2092 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
2093 override = 0x140;
2094 else
2095 override = 0x110;
2096
2097 regs_save_phy[0] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
2098 regs_save_radio[0] = b43_radio_read16(dev, B2055_C1_PD_RXTX);
2099 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, override);
2100 b43_radio_write16(dev, B2055_C1_PD_RXTX, val);
2101
2102 regs_save_phy[1] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
2103 regs_save_radio[1] = b43_radio_read16(dev, B2055_C2_PD_RXTX);
2104 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, override);
2105 b43_radio_write16(dev, B2055_C2_PD_RXTX, val);
2106
2107 state[0] = b43_radio_read16(dev, B2055_C1_PD_RSSIMISC) & 0x07;
2108 state[1] = b43_radio_read16(dev, B2055_C2_PD_RSSIMISC) & 0x07;
2109 b43_radio_mask(dev, B2055_C1_PD_RSSIMISC, 0xF8);
2110 b43_radio_mask(dev, B2055_C2_PD_RSSIMISC, 0xF8);
2111 state[2] = b43_radio_read16(dev, B2055_C1_SP_RSSI) & 0x07;
2112 state[3] = b43_radio_read16(dev, B2055_C2_SP_RSSI) & 0x07;
2113
2114 b43_nphy_rssi_select(dev, 5, type);
2115 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 0, type);
2116 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 1, type);
2117
2118 for (i = 0; i < 4; i++) {
2119 u8 tmp[4];
2120 for (j = 0; j < 4; j++)
2121 tmp[j] = i;
2122 if (type != 1)
2123 b43_nphy_set_rssi_2055_vcm(dev, type, tmp);
2124 b43_nphy_poll_rssi(dev, type, results[i], 8);
2125 if (type < 2)
2126 for (j = 0; j < 2; j++)
2127 miniq[i][j] = min(results[i][2 * j],
2128 results[i][2 * j + 1]);
2129 }
2130
2131 for (i = 0; i < 4; i++) {
2132 s32 mind = 40;
2133 u8 minvcm = 0;
2134 s32 minpoll = 249;
2135 s32 curr;
2136 for (j = 0; j < 4; j++) {
2137 if (type == 2)
2138 curr = abs(results[j][i]);
2139 else
2140 curr = abs(miniq[j][i / 2] - code * 8);
2141
2142 if (curr < mind) {
2143 mind = curr;
2144 minvcm = j;
2145 }
2146
2147 if (results[j][i] < minpoll)
2148 minpoll = results[j][i];
2149 }
2150 results_min[i] = minpoll;
2151 vcm_final[i] = minvcm;
2152 }
2153
2154 if (type != 1)
2155 b43_nphy_set_rssi_2055_vcm(dev, type, vcm_final);
2156
2157 for (i = 0; i < 4; i++) {
2158 offset[i] = (code * 8) - results[vcm_final[i]][i];
2159
2160 if (offset[i] < 0)
2161 offset[i] = -((abs(offset[i]) + 4) / 8);
2162 else
2163 offset[i] = (offset[i] + 4) / 8;
2164
2165 if (results_min[i] == 248)
2166 offset[i] = code - 32;
2167
2168 if (i % 2 == 0)
2169 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 1, 0,
2170 type);
2171 else
2172 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 2, 1,
2173 type);
2174 }
2175
2176 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]);
Rafał Miłecki0b81c232010-11-18 21:11:43 +0100[diff] [blame]2177 b43_radio_maskset(dev, B2055_C2_PD_RSSIMISC, 0xF8, state[1]);
Rafał Miłecki90b97382010-01-15 14:48:21 +0100[diff] [blame]2178
2179 switch (state[2]) {
2180 case 1:
2181 b43_nphy_rssi_select(dev, 1, 2);
2182 break;
2183 case 4:
2184 b43_nphy_rssi_select(dev, 1, 0);
2185 break;
2186 case 2:
2187 b43_nphy_rssi_select(dev, 1, 1);
2188 break;
2189 default:
2190 b43_nphy_rssi_select(dev, 1, 1);
2191 break;
2192 }
2193
2194 switch (state[3]) {
2195 case 1:
2196 b43_nphy_rssi_select(dev, 2, 2);
2197 break;
2198 case 4:
2199 b43_nphy_rssi_select(dev, 2, 0);
2200 break;
2201 default:
2202 b43_nphy_rssi_select(dev, 2, 1);
2203 break;
2204 }
2205
2206 b43_nphy_rssi_select(dev, 0, type);
2207
2208 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs_save_phy[0]);
2209 b43_radio_write16(dev, B2055_C1_PD_RXTX, regs_save_radio[0]);
2210 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs_save_phy[1]);
2211 b43_radio_write16(dev, B2055_C2_PD_RXTX, regs_save_radio[1]);
2212
2213 b43_nphy_classifier(dev, 7, class);
2214 b43_nphy_write_clip_detection(dev, clip_state);
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]2215}
2216
2217/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICalRev3 */
2218static void b43_nphy_rev3_rssi_cal(struct b43_wldev *dev)
2219{
2220 /* TODO */
2221}
2222
2223/*
2224 * RSSI Calibration
2225 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICal
2226 */
2227static void b43_nphy_rssi_cal(struct b43_wldev *dev)
2228{
2229 if (dev->phy.rev >= 3) {
2230 b43_nphy_rev3_rssi_cal(dev);
2231 } else {
2232 b43_nphy_rev2_rssi_cal(dev, 2);
2233 b43_nphy_rev2_rssi_cal(dev, 0);
2234 b43_nphy_rev2_rssi_cal(dev, 1);
2235 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]2236}
2237
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]2238/*
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2239 * Restore RSSI Calibration
2240 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/RestoreRssiCal
2241 */
2242static void b43_nphy_restore_rssi_cal(struct b43_wldev *dev)
2243{
2244 struct b43_phy_n *nphy = dev->phy.n;
2245
2246 u16 *rssical_radio_regs = NULL;
2247 u16 *rssical_phy_regs = NULL;
2248
2249 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2250 if (!nphy->rssical_chanspec_2G.center_freq)
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2251 return;
2252 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_2G;
2253 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_2G;
2254 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2255 if (!nphy->rssical_chanspec_5G.center_freq)
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2256 return;
2257 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_5G;
2258 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_5G;
2259 }
2260
2261 /* TODO use some definitions */
2262 b43_radio_maskset(dev, 0x602B, 0xE3, rssical_radio_regs[0]);
2263 b43_radio_maskset(dev, 0x702B, 0xE3, rssical_radio_regs[1]);
2264
2265 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, rssical_phy_regs[0]);
2266 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, rssical_phy_regs[1]);
2267 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, rssical_phy_regs[2]);
2268 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, rssical_phy_regs[3]);
2269
2270 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, rssical_phy_regs[4]);
2271 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, rssical_phy_regs[5]);
2272 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, rssical_phy_regs[6]);
2273 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, rssical_phy_regs[7]);
2274
2275 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, rssical_phy_regs[8]);
2276 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, rssical_phy_regs[9]);
2277 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, rssical_phy_regs[10]);
2278 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, rssical_phy_regs[11]);
2279}
2280
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2281/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetIpaGainTbl */
2282static const u32 *b43_nphy_get_ipa_gain_table(struct b43_wldev *dev)
2283{
2284 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2285 if (dev->phy.rev >= 6) {
2286 /* TODO If the chip is 47162
2287 return txpwrctrl_tx_gain_ipa_rev5 */
2288 return txpwrctrl_tx_gain_ipa_rev6;
2289 } else if (dev->phy.rev >= 5) {
2290 return txpwrctrl_tx_gain_ipa_rev5;
2291 } else {
2292 return txpwrctrl_tx_gain_ipa;
2293 }
2294 } else {
2295 return txpwrctrl_tx_gain_ipa_5g;
2296 }
2297}
2298
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2299/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalRadioSetup */
2300static void b43_nphy_tx_cal_radio_setup(struct b43_wldev *dev)
2301{
2302 struct b43_phy_n *nphy = dev->phy.n;
2303 u16 *save = nphy->tx_rx_cal_radio_saveregs;
Rafał Miłecki52cb5e92010-01-30 20:18:06 +0100[diff] [blame]2304 u16 tmp;
2305 u8 offset, i;
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2306
2307 if (dev->phy.rev >= 3) {
Rafał Miłecki52cb5e92010-01-30 20:18:06 +0100[diff] [blame]2308 for (i = 0; i < 2; i++) {
2309 tmp = (i == 0) ? 0x2000 : 0x3000;
2310 offset = i * 11;
2311
2312 save[offset + 0] = b43_radio_read16(dev, B2055_CAL_RVARCTL);
2313 save[offset + 1] = b43_radio_read16(dev, B2055_CAL_LPOCTL);
2314 save[offset + 2] = b43_radio_read16(dev, B2055_CAL_TS);
2315 save[offset + 3] = b43_radio_read16(dev, B2055_CAL_RCCALRTS);
2316 save[offset + 4] = b43_radio_read16(dev, B2055_CAL_RCALRTS);
2317 save[offset + 5] = b43_radio_read16(dev, B2055_PADDRV);
2318 save[offset + 6] = b43_radio_read16(dev, B2055_XOCTL1);
2319 save[offset + 7] = b43_radio_read16(dev, B2055_XOCTL2);
2320 save[offset + 8] = b43_radio_read16(dev, B2055_XOREGUL);
2321 save[offset + 9] = b43_radio_read16(dev, B2055_XOMISC);
2322 save[offset + 10] = b43_radio_read16(dev, B2055_PLL_LFC1);
2323
2324 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2325 b43_radio_write16(dev, tmp | B2055_CAL_RVARCTL, 0x0A);
2326 b43_radio_write16(dev, tmp | B2055_CAL_LPOCTL, 0x40);
2327 b43_radio_write16(dev, tmp | B2055_CAL_TS, 0x55);
2328 b43_radio_write16(dev, tmp | B2055_CAL_RCCALRTS, 0);
2329 b43_radio_write16(dev, tmp | B2055_CAL_RCALRTS, 0);
2330 if (nphy->ipa5g_on) {
2331 b43_radio_write16(dev, tmp | B2055_PADDRV, 4);
2332 b43_radio_write16(dev, tmp | B2055_XOCTL1, 1);
2333 } else {
2334 b43_radio_write16(dev, tmp | B2055_PADDRV, 0);
2335 b43_radio_write16(dev, tmp | B2055_XOCTL1, 0x2F);
2336 }
2337 b43_radio_write16(dev, tmp | B2055_XOCTL2, 0);
2338 } else {
2339 b43_radio_write16(dev, tmp | B2055_CAL_RVARCTL, 0x06);
2340 b43_radio_write16(dev, tmp | B2055_CAL_LPOCTL, 0x40);
2341 b43_radio_write16(dev, tmp | B2055_CAL_TS, 0x55);
2342 b43_radio_write16(dev, tmp | B2055_CAL_RCCALRTS, 0);
2343 b43_radio_write16(dev, tmp | B2055_CAL_RCALRTS, 0);
2344 b43_radio_write16(dev, tmp | B2055_XOCTL1, 0);
2345 if (nphy->ipa2g_on) {
2346 b43_radio_write16(dev, tmp | B2055_PADDRV, 6);
2347 b43_radio_write16(dev, tmp | B2055_XOCTL2,
2348 (dev->phy.rev < 5) ? 0x11 : 0x01);
2349 } else {
2350 b43_radio_write16(dev, tmp | B2055_PADDRV, 0);
2351 b43_radio_write16(dev, tmp | B2055_XOCTL2, 0);
2352 }
2353 }
2354 b43_radio_write16(dev, tmp | B2055_XOREGUL, 0);
2355 b43_radio_write16(dev, tmp | B2055_XOMISC, 0);
2356 b43_radio_write16(dev, tmp | B2055_PLL_LFC1, 0);
2357 }
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2358 } else {
2359 save[0] = b43_radio_read16(dev, B2055_C1_TX_RF_IQCAL1);
2360 b43_radio_write16(dev, B2055_C1_TX_RF_IQCAL1, 0x29);
2361
2362 save[1] = b43_radio_read16(dev, B2055_C1_TX_RF_IQCAL2);
2363 b43_radio_write16(dev, B2055_C1_TX_RF_IQCAL2, 0x54);
2364
2365 save[2] = b43_radio_read16(dev, B2055_C2_TX_RF_IQCAL1);
2366 b43_radio_write16(dev, B2055_C2_TX_RF_IQCAL1, 0x29);
2367
2368 save[3] = b43_radio_read16(dev, B2055_C2_TX_RF_IQCAL2);
2369 b43_radio_write16(dev, B2055_C2_TX_RF_IQCAL2, 0x54);
2370
2371 save[3] = b43_radio_read16(dev, B2055_C1_PWRDET_RXTX);
2372 save[4] = b43_radio_read16(dev, B2055_C2_PWRDET_RXTX);
2373
2374 if (!(b43_phy_read(dev, B43_NPHY_BANDCTL) &
2375 B43_NPHY_BANDCTL_5GHZ)) {
2376 b43_radio_write16(dev, B2055_C1_PWRDET_RXTX, 0x04);
2377 b43_radio_write16(dev, B2055_C2_PWRDET_RXTX, 0x04);
2378 } else {
2379 b43_radio_write16(dev, B2055_C1_PWRDET_RXTX, 0x20);
2380 b43_radio_write16(dev, B2055_C2_PWRDET_RXTX, 0x20);
2381 }
2382
2383 if (dev->phy.rev < 2) {
2384 b43_radio_set(dev, B2055_C1_TX_BB_MXGM, 0x20);
2385 b43_radio_set(dev, B2055_C2_TX_BB_MXGM, 0x20);
2386 } else {
2387 b43_radio_mask(dev, B2055_C1_TX_BB_MXGM, ~0x20);
2388 b43_radio_mask(dev, B2055_C2_TX_BB_MXGM, ~0x20);
2389 }
2390 }
2391}
2392
Rafał Miłeckie9762492010-01-15 16:08:25 +0100[diff] [blame]2393/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/IqCalGainParams */
2394static void b43_nphy_iq_cal_gain_params(struct b43_wldev *dev, u16 core,
2395 struct nphy_txgains target,
2396 struct nphy_iqcal_params *params)
2397{
2398 int i, j, indx;
2399 u16 gain;
2400
2401 if (dev->phy.rev >= 3) {
2402 params->txgm = target.txgm[core];
2403 params->pga = target.pga[core];
2404 params->pad = target.pad[core];
2405 params->ipa = target.ipa[core];
2406 params->cal_gain = (params->txgm << 12) | (params->pga << 8) |
2407 (params->pad << 4) | (params->ipa);
2408 for (j = 0; j < 5; j++)
2409 params->ncorr[j] = 0x79;
2410 } else {
2411 gain = (target.pad[core]) | (target.pga[core] << 4) |
2412 (target.txgm[core] << 8);
2413
2414 indx = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ?
2415 1 : 0;
2416 for (i = 0; i < 9; i++)
2417 if (tbl_iqcal_gainparams[indx][i][0] == gain)
2418 break;
2419 i = min(i, 8);
2420
2421 params->txgm = tbl_iqcal_gainparams[indx][i][1];
2422 params->pga = tbl_iqcal_gainparams[indx][i][2];
2423 params->pad = tbl_iqcal_gainparams[indx][i][3];
2424 params->cal_gain = (params->txgm << 7) | (params->pga << 4) |
2425 (params->pad << 2);
2426 for (j = 0; j < 4; j++)
2427 params->ncorr[j] = tbl_iqcal_gainparams[indx][i][4 + j];
2428 }
2429}
2430
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2431/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/UpdateTxCalLadder */
2432static void b43_nphy_update_tx_cal_ladder(struct b43_wldev *dev, u16 core)
2433{
2434 struct b43_phy_n *nphy = dev->phy.n;
2435 int i;
2436 u16 scale, entry;
2437
2438 u16 tmp = nphy->txcal_bbmult;
2439 if (core == 0)
2440 tmp >>= 8;
2441 tmp &= 0xff;
2442
2443 for (i = 0; i < 18; i++) {
2444 scale = (ladder_lo[i].percent * tmp) / 100;
2445 entry = ((scale & 0xFF) << 8) | ladder_lo[i].g_env;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2446 b43_ntab_write(dev, B43_NTAB16(15, i), entry);
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2447
2448 scale = (ladder_iq[i].percent * tmp) / 100;
2449 entry = ((scale & 0xFF) << 8) | ladder_iq[i].g_env;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2450 b43_ntab_write(dev, B43_NTAB16(15, i + 32), entry);
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2451 }
2452}
2453
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]2454/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ExtPaSetTxDigiFilts */
2455static void b43_nphy_ext_pa_set_tx_dig_filters(struct b43_wldev *dev)
2456{
2457 int i;
2458 for (i = 0; i < 15; i++)
2459 b43_phy_write(dev, B43_PHY_N(0x2C5 + i),
2460 tbl_tx_filter_coef_rev4[2][i]);
2461}
2462
2463/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/IpaSetTxDigiFilts */
2464static void b43_nphy_int_pa_set_tx_dig_filters(struct b43_wldev *dev)
2465{
2466 int i, j;
2467 /* B43_NPHY_TXF_20CO_S0A1, B43_NPHY_TXF_40CO_S0A1, unknown */
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame]2468 static const u16 offset[] = { 0x186, 0x195, 0x2C5 };
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]2469
2470 for (i = 0; i < 3; i++)
2471 for (j = 0; j < 15; j++)
2472 b43_phy_write(dev, B43_PHY_N(offset[i] + j),
2473 tbl_tx_filter_coef_rev4[i][j]);
2474
2475 if (dev->phy.is_40mhz) {
2476 for (j = 0; j < 15; j++)
2477 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2478 tbl_tx_filter_coef_rev4[3][j]);
2479 } else if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2480 for (j = 0; j < 15; j++)
2481 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2482 tbl_tx_filter_coef_rev4[5][j]);
2483 }
2484
2485 if (dev->phy.channel == 14)
2486 for (j = 0; j < 15; j++)
2487 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2488 tbl_tx_filter_coef_rev4[6][j]);
2489}
2490
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]2491/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetTxGain */
2492static struct nphy_txgains b43_nphy_get_tx_gains(struct b43_wldev *dev)
2493{
2494 struct b43_phy_n *nphy = dev->phy.n;
2495
2496 u16 curr_gain[2];
2497 struct nphy_txgains target;
2498 const u32 *table = NULL;
2499
Rafał Miłecki161d5402010-11-28 12:59:43 +0100[diff] [blame^]2500 if (!nphy->txpwrctrl) {
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]2501 int i;
2502
2503 if (nphy->hang_avoid)
2504 b43_nphy_stay_in_carrier_search(dev, true);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2505 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, curr_gain);
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]2506 if (nphy->hang_avoid)
2507 b43_nphy_stay_in_carrier_search(dev, false);
2508
2509 for (i = 0; i < 2; ++i) {
2510 if (dev->phy.rev >= 3) {
2511 target.ipa[i] = curr_gain[i] & 0x000F;
2512 target.pad[i] = (curr_gain[i] & 0x00F0) >> 4;
2513 target.pga[i] = (curr_gain[i] & 0x0F00) >> 8;
2514 target.txgm[i] = (curr_gain[i] & 0x7000) >> 12;
2515 } else {
2516 target.ipa[i] = curr_gain[i] & 0x0003;
2517 target.pad[i] = (curr_gain[i] & 0x000C) >> 2;
2518 target.pga[i] = (curr_gain[i] & 0x0070) >> 4;
2519 target.txgm[i] = (curr_gain[i] & 0x0380) >> 7;
2520 }
2521 }
2522 } else {
2523 int i;
2524 u16 index[2];
2525 index[0] = (b43_phy_read(dev, B43_NPHY_C1_TXPCTL_STAT) &
2526 B43_NPHY_TXPCTL_STAT_BIDX) >>
2527 B43_NPHY_TXPCTL_STAT_BIDX_SHIFT;
2528 index[1] = (b43_phy_read(dev, B43_NPHY_C2_TXPCTL_STAT) &
2529 B43_NPHY_TXPCTL_STAT_BIDX) >>
2530 B43_NPHY_TXPCTL_STAT_BIDX_SHIFT;
2531
2532 for (i = 0; i < 2; ++i) {
2533 if (dev->phy.rev >= 3) {
2534 enum ieee80211_band band =
2535 b43_current_band(dev->wl);
2536
2537 if ((nphy->ipa2g_on &&
2538 band == IEEE80211_BAND_2GHZ) ||
2539 (nphy->ipa5g_on &&
2540 band == IEEE80211_BAND_5GHZ)) {
2541 table = b43_nphy_get_ipa_gain_table(dev);
2542 } else {
2543 if (band == IEEE80211_BAND_5GHZ) {
2544 if (dev->phy.rev == 3)
2545 table = b43_ntab_tx_gain_rev3_5ghz;
2546 else if (dev->phy.rev == 4)
2547 table = b43_ntab_tx_gain_rev4_5ghz;
2548 else
2549 table = b43_ntab_tx_gain_rev5plus_5ghz;
2550 } else {
2551 table = b43_ntab_tx_gain_rev3plus_2ghz;
2552 }
2553 }
2554
2555 target.ipa[i] = (table[index[i]] >> 16) & 0xF;
2556 target.pad[i] = (table[index[i]] >> 20) & 0xF;
2557 target.pga[i] = (table[index[i]] >> 24) & 0xF;
2558 target.txgm[i] = (table[index[i]] >> 28) & 0xF;
2559 } else {
2560 table = b43_ntab_tx_gain_rev0_1_2;
2561
2562 target.ipa[i] = (table[index[i]] >> 16) & 0x3;
2563 target.pad[i] = (table[index[i]] >> 18) & 0x3;
2564 target.pga[i] = (table[index[i]] >> 20) & 0x7;
2565 target.txgm[i] = (table[index[i]] >> 23) & 0x7;
2566 }
2567 }
2568 }
2569
2570 return target;
2571}
2572
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2573/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalPhyCleanup */
2574static void b43_nphy_tx_cal_phy_cleanup(struct b43_wldev *dev)
2575{
2576 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
2577
2578 if (dev->phy.rev >= 3) {
2579 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[0]);
2580 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]);
2581 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]);
2582 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[3]);
2583 b43_phy_write(dev, B43_NPHY_BBCFG, regs[4]);
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2584 b43_ntab_write(dev, B43_NTAB16(8, 3), regs[5]);
2585 b43_ntab_write(dev, B43_NTAB16(8, 19), regs[6]);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2586 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[7]);
2587 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[8]);
2588 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]);
2589 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]);
2590 b43_nphy_reset_cca(dev);
2591 } else {
2592 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, regs[0]);
2593 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, regs[1]);
2594 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]);
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2595 b43_ntab_write(dev, B43_NTAB16(8, 2), regs[3]);
2596 b43_ntab_write(dev, B43_NTAB16(8, 18), regs[4]);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2597 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[5]);
2598 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[6]);
2599 }
2600}
2601
2602/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalPhySetup */
2603static void b43_nphy_tx_cal_phy_setup(struct b43_wldev *dev)
2604{
2605 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
2606 u16 tmp;
2607
2608 regs[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
2609 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
2610 if (dev->phy.rev >= 3) {
2611 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0xF0FF, 0x0A00);
2612 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0xF0FF, 0x0A00);
2613
2614 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
2615 regs[2] = tmp;
2616 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, tmp | 0x0600);
2617
2618 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2619 regs[3] = tmp;
2620 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x0600);
2621
2622 regs[4] = b43_phy_read(dev, B43_NPHY_BBCFG);
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]2623 b43_phy_mask(dev, B43_NPHY_BBCFG,
2624 ~B43_NPHY_BBCFG_RSTRX & 0xFFFF);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2625
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2626 tmp = b43_ntab_read(dev, B43_NTAB16(8, 3));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2627 regs[5] = tmp;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2628 b43_ntab_write(dev, B43_NTAB16(8, 3), 0);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2629
2630 tmp = b43_ntab_read(dev, B43_NTAB16(8, 19));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2631 regs[6] = tmp;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2632 b43_ntab_write(dev, B43_NTAB16(8, 19), 0);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2633 regs[7] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
2634 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
2635
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]2636 b43_nphy_rf_control_intc_override(dev, 2, 1, 3);
2637 b43_nphy_rf_control_intc_override(dev, 1, 2, 1);
2638 b43_nphy_rf_control_intc_override(dev, 1, 8, 2);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2639
2640 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0);
2641 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1);
2642 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);
2643 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);
2644 } else {
2645 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, 0xA000);
2646 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, 0xA000);
2647 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2648 regs[2] = tmp;
2649 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x3000);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2650 tmp = b43_ntab_read(dev, B43_NTAB16(8, 2));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2651 regs[3] = tmp;
2652 tmp |= 0x2000;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2653 b43_ntab_write(dev, B43_NTAB16(8, 2), tmp);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2654 tmp = b43_ntab_read(dev, B43_NTAB16(8, 18));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2655 regs[4] = tmp;
2656 tmp |= 0x2000;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2657 b43_ntab_write(dev, B43_NTAB16(8, 18), tmp);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2658 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
2659 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
2660 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
2661 tmp = 0x0180;
2662 else
2663 tmp = 0x0120;
2664 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp);
2665 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp);
2666 }
2667}
2668
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2669/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SaveCal */
2670static void b43_nphy_save_cal(struct b43_wldev *dev)
2671{
2672 struct b43_phy_n *nphy = dev->phy.n;
2673
2674 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2675 u16 *txcal_radio_regs = NULL;
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]2676 struct b43_chanspec *iqcal_chanspec;
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2677 u16 *table = NULL;
2678
2679 if (nphy->hang_avoid)
2680 b43_nphy_stay_in_carrier_search(dev, 1);
2681
2682 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2683 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_2G;
2684 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_2G;
2685 iqcal_chanspec = &nphy->iqcal_chanspec_2G;
2686 table = nphy->cal_cache.txcal_coeffs_2G;
2687 } else {
2688 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_5G;
2689 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_5G;
2690 iqcal_chanspec = &nphy->iqcal_chanspec_5G;
2691 table = nphy->cal_cache.txcal_coeffs_5G;
2692 }
2693
2694 b43_nphy_rx_iq_coeffs(dev, false, rxcal_coeffs);
2695 /* TODO use some definitions */
2696 if (dev->phy.rev >= 3) {
2697 txcal_radio_regs[0] = b43_radio_read(dev, 0x2021);
2698 txcal_radio_regs[1] = b43_radio_read(dev, 0x2022);
2699 txcal_radio_regs[2] = b43_radio_read(dev, 0x3021);
2700 txcal_radio_regs[3] = b43_radio_read(dev, 0x3022);
2701 txcal_radio_regs[4] = b43_radio_read(dev, 0x2023);
2702 txcal_radio_regs[5] = b43_radio_read(dev, 0x2024);
2703 txcal_radio_regs[6] = b43_radio_read(dev, 0x3023);
2704 txcal_radio_regs[7] = b43_radio_read(dev, 0x3024);
2705 } else {
2706 txcal_radio_regs[0] = b43_radio_read(dev, 0x8B);
2707 txcal_radio_regs[1] = b43_radio_read(dev, 0xBA);
2708 txcal_radio_regs[2] = b43_radio_read(dev, 0x8D);
2709 txcal_radio_regs[3] = b43_radio_read(dev, 0xBC);
2710 }
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2711 iqcal_chanspec->center_freq = dev->phy.channel_freq;
2712 iqcal_chanspec->channel_type = dev->phy.channel_type;
Rafał Miłecki5818e982010-10-14 19:33:35 +0200[diff] [blame]2713 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 8, table);
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2714
2715 if (nphy->hang_avoid)
2716 b43_nphy_stay_in_carrier_search(dev, 0);
2717}
2718
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2719/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RestoreCal */
2720static void b43_nphy_restore_cal(struct b43_wldev *dev)
2721{
2722 struct b43_phy_n *nphy = dev->phy.n;
2723
2724 u16 coef[4];
2725 u16 *loft = NULL;
2726 u16 *table = NULL;
2727
2728 int i;
2729 u16 *txcal_radio_regs = NULL;
2730 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2731
2732 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2733 if (!nphy->iqcal_chanspec_2G.center_freq)
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2734 return;
2735 table = nphy->cal_cache.txcal_coeffs_2G;
2736 loft = &nphy->cal_cache.txcal_coeffs_2G[5];
2737 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2738 if (!nphy->iqcal_chanspec_5G.center_freq)
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2739 return;
2740 table = nphy->cal_cache.txcal_coeffs_5G;
2741 loft = &nphy->cal_cache.txcal_coeffs_5G[5];
2742 }
2743
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2744 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4, table);
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2745
2746 for (i = 0; i < 4; i++) {
2747 if (dev->phy.rev >= 3)
2748 table[i] = coef[i];
2749 else
2750 coef[i] = 0;
2751 }
2752
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2753 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4, coef);
2754 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2, loft);
2755 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2, loft);
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2756
2757 if (dev->phy.rev < 2)
2758 b43_nphy_tx_iq_workaround(dev);
2759
2760 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2761 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_2G;
2762 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_2G;
2763 } else {
2764 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_5G;
2765 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_5G;
2766 }
2767
2768 /* TODO use some definitions */
2769 if (dev->phy.rev >= 3) {
2770 b43_radio_write(dev, 0x2021, txcal_radio_regs[0]);
2771 b43_radio_write(dev, 0x2022, txcal_radio_regs[1]);
2772 b43_radio_write(dev, 0x3021, txcal_radio_regs[2]);
2773 b43_radio_write(dev, 0x3022, txcal_radio_regs[3]);
2774 b43_radio_write(dev, 0x2023, txcal_radio_regs[4]);
2775 b43_radio_write(dev, 0x2024, txcal_radio_regs[5]);
2776 b43_radio_write(dev, 0x3023, txcal_radio_regs[6]);
2777 b43_radio_write(dev, 0x3024, txcal_radio_regs[7]);
2778 } else {
2779 b43_radio_write(dev, 0x8B, txcal_radio_regs[0]);
2780 b43_radio_write(dev, 0xBA, txcal_radio_regs[1]);
2781 b43_radio_write(dev, 0x8D, txcal_radio_regs[2]);
2782 b43_radio_write(dev, 0xBC, txcal_radio_regs[3]);
2783 }
2784 b43_nphy_rx_iq_coeffs(dev, true, rxcal_coeffs);
2785}
2786
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2787/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalTxIqlo */
2788static int b43_nphy_cal_tx_iq_lo(struct b43_wldev *dev,
2789 struct nphy_txgains target,
2790 bool full, bool mphase)
2791{
2792 struct b43_phy_n *nphy = dev->phy.n;
2793 int i;
2794 int error = 0;
2795 int freq;
2796 bool avoid = false;
2797 u8 length;
2798 u16 tmp, core, type, count, max, numb, last, cmd;
2799 const u16 *table;
2800 bool phy6or5x;
2801
2802 u16 buffer[11];
2803 u16 diq_start = 0;
2804 u16 save[2];
2805 u16 gain[2];
2806 struct nphy_iqcal_params params[2];
2807 bool updated[2] = { };
2808
2809 b43_nphy_stay_in_carrier_search(dev, true);
2810
2811 if (dev->phy.rev >= 4) {
2812 avoid = nphy->hang_avoid;
2813 nphy->hang_avoid = 0;
2814 }
2815
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2816 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, save);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2817
2818 for (i = 0; i < 2; i++) {
2819 b43_nphy_iq_cal_gain_params(dev, i, target, &params[i]);
2820 gain[i] = params[i].cal_gain;
2821 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2822
2823 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2824
2825 b43_nphy_tx_cal_radio_setup(dev);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2826 b43_nphy_tx_cal_phy_setup(dev);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2827
2828 phy6or5x = dev->phy.rev >= 6 ||
2829 (dev->phy.rev == 5 && nphy->ipa2g_on &&
2830 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ);
2831 if (phy6or5x) {
Rafał Miłecki38bb9022010-01-30 20:18:05 +0100[diff] [blame]2832 if (dev->phy.is_40mhz) {
2833 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18,
2834 tbl_tx_iqlo_cal_loft_ladder_40);
2835 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18,
2836 tbl_tx_iqlo_cal_iqimb_ladder_40);
2837 } else {
2838 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18,
2839 tbl_tx_iqlo_cal_loft_ladder_20);
2840 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18,
2841 tbl_tx_iqlo_cal_iqimb_ladder_20);
2842 }
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2843 }
2844
2845 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8AA9);
2846
Rafał Miłeckiaa4c7b22010-01-22 01:53:12 +0100[diff] [blame]2847 if (!dev->phy.is_40mhz)
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2848 freq = 2500;
2849 else
2850 freq = 5000;
2851
2852 if (nphy->mphase_cal_phase_id > 2)
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]2853 b43_nphy_run_samples(dev, (dev->phy.is_40mhz ? 40 : 20) * 8,
2854 0xFFFF, 0, true, false);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2855 else
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]2856 error = b43_nphy_tx_tone(dev, freq, 250, true, false);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2857
2858 if (error == 0) {
2859 if (nphy->mphase_cal_phase_id > 2) {
2860 table = nphy->mphase_txcal_bestcoeffs;
2861 length = 11;
2862 if (dev->phy.rev < 3)
2863 length -= 2;
2864 } else {
2865 if (!full && nphy->txiqlocal_coeffsvalid) {
2866 table = nphy->txiqlocal_bestc;
2867 length = 11;
2868 if (dev->phy.rev < 3)
2869 length -= 2;
2870 } else {
2871 full = true;
2872 if (dev->phy.rev >= 3) {
2873 table = tbl_tx_iqlo_cal_startcoefs_nphyrev3;
2874 length = B43_NTAB_TX_IQLO_CAL_STARTCOEFS_REV3;
2875 } else {
2876 table = tbl_tx_iqlo_cal_startcoefs;
2877 length = B43_NTAB_TX_IQLO_CAL_STARTCOEFS;
2878 }
2879 }
2880 }
2881
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2882 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length, table);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2883
2884 if (full) {
2885 if (dev->phy.rev >= 3)
2886 max = B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL_REV3;
2887 else
2888 max = B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL;
2889 } else {
2890 if (dev->phy.rev >= 3)
2891 max = B43_NTAB_TX_IQLO_CAL_CMDS_RECAL_REV3;
2892 else
2893 max = B43_NTAB_TX_IQLO_CAL_CMDS_RECAL;
2894 }
2895
2896 if (mphase) {
2897 count = nphy->mphase_txcal_cmdidx;
2898 numb = min(max,
2899 (u16)(count + nphy->mphase_txcal_numcmds));
2900 } else {
2901 count = 0;
2902 numb = max;
2903 }
2904
2905 for (; count < numb; count++) {
2906 if (full) {
2907 if (dev->phy.rev >= 3)
2908 cmd = tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[count];
2909 else
2910 cmd = tbl_tx_iqlo_cal_cmds_fullcal[count];
2911 } else {
2912 if (dev->phy.rev >= 3)
2913 cmd = tbl_tx_iqlo_cal_cmds_recal_nphyrev3[count];
2914 else
2915 cmd = tbl_tx_iqlo_cal_cmds_recal[count];
2916 }
2917
2918 core = (cmd & 0x3000) >> 12;
2919 type = (cmd & 0x0F00) >> 8;
2920
2921 if (phy6or5x && updated[core] == 0) {
2922 b43_nphy_update_tx_cal_ladder(dev, core);
2923 updated[core] = 1;
2924 }
2925
2926 tmp = (params[core].ncorr[type] << 8) | 0x66;
2927 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDNNUM, tmp);
2928
2929 if (type == 1 || type == 3 || type == 4) {
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2930 buffer[0] = b43_ntab_read(dev,
2931 B43_NTAB16(15, 69 + core));
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2932 diq_start = buffer[0];
2933 buffer[0] = 0;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2934 b43_ntab_write(dev, B43_NTAB16(15, 69 + core),
2935 0);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2936 }
2937
2938 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMD, cmd);
2939 for (i = 0; i < 2000; i++) {
2940 tmp = b43_phy_read(dev, B43_NPHY_IQLOCAL_CMD);
2941 if (tmp & 0xC000)
2942 break;
2943 udelay(10);
2944 }
2945
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2946 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2947 buffer);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2948 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length,
2949 buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2950
2951 if (type == 1 || type == 3 || type == 4)
2952 buffer[0] = diq_start;
2953 }
2954
2955 if (mphase)
2956 nphy->mphase_txcal_cmdidx = (numb >= max) ? 0 : numb;
2957
2958 last = (dev->phy.rev < 3) ? 6 : 7;
2959
2960 if (!mphase || nphy->mphase_cal_phase_id == last) {
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2961 b43_ntab_write_bulk(dev, B43_NTAB16(15, 96), 4, buffer);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2962 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 4, buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2963 if (dev->phy.rev < 3) {
2964 buffer[0] = 0;
2965 buffer[1] = 0;
2966 buffer[2] = 0;
2967 buffer[3] = 0;
2968 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2969 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4,
2970 buffer);
Rafał Miłeckibc53e512010-04-01 23:11:10 +0200[diff] [blame]2971 b43_ntab_read_bulk(dev, B43_NTAB16(15, 101), 2,
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2972 buffer);
2973 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2,
2974 buffer);
2975 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2,
2976 buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2977 length = 11;
2978 if (dev->phy.rev < 3)
2979 length -= 2;
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2980 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2981 nphy->txiqlocal_bestc);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2982 nphy->txiqlocal_coeffsvalid = true;
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2983 nphy->txiqlocal_chanspec.center_freq =
2984 dev->phy.channel_freq;
2985 nphy->txiqlocal_chanspec.channel_type =
2986 dev->phy.channel_type;
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2987 } else {
2988 length = 11;
2989 if (dev->phy.rev < 3)
2990 length -= 2;
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2991 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2992 nphy->mphase_txcal_bestcoeffs);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2993 }
2994
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]2995 b43_nphy_stop_playback(dev);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2996 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0);
2997 }
2998
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2999 b43_nphy_tx_cal_phy_cleanup(dev);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]3000 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, save);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]3001
3002 if (dev->phy.rev < 2 && (!mphase || nphy->mphase_cal_phase_id == last))
3003 b43_nphy_tx_iq_workaround(dev);
3004
3005 if (dev->phy.rev >= 4)
3006 nphy->hang_avoid = avoid;
3007
3008 b43_nphy_stay_in_carrier_search(dev, false);
3009
3010 return error;
3011}
3012
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]3013/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ReapplyTxCalCoeffs */
3014static void b43_nphy_reapply_tx_cal_coeffs(struct b43_wldev *dev)
3015{
3016 struct b43_phy_n *nphy = dev->phy.n;
3017 u8 i;
3018 u16 buffer[7];
3019 bool equal = true;
3020
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]3021 if (!nphy->txiqlocal_coeffsvalid ||
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3022 nphy->txiqlocal_chanspec.center_freq != dev->phy.channel_freq ||
3023 nphy->txiqlocal_chanspec.channel_type != dev->phy.channel_type)
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]3024 return;
3025
3026 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
3027 for (i = 0; i < 4; i++) {
3028 if (buffer[i] != nphy->txiqlocal_bestc[i]) {
3029 equal = false;
3030 break;
3031 }
3032 }
3033
3034 if (!equal) {
3035 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4,
3036 nphy->txiqlocal_bestc);
3037 for (i = 0; i < 4; i++)
3038 buffer[i] = 0;
3039 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4,
3040 buffer);
3041 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2,
3042 &nphy->txiqlocal_bestc[5]);
3043 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2,
3044 &nphy->txiqlocal_bestc[5]);
3045 }
3046}
3047
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3048/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalRxIqRev2 */
3049static int b43_nphy_rev2_cal_rx_iq(struct b43_wldev *dev,
3050 struct nphy_txgains target, u8 type, bool debug)
3051{
3052 struct b43_phy_n *nphy = dev->phy.n;
3053 int i, j, index;
3054 u8 rfctl[2];
3055 u8 afectl_core;
3056 u16 tmp[6];
3057 u16 cur_hpf1, cur_hpf2, cur_lna;
3058 u32 real, imag;
3059 enum ieee80211_band band;
3060
3061 u8 use;
3062 u16 cur_hpf;
3063 u16 lna[3] = { 3, 3, 1 };
3064 u16 hpf1[3] = { 7, 2, 0 };
3065 u16 hpf2[3] = { 2, 0, 0 };
Rafał Miłeckide9a47f2010-01-18 00:21:49 +0100[diff] [blame]3066 u32 power[3] = { };
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3067 u16 gain_save[2];
3068 u16 cal_gain[2];
3069 struct nphy_iqcal_params cal_params[2];
3070 struct nphy_iq_est est;
3071 int ret = 0;
3072 bool playtone = true;
3073 int desired = 13;
3074
3075 b43_nphy_stay_in_carrier_search(dev, 1);
3076
3077 if (dev->phy.rev < 2)
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]3078 b43_nphy_reapply_tx_cal_coeffs(dev);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]3079 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3080 for (i = 0; i < 2; i++) {
3081 b43_nphy_iq_cal_gain_params(dev, i, target, &cal_params[i]);
3082 cal_gain[i] = cal_params[i].cal_gain;
3083 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]3084 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, cal_gain);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3085
3086 for (i = 0; i < 2; i++) {
3087 if (i == 0) {
3088 rfctl[0] = B43_NPHY_RFCTL_INTC1;
3089 rfctl[1] = B43_NPHY_RFCTL_INTC2;
3090 afectl_core = B43_NPHY_AFECTL_C1;
3091 } else {
3092 rfctl[0] = B43_NPHY_RFCTL_INTC2;
3093 rfctl[1] = B43_NPHY_RFCTL_INTC1;
3094 afectl_core = B43_NPHY_AFECTL_C2;
3095 }
3096
3097 tmp[1] = b43_phy_read(dev, B43_NPHY_RFSEQCA);
3098 tmp[2] = b43_phy_read(dev, afectl_core);
3099 tmp[3] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
3100 tmp[4] = b43_phy_read(dev, rfctl[0]);
3101 tmp[5] = b43_phy_read(dev, rfctl[1]);
3102
3103 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]3104 ~B43_NPHY_RFSEQCA_RXDIS & 0xFFFF,
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3105 ((1 - i) << B43_NPHY_RFSEQCA_RXDIS_SHIFT));
3106 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN,
3107 (1 - i));
3108 b43_phy_set(dev, afectl_core, 0x0006);
3109 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0006);
3110
3111 band = b43_current_band(dev->wl);
3112
3113 if (nphy->rxcalparams & 0xFF000000) {
3114 if (band == IEEE80211_BAND_5GHZ)
3115 b43_phy_write(dev, rfctl[0], 0x140);
3116 else
3117 b43_phy_write(dev, rfctl[0], 0x110);
3118 } else {
3119 if (band == IEEE80211_BAND_5GHZ)
3120 b43_phy_write(dev, rfctl[0], 0x180);
3121 else
3122 b43_phy_write(dev, rfctl[0], 0x120);
3123 }
3124
3125 if (band == IEEE80211_BAND_5GHZ)
3126 b43_phy_write(dev, rfctl[1], 0x148);
3127 else
3128 b43_phy_write(dev, rfctl[1], 0x114);
3129
3130 if (nphy->rxcalparams & 0x10000) {
3131 b43_radio_maskset(dev, B2055_C1_GENSPARE2, 0xFC,
3132 (i + 1));
3133 b43_radio_maskset(dev, B2055_C2_GENSPARE2, 0xFC,
3134 (2 - i));
3135 }
3136
Rafał Miłecki30115c22010-10-22 17:43:45 +0200[diff] [blame]3137 for (j = 0; j < 4; j++) {
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3138 if (j < 3) {
3139 cur_lna = lna[j];
3140 cur_hpf1 = hpf1[j];
3141 cur_hpf2 = hpf2[j];
3142 } else {
3143 if (power[1] > 10000) {
3144 use = 1;
3145 cur_hpf = cur_hpf1;
3146 index = 2;
3147 } else {
3148 if (power[0] > 10000) {
3149 use = 1;
3150 cur_hpf = cur_hpf1;
3151 index = 1;
3152 } else {
3153 index = 0;
3154 use = 2;
3155 cur_hpf = cur_hpf2;
3156 }
3157 }
3158 cur_lna = lna[index];
3159 cur_hpf1 = hpf1[index];
3160 cur_hpf2 = hpf2[index];
3161 cur_hpf += desired - hweight32(power[index]);
3162 cur_hpf = clamp_val(cur_hpf, 0, 10);
3163 if (use == 1)
3164 cur_hpf1 = cur_hpf;
3165 else
3166 cur_hpf2 = cur_hpf;
3167 }
3168
3169 tmp[0] = ((cur_hpf2 << 8) | (cur_hpf1 << 4) |
3170 (cur_lna << 2));
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]3171 b43_nphy_rf_control_override(dev, 0x400, tmp[0], 3,
3172 false);
Rafał Miłeckide9a47f2010-01-18 00:21:49 +0100[diff] [blame]3173 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]3174 b43_nphy_stop_playback(dev);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3175
3176 if (playtone) {
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]3177 ret = b43_nphy_tx_tone(dev, 4000,
3178 (nphy->rxcalparams & 0xFFFF),
3179 false, false);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3180 playtone = false;
3181 } else {
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]3182 b43_nphy_run_samples(dev, 160, 0xFFFF, 0,
3183 false, false);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3184 }
3185
3186 if (ret == 0) {
3187 if (j < 3) {
3188 b43_nphy_rx_iq_est(dev, &est, 1024, 32,
3189 false);
3190 if (i == 0) {
3191 real = est.i0_pwr;
3192 imag = est.q0_pwr;
3193 } else {
3194 real = est.i1_pwr;
3195 imag = est.q1_pwr;
3196 }
3197 power[i] = ((real + imag) / 1024) + 1;
3198 } else {
3199 b43_nphy_calc_rx_iq_comp(dev, 1 << i);
3200 }
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]3201 b43_nphy_stop_playback(dev);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3202 }
3203
3204 if (ret != 0)
3205 break;
3206 }
3207
3208 b43_radio_mask(dev, B2055_C1_GENSPARE2, 0xFC);
3209 b43_radio_mask(dev, B2055_C2_GENSPARE2, 0xFC);
3210 b43_phy_write(dev, rfctl[1], tmp[5]);
3211 b43_phy_write(dev, rfctl[0], tmp[4]);
3212 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp[3]);
3213 b43_phy_write(dev, afectl_core, tmp[2]);
3214 b43_phy_write(dev, B43_NPHY_RFSEQCA, tmp[1]);
3215
3216 if (ret != 0)
3217 break;
3218 }
3219
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]3220 b43_nphy_rf_control_override(dev, 0x400, 0, 3, true);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]3221 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]3222 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3223
3224 b43_nphy_stay_in_carrier_search(dev, 0);
3225
3226 return ret;
3227}
3228
3229static int b43_nphy_rev3_cal_rx_iq(struct b43_wldev *dev,
3230 struct nphy_txgains target, u8 type, bool debug)
3231{
3232 return -1;
3233}
3234
3235/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalRxIq */
3236static int b43_nphy_cal_rx_iq(struct b43_wldev *dev,
3237 struct nphy_txgains target, u8 type, bool debug)
3238{
3239 if (dev->phy.rev >= 3)
3240 return b43_nphy_rev3_cal_rx_iq(dev, target, type, debug);
3241 else
3242 return b43_nphy_rev2_cal_rx_iq(dev, target, type, debug);
3243}
3244
Gábor Stefanikd2730b22010-08-16 22:39:16 +0200[diff] [blame]3245/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
3246static void b43_nphy_mac_phy_clock_set(struct b43_wldev *dev, bool on)
3247{
3248 u32 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
3249 if (on)
3250 tmslow |= SSB_TMSLOW_PHYCLK;
3251 else
3252 tmslow &= ~SSB_TMSLOW_PHYCLK;
3253 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
3254}
3255
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3256/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCoreSetState */
3257static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask)
3258{
3259 struct b43_phy *phy = &dev->phy;
3260 struct b43_phy_n *nphy = phy->n;
Rafał Miłecki0b81c232010-11-18 21:11:43 +0100[diff] [blame]3261 /* u16 buf[16]; it's rev3+ */
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3262
Rafał Miłecki049fbfe2010-08-22 21:47:32 +0200[diff] [blame]3263 nphy->phyrxchain = mask;
3264
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3265 if (0 /* FIXME clk */)
3266 return;
3267
3268 b43_mac_suspend(dev);
3269
3270 if (nphy->hang_avoid)
3271 b43_nphy_stay_in_carrier_search(dev, true);
3272
3273 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN,
3274 (mask & 0x3) << B43_NPHY_RFSEQCA_RXEN_SHIFT);
3275
Rafał Miłecki049fbfe2010-08-22 21:47:32 +0200[diff] [blame]3276 if ((mask & 0x3) != 0x3) {
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3277 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 1);
3278 if (dev->phy.rev >= 3) {
3279 /* TODO */
3280 }
3281 } else {
3282 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 0x1E);
3283 if (dev->phy.rev >= 3) {
3284 /* TODO */
3285 }
3286 }
3287
3288 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
3289
3290 if (nphy->hang_avoid)
3291 b43_nphy_stay_in_carrier_search(dev, false);
3292
3293 b43_mac_enable(dev);
3294}
3295
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]3296/*
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3297 * Init N-PHY
3298 * http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N
3299 */
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3300int b43_phy_initn(struct b43_wldev *dev)
3301{
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3302 struct ssb_bus *bus = dev->dev->bus;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3303 struct b43_phy *phy = &dev->phy;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3304 struct b43_phy_n *nphy = phy->n;
3305 u8 tx_pwr_state;
3306 struct nphy_txgains target;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3307 u16 tmp;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3308 enum ieee80211_band tmp2;
3309 bool do_rssi_cal;
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3310
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3311 u16 clip[2];
3312 bool do_cal = false;
3313
3314 if ((dev->phy.rev >= 3) &&
3315 (bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
3316 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) {
3317 chipco_set32(&dev->dev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40);
3318 }
3319 nphy->deaf_count = 0;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3320 b43_nphy_tables_init(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3321 nphy->crsminpwr_adjusted = false;
3322 nphy->noisevars_adjusted = false;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3323
3324 /* Clear all overrides */
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3325 if (dev->phy.rev >= 3) {
3326 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, 0);
3327 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0);
3328 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, 0);
3329 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, 0);
3330 } else {
3331 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0);
3332 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3333 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, 0);
3334 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, 0);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3335 if (dev->phy.rev < 6) {
3336 b43_phy_write(dev, B43_NPHY_RFCTL_INTC3, 0);
3337 b43_phy_write(dev, B43_NPHY_RFCTL_INTC4, 0);
3338 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3339 b43_phy_mask(dev, B43_NPHY_RFSEQMODE,
3340 ~(B43_NPHY_RFSEQMODE_CAOVER |
3341 B43_NPHY_RFSEQMODE_TROVER));
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3342 if (dev->phy.rev >= 3)
3343 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, 0);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3344 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, 0);
3345
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3346 if (dev->phy.rev <= 2) {
3347 tmp = (dev->phy.rev == 2) ? 0x3B : 0x40;
3348 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
3349 ~B43_NPHY_BPHY_CTL3_SCALE,
3350 tmp << B43_NPHY_BPHY_CTL3_SCALE_SHIFT);
3351 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3352 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20);
3353 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20);
3354
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3355 if (bus->sprom.boardflags2_lo & 0x100 ||
3356 (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3357 bus->boardinfo.type == 0x8B))
3358 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xA0);
3359 else
3360 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xB8);
3361 b43_phy_write(dev, B43_NPHY_MIMO_CRSTXEXT, 0xC8);
3362 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x50);
3363 b43_phy_write(dev, B43_NPHY_TXRIFS_FRDEL, 0x30);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3364
Rafał Miłeckiad9716e2010-01-17 13:03:40 +0100[diff] [blame]3365 b43_nphy_update_mimo_config(dev, nphy->preamble_override);
Rafał Miłecki4f4ab6c2010-01-17 13:03:55 +0100[diff] [blame]3366 b43_nphy_update_txrx_chain(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3367
3368 if (phy->rev < 2) {
3369 b43_phy_write(dev, B43_NPHY_DUP40_GFBL, 0xAA8);
3370 b43_phy_write(dev, B43_NPHY_DUP40_BL, 0x9A4);
3371 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3372
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3373 tmp2 = b43_current_band(dev->wl);
3374 if ((nphy->ipa2g_on && tmp2 == IEEE80211_BAND_2GHZ) ||
3375 (nphy->ipa5g_on && tmp2 == IEEE80211_BAND_5GHZ)) {
3376 b43_phy_set(dev, B43_NPHY_PAPD_EN0, 0x1);
3377 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ0, 0x007F,
3378 nphy->papd_epsilon_offset[0] << 7);
3379 b43_phy_set(dev, B43_NPHY_PAPD_EN1, 0x1);
3380 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ1, 0x007F,
3381 nphy->papd_epsilon_offset[1] << 7);
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]3382 b43_nphy_int_pa_set_tx_dig_filters(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3383 } else if (phy->rev >= 5) {
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]3384 b43_nphy_ext_pa_set_tx_dig_filters(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3385 }
3386
3387 b43_nphy_workarounds(dev);
3388
3389 /* Reset CCA, in init code it differs a little from standard way */
Rafał Miłecki730dd702010-01-15 16:38:07 +0100[diff] [blame]3390 b43_nphy_bmac_clock_fgc(dev, 1);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3391 tmp = b43_phy_read(dev, B43_NPHY_BBCFG);
3392 b43_phy_write(dev, B43_NPHY_BBCFG, tmp | B43_NPHY_BBCFG_RSTCCA);
3393 b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA);
Rafał Miłecki730dd702010-01-15 16:38:07 +0100[diff] [blame]3394 b43_nphy_bmac_clock_fgc(dev, 0);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3395
Gábor Stefanikd2730b22010-08-16 22:39:16 +0200[diff] [blame]3396 b43_nphy_mac_phy_clock_set(dev, true);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3397
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]3398 b43_nphy_pa_override(dev, false);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3399 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
3400 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]3401 b43_nphy_pa_override(dev, true);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3402
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]3403 b43_nphy_classifier(dev, 0, 0);
3404 b43_nphy_read_clip_detection(dev, clip);
Rafał Miłeckibec18642010-11-18 13:28:00 +0100[diff] [blame]3405 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3406 b43_nphy_bphy_init(dev);
3407
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3408 tx_pwr_state = nphy->txpwrctrl;
Rafał Miłecki161d5402010-11-28 12:59:43 +0100[diff] [blame^]3409 b43_nphy_tx_power_ctrl(dev, false);
3410 b43_nphy_tx_power_fix(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3411 /* TODO N PHY TX Power Control Idle TSSI */
3412 /* TODO N PHY TX Power Control Setup */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3413
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3414 if (phy->rev >= 3) {
3415 /* TODO */
3416 } else {
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]3417 b43_ntab_write_bulk(dev, B43_NTAB32(26, 192), 128,
3418 b43_ntab_tx_gain_rev0_1_2);
3419 b43_ntab_write_bulk(dev, B43_NTAB32(27, 192), 128,
3420 b43_ntab_tx_gain_rev0_1_2);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3421 }
3422
3423 if (nphy->phyrxchain != 3)
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3424 b43_nphy_set_rx_core_state(dev, nphy->phyrxchain);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3425 if (nphy->mphase_cal_phase_id > 0)
3426 ;/* TODO PHY Periodic Calibration Multi-Phase Restart */
3427
3428 do_rssi_cal = false;
3429 if (phy->rev >= 3) {
3430 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3431 do_rssi_cal = !nphy->rssical_chanspec_2G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3432 else
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3433 do_rssi_cal = !nphy->rssical_chanspec_5G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3434
3435 if (do_rssi_cal)
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]3436 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3437 else
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]3438 b43_nphy_restore_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3439 } else {
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]3440 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3441 }
3442
3443 if (!((nphy->measure_hold & 0x6) != 0)) {
3444 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3445 do_cal = !nphy->iqcal_chanspec_2G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3446 else
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3447 do_cal = !nphy->iqcal_chanspec_5G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3448
3449 if (nphy->mute)
3450 do_cal = false;
3451
3452 if (do_cal) {
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]3453 target = b43_nphy_get_tx_gains(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3454
3455 if (nphy->antsel_type == 2)
Rafał Miłecki8987a9e2010-02-27 13:03:33 +0100[diff] [blame]3456 b43_nphy_superswitch_init(dev, true);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3457 if (nphy->perical != 2) {
Rafał Miłecki90b97382010-01-15 14:48:21 +0100[diff] [blame]3458 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3459 if (phy->rev >= 3) {
3460 nphy->cal_orig_pwr_idx[0] =
3461 nphy->txpwrindex[0].index_internal;
3462 nphy->cal_orig_pwr_idx[1] =
3463 nphy->txpwrindex[1].index_internal;
3464 /* TODO N PHY Pre Calibrate TX Gain */
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]3465 target = b43_nphy_get_tx_gains(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3466 }
3467 }
3468 }
3469 }
3470
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3471 if (!b43_nphy_cal_tx_iq_lo(dev, target, true, false)) {
3472 if (b43_nphy_cal_rx_iq(dev, target, 2, 0) == 0)
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]3473 b43_nphy_save_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3474 else if (nphy->mphase_cal_phase_id == 0)
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3475 ;/* N PHY Periodic Calibration with argument 3 */
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3476 } else {
3477 b43_nphy_restore_cal(dev);
3478 }
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3479
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]3480 b43_nphy_tx_pwr_ctrl_coef_setup(dev);
Rafał Miłecki161d5402010-11-28 12:59:43 +0100[diff] [blame^]3481 b43_nphy_tx_power_ctrl(dev, tx_pwr_state);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3482 b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015);
3483 b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320);
3484 if (phy->rev >= 3 && phy->rev <= 6)
3485 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x0014);
Rafał Miłeckife3e46e2010-01-15 15:51:55 +0100[diff] [blame]3486 b43_nphy_tx_lp_fbw(dev);
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]3487 if (phy->rev >= 3)
3488 b43_nphy_spur_workaround(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3489
3490 b43err(dev->wl, "IEEE 802.11n devices are not supported, yet.\n");
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]3491 return 0;
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3492}
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3493
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3494/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ChanspecSetup */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3495static void b43_nphy_channel_setup(struct b43_wldev *dev,
Rafał Miłeckib15b3032010-03-29 00:53:13 +0200[diff] [blame]3496 const struct b43_phy_n_sfo_cfg *e,
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3497 struct ieee80211_channel *new_channel)
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3498{
3499 struct b43_phy *phy = &dev->phy;
3500 struct b43_phy_n *nphy = dev->phy.n;
3501
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3502 u16 old_band_5ghz;
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3503 u32 tmp32;
3504
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3505 old_band_5ghz =
3506 b43_phy_read(dev, B43_NPHY_BANDCTL) & B43_NPHY_BANDCTL_5GHZ;
3507 if (new_channel->band == IEEE80211_BAND_5GHZ && !old_band_5ghz) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3508 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3509 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
3510 b43_phy_set(dev, B43_PHY_B_BBCFG, 0xC000);
3511 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32);
3512 b43_phy_set(dev, B43_NPHY_BANDCTL, B43_NPHY_BANDCTL_5GHZ);
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3513 } else if (new_channel->band == IEEE80211_BAND_2GHZ && old_band_5ghz) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3514 b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ);
3515 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3516 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]3517 b43_phy_mask(dev, B43_PHY_B_BBCFG, 0x3FFF);
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3518 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32);
3519 }
3520
3521 b43_chantab_phy_upload(dev, e);
3522
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3523 if (new_channel->hw_value == 14) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3524 b43_nphy_classifier(dev, 2, 0);
3525 b43_phy_set(dev, B43_PHY_B_TEST, 0x0800);
3526 } else {
3527 b43_nphy_classifier(dev, 2, 2);
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3528 if (new_channel->band == IEEE80211_BAND_2GHZ)
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3529 b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840);
3530 }
3531
Rafał Miłecki161d5402010-11-28 12:59:43 +0100[diff] [blame^]3532 if (!nphy->txpwrctrl)
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3533 b43_nphy_tx_power_fix(dev);
3534
3535 if (dev->phy.rev < 3)
3536 b43_nphy_adjust_lna_gain_table(dev);
3537
3538 b43_nphy_tx_lp_fbw(dev);
3539
3540 if (dev->phy.rev >= 3 && 0) {
3541 /* TODO */
3542 }
3543
3544 b43_phy_write(dev, B43_NPHY_NDATAT_DUP40, 0x3830);
3545
3546 if (phy->rev >= 3)
3547 b43_nphy_spur_workaround(dev);
3548}
3549
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3550/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetChanspec */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3551static int b43_nphy_set_channel(struct b43_wldev *dev,
3552 struct ieee80211_channel *channel,
3553 enum nl80211_channel_type channel_type)
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3554{
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3555 struct b43_phy *phy = &dev->phy;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3556
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3557 const struct b43_nphy_channeltab_entry_rev2 *tabent_r2;
3558 const struct b43_nphy_channeltab_entry_rev3 *tabent_r3;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3559
3560 u8 tmp;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3561
3562 if (dev->phy.rev >= 3) {
Rafał Miłeckif2a6d6a2010-10-11 03:19:22 +0200[diff] [blame]3563 tabent_r3 = b43_nphy_get_chantabent_rev3(dev,
3564 channel->center_freq);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3565 tabent_r3 = NULL;
3566 if (!tabent_r3)
3567 return -ESRCH;
Rafał Miłeckiffd2d9b2010-03-29 00:53:14 +0200[diff] [blame]3568 } else {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3569 tabent_r2 = b43_nphy_get_chantabent_rev2(dev,
3570 channel->hw_value);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3571 if (!tabent_r2)
Rafał Miłeckiffd2d9b2010-03-29 00:53:14 +0200[diff] [blame]3572 return -ESRCH;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3573 }
3574
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3575 /* Channel is set later in common code, but we need to set it on our
3576 own to let this function's subcalls work properly. */
3577 phy->channel = channel->hw_value;
3578 phy->channel_freq = channel->center_freq;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3579
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200[diff] [blame]3580 if (b43_channel_type_is_40mhz(phy->channel_type) !=
3581 b43_channel_type_is_40mhz(channel_type))
3582 ; /* TODO: BMAC BW Set (channel_type) */
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3583
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3584 if (channel_type == NL80211_CHAN_HT40PLUS)
3585 b43_phy_set(dev, B43_NPHY_RXCTL,
3586 B43_NPHY_RXCTL_BSELU20);
3587 else if (channel_type == NL80211_CHAN_HT40MINUS)
3588 b43_phy_mask(dev, B43_NPHY_RXCTL,
3589 ~B43_NPHY_RXCTL_BSELU20);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3590
3591 if (dev->phy.rev >= 3) {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3592 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 4 : 0;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3593 b43_radio_maskset(dev, 0x08, 0xFFFB, tmp);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3594 /* TODO: PHY Radio2056 Setup (dev, tabent_r3); */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3595 b43_nphy_channel_setup(dev, &(tabent_r3->phy_regs), channel);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3596 } else {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3597 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 0x0020 : 0x0050;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3598 b43_radio_maskset(dev, B2055_MASTER1, 0xFF8F, tmp);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3599 b43_radio_2055_setup(dev, tabent_r2);
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3600 b43_nphy_channel_setup(dev, &(tabent_r2->phy_regs), channel);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3601 }
3602
3603 return 0;
3604}
3605
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3606static int b43_nphy_op_allocate(struct b43_wldev *dev)
3607{
3608 struct b43_phy_n *nphy;
3609
3610 nphy = kzalloc(sizeof(*nphy), GFP_KERNEL);
3611 if (!nphy)
3612 return -ENOMEM;
3613 dev->phy.n = nphy;
3614
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3615 return 0;
3616}
3617
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3618static void b43_nphy_op_prepare_structs(struct b43_wldev *dev)
3619{
3620 struct b43_phy *phy = &dev->phy;
3621 struct b43_phy_n *nphy = phy->n;
3622
3623 memset(nphy, 0, sizeof(*nphy));
3624
Rafał Miłecki0b81c232010-11-18 21:11:43 +0100[diff] [blame]3625 nphy->gain_boost = true; /* this way we follow wl, assume it is true */
3626 nphy->txrx_chain = 2; /* sth different than 0 and 1 for now */
3627 nphy->phyrxchain = 3; /* to avoid b43_nphy_set_rx_core_state like wl */
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3628}
3629
3630static void b43_nphy_op_free(struct b43_wldev *dev)
3631{
3632 struct b43_phy *phy = &dev->phy;
3633 struct b43_phy_n *nphy = phy->n;
3634
3635 kfree(nphy);
3636 phy->n = NULL;
3637}
3638
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3639static int b43_nphy_op_init(struct b43_wldev *dev)
3640{
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3641 return b43_phy_initn(dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3642}
3643
3644static inline void check_phyreg(struct b43_wldev *dev, u16 offset)
3645{
3646#if B43_DEBUG
3647 if ((offset & B43_PHYROUTE) == B43_PHYROUTE_OFDM_GPHY) {
3648 /* OFDM registers are onnly available on A/G-PHYs */
3649 b43err(dev->wl, "Invalid OFDM PHY access at "
3650 "0x%04X on N-PHY\n", offset);
3651 dump_stack();
3652 }
3653 if ((offset & B43_PHYROUTE) == B43_PHYROUTE_EXT_GPHY) {
3654 /* Ext-G registers are only available on G-PHYs */
3655 b43err(dev->wl, "Invalid EXT-G PHY access at "
3656 "0x%04X on N-PHY\n", offset);
3657 dump_stack();
3658 }
3659#endif /* B43_DEBUG */
3660}
3661
3662static u16 b43_nphy_op_read(struct b43_wldev *dev, u16 reg)
3663{
3664 check_phyreg(dev, reg);
3665 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
3666 return b43_read16(dev, B43_MMIO_PHY_DATA);
3667}
3668
3669static void b43_nphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
3670{
3671 check_phyreg(dev, reg);
3672 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
3673 b43_write16(dev, B43_MMIO_PHY_DATA, value);
3674}
3675
3676static u16 b43_nphy_op_radio_read(struct b43_wldev *dev, u16 reg)
3677{
3678 /* Register 1 is a 32-bit register. */
3679 B43_WARN_ON(reg == 1);
3680 /* N-PHY needs 0x100 for read access */
3681 reg |= 0x100;
3682
3683 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
3684 return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
3685}
3686
3687static void b43_nphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
3688{
3689 /* Register 1 is a 32-bit register. */
3690 B43_WARN_ON(reg == 1);
3691
3692 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
3693 b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
3694}
3695
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3696/* http://bcm-v4.sipsolutions.net/802.11/Radio/Switch%20Radio */
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3697static void b43_nphy_op_software_rfkill(struct b43_wldev *dev,
Johannes Berg19d337d2009-06-02 13:01:37 +0200[diff] [blame]3698 bool blocked)
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3699{
3700 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED)
3701 b43err(dev->wl, "MAC not suspended\n");
3702
3703 if (blocked) {
3704 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
3705 ~B43_NPHY_RFCTL_CMD_CHIP0PU);
3706 if (dev->phy.rev >= 3) {
3707 b43_radio_mask(dev, 0x09, ~0x2);
3708
3709 b43_radio_write(dev, 0x204D, 0);
3710 b43_radio_write(dev, 0x2053, 0);
3711 b43_radio_write(dev, 0x2058, 0);
3712 b43_radio_write(dev, 0x205E, 0);
3713 b43_radio_mask(dev, 0x2062, ~0xF0);
3714 b43_radio_write(dev, 0x2064, 0);
3715
3716 b43_radio_write(dev, 0x304D, 0);
3717 b43_radio_write(dev, 0x3053, 0);
3718 b43_radio_write(dev, 0x3058, 0);
3719 b43_radio_write(dev, 0x305E, 0);
3720 b43_radio_mask(dev, 0x3062, ~0xF0);
3721 b43_radio_write(dev, 0x3064, 0);
3722 }
3723 } else {
3724 if (dev->phy.rev >= 3) {
Rafał Miłeckid817f4e2010-03-29 00:53:12 +0200[diff] [blame]3725 b43_radio_init2056(dev);
Rafał Miłecki78159782010-10-06 07:50:08 +0200[diff] [blame]3726 b43_switch_channel(dev, dev->phy.channel);
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3727 } else {
3728 b43_radio_init2055(dev);
3729 }
3730 }
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3731}
3732
Michael Bueschcb24f572008-09-03 12:12:20 +0200[diff] [blame]3733static void b43_nphy_op_switch_analog(struct b43_wldev *dev, bool on)
3734{
3735 b43_phy_write(dev, B43_NPHY_AFECTL_OVER,
3736 on ? 0 : 0x7FFF);
3737}
3738
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3739static int b43_nphy_op_switch_channel(struct b43_wldev *dev,
3740 unsigned int new_channel)
3741{
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3742 struct ieee80211_channel *channel = dev->wl->hw->conf.channel;
3743 enum nl80211_channel_type channel_type = dev->wl->hw->conf.channel_type;
Rafał Miłecki5e7ee092010-10-06 07:50:06 +0200[diff] [blame]3744
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3745 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
3746 if ((new_channel < 1) || (new_channel > 14))
3747 return -EINVAL;
3748 } else {
3749 if (new_channel > 200)
3750 return -EINVAL;
3751 }
3752
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3753 return b43_nphy_set_channel(dev, channel, channel_type);
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3754}
3755
3756static unsigned int b43_nphy_op_get_default_chan(struct b43_wldev *dev)
3757{
3758 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3759 return 1;
3760 return 36;
3761}
3762
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3763const struct b43_phy_operations b43_phyops_n = {
3764 .allocate = b43_nphy_op_allocate,
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3765 .free = b43_nphy_op_free,
3766 .prepare_structs = b43_nphy_op_prepare_structs,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3767 .init = b43_nphy_op_init,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3768 .phy_read = b43_nphy_op_read,
3769 .phy_write = b43_nphy_op_write,
3770 .radio_read = b43_nphy_op_radio_read,
3771 .radio_write = b43_nphy_op_radio_write,
3772 .software_rfkill = b43_nphy_op_software_rfkill,
Michael Bueschcb24f572008-09-03 12:12:20 +0200[diff] [blame]3773 .switch_analog = b43_nphy_op_switch_analog,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3774 .switch_channel = b43_nphy_op_switch_channel,
3775 .get_default_chan = b43_nphy_op_get_default_chan,
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]3776 .recalc_txpower = b43_nphy_op_recalc_txpower,
3777 .adjust_txpower = b43_nphy_op_adjust_txpower,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3778};