blob: 58e66768774129061d8b7236b457d217fe2d7548 [file] [log] [blame]
Ben Gamari20172632009-02-17 20:08:50 -05001/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
Chris Wilsonf3cd4742009-10-13 22:20:20 +010030#include <linux/debugfs.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040032#include <linux/export.h>
David Howells760285e2012-10-02 18:01:07 +010033#include <drm/drmP.h>
Simon Farnsworth4e5359c2010-09-01 17:47:52 +010034#include "intel_drv.h"
Chris Wilsone5c65262010-11-01 11:35:28 +000035#include "intel_ringbuffer.h"
David Howells760285e2012-10-02 18:01:07 +010036#include <drm/i915_drm.h>
Ben Gamari20172632009-02-17 20:08:50 -050037#include "i915_drv.h"
38
39#define DRM_I915_RING_DEBUG 1
40
41
42#if defined(CONFIG_DEBUG_FS)
43
Chris Wilsonf13d3f72010-09-20 17:36:15 +010044enum {
Chris Wilson69dc4982010-10-19 10:36:51 +010045 ACTIVE_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010046 INACTIVE_LIST,
Chris Wilsond21d5972010-09-26 11:19:33 +010047 PINNED_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010048};
Ben Gamari433e12f2009-02-17 20:08:51 -050049
Chris Wilson70d39fe2010-08-25 16:03:34 +010050static const char *yesno(int v)
51{
52 return v ? "yes" : "no";
53}
54
55static int i915_capabilities(struct seq_file *m, void *data)
56{
57 struct drm_info_node *node = (struct drm_info_node *) m->private;
58 struct drm_device *dev = node->minor->dev;
59 const struct intel_device_info *info = INTEL_INFO(dev);
60
61 seq_printf(m, "gen: %d\n", info->gen);
Paulo Zanoni03d00ac2011-10-14 18:17:41 -030062 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
Daniel Vetterc96ea642012-08-08 22:01:51 +020063#define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
64#define DEV_INFO_SEP ;
65 DEV_INFO_FLAGS;
66#undef DEV_INFO_FLAG
67#undef DEV_INFO_SEP
Chris Wilson70d39fe2010-08-25 16:03:34 +010068
69 return 0;
70}
Ben Gamari433e12f2009-02-17 20:08:51 -050071
Chris Wilson05394f32010-11-08 19:18:58 +000072static const char *get_pin_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +000073{
Chris Wilson05394f32010-11-08 19:18:58 +000074 if (obj->user_pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000075 return "P";
Chris Wilson05394f32010-11-08 19:18:58 +000076 else if (obj->pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000077 return "p";
78 else
79 return " ";
80}
81
Chris Wilson05394f32010-11-08 19:18:58 +000082static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +000083{
Akshay Joshi0206e352011-08-16 15:34:10 -040084 switch (obj->tiling_mode) {
85 default:
86 case I915_TILING_NONE: return " ";
87 case I915_TILING_X: return "X";
88 case I915_TILING_Y: return "Y";
89 }
Chris Wilsona6172a82009-02-11 14:26:38 +000090}
91
Chris Wilson93dfb402011-03-29 16:59:50 -070092static const char *cache_level_str(int type)
Chris Wilson08c18322011-01-10 00:00:24 +000093{
94 switch (type) {
Chris Wilson93dfb402011-03-29 16:59:50 -070095 case I915_CACHE_NONE: return " uncached";
96 case I915_CACHE_LLC: return " snooped (LLC)";
97 case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
Chris Wilson08c18322011-01-10 00:00:24 +000098 default: return "";
99 }
100}
101
Chris Wilson37811fc2010-08-25 22:45:57 +0100102static void
103describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
104{
Chris Wilson04b97b32012-11-27 17:06:53 +0000105 seq_printf(m, "%p: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
Chris Wilson37811fc2010-08-25 22:45:57 +0100106 &obj->base,
107 get_pin_flag(obj),
108 get_tiling_flag(obj),
Eric Anholta05a5862011-12-20 08:54:15 -0800109 obj->base.size / 1024,
Chris Wilson37811fc2010-08-25 22:45:57 +0100110 obj->base.read_domains,
111 obj->base.write_domain,
Chris Wilson0201f1e2012-07-20 12:41:01 +0100112 obj->last_read_seqno,
113 obj->last_write_seqno,
Chris Wilsoncaea7472010-11-12 13:53:37 +0000114 obj->last_fenced_seqno,
Chris Wilson93dfb402011-03-29 16:59:50 -0700115 cache_level_str(obj->cache_level),
Chris Wilson37811fc2010-08-25 22:45:57 +0100116 obj->dirty ? " dirty" : "",
117 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
118 if (obj->base.name)
119 seq_printf(m, " (name: %d)", obj->base.name);
Chris Wilsonc110a6d2012-08-11 15:41:02 +0100120 if (obj->pin_count)
121 seq_printf(m, " (pinned x %d)", obj->pin_count);
Chris Wilson37811fc2010-08-25 22:45:57 +0100122 if (obj->fence_reg != I915_FENCE_REG_NONE)
123 seq_printf(m, " (fence: %d)", obj->fence_reg);
124 if (obj->gtt_space != NULL)
Chris Wilsona00b10c2010-09-24 21:15:47 +0100125 seq_printf(m, " (gtt offset: %08x, size: %08x)",
126 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
Chris Wilsonc1ad11f2012-11-15 11:32:21 +0000127 if (obj->stolen)
128 seq_printf(m, " (stolen: %08lx)", obj->stolen->start);
Chris Wilson6299f992010-11-24 12:23:44 +0000129 if (obj->pin_mappable || obj->fault_mappable) {
130 char s[3], *t = s;
131 if (obj->pin_mappable)
132 *t++ = 'p';
133 if (obj->fault_mappable)
134 *t++ = 'f';
135 *t = '\0';
136 seq_printf(m, " (%s mappable)", s);
137 }
Chris Wilson69dc4982010-10-19 10:36:51 +0100138 if (obj->ring != NULL)
139 seq_printf(m, " (%s)", obj->ring->name);
Chris Wilson37811fc2010-08-25 22:45:57 +0100140}
141
Ben Gamari433e12f2009-02-17 20:08:51 -0500142static int i915_gem_object_list_info(struct seq_file *m, void *data)
Ben Gamari20172632009-02-17 20:08:50 -0500143{
144 struct drm_info_node *node = (struct drm_info_node *) m->private;
Ben Gamari433e12f2009-02-17 20:08:51 -0500145 uintptr_t list = (uintptr_t) node->info_ent->data;
146 struct list_head *head;
Ben Gamari20172632009-02-17 20:08:50 -0500147 struct drm_device *dev = node->minor->dev;
148 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson05394f32010-11-08 19:18:58 +0000149 struct drm_i915_gem_object *obj;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100150 size_t total_obj_size, total_gtt_size;
151 int count, ret;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100152
153 ret = mutex_lock_interruptible(&dev->struct_mutex);
154 if (ret)
155 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500156
Ben Gamari433e12f2009-02-17 20:08:51 -0500157 switch (list) {
158 case ACTIVE_LIST:
159 seq_printf(m, "Active:\n");
Chris Wilson69dc4982010-10-19 10:36:51 +0100160 head = &dev_priv->mm.active_list;
Ben Gamari433e12f2009-02-17 20:08:51 -0500161 break;
162 case INACTIVE_LIST:
Ben Gamaria17458f2009-07-01 15:01:36 -0400163 seq_printf(m, "Inactive:\n");
Ben Gamari433e12f2009-02-17 20:08:51 -0500164 head = &dev_priv->mm.inactive_list;
165 break;
Ben Gamari433e12f2009-02-17 20:08:51 -0500166 default:
Chris Wilsonde227ef2010-07-03 07:58:38 +0100167 mutex_unlock(&dev->struct_mutex);
168 return -EINVAL;
Ben Gamari433e12f2009-02-17 20:08:51 -0500169 }
170
Chris Wilson8f2480f2010-09-26 11:44:19 +0100171 total_obj_size = total_gtt_size = count = 0;
Chris Wilson05394f32010-11-08 19:18:58 +0000172 list_for_each_entry(obj, head, mm_list) {
Chris Wilson37811fc2010-08-25 22:45:57 +0100173 seq_printf(m, " ");
Chris Wilson05394f32010-11-08 19:18:58 +0000174 describe_obj(m, obj);
Eric Anholtf4ceda82009-02-17 23:53:41 -0800175 seq_printf(m, "\n");
Chris Wilson05394f32010-11-08 19:18:58 +0000176 total_obj_size += obj->base.size;
177 total_gtt_size += obj->gtt_space->size;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100178 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500179 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100180 mutex_unlock(&dev->struct_mutex);
Carl Worth5e118f42009-03-20 11:54:25 -0700181
Chris Wilson8f2480f2010-09-26 11:44:19 +0100182 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
183 count, total_obj_size, total_gtt_size);
Ben Gamari20172632009-02-17 20:08:50 -0500184 return 0;
185}
186
Chris Wilson6299f992010-11-24 12:23:44 +0000187#define count_objects(list, member) do { \
188 list_for_each_entry(obj, list, member) { \
189 size += obj->gtt_space->size; \
190 ++count; \
191 if (obj->map_and_fenceable) { \
192 mappable_size += obj->gtt_space->size; \
193 ++mappable_count; \
194 } \
195 } \
Akshay Joshi0206e352011-08-16 15:34:10 -0400196} while (0)
Chris Wilson6299f992010-11-24 12:23:44 +0000197
Chris Wilson73aa8082010-09-30 11:46:12 +0100198static int i915_gem_object_info(struct seq_file *m, void* data)
199{
200 struct drm_info_node *node = (struct drm_info_node *) m->private;
201 struct drm_device *dev = node->minor->dev;
202 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonb7abb712012-08-20 11:33:30 +0200203 u32 count, mappable_count, purgeable_count;
204 size_t size, mappable_size, purgeable_size;
Chris Wilson6299f992010-11-24 12:23:44 +0000205 struct drm_i915_gem_object *obj;
Chris Wilson73aa8082010-09-30 11:46:12 +0100206 int ret;
207
208 ret = mutex_lock_interruptible(&dev->struct_mutex);
209 if (ret)
210 return ret;
211
Chris Wilson6299f992010-11-24 12:23:44 +0000212 seq_printf(m, "%u objects, %zu bytes\n",
213 dev_priv->mm.object_count,
214 dev_priv->mm.object_memory);
215
216 size = count = mappable_size = mappable_count = 0;
Chris Wilson6c085a72012-08-20 11:40:46 +0200217 count_objects(&dev_priv->mm.bound_list, gtt_list);
Chris Wilson6299f992010-11-24 12:23:44 +0000218 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
219 count, mappable_count, size, mappable_size);
220
221 size = count = mappable_size = mappable_count = 0;
222 count_objects(&dev_priv->mm.active_list, mm_list);
Chris Wilson6299f992010-11-24 12:23:44 +0000223 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
224 count, mappable_count, size, mappable_size);
225
226 size = count = mappable_size = mappable_count = 0;
Chris Wilson6299f992010-11-24 12:23:44 +0000227 count_objects(&dev_priv->mm.inactive_list, mm_list);
228 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
229 count, mappable_count, size, mappable_size);
230
Chris Wilsonb7abb712012-08-20 11:33:30 +0200231 size = count = purgeable_size = purgeable_count = 0;
232 list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list) {
Chris Wilson6c085a72012-08-20 11:40:46 +0200233 size += obj->base.size, ++count;
Chris Wilsonb7abb712012-08-20 11:33:30 +0200234 if (obj->madv == I915_MADV_DONTNEED)
235 purgeable_size += obj->base.size, ++purgeable_count;
236 }
Chris Wilson6c085a72012-08-20 11:40:46 +0200237 seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
238
Chris Wilson6299f992010-11-24 12:23:44 +0000239 size = count = mappable_size = mappable_count = 0;
Chris Wilson6c085a72012-08-20 11:40:46 +0200240 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
Chris Wilson6299f992010-11-24 12:23:44 +0000241 if (obj->fault_mappable) {
242 size += obj->gtt_space->size;
243 ++count;
244 }
245 if (obj->pin_mappable) {
246 mappable_size += obj->gtt_space->size;
247 ++mappable_count;
248 }
Chris Wilsonb7abb712012-08-20 11:33:30 +0200249 if (obj->madv == I915_MADV_DONTNEED) {
250 purgeable_size += obj->base.size;
251 ++purgeable_count;
252 }
Chris Wilson6299f992010-11-24 12:23:44 +0000253 }
Chris Wilsonb7abb712012-08-20 11:33:30 +0200254 seq_printf(m, "%u purgeable objects, %zu bytes\n",
255 purgeable_count, purgeable_size);
Chris Wilson6299f992010-11-24 12:23:44 +0000256 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
257 mappable_count, mappable_size);
258 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
259 count, size);
260
261 seq_printf(m, "%zu [%zu] gtt total\n",
262 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
Chris Wilson73aa8082010-09-30 11:46:12 +0100263
264 mutex_unlock(&dev->struct_mutex);
265
266 return 0;
267}
268
Chris Wilson08c18322011-01-10 00:00:24 +0000269static int i915_gem_gtt_info(struct seq_file *m, void* data)
270{
271 struct drm_info_node *node = (struct drm_info_node *) m->private;
272 struct drm_device *dev = node->minor->dev;
Chris Wilson1b502472012-04-24 15:47:30 +0100273 uintptr_t list = (uintptr_t) node->info_ent->data;
Chris Wilson08c18322011-01-10 00:00:24 +0000274 struct drm_i915_private *dev_priv = dev->dev_private;
275 struct drm_i915_gem_object *obj;
276 size_t total_obj_size, total_gtt_size;
277 int count, ret;
278
279 ret = mutex_lock_interruptible(&dev->struct_mutex);
280 if (ret)
281 return ret;
282
283 total_obj_size = total_gtt_size = count = 0;
Chris Wilson6c085a72012-08-20 11:40:46 +0200284 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
Chris Wilson1b502472012-04-24 15:47:30 +0100285 if (list == PINNED_LIST && obj->pin_count == 0)
286 continue;
287
Chris Wilson08c18322011-01-10 00:00:24 +0000288 seq_printf(m, " ");
289 describe_obj(m, obj);
290 seq_printf(m, "\n");
291 total_obj_size += obj->base.size;
292 total_gtt_size += obj->gtt_space->size;
293 count++;
294 }
295
296 mutex_unlock(&dev->struct_mutex);
297
298 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
299 count, total_obj_size, total_gtt_size);
300
301 return 0;
302}
303
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100304static int i915_gem_pageflip_info(struct seq_file *m, void *data)
305{
306 struct drm_info_node *node = (struct drm_info_node *) m->private;
307 struct drm_device *dev = node->minor->dev;
308 unsigned long flags;
309 struct intel_crtc *crtc;
310
311 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800312 const char pipe = pipe_name(crtc->pipe);
313 const char plane = plane_name(crtc->plane);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100314 struct intel_unpin_work *work;
315
316 spin_lock_irqsave(&dev->event_lock, flags);
317 work = crtc->unpin_work;
318 if (work == NULL) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800319 seq_printf(m, "No flip due on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100320 pipe, plane);
321 } else {
322 if (!work->pending) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800323 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100324 pipe, plane);
325 } else {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800326 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100327 pipe, plane);
328 }
329 if (work->enable_stall_check)
330 seq_printf(m, "Stall check enabled, ");
331 else
332 seq_printf(m, "Stall check waiting for page flip ioctl, ");
333 seq_printf(m, "%d prepares\n", work->pending);
334
335 if (work->old_fb_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000336 struct drm_i915_gem_object *obj = work->old_fb_obj;
337 if (obj)
338 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100339 }
340 if (work->pending_flip_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000341 struct drm_i915_gem_object *obj = work->pending_flip_obj;
342 if (obj)
343 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100344 }
345 }
346 spin_unlock_irqrestore(&dev->event_lock, flags);
347 }
348
349 return 0;
350}
351
Ben Gamari20172632009-02-17 20:08:50 -0500352static int i915_gem_request_info(struct seq_file *m, void *data)
353{
354 struct drm_info_node *node = (struct drm_info_node *) m->private;
355 struct drm_device *dev = node->minor->dev;
356 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100357 struct intel_ring_buffer *ring;
Ben Gamari20172632009-02-17 20:08:50 -0500358 struct drm_i915_gem_request *gem_request;
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100359 int ret, count, i;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100360
361 ret = mutex_lock_interruptible(&dev->struct_mutex);
362 if (ret)
363 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500364
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100365 count = 0;
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100366 for_each_ring(ring, dev_priv, i) {
367 if (list_empty(&ring->request_list))
368 continue;
369
370 seq_printf(m, "%s requests:\n", ring->name);
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100371 list_for_each_entry(gem_request,
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100372 &ring->request_list,
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100373 list) {
374 seq_printf(m, " %d @ %d\n",
375 gem_request->seqno,
376 (int) (jiffies - gem_request->emitted_jiffies));
377 }
378 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500379 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100380 mutex_unlock(&dev->struct_mutex);
381
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100382 if (count == 0)
383 seq_printf(m, "No requests\n");
384
Ben Gamari20172632009-02-17 20:08:50 -0500385 return 0;
386}
387
Chris Wilsonb2223492010-10-27 15:27:33 +0100388static void i915_ring_seqno_info(struct seq_file *m,
389 struct intel_ring_buffer *ring)
390{
391 if (ring->get_seqno) {
392 seq_printf(m, "Current sequence (%s): %d\n",
Chris Wilsonb2eadbc2012-08-09 10:58:30 +0100393 ring->name, ring->get_seqno(ring, false));
Chris Wilsonb2223492010-10-27 15:27:33 +0100394 }
395}
396
Ben Gamari20172632009-02-17 20:08:50 -0500397static int i915_gem_seqno_info(struct seq_file *m, void *data)
398{
399 struct drm_info_node *node = (struct drm_info_node *) m->private;
400 struct drm_device *dev = node->minor->dev;
401 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100402 struct intel_ring_buffer *ring;
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000403 int ret, i;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100404
405 ret = mutex_lock_interruptible(&dev->struct_mutex);
406 if (ret)
407 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500408
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100409 for_each_ring(ring, dev_priv, i)
410 i915_ring_seqno_info(m, ring);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100411
412 mutex_unlock(&dev->struct_mutex);
413
Ben Gamari20172632009-02-17 20:08:50 -0500414 return 0;
415}
416
417
418static int i915_interrupt_info(struct seq_file *m, void *data)
419{
420 struct drm_info_node *node = (struct drm_info_node *) m->private;
421 struct drm_device *dev = node->minor->dev;
422 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100423 struct intel_ring_buffer *ring;
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800424 int ret, i, pipe;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100425
426 ret = mutex_lock_interruptible(&dev->struct_mutex);
427 if (ret)
428 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500429
Jesse Barnes7e231dbe2012-03-28 13:39:38 -0700430 if (IS_VALLEYVIEW(dev)) {
431 seq_printf(m, "Display IER:\t%08x\n",
432 I915_READ(VLV_IER));
433 seq_printf(m, "Display IIR:\t%08x\n",
434 I915_READ(VLV_IIR));
435 seq_printf(m, "Display IIR_RW:\t%08x\n",
436 I915_READ(VLV_IIR_RW));
437 seq_printf(m, "Display IMR:\t%08x\n",
438 I915_READ(VLV_IMR));
439 for_each_pipe(pipe)
440 seq_printf(m, "Pipe %c stat:\t%08x\n",
441 pipe_name(pipe),
442 I915_READ(PIPESTAT(pipe)));
443
444 seq_printf(m, "Master IER:\t%08x\n",
445 I915_READ(VLV_MASTER_IER));
446
447 seq_printf(m, "Render IER:\t%08x\n",
448 I915_READ(GTIER));
449 seq_printf(m, "Render IIR:\t%08x\n",
450 I915_READ(GTIIR));
451 seq_printf(m, "Render IMR:\t%08x\n",
452 I915_READ(GTIMR));
453
454 seq_printf(m, "PM IER:\t\t%08x\n",
455 I915_READ(GEN6_PMIER));
456 seq_printf(m, "PM IIR:\t\t%08x\n",
457 I915_READ(GEN6_PMIIR));
458 seq_printf(m, "PM IMR:\t\t%08x\n",
459 I915_READ(GEN6_PMIMR));
460
461 seq_printf(m, "Port hotplug:\t%08x\n",
462 I915_READ(PORT_HOTPLUG_EN));
463 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
464 I915_READ(VLV_DPFLIPSTAT));
465 seq_printf(m, "DPINVGTT:\t%08x\n",
466 I915_READ(DPINVGTT));
467
468 } else if (!HAS_PCH_SPLIT(dev)) {
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800469 seq_printf(m, "Interrupt enable: %08x\n",
470 I915_READ(IER));
471 seq_printf(m, "Interrupt identity: %08x\n",
472 I915_READ(IIR));
473 seq_printf(m, "Interrupt mask: %08x\n",
474 I915_READ(IMR));
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800475 for_each_pipe(pipe)
476 seq_printf(m, "Pipe %c stat: %08x\n",
477 pipe_name(pipe),
478 I915_READ(PIPESTAT(pipe)));
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800479 } else {
480 seq_printf(m, "North Display Interrupt enable: %08x\n",
481 I915_READ(DEIER));
482 seq_printf(m, "North Display Interrupt identity: %08x\n",
483 I915_READ(DEIIR));
484 seq_printf(m, "North Display Interrupt mask: %08x\n",
485 I915_READ(DEIMR));
486 seq_printf(m, "South Display Interrupt enable: %08x\n",
487 I915_READ(SDEIER));
488 seq_printf(m, "South Display Interrupt identity: %08x\n",
489 I915_READ(SDEIIR));
490 seq_printf(m, "South Display Interrupt mask: %08x\n",
491 I915_READ(SDEIMR));
492 seq_printf(m, "Graphics Interrupt enable: %08x\n",
493 I915_READ(GTIER));
494 seq_printf(m, "Graphics Interrupt identity: %08x\n",
495 I915_READ(GTIIR));
496 seq_printf(m, "Graphics Interrupt mask: %08x\n",
497 I915_READ(GTIMR));
498 }
Ben Gamari20172632009-02-17 20:08:50 -0500499 seq_printf(m, "Interrupts received: %d\n",
500 atomic_read(&dev_priv->irq_received));
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100501 for_each_ring(ring, dev_priv, i) {
Jesse Barnesda64c6f2011-08-09 09:17:46 -0700502 if (IS_GEN6(dev) || IS_GEN7(dev)) {
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100503 seq_printf(m,
504 "Graphics Interrupt mask (%s): %08x\n",
505 ring->name, I915_READ_IMR(ring));
Chris Wilson9862e602011-01-04 22:22:17 +0000506 }
Chris Wilsona2c7f6f2012-09-01 20:51:22 +0100507 i915_ring_seqno_info(m, ring);
Chris Wilson9862e602011-01-04 22:22:17 +0000508 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100509 mutex_unlock(&dev->struct_mutex);
510
Ben Gamari20172632009-02-17 20:08:50 -0500511 return 0;
512}
513
Chris Wilsona6172a82009-02-11 14:26:38 +0000514static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
515{
516 struct drm_info_node *node = (struct drm_info_node *) m->private;
517 struct drm_device *dev = node->minor->dev;
518 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100519 int i, ret;
520
521 ret = mutex_lock_interruptible(&dev->struct_mutex);
522 if (ret)
523 return ret;
Chris Wilsona6172a82009-02-11 14:26:38 +0000524
525 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
526 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
527 for (i = 0; i < dev_priv->num_fence_regs; i++) {
Chris Wilson05394f32010-11-08 19:18:58 +0000528 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
Chris Wilsona6172a82009-02-11 14:26:38 +0000529
Chris Wilson6c085a72012-08-20 11:40:46 +0200530 seq_printf(m, "Fence %d, pin count = %d, object = ",
531 i, dev_priv->fence_regs[i].pin_count);
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100532 if (obj == NULL)
533 seq_printf(m, "unused");
534 else
Chris Wilson05394f32010-11-08 19:18:58 +0000535 describe_obj(m, obj);
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100536 seq_printf(m, "\n");
Chris Wilsona6172a82009-02-11 14:26:38 +0000537 }
538
Chris Wilson05394f32010-11-08 19:18:58 +0000539 mutex_unlock(&dev->struct_mutex);
Chris Wilsona6172a82009-02-11 14:26:38 +0000540 return 0;
541}
542
Ben Gamari20172632009-02-17 20:08:50 -0500543static int i915_hws_info(struct seq_file *m, void *data)
544{
545 struct drm_info_node *node = (struct drm_info_node *) m->private;
546 struct drm_device *dev = node->minor->dev;
547 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100548 struct intel_ring_buffer *ring;
Chris Wilson311bd682011-01-13 19:06:50 +0000549 const volatile u32 __iomem *hws;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100550 int i;
Ben Gamari20172632009-02-17 20:08:50 -0500551
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000552 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
Chris Wilson311bd682011-01-13 19:06:50 +0000553 hws = (volatile u32 __iomem *)ring->status_page.page_addr;
Ben Gamari20172632009-02-17 20:08:50 -0500554 if (hws == NULL)
555 return 0;
556
557 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
558 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
559 i * 4,
560 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
561 }
562 return 0;
563}
564
Chris Wilsone5c65262010-11-01 11:35:28 +0000565static const char *ring_str(int ring)
566{
567 switch (ring) {
Daniel Vetter96154f22011-12-14 13:57:00 +0100568 case RCS: return "render";
569 case VCS: return "bsd";
570 case BCS: return "blt";
Chris Wilsone5c65262010-11-01 11:35:28 +0000571 default: return "";
572 }
573}
574
Chris Wilson9df30792010-02-18 10:24:56 +0000575static const char *pin_flag(int pinned)
576{
577 if (pinned > 0)
578 return " P";
579 else if (pinned < 0)
580 return " p";
581 else
582 return "";
583}
584
585static const char *tiling_flag(int tiling)
586{
587 switch (tiling) {
588 default:
589 case I915_TILING_NONE: return "";
590 case I915_TILING_X: return " X";
591 case I915_TILING_Y: return " Y";
592 }
593}
594
595static const char *dirty_flag(int dirty)
596{
597 return dirty ? " dirty" : "";
598}
599
600static const char *purgeable_flag(int purgeable)
601{
602 return purgeable ? " purgeable" : "";
603}
604
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000605static void print_error_buffers(struct seq_file *m,
606 const char *name,
607 struct drm_i915_error_buffer *err,
608 int count)
609{
610 seq_printf(m, "%s [%d]:\n", name, count);
611
612 while (count--) {
Chris Wilson04b97b32012-11-27 17:06:53 +0000613 seq_printf(m, " %08x %8u %02x %02x %x %x%s%s%s%s%s%s%s",
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000614 err->gtt_offset,
615 err->size,
616 err->read_domains,
617 err->write_domain,
Chris Wilson0201f1e2012-07-20 12:41:01 +0100618 err->rseqno, err->wseqno,
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000619 pin_flag(err->pinned),
620 tiling_flag(err->tiling),
621 dirty_flag(err->dirty),
622 purgeable_flag(err->purgeable),
Daniel Vetter96154f22011-12-14 13:57:00 +0100623 err->ring != -1 ? " " : "",
Chris Wilsona779e5a2011-01-09 21:07:49 +0000624 ring_str(err->ring),
Chris Wilson93dfb402011-03-29 16:59:50 -0700625 cache_level_str(err->cache_level));
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000626
627 if (err->name)
628 seq_printf(m, " (name: %d)", err->name);
629 if (err->fence_reg != I915_FENCE_REG_NONE)
630 seq_printf(m, " (fence: %d)", err->fence_reg);
631
632 seq_printf(m, "\n");
633 err++;
634 }
635}
636
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100637static void i915_ring_error_state(struct seq_file *m,
638 struct drm_device *dev,
639 struct drm_i915_error_state *error,
640 unsigned ring)
641{
Ben Widawskyec34a012012-04-03 23:03:00 -0700642 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100643 seq_printf(m, "%s command stream:\n", ring_str(ring));
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100644 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]);
645 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100646 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]);
647 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]);
648 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]);
649 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]);
Ben Widawsky050ee912012-08-22 11:32:15 -0700650 if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100651 seq_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr);
Ben Widawsky050ee912012-08-22 11:32:15 -0700652
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100653 if (INTEL_INFO(dev)->gen >= 4)
654 seq_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]);
655 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]);
Daniel Vetter9d2f41f2012-04-02 21:41:45 +0200656 seq_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100657 if (INTEL_INFO(dev)->gen >= 6) {
Chris Wilson12f55812012-07-05 17:14:01 +0100658 seq_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100659 seq_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
Chris Wilsondf2b23d2012-11-27 17:06:54 +0000660 seq_printf(m, " SYNC_0: 0x%08x [last synced 0x%08x]\n",
661 error->semaphore_mboxes[ring][0],
662 error->semaphore_seqno[ring][0]);
663 seq_printf(m, " SYNC_1: 0x%08x [last synced 0x%08x]\n",
664 error->semaphore_mboxes[ring][1],
665 error->semaphore_seqno[ring][1]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100666 }
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100667 seq_printf(m, " seqno: 0x%08x\n", error->seqno[ring]);
Ben Widawsky9574b3f2012-04-26 16:03:01 -0700668 seq_printf(m, " waiting: %s\n", yesno(error->waiting[ring]));
Daniel Vetter7e3b8732012-02-01 22:26:45 +0100669 seq_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
670 seq_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100671}
672
Daniel Vetterd5442302012-04-27 15:17:40 +0200673struct i915_error_state_file_priv {
674 struct drm_device *dev;
675 struct drm_i915_error_state *error;
676};
677
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700678static int i915_error_state(struct seq_file *m, void *unused)
679{
Daniel Vetterd5442302012-04-27 15:17:40 +0200680 struct i915_error_state_file_priv *error_priv = m->private;
681 struct drm_device *dev = error_priv->dev;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700682 drm_i915_private_t *dev_priv = dev->dev_private;
Daniel Vetterd5442302012-04-27 15:17:40 +0200683 struct drm_i915_error_state *error = error_priv->error;
Chris Wilsonb4519512012-05-11 14:29:30 +0100684 struct intel_ring_buffer *ring;
Chris Wilson52d39a22012-02-15 11:25:37 +0000685 int i, j, page, offset, elt;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700686
Daniel Vetter742cbee2012-04-27 15:17:39 +0200687 if (!error) {
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700688 seq_printf(m, "no error state collected\n");
Daniel Vetter742cbee2012-04-27 15:17:39 +0200689 return 0;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700690 }
691
Jesse Barnes8a905232009-07-11 16:48:03 -0400692 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
693 error->time.tv_usec);
Chris Wilson9df30792010-02-18 10:24:56 +0000694 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100695 seq_printf(m, "EIR: 0x%08x\n", error->eir);
Ben Widawskybe998e22012-04-26 16:03:00 -0700696 seq_printf(m, "IER: 0x%08x\n", error->ier);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100697 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
Ben Widawskyb9a39062012-06-04 14:42:52 -0700698 seq_printf(m, "CCID: 0x%08x\n", error->ccid);
Chris Wilson9df30792010-02-18 10:24:56 +0000699
Daniel Vetterbf3301a2011-05-12 22:17:12 +0100700 for (i = 0; i < dev_priv->num_fence_regs; i++)
Chris Wilson748ebc62010-10-24 10:28:47 +0100701 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
702
Ben Widawsky050ee912012-08-22 11:32:15 -0700703 for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
704 seq_printf(m, " INSTDONE_%d: 0x%08x\n", i, error->extra_instdone[i]);
705
Daniel Vetter33f3f512011-12-14 13:57:39 +0100706 if (INTEL_INFO(dev)->gen >= 6) {
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100707 seq_printf(m, "ERROR: 0x%08x\n", error->error);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100708 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
709 }
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100710
Ben Widawsky71e172e2012-08-20 16:15:13 -0700711 if (INTEL_INFO(dev)->gen == 7)
712 seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
713
Chris Wilsonb4519512012-05-11 14:29:30 +0100714 for_each_ring(ring, dev_priv, i)
715 i915_ring_error_state(m, dev, error, i);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100716
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000717 if (error->active_bo)
718 print_error_buffers(m, "Active",
719 error->active_bo,
720 error->active_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000721
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000722 if (error->pinned_bo)
723 print_error_buffers(m, "Pinned",
724 error->pinned_bo,
725 error->pinned_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000726
Chris Wilson52d39a22012-02-15 11:25:37 +0000727 for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
728 struct drm_i915_error_object *obj;
Chris Wilson9df30792010-02-18 10:24:56 +0000729
Chris Wilson52d39a22012-02-15 11:25:37 +0000730 if ((obj = error->ring[i].batchbuffer)) {
Chris Wilsonbcfb2e22011-01-07 21:06:07 +0000731 seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
732 dev_priv->ring[i].name,
733 obj->gtt_offset);
Chris Wilson9df30792010-02-18 10:24:56 +0000734 offset = 0;
735 for (page = 0; page < obj->page_count; page++) {
736 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
737 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
738 offset += 4;
739 }
740 }
741 }
Chris Wilson9df30792010-02-18 10:24:56 +0000742
Chris Wilson52d39a22012-02-15 11:25:37 +0000743 if (error->ring[i].num_requests) {
744 seq_printf(m, "%s --- %d requests\n",
745 dev_priv->ring[i].name,
746 error->ring[i].num_requests);
747 for (j = 0; j < error->ring[i].num_requests; j++) {
Chris Wilsonee4f42b2012-02-15 11:25:38 +0000748 seq_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
Chris Wilson52d39a22012-02-15 11:25:37 +0000749 error->ring[i].requests[j].seqno,
Chris Wilsonee4f42b2012-02-15 11:25:38 +0000750 error->ring[i].requests[j].jiffies,
751 error->ring[i].requests[j].tail);
Chris Wilson52d39a22012-02-15 11:25:37 +0000752 }
753 }
754
755 if ((obj = error->ring[i].ringbuffer)) {
Chris Wilsone2f973d2011-01-27 19:15:11 +0000756 seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
757 dev_priv->ring[i].name,
758 obj->gtt_offset);
759 offset = 0;
760 for (page = 0; page < obj->page_count; page++) {
761 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
762 seq_printf(m, "%08x : %08x\n",
763 offset,
764 obj->pages[page][elt]);
765 offset += 4;
766 }
Chris Wilson9df30792010-02-18 10:24:56 +0000767 }
768 }
769 }
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700770
Chris Wilson6ef3d422010-08-04 20:26:07 +0100771 if (error->overlay)
772 intel_overlay_print_error_state(m, error->overlay);
773
Chris Wilsonc4a1d9e2010-11-21 13:12:35 +0000774 if (error->display)
775 intel_display_print_error_state(m, dev, error->display);
776
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700777 return 0;
778}
Ben Gamari6911a9b2009-04-02 11:24:54 -0700779
Daniel Vetterd5442302012-04-27 15:17:40 +0200780static ssize_t
781i915_error_state_write(struct file *filp,
782 const char __user *ubuf,
783 size_t cnt,
784 loff_t *ppos)
785{
786 struct seq_file *m = filp->private_data;
787 struct i915_error_state_file_priv *error_priv = m->private;
788 struct drm_device *dev = error_priv->dev;
Daniel Vetter22bcfc62012-08-09 15:07:02 +0200789 int ret;
Daniel Vetterd5442302012-04-27 15:17:40 +0200790
791 DRM_DEBUG_DRIVER("Resetting error state\n");
792
Daniel Vetter22bcfc62012-08-09 15:07:02 +0200793 ret = mutex_lock_interruptible(&dev->struct_mutex);
794 if (ret)
795 return ret;
796
Daniel Vetterd5442302012-04-27 15:17:40 +0200797 i915_destroy_error_state(dev);
798 mutex_unlock(&dev->struct_mutex);
799
800 return cnt;
801}
802
803static int i915_error_state_open(struct inode *inode, struct file *file)
804{
805 struct drm_device *dev = inode->i_private;
806 drm_i915_private_t *dev_priv = dev->dev_private;
807 struct i915_error_state_file_priv *error_priv;
808 unsigned long flags;
809
810 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
811 if (!error_priv)
812 return -ENOMEM;
813
814 error_priv->dev = dev;
815
816 spin_lock_irqsave(&dev_priv->error_lock, flags);
817 error_priv->error = dev_priv->first_error;
818 if (error_priv->error)
819 kref_get(&error_priv->error->ref);
820 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
821
822 return single_open(file, i915_error_state, error_priv);
823}
824
825static int i915_error_state_release(struct inode *inode, struct file *file)
826{
827 struct seq_file *m = file->private_data;
828 struct i915_error_state_file_priv *error_priv = m->private;
829
830 if (error_priv->error)
831 kref_put(&error_priv->error->ref, i915_error_state_free);
832 kfree(error_priv);
833
834 return single_release(inode, file);
835}
836
837static const struct file_operations i915_error_state_fops = {
838 .owner = THIS_MODULE,
839 .open = i915_error_state_open,
840 .read = seq_read,
841 .write = i915_error_state_write,
842 .llseek = default_llseek,
843 .release = i915_error_state_release,
844};
845
Jesse Barnesf97108d2010-01-29 11:27:07 -0800846static int i915_rstdby_delays(struct seq_file *m, void *unused)
847{
848 struct drm_info_node *node = (struct drm_info_node *) m->private;
849 struct drm_device *dev = node->minor->dev;
850 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700851 u16 crstanddelay;
852 int ret;
853
854 ret = mutex_lock_interruptible(&dev->struct_mutex);
855 if (ret)
856 return ret;
857
858 crstanddelay = I915_READ16(CRSTANDVID);
859
860 mutex_unlock(&dev->struct_mutex);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800861
862 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
863
864 return 0;
865}
866
867static int i915_cur_delayinfo(struct seq_file *m, void *unused)
868{
869 struct drm_info_node *node = (struct drm_info_node *) m->private;
870 struct drm_device *dev = node->minor->dev;
871 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100872 int ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800873
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800874 if (IS_GEN5(dev)) {
875 u16 rgvswctl = I915_READ16(MEMSWCTL);
876 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
877
878 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
879 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
880 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
881 MEMSTAT_VID_SHIFT);
882 seq_printf(m, "Current P-state: %d\n",
883 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
Jesse Barnes1c70c0c2011-06-29 13:34:36 -0700884 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800885 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
886 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
887 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800888 u32 rpstat;
889 u32 rpupei, rpcurup, rpprevup;
890 u32 rpdownei, rpcurdown, rpprevdown;
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800891 int max_freq;
892
893 /* RPSTAT1 is in the GT power well */
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100894 ret = mutex_lock_interruptible(&dev->struct_mutex);
895 if (ret)
896 return ret;
897
Ben Widawskyfcca7922011-04-25 11:23:07 -0700898 gen6_gt_force_wake_get(dev_priv);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800899
Jesse Barnesccab5c82011-01-18 15:49:25 -0800900 rpstat = I915_READ(GEN6_RPSTAT1);
901 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
902 rpcurup = I915_READ(GEN6_RP_CUR_UP);
903 rpprevup = I915_READ(GEN6_RP_PREV_UP);
904 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
905 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
906 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
907
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100908 gen6_gt_force_wake_put(dev_priv);
909 mutex_unlock(&dev->struct_mutex);
910
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800911 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800912 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800913 seq_printf(m, "Render p-state ratio: %d\n",
914 (gt_perf_status & 0xff00) >> 8);
915 seq_printf(m, "Render p-state VID: %d\n",
916 gt_perf_status & 0xff);
917 seq_printf(m, "Render p-state limit: %d\n",
918 rp_state_limits & 0xff);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800919 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
Ben Widawskyc8735b02012-09-07 19:43:39 -0700920 GEN6_CAGF_SHIFT) * GT_FREQUENCY_MULTIPLIER);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800921 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
922 GEN6_CURICONT_MASK);
923 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
924 GEN6_CURBSYTAVG_MASK);
925 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
926 GEN6_CURBSYTAVG_MASK);
927 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
928 GEN6_CURIAVG_MASK);
929 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
930 GEN6_CURBSYTAVG_MASK);
931 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
932 GEN6_CURBSYTAVG_MASK);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800933
934 max_freq = (rp_state_cap & 0xff0000) >> 16;
935 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
Ben Widawskyc8735b02012-09-07 19:43:39 -0700936 max_freq * GT_FREQUENCY_MULTIPLIER);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800937
938 max_freq = (rp_state_cap & 0xff00) >> 8;
939 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
Ben Widawskyc8735b02012-09-07 19:43:39 -0700940 max_freq * GT_FREQUENCY_MULTIPLIER);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800941
942 max_freq = rp_state_cap & 0xff;
943 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
Ben Widawskyc8735b02012-09-07 19:43:39 -0700944 max_freq * GT_FREQUENCY_MULTIPLIER);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800945 } else {
946 seq_printf(m, "no P-state info available\n");
947 }
Jesse Barnesf97108d2010-01-29 11:27:07 -0800948
949 return 0;
950}
951
952static int i915_delayfreq_table(struct seq_file *m, void *unused)
953{
954 struct drm_info_node *node = (struct drm_info_node *) m->private;
955 struct drm_device *dev = node->minor->dev;
956 drm_i915_private_t *dev_priv = dev->dev_private;
957 u32 delayfreq;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700958 int ret, i;
959
960 ret = mutex_lock_interruptible(&dev->struct_mutex);
961 if (ret)
962 return ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800963
964 for (i = 0; i < 16; i++) {
965 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700966 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
967 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800968 }
969
Ben Widawsky616fdb52011-10-05 11:44:54 -0700970 mutex_unlock(&dev->struct_mutex);
971
Jesse Barnesf97108d2010-01-29 11:27:07 -0800972 return 0;
973}
974
975static inline int MAP_TO_MV(int map)
976{
977 return 1250 - (map * 25);
978}
979
980static int i915_inttoext_table(struct seq_file *m, void *unused)
981{
982 struct drm_info_node *node = (struct drm_info_node *) m->private;
983 struct drm_device *dev = node->minor->dev;
984 drm_i915_private_t *dev_priv = dev->dev_private;
985 u32 inttoext;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700986 int ret, i;
987
988 ret = mutex_lock_interruptible(&dev->struct_mutex);
989 if (ret)
990 return ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800991
992 for (i = 1; i <= 32; i++) {
993 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
994 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
995 }
996
Ben Widawsky616fdb52011-10-05 11:44:54 -0700997 mutex_unlock(&dev->struct_mutex);
998
Jesse Barnesf97108d2010-01-29 11:27:07 -0800999 return 0;
1000}
1001
Ben Widawsky4d855292011-12-12 19:34:16 -08001002static int ironlake_drpc_info(struct seq_file *m)
Jesse Barnesf97108d2010-01-29 11:27:07 -08001003{
1004 struct drm_info_node *node = (struct drm_info_node *) m->private;
1005 struct drm_device *dev = node->minor->dev;
1006 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -07001007 u32 rgvmodectl, rstdbyctl;
1008 u16 crstandvid;
1009 int ret;
1010
1011 ret = mutex_lock_interruptible(&dev->struct_mutex);
1012 if (ret)
1013 return ret;
1014
1015 rgvmodectl = I915_READ(MEMMODECTL);
1016 rstdbyctl = I915_READ(RSTDBYCTL);
1017 crstandvid = I915_READ16(CRSTANDVID);
1018
1019 mutex_unlock(&dev->struct_mutex);
Jesse Barnesf97108d2010-01-29 11:27:07 -08001020
1021 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1022 "yes" : "no");
1023 seq_printf(m, "Boost freq: %d\n",
1024 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1025 MEMMODE_BOOST_FREQ_SHIFT);
1026 seq_printf(m, "HW control enabled: %s\n",
1027 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1028 seq_printf(m, "SW control enabled: %s\n",
1029 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1030 seq_printf(m, "Gated voltage change: %s\n",
1031 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1032 seq_printf(m, "Starting frequency: P%d\n",
1033 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001034 seq_printf(m, "Max P-state: P%d\n",
Jesse Barnesf97108d2010-01-29 11:27:07 -08001035 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001036 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1037 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1038 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1039 seq_printf(m, "Render standby enabled: %s\n",
1040 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
Jesse Barnes88271da2011-01-05 12:01:24 -08001041 seq_printf(m, "Current RS state: ");
1042 switch (rstdbyctl & RSX_STATUS_MASK) {
1043 case RSX_STATUS_ON:
1044 seq_printf(m, "on\n");
1045 break;
1046 case RSX_STATUS_RC1:
1047 seq_printf(m, "RC1\n");
1048 break;
1049 case RSX_STATUS_RC1E:
1050 seq_printf(m, "RC1E\n");
1051 break;
1052 case RSX_STATUS_RS1:
1053 seq_printf(m, "RS1\n");
1054 break;
1055 case RSX_STATUS_RS2:
1056 seq_printf(m, "RS2 (RC6)\n");
1057 break;
1058 case RSX_STATUS_RS3:
1059 seq_printf(m, "RC3 (RC6+)\n");
1060 break;
1061 default:
1062 seq_printf(m, "unknown\n");
1063 break;
1064 }
Jesse Barnesf97108d2010-01-29 11:27:07 -08001065
1066 return 0;
1067}
1068
Ben Widawsky4d855292011-12-12 19:34:16 -08001069static int gen6_drpc_info(struct seq_file *m)
1070{
1071
1072 struct drm_info_node *node = (struct drm_info_node *) m->private;
1073 struct drm_device *dev = node->minor->dev;
1074 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawskyecd8fae2012-09-26 10:34:02 -07001075 u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
Daniel Vetter93b525d2012-01-25 13:52:43 +01001076 unsigned forcewake_count;
Ben Widawsky4d855292011-12-12 19:34:16 -08001077 int count=0, ret;
1078
1079
1080 ret = mutex_lock_interruptible(&dev->struct_mutex);
1081 if (ret)
1082 return ret;
1083
Daniel Vetter93b525d2012-01-25 13:52:43 +01001084 spin_lock_irq(&dev_priv->gt_lock);
1085 forcewake_count = dev_priv->forcewake_count;
1086 spin_unlock_irq(&dev_priv->gt_lock);
1087
1088 if (forcewake_count) {
1089 seq_printf(m, "RC information inaccurate because somebody "
1090 "holds a forcewake reference \n");
Ben Widawsky4d855292011-12-12 19:34:16 -08001091 } else {
1092 /* NB: we cannot use forcewake, else we read the wrong values */
1093 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1094 udelay(10);
1095 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1096 }
1097
1098 gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1099 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1100
1101 rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1102 rcctl1 = I915_READ(GEN6_RC_CONTROL);
1103 mutex_unlock(&dev->struct_mutex);
Ben Widawsky44cbd332012-11-06 14:36:36 +00001104 mutex_lock(&dev_priv->rps.hw_lock);
1105 sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
1106 mutex_unlock(&dev_priv->rps.hw_lock);
Ben Widawsky4d855292011-12-12 19:34:16 -08001107
1108 seq_printf(m, "Video Turbo Mode: %s\n",
1109 yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1110 seq_printf(m, "HW control enabled: %s\n",
1111 yesno(rpmodectl1 & GEN6_RP_ENABLE));
1112 seq_printf(m, "SW control enabled: %s\n",
1113 yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1114 GEN6_RP_MEDIA_SW_MODE));
Eric Anholtfff24e22012-01-23 16:14:05 -08001115 seq_printf(m, "RC1e Enabled: %s\n",
Ben Widawsky4d855292011-12-12 19:34:16 -08001116 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1117 seq_printf(m, "RC6 Enabled: %s\n",
1118 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1119 seq_printf(m, "Deep RC6 Enabled: %s\n",
1120 yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1121 seq_printf(m, "Deepest RC6 Enabled: %s\n",
1122 yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1123 seq_printf(m, "Current RC state: ");
1124 switch (gt_core_status & GEN6_RCn_MASK) {
1125 case GEN6_RC0:
1126 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1127 seq_printf(m, "Core Power Down\n");
1128 else
1129 seq_printf(m, "on\n");
1130 break;
1131 case GEN6_RC3:
1132 seq_printf(m, "RC3\n");
1133 break;
1134 case GEN6_RC6:
1135 seq_printf(m, "RC6\n");
1136 break;
1137 case GEN6_RC7:
1138 seq_printf(m, "RC7\n");
1139 break;
1140 default:
1141 seq_printf(m, "Unknown\n");
1142 break;
1143 }
1144
1145 seq_printf(m, "Core Power Down: %s\n",
1146 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
Ben Widawskycce66a22012-03-27 18:59:38 -07001147
1148 /* Not exactly sure what this is */
1149 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1150 I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1151 seq_printf(m, "RC6 residency since boot: %u\n",
1152 I915_READ(GEN6_GT_GFX_RC6));
1153 seq_printf(m, "RC6+ residency since boot: %u\n",
1154 I915_READ(GEN6_GT_GFX_RC6p));
1155 seq_printf(m, "RC6++ residency since boot: %u\n",
1156 I915_READ(GEN6_GT_GFX_RC6pp));
1157
Ben Widawskyecd8fae2012-09-26 10:34:02 -07001158 seq_printf(m, "RC6 voltage: %dmV\n",
1159 GEN6_DECODE_RC6_VID(((rc6vids >> 0) & 0xff)));
1160 seq_printf(m, "RC6+ voltage: %dmV\n",
1161 GEN6_DECODE_RC6_VID(((rc6vids >> 8) & 0xff)));
1162 seq_printf(m, "RC6++ voltage: %dmV\n",
1163 GEN6_DECODE_RC6_VID(((rc6vids >> 16) & 0xff)));
Ben Widawsky4d855292011-12-12 19:34:16 -08001164 return 0;
1165}
1166
1167static int i915_drpc_info(struct seq_file *m, void *unused)
1168{
1169 struct drm_info_node *node = (struct drm_info_node *) m->private;
1170 struct drm_device *dev = node->minor->dev;
1171
1172 if (IS_GEN6(dev) || IS_GEN7(dev))
1173 return gen6_drpc_info(m);
1174 else
1175 return ironlake_drpc_info(m);
1176}
1177
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001178static int i915_fbc_status(struct seq_file *m, void *unused)
1179{
1180 struct drm_info_node *node = (struct drm_info_node *) m->private;
1181 struct drm_device *dev = node->minor->dev;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001182 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001183
Adam Jacksonee5382a2010-04-23 11:17:39 -04001184 if (!I915_HAS_FBC(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001185 seq_printf(m, "FBC unsupported on this chipset\n");
1186 return 0;
1187 }
1188
Adam Jacksonee5382a2010-04-23 11:17:39 -04001189 if (intel_fbc_enabled(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001190 seq_printf(m, "FBC enabled\n");
1191 } else {
1192 seq_printf(m, "FBC disabled: ");
1193 switch (dev_priv->no_fbc_reason) {
Chris Wilsonbed4a672010-09-11 10:47:47 +01001194 case FBC_NO_OUTPUT:
1195 seq_printf(m, "no outputs");
1196 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001197 case FBC_STOLEN_TOO_SMALL:
1198 seq_printf(m, "not enough stolen memory");
1199 break;
1200 case FBC_UNSUPPORTED_MODE:
1201 seq_printf(m, "mode not supported");
1202 break;
1203 case FBC_MODE_TOO_LARGE:
1204 seq_printf(m, "mode too large");
1205 break;
1206 case FBC_BAD_PLANE:
1207 seq_printf(m, "FBC unsupported on plane");
1208 break;
1209 case FBC_NOT_TILED:
1210 seq_printf(m, "scanout buffer not tiled");
1211 break;
Jesse Barnes9c928d12010-07-23 15:20:00 -07001212 case FBC_MULTIPLE_PIPES:
1213 seq_printf(m, "multiple pipes are enabled");
1214 break;
Jesse Barnesc1a9f042011-05-05 15:24:21 -07001215 case FBC_MODULE_PARAM:
1216 seq_printf(m, "disabled per module param (default off)");
1217 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001218 default:
1219 seq_printf(m, "unknown reason");
1220 }
1221 seq_printf(m, "\n");
1222 }
1223 return 0;
1224}
1225
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001226static int i915_sr_status(struct seq_file *m, void *unused)
1227{
1228 struct drm_info_node *node = (struct drm_info_node *) m->private;
1229 struct drm_device *dev = node->minor->dev;
1230 drm_i915_private_t *dev_priv = dev->dev_private;
1231 bool sr_enabled = false;
1232
Yuanhan Liu13982612010-12-15 15:42:31 +08001233 if (HAS_PCH_SPLIT(dev))
Chris Wilson5ba2aaa2010-08-19 18:04:08 +01001234 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001235 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001236 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1237 else if (IS_I915GM(dev))
1238 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1239 else if (IS_PINEVIEW(dev))
1240 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1241
Chris Wilson5ba2aaa2010-08-19 18:04:08 +01001242 seq_printf(m, "self-refresh: %s\n",
1243 sr_enabled ? "enabled" : "disabled");
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001244
1245 return 0;
1246}
1247
Jesse Barnes7648fa92010-05-20 14:28:11 -07001248static int i915_emon_status(struct seq_file *m, void *unused)
1249{
1250 struct drm_info_node *node = (struct drm_info_node *) m->private;
1251 struct drm_device *dev = node->minor->dev;
1252 drm_i915_private_t *dev_priv = dev->dev_private;
1253 unsigned long temp, chipset, gfx;
Chris Wilsonde227ef2010-07-03 07:58:38 +01001254 int ret;
1255
Chris Wilson582be6b2012-04-30 19:35:02 +01001256 if (!IS_GEN5(dev))
1257 return -ENODEV;
1258
Chris Wilsonde227ef2010-07-03 07:58:38 +01001259 ret = mutex_lock_interruptible(&dev->struct_mutex);
1260 if (ret)
1261 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -07001262
1263 temp = i915_mch_val(dev_priv);
1264 chipset = i915_chipset_val(dev_priv);
1265 gfx = i915_gfx_val(dev_priv);
Chris Wilsonde227ef2010-07-03 07:58:38 +01001266 mutex_unlock(&dev->struct_mutex);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001267
1268 seq_printf(m, "GMCH temp: %ld\n", temp);
1269 seq_printf(m, "Chipset power: %ld\n", chipset);
1270 seq_printf(m, "GFX power: %ld\n", gfx);
1271 seq_printf(m, "Total power: %ld\n", chipset + gfx);
1272
1273 return 0;
1274}
1275
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001276static int i915_ring_freq_table(struct seq_file *m, void *unused)
1277{
1278 struct drm_info_node *node = (struct drm_info_node *) m->private;
1279 struct drm_device *dev = node->minor->dev;
1280 drm_i915_private_t *dev_priv = dev->dev_private;
1281 int ret;
1282 int gpu_freq, ia_freq;
1283
Jesse Barnes1c70c0c2011-06-29 13:34:36 -07001284 if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001285 seq_printf(m, "unsupported on this chipset\n");
1286 return 0;
1287 }
1288
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001289 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001290 if (ret)
1291 return ret;
1292
1293 seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1294
Daniel Vetterc6a828d2012-08-08 23:35:35 +02001295 for (gpu_freq = dev_priv->rps.min_delay;
1296 gpu_freq <= dev_priv->rps.max_delay;
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001297 gpu_freq++) {
Ben Widawsky42c05262012-09-26 10:34:00 -07001298 ia_freq = gpu_freq;
1299 sandybridge_pcode_read(dev_priv,
1300 GEN6_PCODE_READ_MIN_FREQ_TABLE,
1301 &ia_freq);
Ben Widawskyc8735b02012-09-07 19:43:39 -07001302 seq_printf(m, "%d\t\t%d\n", gpu_freq * GT_FREQUENCY_MULTIPLIER, ia_freq * 100);
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001303 }
1304
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001305 mutex_unlock(&dev_priv->rps.hw_lock);
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001306
1307 return 0;
1308}
1309
Jesse Barnes7648fa92010-05-20 14:28:11 -07001310static int i915_gfxec(struct seq_file *m, void *unused)
1311{
1312 struct drm_info_node *node = (struct drm_info_node *) m->private;
1313 struct drm_device *dev = node->minor->dev;
1314 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -07001315 int ret;
1316
1317 ret = mutex_lock_interruptible(&dev->struct_mutex);
1318 if (ret)
1319 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -07001320
1321 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1322
Ben Widawsky616fdb52011-10-05 11:44:54 -07001323 mutex_unlock(&dev->struct_mutex);
1324
Jesse Barnes7648fa92010-05-20 14:28:11 -07001325 return 0;
1326}
1327
Chris Wilson44834a62010-08-19 16:09:23 +01001328static int i915_opregion(struct seq_file *m, void *unused)
1329{
1330 struct drm_info_node *node = (struct drm_info_node *) m->private;
1331 struct drm_device *dev = node->minor->dev;
1332 drm_i915_private_t *dev_priv = dev->dev_private;
1333 struct intel_opregion *opregion = &dev_priv->opregion;
Daniel Vetter0d38f002012-04-21 22:49:10 +02001334 void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
Chris Wilson44834a62010-08-19 16:09:23 +01001335 int ret;
1336
Daniel Vetter0d38f002012-04-21 22:49:10 +02001337 if (data == NULL)
1338 return -ENOMEM;
1339
Chris Wilson44834a62010-08-19 16:09:23 +01001340 ret = mutex_lock_interruptible(&dev->struct_mutex);
1341 if (ret)
Daniel Vetter0d38f002012-04-21 22:49:10 +02001342 goto out;
Chris Wilson44834a62010-08-19 16:09:23 +01001343
Daniel Vetter0d38f002012-04-21 22:49:10 +02001344 if (opregion->header) {
1345 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1346 seq_write(m, data, OPREGION_SIZE);
1347 }
Chris Wilson44834a62010-08-19 16:09:23 +01001348
1349 mutex_unlock(&dev->struct_mutex);
1350
Daniel Vetter0d38f002012-04-21 22:49:10 +02001351out:
1352 kfree(data);
Chris Wilson44834a62010-08-19 16:09:23 +01001353 return 0;
1354}
1355
Chris Wilson37811fc2010-08-25 22:45:57 +01001356static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1357{
1358 struct drm_info_node *node = (struct drm_info_node *) m->private;
1359 struct drm_device *dev = node->minor->dev;
1360 drm_i915_private_t *dev_priv = dev->dev_private;
1361 struct intel_fbdev *ifbdev;
1362 struct intel_framebuffer *fb;
1363 int ret;
1364
1365 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1366 if (ret)
1367 return ret;
1368
1369 ifbdev = dev_priv->fbdev;
1370 fb = to_intel_framebuffer(ifbdev->helper.fb);
1371
1372 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1373 fb->base.width,
1374 fb->base.height,
1375 fb->base.depth,
1376 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +00001377 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +01001378 seq_printf(m, "\n");
1379
1380 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1381 if (&fb->base == ifbdev->helper.fb)
1382 continue;
1383
1384 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1385 fb->base.width,
1386 fb->base.height,
1387 fb->base.depth,
1388 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +00001389 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +01001390 seq_printf(m, "\n");
1391 }
1392
1393 mutex_unlock(&dev->mode_config.mutex);
1394
1395 return 0;
1396}
1397
Ben Widawskye76d3632011-03-19 18:14:29 -07001398static int i915_context_status(struct seq_file *m, void *unused)
1399{
1400 struct drm_info_node *node = (struct drm_info_node *) m->private;
1401 struct drm_device *dev = node->minor->dev;
1402 drm_i915_private_t *dev_priv = dev->dev_private;
1403 int ret;
1404
1405 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1406 if (ret)
1407 return ret;
1408
Daniel Vetter3e373942012-11-02 19:55:04 +01001409 if (dev_priv->ips.pwrctx) {
Ben Widawskydc501fb2011-06-29 11:41:51 -07001410 seq_printf(m, "power context ");
Daniel Vetter3e373942012-11-02 19:55:04 +01001411 describe_obj(m, dev_priv->ips.pwrctx);
Ben Widawskydc501fb2011-06-29 11:41:51 -07001412 seq_printf(m, "\n");
1413 }
Ben Widawskye76d3632011-03-19 18:14:29 -07001414
Daniel Vetter3e373942012-11-02 19:55:04 +01001415 if (dev_priv->ips.renderctx) {
Ben Widawskydc501fb2011-06-29 11:41:51 -07001416 seq_printf(m, "render context ");
Daniel Vetter3e373942012-11-02 19:55:04 +01001417 describe_obj(m, dev_priv->ips.renderctx);
Ben Widawskydc501fb2011-06-29 11:41:51 -07001418 seq_printf(m, "\n");
1419 }
Ben Widawskye76d3632011-03-19 18:14:29 -07001420
1421 mutex_unlock(&dev->mode_config.mutex);
1422
1423 return 0;
1424}
1425
Ben Widawsky6d794d42011-04-25 11:25:56 -07001426static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1427{
1428 struct drm_info_node *node = (struct drm_info_node *) m->private;
1429 struct drm_device *dev = node->minor->dev;
1430 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter9f1f46a2011-12-14 13:57:03 +01001431 unsigned forcewake_count;
Ben Widawsky6d794d42011-04-25 11:25:56 -07001432
Daniel Vetter9f1f46a2011-12-14 13:57:03 +01001433 spin_lock_irq(&dev_priv->gt_lock);
1434 forcewake_count = dev_priv->forcewake_count;
1435 spin_unlock_irq(&dev_priv->gt_lock);
1436
1437 seq_printf(m, "forcewake count = %u\n", forcewake_count);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001438
1439 return 0;
1440}
1441
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001442static const char *swizzle_string(unsigned swizzle)
1443{
1444 switch(swizzle) {
1445 case I915_BIT_6_SWIZZLE_NONE:
1446 return "none";
1447 case I915_BIT_6_SWIZZLE_9:
1448 return "bit9";
1449 case I915_BIT_6_SWIZZLE_9_10:
1450 return "bit9/bit10";
1451 case I915_BIT_6_SWIZZLE_9_11:
1452 return "bit9/bit11";
1453 case I915_BIT_6_SWIZZLE_9_10_11:
1454 return "bit9/bit10/bit11";
1455 case I915_BIT_6_SWIZZLE_9_17:
1456 return "bit9/bit17";
1457 case I915_BIT_6_SWIZZLE_9_10_17:
1458 return "bit9/bit10/bit17";
1459 case I915_BIT_6_SWIZZLE_UNKNOWN:
1460 return "unkown";
1461 }
1462
1463 return "bug";
1464}
1465
1466static int i915_swizzle_info(struct seq_file *m, void *data)
1467{
1468 struct drm_info_node *node = (struct drm_info_node *) m->private;
1469 struct drm_device *dev = node->minor->dev;
1470 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001471 int ret;
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001472
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001473 ret = mutex_lock_interruptible(&dev->struct_mutex);
1474 if (ret)
1475 return ret;
1476
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001477 seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1478 swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1479 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1480 swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1481
1482 if (IS_GEN3(dev) || IS_GEN4(dev)) {
1483 seq_printf(m, "DDC = 0x%08x\n",
1484 I915_READ(DCC));
1485 seq_printf(m, "C0DRB3 = 0x%04x\n",
1486 I915_READ16(C0DRB3));
1487 seq_printf(m, "C1DRB3 = 0x%04x\n",
1488 I915_READ16(C1DRB3));
Daniel Vetter3fa7d232012-01-31 16:47:56 +01001489 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1490 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1491 I915_READ(MAD_DIMM_C0));
1492 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1493 I915_READ(MAD_DIMM_C1));
1494 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1495 I915_READ(MAD_DIMM_C2));
1496 seq_printf(m, "TILECTL = 0x%08x\n",
1497 I915_READ(TILECTL));
1498 seq_printf(m, "ARB_MODE = 0x%08x\n",
1499 I915_READ(ARB_MODE));
1500 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1501 I915_READ(DISP_ARB_CTL));
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001502 }
1503 mutex_unlock(&dev->struct_mutex);
1504
1505 return 0;
1506}
1507
Daniel Vetter3cf17fc2012-02-09 17:15:49 +01001508static int i915_ppgtt_info(struct seq_file *m, void *data)
1509{
1510 struct drm_info_node *node = (struct drm_info_node *) m->private;
1511 struct drm_device *dev = node->minor->dev;
1512 struct drm_i915_private *dev_priv = dev->dev_private;
1513 struct intel_ring_buffer *ring;
1514 int i, ret;
1515
1516
1517 ret = mutex_lock_interruptible(&dev->struct_mutex);
1518 if (ret)
1519 return ret;
1520 if (INTEL_INFO(dev)->gen == 6)
1521 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1522
Chris Wilsona2c7f6f2012-09-01 20:51:22 +01001523 for_each_ring(ring, dev_priv, i) {
Daniel Vetter3cf17fc2012-02-09 17:15:49 +01001524 seq_printf(m, "%s\n", ring->name);
1525 if (INTEL_INFO(dev)->gen == 7)
1526 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1527 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1528 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1529 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1530 }
1531 if (dev_priv->mm.aliasing_ppgtt) {
1532 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1533
1534 seq_printf(m, "aliasing PPGTT:\n");
1535 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1536 }
1537 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1538 mutex_unlock(&dev->struct_mutex);
1539
1540 return 0;
1541}
1542
Jesse Barnes57f350b2012-03-28 13:39:25 -07001543static int i915_dpio_info(struct seq_file *m, void *data)
1544{
1545 struct drm_info_node *node = (struct drm_info_node *) m->private;
1546 struct drm_device *dev = node->minor->dev;
1547 struct drm_i915_private *dev_priv = dev->dev_private;
1548 int ret;
1549
1550
1551 if (!IS_VALLEYVIEW(dev)) {
1552 seq_printf(m, "unsupported\n");
1553 return 0;
1554 }
1555
1556 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1557 if (ret)
1558 return ret;
1559
1560 seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1561
1562 seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1563 intel_dpio_read(dev_priv, _DPIO_DIV_A));
1564 seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1565 intel_dpio_read(dev_priv, _DPIO_DIV_B));
1566
1567 seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1568 intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1569 seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1570 intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1571
1572 seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1573 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1574 seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1575 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1576
1577 seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1578 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1579 seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1580 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1581
1582 seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1583 intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1584
1585 mutex_unlock(&dev->mode_config.mutex);
1586
1587 return 0;
1588}
1589
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001590static ssize_t
1591i915_wedged_read(struct file *filp,
1592 char __user *ubuf,
1593 size_t max,
1594 loff_t *ppos)
1595{
1596 struct drm_device *dev = filp->private_data;
1597 drm_i915_private_t *dev_priv = dev->dev_private;
1598 char buf[80];
1599 int len;
1600
Akshay Joshi0206e352011-08-16 15:34:10 -04001601 len = snprintf(buf, sizeof(buf),
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001602 "wedged : %d\n",
1603 atomic_read(&dev_priv->mm.wedged));
1604
Akshay Joshi0206e352011-08-16 15:34:10 -04001605 if (len > sizeof(buf))
1606 len = sizeof(buf);
Dan Carpenterf4433a82010-09-08 21:44:47 +02001607
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001608 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1609}
1610
1611static ssize_t
1612i915_wedged_write(struct file *filp,
1613 const char __user *ubuf,
1614 size_t cnt,
1615 loff_t *ppos)
1616{
1617 struct drm_device *dev = filp->private_data;
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001618 char buf[20];
1619 int val = 1;
1620
1621 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001622 if (cnt > sizeof(buf) - 1)
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001623 return -EINVAL;
1624
1625 if (copy_from_user(buf, ubuf, cnt))
1626 return -EFAULT;
1627 buf[cnt] = 0;
1628
1629 val = simple_strtoul(buf, NULL, 0);
1630 }
1631
1632 DRM_INFO("Manually setting wedged to %d\n", val);
Chris Wilson527f9e92010-11-11 01:16:58 +00001633 i915_handle_error(dev, val);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001634
1635 return cnt;
1636}
1637
1638static const struct file_operations i915_wedged_fops = {
1639 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001640 .open = simple_open,
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001641 .read = i915_wedged_read,
1642 .write = i915_wedged_write,
Arnd Bergmann6038f372010-08-15 18:52:59 +02001643 .llseek = default_llseek,
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001644};
1645
Jesse Barnes358733e2011-07-27 11:53:01 -07001646static ssize_t
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001647i915_ring_stop_read(struct file *filp,
1648 char __user *ubuf,
1649 size_t max,
1650 loff_t *ppos)
1651{
1652 struct drm_device *dev = filp->private_data;
1653 drm_i915_private_t *dev_priv = dev->dev_private;
1654 char buf[20];
1655 int len;
1656
1657 len = snprintf(buf, sizeof(buf),
1658 "0x%08x\n", dev_priv->stop_rings);
1659
1660 if (len > sizeof(buf))
1661 len = sizeof(buf);
1662
1663 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1664}
1665
1666static ssize_t
1667i915_ring_stop_write(struct file *filp,
1668 const char __user *ubuf,
1669 size_t cnt,
1670 loff_t *ppos)
1671{
1672 struct drm_device *dev = filp->private_data;
1673 struct drm_i915_private *dev_priv = dev->dev_private;
1674 char buf[20];
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001675 int val = 0, ret;
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001676
1677 if (cnt > 0) {
1678 if (cnt > sizeof(buf) - 1)
1679 return -EINVAL;
1680
1681 if (copy_from_user(buf, ubuf, cnt))
1682 return -EFAULT;
1683 buf[cnt] = 0;
1684
1685 val = simple_strtoul(buf, NULL, 0);
1686 }
1687
1688 DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1689
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001690 ret = mutex_lock_interruptible(&dev->struct_mutex);
1691 if (ret)
1692 return ret;
1693
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001694 dev_priv->stop_rings = val;
1695 mutex_unlock(&dev->struct_mutex);
1696
1697 return cnt;
1698}
1699
1700static const struct file_operations i915_ring_stop_fops = {
1701 .owner = THIS_MODULE,
1702 .open = simple_open,
1703 .read = i915_ring_stop_read,
1704 .write = i915_ring_stop_write,
1705 .llseek = default_llseek,
1706};
Daniel Vetterd5442302012-04-27 15:17:40 +02001707
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001708static ssize_t
Jesse Barnes358733e2011-07-27 11:53:01 -07001709i915_max_freq_read(struct file *filp,
1710 char __user *ubuf,
1711 size_t max,
1712 loff_t *ppos)
1713{
1714 struct drm_device *dev = filp->private_data;
1715 drm_i915_private_t *dev_priv = dev->dev_private;
1716 char buf[80];
Daniel Vetter004777c2012-08-09 15:07:01 +02001717 int len, ret;
1718
1719 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1720 return -ENODEV;
1721
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001722 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
Daniel Vetter004777c2012-08-09 15:07:01 +02001723 if (ret)
1724 return ret;
Jesse Barnes358733e2011-07-27 11:53:01 -07001725
Akshay Joshi0206e352011-08-16 15:34:10 -04001726 len = snprintf(buf, sizeof(buf),
Ben Widawskyc8735b02012-09-07 19:43:39 -07001727 "max freq: %d\n", dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER);
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001728 mutex_unlock(&dev_priv->rps.hw_lock);
Jesse Barnes358733e2011-07-27 11:53:01 -07001729
Akshay Joshi0206e352011-08-16 15:34:10 -04001730 if (len > sizeof(buf))
1731 len = sizeof(buf);
Jesse Barnes358733e2011-07-27 11:53:01 -07001732
1733 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1734}
1735
1736static ssize_t
1737i915_max_freq_write(struct file *filp,
1738 const char __user *ubuf,
1739 size_t cnt,
1740 loff_t *ppos)
1741{
1742 struct drm_device *dev = filp->private_data;
1743 struct drm_i915_private *dev_priv = dev->dev_private;
1744 char buf[20];
Daniel Vetter004777c2012-08-09 15:07:01 +02001745 int val = 1, ret;
1746
1747 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1748 return -ENODEV;
Jesse Barnes358733e2011-07-27 11:53:01 -07001749
1750 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001751 if (cnt > sizeof(buf) - 1)
Jesse Barnes358733e2011-07-27 11:53:01 -07001752 return -EINVAL;
1753
1754 if (copy_from_user(buf, ubuf, cnt))
1755 return -EFAULT;
1756 buf[cnt] = 0;
1757
1758 val = simple_strtoul(buf, NULL, 0);
1759 }
1760
1761 DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1762
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001763 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
Daniel Vetter004777c2012-08-09 15:07:01 +02001764 if (ret)
1765 return ret;
1766
Jesse Barnes358733e2011-07-27 11:53:01 -07001767 /*
1768 * Turbo will still be enabled, but won't go above the set value.
1769 */
Ben Widawskyc8735b02012-09-07 19:43:39 -07001770 dev_priv->rps.max_delay = val / GT_FREQUENCY_MULTIPLIER;
Jesse Barnes358733e2011-07-27 11:53:01 -07001771
Ben Widawskyc8735b02012-09-07 19:43:39 -07001772 gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001773 mutex_unlock(&dev_priv->rps.hw_lock);
Jesse Barnes358733e2011-07-27 11:53:01 -07001774
1775 return cnt;
1776}
1777
1778static const struct file_operations i915_max_freq_fops = {
1779 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001780 .open = simple_open,
Jesse Barnes358733e2011-07-27 11:53:01 -07001781 .read = i915_max_freq_read,
1782 .write = i915_max_freq_write,
1783 .llseek = default_llseek,
1784};
1785
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001786static ssize_t
Jesse Barnes1523c312012-05-25 12:34:54 -07001787i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1788 loff_t *ppos)
1789{
1790 struct drm_device *dev = filp->private_data;
1791 drm_i915_private_t *dev_priv = dev->dev_private;
1792 char buf[80];
Daniel Vetter004777c2012-08-09 15:07:01 +02001793 int len, ret;
1794
1795 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1796 return -ENODEV;
1797
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001798 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
Daniel Vetter004777c2012-08-09 15:07:01 +02001799 if (ret)
1800 return ret;
Jesse Barnes1523c312012-05-25 12:34:54 -07001801
1802 len = snprintf(buf, sizeof(buf),
Ben Widawskyc8735b02012-09-07 19:43:39 -07001803 "min freq: %d\n", dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER);
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001804 mutex_unlock(&dev_priv->rps.hw_lock);
Jesse Barnes1523c312012-05-25 12:34:54 -07001805
1806 if (len > sizeof(buf))
1807 len = sizeof(buf);
1808
1809 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1810}
1811
1812static ssize_t
1813i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1814 loff_t *ppos)
1815{
1816 struct drm_device *dev = filp->private_data;
1817 struct drm_i915_private *dev_priv = dev->dev_private;
1818 char buf[20];
Daniel Vetter004777c2012-08-09 15:07:01 +02001819 int val = 1, ret;
1820
1821 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1822 return -ENODEV;
Jesse Barnes1523c312012-05-25 12:34:54 -07001823
1824 if (cnt > 0) {
1825 if (cnt > sizeof(buf) - 1)
1826 return -EINVAL;
1827
1828 if (copy_from_user(buf, ubuf, cnt))
1829 return -EFAULT;
1830 buf[cnt] = 0;
1831
1832 val = simple_strtoul(buf, NULL, 0);
1833 }
1834
1835 DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
1836
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001837 ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
Daniel Vetter004777c2012-08-09 15:07:01 +02001838 if (ret)
1839 return ret;
1840
Jesse Barnes1523c312012-05-25 12:34:54 -07001841 /*
1842 * Turbo will still be enabled, but won't go below the set value.
1843 */
Ben Widawskyc8735b02012-09-07 19:43:39 -07001844 dev_priv->rps.min_delay = val / GT_FREQUENCY_MULTIPLIER;
Jesse Barnes1523c312012-05-25 12:34:54 -07001845
Ben Widawskyc8735b02012-09-07 19:43:39 -07001846 gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
Jesse Barnes4fc688c2012-11-02 11:14:01 -07001847 mutex_unlock(&dev_priv->rps.hw_lock);
Jesse Barnes1523c312012-05-25 12:34:54 -07001848
1849 return cnt;
1850}
1851
1852static const struct file_operations i915_min_freq_fops = {
1853 .owner = THIS_MODULE,
1854 .open = simple_open,
1855 .read = i915_min_freq_read,
1856 .write = i915_min_freq_write,
1857 .llseek = default_llseek,
1858};
1859
1860static ssize_t
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001861i915_cache_sharing_read(struct file *filp,
1862 char __user *ubuf,
1863 size_t max,
1864 loff_t *ppos)
1865{
1866 struct drm_device *dev = filp->private_data;
1867 drm_i915_private_t *dev_priv = dev->dev_private;
1868 char buf[80];
1869 u32 snpcr;
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001870 int len, ret;
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001871
Daniel Vetter004777c2012-08-09 15:07:01 +02001872 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1873 return -ENODEV;
1874
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001875 ret = mutex_lock_interruptible(&dev->struct_mutex);
1876 if (ret)
1877 return ret;
1878
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001879 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1880 mutex_unlock(&dev_priv->dev->struct_mutex);
1881
Akshay Joshi0206e352011-08-16 15:34:10 -04001882 len = snprintf(buf, sizeof(buf),
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001883 "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1884 GEN6_MBC_SNPCR_SHIFT);
1885
Akshay Joshi0206e352011-08-16 15:34:10 -04001886 if (len > sizeof(buf))
1887 len = sizeof(buf);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001888
1889 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1890}
1891
1892static ssize_t
1893i915_cache_sharing_write(struct file *filp,
1894 const char __user *ubuf,
1895 size_t cnt,
1896 loff_t *ppos)
1897{
1898 struct drm_device *dev = filp->private_data;
1899 struct drm_i915_private *dev_priv = dev->dev_private;
1900 char buf[20];
1901 u32 snpcr;
1902 int val = 1;
1903
Daniel Vetter004777c2012-08-09 15:07:01 +02001904 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1905 return -ENODEV;
1906
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001907 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001908 if (cnt > sizeof(buf) - 1)
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001909 return -EINVAL;
1910
1911 if (copy_from_user(buf, ubuf, cnt))
1912 return -EFAULT;
1913 buf[cnt] = 0;
1914
1915 val = simple_strtoul(buf, NULL, 0);
1916 }
1917
1918 if (val < 0 || val > 3)
1919 return -EINVAL;
1920
1921 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1922
1923 /* Update the cache sharing policy here as well */
1924 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1925 snpcr &= ~GEN6_MBC_SNPCR_MASK;
1926 snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1927 I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1928
1929 return cnt;
1930}
1931
1932static const struct file_operations i915_cache_sharing_fops = {
1933 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001934 .open = simple_open,
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001935 .read = i915_cache_sharing_read,
1936 .write = i915_cache_sharing_write,
1937 .llseek = default_llseek,
1938};
1939
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001940/* As the drm_debugfs_init() routines are called before dev->dev_private is
1941 * allocated we need to hook into the minor for release. */
1942static int
1943drm_add_fake_info_node(struct drm_minor *minor,
1944 struct dentry *ent,
1945 const void *key)
1946{
1947 struct drm_info_node *node;
1948
1949 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1950 if (node == NULL) {
1951 debugfs_remove(ent);
1952 return -ENOMEM;
1953 }
1954
1955 node->minor = minor;
1956 node->dent = ent;
1957 node->info_ent = (void *) key;
Marcin Slusarzb3e067c2011-11-09 22:20:35 +01001958
1959 mutex_lock(&minor->debugfs_lock);
1960 list_add(&node->list, &minor->debugfs_list);
1961 mutex_unlock(&minor->debugfs_lock);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001962
1963 return 0;
1964}
1965
Ben Widawsky6d794d42011-04-25 11:25:56 -07001966static int i915_forcewake_open(struct inode *inode, struct file *file)
1967{
1968 struct drm_device *dev = inode->i_private;
1969 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky6d794d42011-04-25 11:25:56 -07001970
Daniel Vetter075edca2012-01-24 09:44:28 +01001971 if (INTEL_INFO(dev)->gen < 6)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001972 return 0;
1973
Ben Widawsky6d794d42011-04-25 11:25:56 -07001974 gen6_gt_force_wake_get(dev_priv);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001975
1976 return 0;
1977}
1978
Ben Widawskyc43b5632012-04-16 14:07:40 -07001979static int i915_forcewake_release(struct inode *inode, struct file *file)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001980{
1981 struct drm_device *dev = inode->i_private;
1982 struct drm_i915_private *dev_priv = dev->dev_private;
1983
Daniel Vetter075edca2012-01-24 09:44:28 +01001984 if (INTEL_INFO(dev)->gen < 6)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001985 return 0;
1986
Ben Widawsky6d794d42011-04-25 11:25:56 -07001987 gen6_gt_force_wake_put(dev_priv);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001988
1989 return 0;
1990}
1991
1992static const struct file_operations i915_forcewake_fops = {
1993 .owner = THIS_MODULE,
1994 .open = i915_forcewake_open,
1995 .release = i915_forcewake_release,
1996};
1997
1998static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
1999{
2000 struct drm_device *dev = minor->dev;
2001 struct dentry *ent;
2002
2003 ent = debugfs_create_file("i915_forcewake_user",
Ben Widawsky8eb57292011-05-11 15:10:58 -07002004 S_IRUSR,
Ben Widawsky6d794d42011-04-25 11:25:56 -07002005 root, dev,
2006 &i915_forcewake_fops);
2007 if (IS_ERR(ent))
2008 return PTR_ERR(ent);
2009
Ben Widawsky8eb57292011-05-11 15:10:58 -07002010 return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
Ben Widawsky6d794d42011-04-25 11:25:56 -07002011}
2012
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002013static int i915_debugfs_create(struct dentry *root,
2014 struct drm_minor *minor,
2015 const char *name,
2016 const struct file_operations *fops)
Jesse Barnes358733e2011-07-27 11:53:01 -07002017{
2018 struct drm_device *dev = minor->dev;
2019 struct dentry *ent;
2020
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002021 ent = debugfs_create_file(name,
Jesse Barnes358733e2011-07-27 11:53:01 -07002022 S_IRUGO | S_IWUSR,
2023 root, dev,
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002024 fops);
Jesse Barnes358733e2011-07-27 11:53:01 -07002025 if (IS_ERR(ent))
2026 return PTR_ERR(ent);
2027
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002028 return drm_add_fake_info_node(minor, ent, fops);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002029}
2030
Ben Gamari27c202a2009-07-01 22:26:52 -04002031static struct drm_info_list i915_debugfs_list[] = {
Chris Wilson311bd682011-01-13 19:06:50 +00002032 {"i915_capabilities", i915_capabilities, 0},
Chris Wilson73aa8082010-09-30 11:46:12 +01002033 {"i915_gem_objects", i915_gem_object_info, 0},
Chris Wilson08c18322011-01-10 00:00:24 +00002034 {"i915_gem_gtt", i915_gem_gtt_info, 0},
Chris Wilson1b502472012-04-24 15:47:30 +01002035 {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
Ben Gamari433e12f2009-02-17 20:08:51 -05002036 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
Ben Gamari433e12f2009-02-17 20:08:51 -05002037 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
Simon Farnsworth4e5359c2010-09-01 17:47:52 +01002038 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002039 {"i915_gem_request", i915_gem_request_info, 0},
2040 {"i915_gem_seqno", i915_gem_seqno_info, 0},
Chris Wilsona6172a82009-02-11 14:26:38 +00002041 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002042 {"i915_gem_interrupt", i915_interrupt_info, 0},
Chris Wilson1ec14ad2010-12-04 11:30:53 +00002043 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2044 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2045 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
Jesse Barnesf97108d2010-01-29 11:27:07 -08002046 {"i915_rstdby_delays", i915_rstdby_delays, 0},
2047 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2048 {"i915_delayfreq_table", i915_delayfreq_table, 0},
2049 {"i915_inttoext_table", i915_inttoext_table, 0},
2050 {"i915_drpc_info", i915_drpc_info, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07002051 {"i915_emon_status", i915_emon_status, 0},
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07002052 {"i915_ring_freq_table", i915_ring_freq_table, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07002053 {"i915_gfxec", i915_gfxec, 0},
Jesse Barnesb5e50c32010-02-05 12:42:41 -08002054 {"i915_fbc_status", i915_fbc_status, 0},
Jesse Barnes4a9bef32010-02-05 12:47:35 -08002055 {"i915_sr_status", i915_sr_status, 0},
Chris Wilson44834a62010-08-19 16:09:23 +01002056 {"i915_opregion", i915_opregion, 0},
Chris Wilson37811fc2010-08-25 22:45:57 +01002057 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
Ben Widawskye76d3632011-03-19 18:14:29 -07002058 {"i915_context_status", i915_context_status, 0},
Ben Widawsky6d794d42011-04-25 11:25:56 -07002059 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
Daniel Vetterea16a3c2011-12-14 13:57:16 +01002060 {"i915_swizzle_info", i915_swizzle_info, 0},
Daniel Vetter3cf17fc2012-02-09 17:15:49 +01002061 {"i915_ppgtt_info", i915_ppgtt_info, 0},
Jesse Barnes57f350b2012-03-28 13:39:25 -07002062 {"i915_dpio", i915_dpio_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002063};
Ben Gamari27c202a2009-07-01 22:26:52 -04002064#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
Ben Gamari20172632009-02-17 20:08:50 -05002065
Ben Gamari27c202a2009-07-01 22:26:52 -04002066int i915_debugfs_init(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05002067{
Chris Wilsonf3cd4742009-10-13 22:20:20 +01002068 int ret;
2069
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002070 ret = i915_debugfs_create(minor->debugfs_root, minor,
2071 "i915_wedged",
2072 &i915_wedged_fops);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01002073 if (ret)
2074 return ret;
2075
Ben Widawsky6d794d42011-04-25 11:25:56 -07002076 ret = i915_forcewake_create(minor->debugfs_root, minor);
2077 if (ret)
2078 return ret;
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002079
2080 ret = i915_debugfs_create(minor->debugfs_root, minor,
2081 "i915_max_freq",
2082 &i915_max_freq_fops);
Jesse Barnes358733e2011-07-27 11:53:01 -07002083 if (ret)
2084 return ret;
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002085
2086 ret = i915_debugfs_create(minor->debugfs_root, minor,
Jesse Barnes1523c312012-05-25 12:34:54 -07002087 "i915_min_freq",
2088 &i915_min_freq_fops);
2089 if (ret)
2090 return ret;
2091
2092 ret = i915_debugfs_create(minor->debugfs_root, minor,
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002093 "i915_cache_sharing",
2094 &i915_cache_sharing_fops);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002095 if (ret)
2096 return ret;
Daniel Vetter004777c2012-08-09 15:07:01 +02002097
Daniel Vettere5eb3d62012-05-03 14:48:16 +02002098 ret = i915_debugfs_create(minor->debugfs_root, minor,
2099 "i915_ring_stop",
2100 &i915_ring_stop_fops);
2101 if (ret)
2102 return ret;
Ben Widawsky6d794d42011-04-25 11:25:56 -07002103
Daniel Vetterd5442302012-04-27 15:17:40 +02002104 ret = i915_debugfs_create(minor->debugfs_root, minor,
2105 "i915_error_state",
2106 &i915_error_state_fops);
2107 if (ret)
2108 return ret;
2109
Ben Gamari27c202a2009-07-01 22:26:52 -04002110 return drm_debugfs_create_files(i915_debugfs_list,
2111 I915_DEBUGFS_ENTRIES,
Ben Gamari20172632009-02-17 20:08:50 -05002112 minor->debugfs_root, minor);
2113}
2114
Ben Gamari27c202a2009-07-01 22:26:52 -04002115void i915_debugfs_cleanup(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05002116{
Ben Gamari27c202a2009-07-01 22:26:52 -04002117 drm_debugfs_remove_files(i915_debugfs_list,
2118 I915_DEBUGFS_ENTRIES, minor);
Ben Widawsky6d794d42011-04-25 11:25:56 -07002119 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2120 1, minor);
Kristian Høgsberg33db6792009-11-11 12:19:16 -05002121 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2122 1, minor);
Jesse Barnes358733e2011-07-27 11:53:01 -07002123 drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2124 1, minor);
Jesse Barnes1523c312012-05-25 12:34:54 -07002125 drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2126 1, minor);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002127 drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2128 1, minor);
Daniel Vettere5eb3d62012-05-03 14:48:16 +02002129 drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2130 1, minor);
Daniel Vetter6bd459d2012-05-21 19:56:52 +02002131 drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2132 1, minor);
Ben Gamari20172632009-02-17 20:08:50 -05002133}
2134
2135#endif /* CONFIG_DEBUG_FS */