Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 1 | #ifndef _ASM_POWERPC_PTRACE_H |
| 2 | #define _ASM_POWERPC_PTRACE_H |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | |
| 4 | /* |
| 5 | * Copyright (C) 2001 PPC64 Team, IBM Corp |
| 6 | * |
| 7 | * This struct defines the way the registers are stored on the |
| 8 | * kernel stack during a system call or other kernel entry. |
| 9 | * |
| 10 | * this should only contain volatile regs |
| 11 | * since we can keep non-volatile in the thread_struct |
| 12 | * should set this up when only volatiles are saved |
| 13 | * by intr code. |
| 14 | * |
| 15 | * Since this is going on the stack, *CARE MUST BE TAKEN* to insure |
| 16 | * that the overall structure is a multiple of 16 bytes in length. |
| 17 | * |
| 18 | * Note that the offsets of the fields in this struct correspond with |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 19 | * the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | * |
| 21 | * This program is free software; you can redistribute it and/or |
| 22 | * modify it under the terms of the GNU General Public License |
| 23 | * as published by the Free Software Foundation; either version |
| 24 | * 2 of the License, or (at your option) any later version. |
| 25 | */ |
| 26 | |
| 27 | #ifndef __ASSEMBLY__ |
Anton Blanchard | a098722 | 2005-09-10 16:01:08 +1000 | [diff] [blame] | 28 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | struct pt_regs { |
Anton Blanchard | a098722 | 2005-09-10 16:01:08 +1000 | [diff] [blame] | 30 | unsigned long gpr[32]; |
| 31 | unsigned long nip; |
| 32 | unsigned long msr; |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 33 | unsigned long orig_gpr3; /* Used for restarting system calls */ |
Anton Blanchard | a098722 | 2005-09-10 16:01:08 +1000 | [diff] [blame] | 34 | unsigned long ctr; |
| 35 | unsigned long link; |
| 36 | unsigned long xer; |
| 37 | unsigned long ccr; |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 38 | #ifdef __powerpc64__ |
| 39 | unsigned long softe; /* Soft enabled/disabled */ |
| 40 | #else |
| 41 | unsigned long mq; /* 601 only (not used at present) */ |
| 42 | /* Used on APUS to hold IPL value. */ |
| 43 | #endif |
| 44 | unsigned long trap; /* Reason for being here */ |
| 45 | /* N.B. for critical exceptions on 4xx, the dar and dsisr |
| 46 | fields are overloaded to hold srr0 and srr1. */ |
| 47 | unsigned long dar; /* Fault registers */ |
| 48 | unsigned long dsisr; /* on 4xx/Book-E used for ESR */ |
| 49 | unsigned long result; /* Result of a system call */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | }; |
| 51 | |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 52 | #endif /* __ASSEMBLY__ */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | |
Anton Blanchard | a098722 | 2005-09-10 16:01:08 +1000 | [diff] [blame] | 54 | #ifdef __KERNEL__ |
| 55 | |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 56 | #ifdef __powerpc64__ |
Anton Blanchard | a098722 | 2005-09-10 16:01:08 +1000 | [diff] [blame] | 57 | |
| 58 | #define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ |
| 59 | |
| 60 | /* Size of dummy stack frame allocated when calling signal handler. */ |
| 61 | #define __SIGNAL_FRAMESIZE 128 |
| 62 | #define __SIGNAL_FRAMESIZE32 64 |
| 63 | |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 64 | #else /* __powerpc64__ */ |
| 65 | |
| 66 | #define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */ |
| 67 | |
| 68 | /* Size of stack frame allocated when calling signal handler. */ |
| 69 | #define __SIGNAL_FRAMESIZE 64 |
| 70 | |
| 71 | #endif /* __powerpc64__ */ |
| 72 | |
| 73 | #ifndef __ASSEMBLY__ |
| 74 | |
| 75 | #define instruction_pointer(regs) ((regs)->nip) |
Ananth N Mavinakayanahalli | b3f827c | 2006-10-02 02:17:31 -0700 | [diff] [blame] | 76 | #define regs_return_value(regs) ((regs)->gpr[3]) |
| 77 | |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 78 | #ifdef CONFIG_SMP |
| 79 | extern unsigned long profile_pc(struct pt_regs *regs); |
| 80 | #else |
| 81 | #define profile_pc(regs) instruction_pointer(regs) |
| 82 | #endif |
| 83 | |
| 84 | #ifdef __powerpc64__ |
| 85 | #define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1) |
| 86 | #else |
| 87 | #define user_mode(regs) (((regs)->msr & MSR_PR) != 0) |
| 88 | #endif |
| 89 | |
| 90 | #define force_successful_syscall_return() \ |
| 91 | do { \ |
David Woodhouse | 401d1f0 | 2005-11-15 18:52:18 +0000 | [diff] [blame] | 92 | set_thread_flag(TIF_NOERROR); \ |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 93 | } while(0) |
| 94 | |
Benjamin Herrenschmidt | 865418d | 2007-06-04 15:15:44 +1000 | [diff] [blame] | 95 | struct task_struct; |
| 96 | extern unsigned long ptrace_get_reg(struct task_struct *task, int regno); |
| 97 | extern int ptrace_put_reg(struct task_struct *task, int regno, |
| 98 | unsigned long data); |
| 99 | |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 100 | /* |
| 101 | * We use the least-significant bit of the trap field to indicate |
| 102 | * whether we have saved the full set of registers, or only a |
| 103 | * partial set. A 1 there means the partial set. |
| 104 | * On 4xx we use the next bit to indicate whether the exception |
| 105 | * is a critical exception (1 means it is). |
| 106 | */ |
| 107 | #define FULL_REGS(regs) (((regs)->trap & 1) == 0) |
| 108 | #ifndef __powerpc64__ |
| 109 | #define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) == 0) |
| 110 | #endif /* ! __powerpc64__ */ |
| 111 | #define TRAP(regs) ((regs)->trap & ~0xF) |
| 112 | #ifdef __powerpc64__ |
| 113 | #define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1) |
| 114 | #else |
| 115 | #define CHECK_FULL_REGS(regs) \ |
| 116 | do { \ |
| 117 | if ((regs)->trap & 1) \ |
| 118 | printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \ |
| 119 | } while (0) |
| 120 | #endif /* __powerpc64__ */ |
| 121 | |
Roland McGrath | 2a84b0d | 2008-01-30 13:30:51 +0100 | [diff] [blame] | 122 | /* |
| 123 | * These are defined as per linux/ptrace.h, which see. |
| 124 | */ |
| 125 | #define arch_has_single_step() (1) |
| 126 | extern void user_enable_single_step(struct task_struct *); |
| 127 | extern void user_disable_single_step(struct task_struct *); |
| 128 | |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 129 | #endif /* __ASSEMBLY__ */ |
| 130 | |
| 131 | #endif /* __KERNEL__ */ |
| 132 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | /* |
| 134 | * Offsets used by 'ptrace' system call interface. |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 135 | * These can't be changed without breaking binary compatibility |
| 136 | * with MkLinux, etc. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | */ |
| 138 | #define PT_R0 0 |
| 139 | #define PT_R1 1 |
| 140 | #define PT_R2 2 |
| 141 | #define PT_R3 3 |
| 142 | #define PT_R4 4 |
| 143 | #define PT_R5 5 |
| 144 | #define PT_R6 6 |
| 145 | #define PT_R7 7 |
| 146 | #define PT_R8 8 |
| 147 | #define PT_R9 9 |
| 148 | #define PT_R10 10 |
| 149 | #define PT_R11 11 |
| 150 | #define PT_R12 12 |
| 151 | #define PT_R13 13 |
| 152 | #define PT_R14 14 |
| 153 | #define PT_R15 15 |
| 154 | #define PT_R16 16 |
| 155 | #define PT_R17 17 |
| 156 | #define PT_R18 18 |
| 157 | #define PT_R19 19 |
| 158 | #define PT_R20 20 |
| 159 | #define PT_R21 21 |
| 160 | #define PT_R22 22 |
| 161 | #define PT_R23 23 |
| 162 | #define PT_R24 24 |
| 163 | #define PT_R25 25 |
| 164 | #define PT_R26 26 |
| 165 | #define PT_R27 27 |
| 166 | #define PT_R28 28 |
| 167 | #define PT_R29 29 |
| 168 | #define PT_R30 30 |
| 169 | #define PT_R31 31 |
| 170 | |
| 171 | #define PT_NIP 32 |
| 172 | #define PT_MSR 33 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | #define PT_ORIG_R3 34 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | #define PT_CTR 35 |
| 175 | #define PT_LNK 36 |
| 176 | #define PT_XER 37 |
| 177 | #define PT_CCR 38 |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 178 | #ifndef __powerpc64__ |
| 179 | #define PT_MQ 39 |
| 180 | #else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | #define PT_SOFTE 39 |
Benjamin Herrenschmidt | e17666b | 2007-06-04 15:15:43 +1000 | [diff] [blame] | 182 | #endif |
Anton Blanchard | a098722 | 2005-09-10 16:01:08 +1000 | [diff] [blame] | 183 | #define PT_TRAP 40 |
| 184 | #define PT_DAR 41 |
| 185 | #define PT_DSISR 42 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | #define PT_RESULT 43 |
Benjamin Herrenschmidt | e17666b | 2007-06-04 15:15:43 +1000 | [diff] [blame] | 187 | #define PT_REGS_COUNT 44 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 189 | #define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 191 | #ifndef __powerpc64__ |
| 192 | |
| 193 | #define PT_FPR31 (PT_FPR0 + 2*31) |
| 194 | #define PT_FPSCR (PT_FPR0 + 2*32 + 1) |
| 195 | |
| 196 | #else /* __powerpc64__ */ |
| 197 | |
Anton Blanchard | a098722 | 2005-09-10 16:01:08 +1000 | [diff] [blame] | 198 | #define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | |
| 200 | #ifdef __KERNEL__ |
Anton Blanchard | a098722 | 2005-09-10 16:01:08 +1000 | [diff] [blame] | 201 | #define PT_FPSCR32 (PT_FPR0 + 2*32 + 1) /* each FP reg occupies 2 32-bit userspace slots */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | #endif |
| 203 | |
| 204 | #define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */ |
| 205 | #define PT_VSCR (PT_VR0 + 32*2 + 1) |
| 206 | #define PT_VRSAVE (PT_VR0 + 33*2) |
| 207 | |
| 208 | #ifdef __KERNEL__ |
| 209 | #define PT_VR0_32 164 /* each Vector reg occupies 4 slots in 32-bit */ |
| 210 | #define PT_VSCR_32 (PT_VR0 + 32*4 + 3) |
| 211 | #define PT_VRSAVE_32 (PT_VR0 + 33*4) |
| 212 | #endif |
| 213 | |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 214 | #endif /* __powerpc64__ */ |
| 215 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 216 | /* |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 217 | * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. |
| 218 | * The transfer totals 34 quadword. Quadwords 0-31 contain the |
| 219 | * corresponding vector registers. Quadword 32 contains the vscr as the |
| 220 | * last word (offset 12) within that quadword. Quadword 33 contains the |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 221 | * vrsave as the first word (offset 0) within the quadword. |
| 222 | * |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 223 | * This definition of the VMX state is compatible with the current PPC32 |
| 224 | * ptrace interface. This allows signal handling and ptrace to use the same |
| 225 | * structures. This also simplifies the implementation of a bi-arch |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 226 | * (combined (32- and 64-bit) gdb. |
| 227 | */ |
| 228 | #define PTRACE_GETVRREGS 18 |
| 229 | #define PTRACE_SETVRREGS 19 |
| 230 | |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 231 | /* Get/set all the upper 32-bits of the SPE registers, accumulator, and |
| 232 | * spefscr, in one go */ |
| 233 | #define PTRACE_GETEVRREGS 20 |
| 234 | #define PTRACE_SETEVRREGS 21 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 235 | |
Anton Blanchard | a94d308 | 2005-09-10 16:01:10 +1000 | [diff] [blame] | 236 | /* |
| 237 | * Get or set a debug register. The first 16 are DABR registers and the |
| 238 | * second 16 are IABR registers. |
| 239 | */ |
| 240 | #define PTRACE_GET_DEBUGREG 25 |
| 241 | #define PTRACE_SET_DEBUGREG 26 |
| 242 | |
Benjamin Herrenschmidt | e17666b | 2007-06-04 15:15:43 +1000 | [diff] [blame] | 243 | /* (new) PTRACE requests using the same numbers as x86 and the same |
| 244 | * argument ordering. Additionally, they support more registers too |
| 245 | */ |
| 246 | #define PTRACE_GETREGS 12 |
| 247 | #define PTRACE_SETREGS 13 |
| 248 | #define PTRACE_GETFPREGS 14 |
| 249 | #define PTRACE_SETFPREGS 15 |
| 250 | #define PTRACE_GETREGS64 22 |
| 251 | #define PTRACE_SETREGS64 23 |
| 252 | |
| 253 | /* (old) PTRACE requests with inverted arguments */ |
Anton Blanchard | a098722 | 2005-09-10 16:01:08 +1000 | [diff] [blame] | 254 | #define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */ |
| 255 | #define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */ |
| 256 | #define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */ |
| 257 | #define PPC_PTRACE_SETFPREGS 0x96 /* Set FPRs 0 - 31 */ |
| 258 | |
| 259 | /* Calls to trace a 64bit program from a 32bit program */ |
| 260 | #define PPC_PTRACE_PEEKTEXT_3264 0x95 |
| 261 | #define PPC_PTRACE_PEEKDATA_3264 0x94 |
| 262 | #define PPC_PTRACE_POKETEXT_3264 0x93 |
| 263 | #define PPC_PTRACE_POKEDATA_3264 0x92 |
| 264 | #define PPC_PTRACE_PEEKUSR_3264 0x91 |
| 265 | #define PPC_PTRACE_POKEUSR_3264 0x90 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | |
Stephen Rothwell | da80d46 | 2005-11-03 15:14:36 +1100 | [diff] [blame] | 267 | #endif /* _ASM_POWERPC_PTRACE_H */ |