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Dan Williamsb94d5232015-05-19 22:54:31 -04001/*
2 * NVDIMM Firmware Interface Table - NFIT
3 *
4 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 */
15#ifndef __NFIT_H__
16#define __NFIT_H__
Dan Williams7ae0fa432016-02-19 12:16:34 -080017#include <linux/workqueue.h>
Dan Williamsb94d5232015-05-19 22:54:31 -040018#include <linux/libnvdimm.h>
19#include <linux/types.h>
20#include <linux/uuid.h>
21#include <linux/acpi.h>
22#include <acpi/acuuid.h>
23
Dan Williams31eca762016-04-28 16:23:43 -070024/* ACPI 6.1 */
Dan Williamsb94d5232015-05-19 22:54:31 -040025#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
Dan Williams31eca762016-04-28 16:23:43 -070026
27/* http://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf */
Dan Williamsb94d5232015-05-19 22:54:31 -040028#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
Dan Williams31eca762016-04-28 16:23:43 -070029
30/* https://github.com/HewlettPackard/hpe-nvm/blob/master/Documentation/ */
31#define UUID_NFIT_DIMM_N_HPE1 "9002c334-acf3-4c0e-9642-a235f0d53bc6"
32#define UUID_NFIT_DIMM_N_HPE2 "5008664b-b758-41a0-a03c-27c2f2d04f7e"
33
Dan Williams58138822015-06-23 20:08:34 -040034#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
35 | ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \
Bob Mooreca321d12015-10-19 10:24:52 +080036 | ACPI_NFIT_MEM_NOT_ARMED)
Dan Williamsb94d5232015-05-19 22:54:31 -040037
38enum nfit_uuids {
Dan Williams31eca762016-04-28 16:23:43 -070039 /* for simplicity alias the uuid index with the family id */
40 NFIT_DEV_DIMM = NVDIMM_FAMILY_INTEL,
41 NFIT_DEV_DIMM_N_HPE1 = NVDIMM_FAMILY_HPE1,
42 NFIT_DEV_DIMM_N_HPE2 = NVDIMM_FAMILY_HPE2,
Dan Williamsb94d5232015-05-19 22:54:31 -040043 NFIT_SPA_VOLATILE,
44 NFIT_SPA_PM,
45 NFIT_SPA_DCR,
46 NFIT_SPA_BDW,
47 NFIT_SPA_VDISK,
48 NFIT_SPA_VCD,
49 NFIT_SPA_PDISK,
50 NFIT_SPA_PCD,
51 NFIT_DEV_BUS,
Dan Williamsb94d5232015-05-19 22:54:31 -040052 NFIT_UUID_MAX,
53};
54
Dan Williams30ec5fd2016-04-28 18:35:23 -070055/*
Dan Williams1bcbf422016-06-29 11:19:32 -070056 * Region format interface codes are stored with the interface as the
57 * LSB and the function as the MSB.
Dan Williams30ec5fd2016-04-28 18:35:23 -070058 */
Dan Williams1bcbf422016-06-29 11:19:32 -070059#define NFIT_FIC_BYTE cpu_to_le16(0x101) /* byte-addressable energy backed */
60#define NFIT_FIC_BLK cpu_to_le16(0x201) /* block-addressable non-energy backed */
61#define NFIT_FIC_BYTEN cpu_to_le16(0x301) /* byte-addressable non-energy backed */
Dan Williamsbe26f9a2016-02-01 17:48:42 -080062
Ross Zwislerf0f2c072015-07-10 11:06:14 -060063enum {
Dan Williamsaef25332016-02-12 17:01:11 -080064 NFIT_BLK_READ_FLUSH = 1,
65 NFIT_BLK_DCR_LATCH = 2,
66 NFIT_ARS_STATUS_DONE = 0,
67 NFIT_ARS_STATUS_BUSY = 1 << 16,
68 NFIT_ARS_STATUS_NONE = 2 << 16,
69 NFIT_ARS_STATUS_INTR = 3 << 16,
70 NFIT_ARS_START_BUSY = 6,
71 NFIT_ARS_CAP_NONE = 1,
72 NFIT_ARS_F_OVERFLOW = 1,
Dan Williams1cf03c02016-02-17 13:01:23 -080073 NFIT_ARS_TIMEOUT = 90,
Ross Zwislerf0f2c072015-07-10 11:06:14 -060074};
75
Dan Williamsb94d5232015-05-19 22:54:31 -040076struct nfit_spa {
77 struct acpi_nfit_system_address *spa;
78 struct list_head list;
Dan Williams1cf03c02016-02-17 13:01:23 -080079 struct nd_region *nd_region;
80 unsigned int ars_done:1;
81 u32 clear_err_unit;
82 u32 max_ars;
Dan Williamsb94d5232015-05-19 22:54:31 -040083};
84
85struct nfit_dcr {
86 struct acpi_nfit_control_region *dcr;
87 struct list_head list;
88};
89
90struct nfit_bdw {
91 struct acpi_nfit_data_region *bdw;
92 struct list_head list;
93};
94
Ross Zwisler047fc8a2015-06-25 04:21:02 -040095struct nfit_idt {
96 struct acpi_nfit_interleave *idt;
97 struct list_head list;
98};
99
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600100struct nfit_flush {
101 struct acpi_nfit_flush_address *flush;
102 struct list_head list;
103};
104
Dan Williamsb94d5232015-05-19 22:54:31 -0400105struct nfit_memdev {
106 struct acpi_nfit_memory_map *memdev;
107 struct list_head list;
108};
109
110/* assembled tables for a given dimm/memory-device */
111struct nfit_mem {
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400112 struct nvdimm *nvdimm;
Dan Williamsb94d5232015-05-19 22:54:31 -0400113 struct acpi_nfit_memory_map *memdev_dcr;
114 struct acpi_nfit_memory_map *memdev_pmem;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400115 struct acpi_nfit_memory_map *memdev_bdw;
Dan Williamsb94d5232015-05-19 22:54:31 -0400116 struct acpi_nfit_control_region *dcr;
117 struct acpi_nfit_data_region *bdw;
118 struct acpi_nfit_system_address *spa_dcr;
119 struct acpi_nfit_system_address *spa_bdw;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400120 struct acpi_nfit_interleave *idt_dcr;
121 struct acpi_nfit_interleave *idt_bdw;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600122 struct nfit_flush *nfit_flush;
Dan Williamsb94d5232015-05-19 22:54:31 -0400123 struct list_head list;
Dan Williams62232e452015-06-08 14:27:06 -0400124 struct acpi_device *adev;
Dan Williams8cc6ddf2016-04-05 15:26:50 -0700125 struct acpi_nfit_desc *acpi_desc;
Dan Williams62232e452015-06-08 14:27:06 -0400126 unsigned long dsm_mask;
Dan Williams31eca762016-04-28 16:23:43 -0700127 int family;
Dan Williamsb94d5232015-05-19 22:54:31 -0400128};
129
130struct acpi_nfit_desc {
131 struct nvdimm_bus_descriptor nd_desc;
Linda Knippers6b577c92015-11-20 19:05:49 -0500132 struct acpi_table_header acpi_header;
133 struct acpi_nfit_header *nfit;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400134 struct mutex spa_map_mutex;
Vishal Verma20985162015-10-27 16:58:27 -0600135 struct mutex init_mutex;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400136 struct list_head spa_maps;
Dan Williamsb94d5232015-05-19 22:54:31 -0400137 struct list_head memdevs;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600138 struct list_head flushes;
Dan Williamsb94d5232015-05-19 22:54:31 -0400139 struct list_head dimms;
140 struct list_head spas;
141 struct list_head dcrs;
142 struct list_head bdws;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400143 struct list_head idts;
Dan Williamsb94d5232015-05-19 22:54:31 -0400144 struct nvdimm_bus *nvdimm_bus;
145 struct device *dev;
Dan Williams1cf03c02016-02-17 13:01:23 -0800146 struct nd_cmd_ars_status *ars_status;
147 size_t ars_status_size;
Dan Williams7ae0fa432016-02-19 12:16:34 -0800148 struct work_struct work;
149 unsigned int cancel:1;
Dan Williamse3654ec2016-04-28 16:17:07 -0700150 unsigned long dimm_cmd_force_en;
151 unsigned long bus_cmd_force_en;
Dan Williams6bc75612015-06-17 17:23:32 -0400152 int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
153 void *iobuf, u64 len, int rw);
Dan Williamsb94d5232015-05-19 22:54:31 -0400154};
155
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400156enum nd_blk_mmio_selector {
157 BDW,
158 DCR,
159};
160
Ross Zwisler67a3e8f2015-08-27 13:14:20 -0600161struct nd_blk_addr {
162 union {
163 void __iomem *base;
164 void __pmem *aperture;
165 };
166};
167
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400168struct nfit_blk {
169 struct nfit_blk_mmio {
Ross Zwisler67a3e8f2015-08-27 13:14:20 -0600170 struct nd_blk_addr addr;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400171 u64 size;
172 u64 base_offset;
173 u32 line_size;
174 u32 num_lines;
175 u32 table_size;
176 struct acpi_nfit_interleave *idt;
177 struct acpi_nfit_system_address *spa;
178 } mmio[2];
179 struct nd_region *nd_region;
180 u64 bdw_offset; /* post interleave offset */
181 u64 stat_offset;
182 u64 cmd_offset;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600183 void __iomem *nvdimm_flush;
Ross Zwislerf0f2c072015-07-10 11:06:14 -0600184 u32 dimm_flags;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600185};
186
187enum spa_map_type {
188 SPA_MAP_CONTROL,
189 SPA_MAP_APERTURE,
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400190};
191
192struct nfit_spa_mapping {
193 struct acpi_nfit_desc *acpi_desc;
194 struct acpi_nfit_system_address *spa;
195 struct list_head list;
196 struct kref kref;
Ross Zwisler67a3e8f2015-08-27 13:14:20 -0600197 enum spa_map_type type;
198 struct nd_blk_addr addr;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400199};
200
201static inline struct nfit_spa_mapping *to_spa_map(struct kref *kref)
202{
203 return container_of(kref, struct nfit_spa_mapping, kref);
204}
205
Dan Williamsb94d5232015-05-19 22:54:31 -0400206static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
207 struct nfit_mem *nfit_mem)
208{
209 if (nfit_mem->memdev_dcr)
210 return nfit_mem->memdev_dcr;
211 return nfit_mem->memdev_pmem;
212}
Dan Williams45def222015-04-26 19:26:48 -0400213
214static inline struct acpi_nfit_desc *to_acpi_desc(
215 struct nvdimm_bus_descriptor *nd_desc)
216{
217 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
218}
Dan Williams6bc75612015-06-17 17:23:32 -0400219
220const u8 *to_nfit_uuid(enum nfit_uuids id);
221int acpi_nfit_init(struct acpi_nfit_desc *nfit, acpi_size sz);
Dan Williamsa61fe6f2016-02-19 12:29:32 -0800222void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev);
Dan Williamsb94d5232015-05-19 22:54:31 -0400223#endif /* __NFIT_H__ */