blob: 331b29152e2f01c7bdef3b6fb6f4acc61f2b6a85 [file] [log] [blame]
Rob Clarkc8afe682013-06-26 12:44:06 -04001
2config DRM_MSM
3 tristate "MSM DRM"
4 depends on DRM
Rob Clarkfb27b8f2014-05-30 15:37:54 -04005 depends on ARCH_QCOM || (ARM && COMPILE_TEST)
Arnd Bergmann40039902015-01-28 14:48:09 +01006 depends on OF && COMMON_CLK
Rob Clarkb7bbd642014-10-31 12:19:40 -04007 select REGULATOR
Rob Clarkc8afe682013-06-26 12:44:06 -04008 select DRM_KMS_HELPER
Rob Clark3e875992014-08-01 13:08:11 -04009 select DRM_PANEL
Rob Clarkc8afe682013-06-26 12:44:06 -040010 select SHMEM
11 select TMPFS
jilai wangc6a57a52015-04-02 17:49:01 -040012 select QCOM_SCM
Rob Clarkc8afe682013-06-26 12:44:06 -040013 default y
14 help
15 DRM/KMS driver for MSM/snapdragon.
16
17config DRM_MSM_FBDEV
18 bool "Enable legacy fbdev support for MSM modesetting driver"
19 depends on DRM_MSM
Daniel Vetter92b6f892013-10-08 17:44:47 +020020 select DRM_KMS_FB_HELPER
Rob Clarkc8afe682013-06-26 12:44:06 -040021 select FB_SYS_FILLRECT
22 select FB_SYS_COPYAREA
23 select FB_SYS_IMAGEBLIT
24 select FB_SYS_FOPS
25 default y
26 help
27 Choose this option if you have a need for the legacy fbdev
28 support. Note that this support also provide the linux console
29 support on top of the MSM modesetting driver.
30
31config DRM_MSM_REGISTER_LOGGING
32 bool "MSM DRM register logging"
33 depends on DRM_MSM
34 default n
35 help
36 Compile in support for logging register reads/writes in a format
37 that can be parsed by envytools demsm tool. If enabled, register
38 logging can be switched on via msm.reglog=y module param.
Hai Lia6895542015-03-31 14:36:33 -040039
40config DRM_MSM_DSI
41 bool "Enable DSI support in MSM DRM driver"
42 depends on DRM_MSM
43 select DRM_PANEL
44 select DRM_MIPI_DSI
45 default y
46 help
47 Choose this option if you have a need for MIPI DSI connector
48 support.
49
Hai Li825637b2015-05-15 13:04:04 -040050config DRM_MSM_DSI_PLL
51 bool "Enable DSI PLL driver in MSM DRM"
52 depends on DRM_MSM_DSI && COMMON_CLK
53 default y
54 help
55 Choose this option to enable DSI PLL driver which provides DSI
56 source clocks under common clock framework.