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Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001/*
2 * Atmel MultiMedia Card Interface driver
3 *
4 * Copyright (C) 2004-2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/blkdev.h>
11#include <linux/clk.h>
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +020012#include <linux/debugfs.h>
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +020013#include <linux/device.h>
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +020014#include <linux/dmaengine.h>
15#include <linux/dma-mapping.h>
Ben Nizettefbfca4b2008-07-18 16:48:09 +100016#include <linux/err.h>
David Brownell3c26e172008-07-27 02:34:45 -070017#include <linux/gpio.h>
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +020018#include <linux/init.h>
19#include <linux/interrupt.h>
Pramod Gurav7bca6462014-09-23 18:21:48 +053020#include <linux/io.h>
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +020021#include <linux/ioport.h>
22#include <linux/module.h>
Ludovic Desrochese919fd22012-07-24 15:30:03 +020023#include <linux/of.h>
24#include <linux/of_device.h>
25#include <linux/of_gpio.h>
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +020026#include <linux/platform_device.h>
27#include <linux/scatterlist.h>
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +020028#include <linux/seq_file.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +020030#include <linux/stat.h>
Viresh Kumare2b35f32012-02-01 16:12:27 +053031#include <linux/types.h>
Jean-Christophe PLAGNIOL-VILLARDbcd23602012-10-30 05:12:23 +080032#include <linux/platform_data/atmel.h>
Alexandre Belloni9cbef732014-10-17 10:26:36 +020033#include <linux/platform_data/mmc-atmel-mci.h>
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +020034
35#include <linux/mmc/host.h>
Nicolas Ferre2f1d7912010-12-10 19:14:32 +010036#include <linux/mmc/sdio.h>
Nicolas Ferre2635d1b2009-12-14 18:01:30 -080037
Nicolas Ferrec42aa772008-11-20 15:59:12 +010038#include <linux/atmel-mci.h>
Ludovic Desroches796211b2011-08-11 15:25:44 +000039#include <linux/atmel_pdc.h>
Wenyou Yangae552ab2014-10-30 12:00:41 +080040#include <linux/pm.h>
41#include <linux/pm_runtime.h>
Wenyou Yangb5b64fa2014-11-07 08:48:13 +080042#include <linux/pinctrl/consumer.h>
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +020043
Arnd Bergmannbf614c72014-06-05 23:14:38 +020044#include <asm/cacheflush.h>
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +020045#include <asm/io.h>
46#include <asm/unaligned.h>
47
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +020048#include "atmel-mci-regs.h"
49
Wenyou Yangae552ab2014-10-30 12:00:41 +080050#define AUTOSUSPEND_DELAY 50
51
Ludovic Desroches2c96a292011-08-11 15:25:41 +000052#define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE)
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +020053#define ATMCI_DMA_THRESHOLD 16
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +020054
55enum {
Ludovic Desrochesf5177542012-05-16 15:25:59 +020056 EVENT_CMD_RDY = 0,
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +020057 EVENT_XFER_COMPLETE,
Ludovic Desrochesf5177542012-05-16 15:25:59 +020058 EVENT_NOTBUSY,
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +020059 EVENT_DATA_ERROR,
60};
61
62enum atmel_mci_state {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +020063 STATE_IDLE = 0,
64 STATE_SENDING_CMD,
Ludovic Desrochesf5177542012-05-16 15:25:59 +020065 STATE_DATA_XFER,
66 STATE_WAITING_NOTBUSY,
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +020067 STATE_SENDING_STOP,
Ludovic Desrochesf5177542012-05-16 15:25:59 +020068 STATE_END_REQUEST,
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +020069};
70
Ludovic Desroches796211b2011-08-11 15:25:44 +000071enum atmci_xfer_dir {
72 XFER_RECEIVE = 0,
73 XFER_TRANSMIT,
74};
75
76enum atmci_pdc_buf {
77 PDC_FIRST_BUF = 0,
78 PDC_SECOND_BUF,
79};
80
81struct atmel_mci_caps {
Hein_Tiboschccdfe612012-08-30 16:34:38 +000082 bool has_dma_conf_reg;
Ludovic Desroches796211b2011-08-11 15:25:44 +000083 bool has_pdc;
84 bool has_cfg_reg;
85 bool has_cstor_reg;
86 bool has_highspeed;
87 bool has_rwproof;
Ludovic Desrochesfaf81802012-03-21 16:41:23 +010088 bool has_odd_clk_div;
Ludovic Desroches24011f32012-05-16 15:26:00 +020089 bool has_bad_data_ordering;
90 bool need_reset_after_xfer;
91 bool need_blksz_mul_4;
Ludovic Desroches077d4072012-07-24 11:42:04 +020092 bool need_notbusy_for_read_ops;
Ludovic Desroches796211b2011-08-11 15:25:44 +000093};
94
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +020095struct atmel_mci_dma {
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +020096 struct dma_chan *chan;
97 struct dma_async_tx_descriptor *data_desc;
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +020098};
99
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200100/**
101 * struct atmel_mci - MMC controller state shared between all slots
102 * @lock: Spinlock protecting the queue and associated data.
103 * @regs: Pointer to MMIO registers.
Ludovic Desroches796211b2011-08-11 15:25:44 +0000104 * @sg: Scatterlist entry currently being processed by PIO or PDC code.
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200105 * @pio_offset: Offset into the current scatterlist entry.
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200106 * @buffer: Buffer used if we don't have the r/w proof capability. We
107 * don't have the time to switch pdc buffers so we have to use only
108 * one buffer for the full transaction.
109 * @buf_size: size of the buffer.
110 * @phys_buf_addr: buffer address needed for pdc.
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200111 * @cur_slot: The slot which is currently using the controller.
112 * @mrq: The request currently being processed on @cur_slot,
113 * or NULL if the controller is idle.
114 * @cmd: The command currently being sent to the card, or NULL.
115 * @data: The data currently being transferred, or NULL if no data
116 * transfer is in progress.
Ludovic Desroches796211b2011-08-11 15:25:44 +0000117 * @data_size: just data->blocks * data->blksz.
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200118 * @dma: DMA client state.
119 * @data_chan: DMA channel being used for the current data transfer.
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200120 * @cmd_status: Snapshot of SR taken upon completion of the current
121 * command. Only valid when EVENT_CMD_COMPLETE is pending.
122 * @data_status: Snapshot of SR taken upon completion of the current
123 * data transfer. Only valid when EVENT_DATA_COMPLETE or
124 * EVENT_DATA_ERROR is pending.
125 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
126 * to be sent.
127 * @tasklet: Tasklet running the request state machine.
128 * @pending_events: Bitmask of events flagged by the interrupt handler
129 * to be processed by the tasklet.
130 * @completed_events: Bitmask of events which the state machine has
131 * processed.
132 * @state: Tasklet state.
133 * @queue: List of slots waiting for access to the controller.
134 * @need_clock_update: Update the clock rate before the next request.
135 * @need_reset: Reset controller before next request.
Ludovic Desroches24011f32012-05-16 15:26:00 +0200136 * @timer: Timer to balance the data timeout error flag which cannot rise.
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200137 * @mode_reg: Value of the MR register.
Nicolas Ferre74791a22009-12-14 18:01:31 -0800138 * @cfg_reg: Value of the CFG register.
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200139 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
140 * rate and timeout calculations.
141 * @mapbase: Physical address of the MMIO registers.
142 * @mck: The peripheral bus clock hooked up to the MMC controller.
143 * @pdev: Platform device associated with the MMC controller.
144 * @slot: Slots sharing this MMC controller.
Ludovic Desroches796211b2011-08-11 15:25:44 +0000145 * @caps: MCI capabilities depending on MCI version.
146 * @prepare_data: function to setup MCI before data transfer which
147 * depends on MCI capabilities.
148 * @submit_data: function to start data transfer which depends on MCI
149 * capabilities.
150 * @stop_transfer: function to stop data transfer which depends on MCI
151 * capabilities.
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200152 *
153 * Locking
154 * =======
155 *
156 * @lock is a softirq-safe spinlock protecting @queue as well as
157 * @cur_slot, @mrq and @state. These must always be updated
158 * at the same time while holding @lock.
159 *
160 * @lock also protects mode_reg and need_clock_update since these are
161 * used to synchronize mode register updates with the queue
162 * processing.
163 *
164 * The @mrq field of struct atmel_mci_slot is also protected by @lock,
165 * and must always be written at the same time as the slot is added to
166 * @queue.
167 *
168 * @pending_events and @completed_events are accessed using atomic bit
169 * operations, so they don't need any locking.
170 *
171 * None of the fields touched by the interrupt handler need any
172 * locking. However, ordering is important: Before EVENT_DATA_ERROR or
173 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
174 * interrupts must be disabled and @data_status updated with a
175 * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300176 * CMDRDY interrupt must be disabled and @cmd_status updated with a
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200177 * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
178 * bytes_xfered field of @data must be written. This is ensured by
179 * using barriers.
180 */
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200181struct atmel_mci {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200182 spinlock_t lock;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200183 void __iomem *regs;
184
185 struct scatterlist *sg;
Terry Barnabybdbc5d02013-04-08 12:05:47 -0400186 unsigned int sg_len;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200187 unsigned int pio_offset;
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200188 unsigned int *buffer;
189 unsigned int buf_size;
190 dma_addr_t buf_phys_addr;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200191
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200192 struct atmel_mci_slot *cur_slot;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200193 struct mmc_request *mrq;
194 struct mmc_command *cmd;
195 struct mmc_data *data;
Ludovic Desroches796211b2011-08-11 15:25:44 +0000196 unsigned int data_size;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200197
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200198 struct atmel_mci_dma dma;
199 struct dma_chan *data_chan;
Viresh Kumare2b35f32012-02-01 16:12:27 +0530200 struct dma_slave_config dma_conf;
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200201
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200202 u32 cmd_status;
203 u32 data_status;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200204 u32 stop_cmdr;
205
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200206 struct tasklet_struct tasklet;
207 unsigned long pending_events;
208 unsigned long completed_events;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +0200209 enum atmel_mci_state state;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200210 struct list_head queue;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200211
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200212 bool need_clock_update;
213 bool need_reset;
Ludovic Desroches24011f32012-05-16 15:26:00 +0200214 struct timer_list timer;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200215 u32 mode_reg;
Nicolas Ferre74791a22009-12-14 18:01:31 -0800216 u32 cfg_reg;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200217 unsigned long bus_hz;
218 unsigned long mapbase;
219 struct clk *mck;
220 struct platform_device *pdev;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200221
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000222 struct atmel_mci_slot *slot[ATMCI_MAX_NR_SLOTS];
Ludovic Desroches796211b2011-08-11 15:25:44 +0000223
224 struct atmel_mci_caps caps;
225
226 u32 (*prepare_data)(struct atmel_mci *host, struct mmc_data *data);
227 void (*submit_data)(struct atmel_mci *host, struct mmc_data *data);
228 void (*stop_transfer)(struct atmel_mci *host);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200229};
230
231/**
232 * struct atmel_mci_slot - MMC slot state
233 * @mmc: The mmc_host representing this slot.
234 * @host: The MMC controller this slot is using.
235 * @sdc_reg: Value of SDCR to be written before using this slot.
Anders Grahn88ff82e2010-05-26 14:42:01 -0700236 * @sdio_irq: SDIO irq mask for this slot.
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200237 * @mrq: mmc_request currently being processed or waiting to be
238 * processed, or NULL when the slot is idle.
239 * @queue_node: List node for placing this node in the @queue list of
240 * &struct atmel_mci.
241 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
242 * @flags: Random state bits associated with the slot.
243 * @detect_pin: GPIO pin used for card detection, or negative if not
244 * available.
245 * @wp_pin: GPIO pin used for card write protect sending, or negative
246 * if not available.
Jonas Larsson1c1452b2009-03-31 11:16:48 +0200247 * @detect_is_active_high: The state of the detect pin when it is active.
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200248 * @detect_timer: Timer used for debouncing @detect_pin interrupts.
249 */
250struct atmel_mci_slot {
251 struct mmc_host *mmc;
252 struct atmel_mci *host;
253
254 u32 sdc_reg;
Anders Grahn88ff82e2010-05-26 14:42:01 -0700255 u32 sdio_irq;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200256
257 struct mmc_request *mrq;
258 struct list_head queue_node;
259
260 unsigned int clock;
261 unsigned long flags;
262#define ATMCI_CARD_PRESENT 0
263#define ATMCI_CARD_NEED_INIT 1
264#define ATMCI_SHUTDOWN 2
265
266 int detect_pin;
267 int wp_pin;
Jonas Larsson1c1452b2009-03-31 11:16:48 +0200268 bool detect_is_active_high;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200269
270 struct timer_list detect_timer;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200271};
272
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200273#define atmci_test_and_clear_pending(host, event) \
274 test_and_clear_bit(event, &host->pending_events)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200275#define atmci_set_completed(host, event) \
276 set_bit(event, &host->completed_events)
277#define atmci_set_pending(host, event) \
278 set_bit(event, &host->pending_events)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200279
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200280/*
281 * The debugfs stuff below is mostly optimized away when
282 * CONFIG_DEBUG_FS is not set.
283 */
284static int atmci_req_show(struct seq_file *s, void *v)
285{
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200286 struct atmel_mci_slot *slot = s->private;
287 struct mmc_request *mrq;
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200288 struct mmc_command *cmd;
289 struct mmc_command *stop;
290 struct mmc_data *data;
291
292 /* Make sure we get a consistent snapshot */
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200293 spin_lock_bh(&slot->host->lock);
294 mrq = slot->mrq;
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200295
296 if (mrq) {
297 cmd = mrq->cmd;
298 data = mrq->data;
299 stop = mrq->stop;
300
301 if (cmd)
302 seq_printf(s,
303 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
304 cmd->opcode, cmd->arg, cmd->flags,
305 cmd->resp[0], cmd->resp[1], cmd->resp[2],
Nicolas Ferred586ebb2010-05-11 14:06:50 -0700306 cmd->resp[3], cmd->error);
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200307 if (data)
308 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
309 data->bytes_xfered, data->blocks,
310 data->blksz, data->flags, data->error);
311 if (stop)
312 seq_printf(s,
313 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
314 stop->opcode, stop->arg, stop->flags,
315 stop->resp[0], stop->resp[1], stop->resp[2],
Nicolas Ferred586ebb2010-05-11 14:06:50 -0700316 stop->resp[3], stop->error);
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200317 }
318
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200319 spin_unlock_bh(&slot->host->lock);
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200320
321 return 0;
322}
323
324static int atmci_req_open(struct inode *inode, struct file *file)
325{
326 return single_open(file, atmci_req_show, inode->i_private);
327}
328
329static const struct file_operations atmci_req_fops = {
330 .owner = THIS_MODULE,
331 .open = atmci_req_open,
332 .read = seq_read,
333 .llseek = seq_lseek,
334 .release = single_release,
335};
336
337static void atmci_show_status_reg(struct seq_file *s,
338 const char *regname, u32 value)
339{
340 static const char *sr_bit[] = {
341 [0] = "CMDRDY",
342 [1] = "RXRDY",
343 [2] = "TXRDY",
344 [3] = "BLKE",
345 [4] = "DTIP",
346 [5] = "NOTBUSY",
Rob Emanuele04d699c2009-09-22 16:45:19 -0700347 [6] = "ENDRX",
348 [7] = "ENDTX",
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200349 [8] = "SDIOIRQA",
350 [9] = "SDIOIRQB",
Rob Emanuele04d699c2009-09-22 16:45:19 -0700351 [12] = "SDIOWAIT",
352 [14] = "RXBUFF",
353 [15] = "TXBUFE",
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200354 [16] = "RINDE",
355 [17] = "RDIRE",
356 [18] = "RCRCE",
357 [19] = "RENDE",
358 [20] = "RTOE",
359 [21] = "DCRCE",
360 [22] = "DTOE",
Rob Emanuele04d699c2009-09-22 16:45:19 -0700361 [23] = "CSTOE",
362 [24] = "BLKOVRE",
363 [25] = "DMADONE",
364 [26] = "FIFOEMPTY",
365 [27] = "XFRDONE",
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200366 [30] = "OVRE",
367 [31] = "UNRE",
368 };
369 unsigned int i;
370
371 seq_printf(s, "%s:\t0x%08x", regname, value);
372 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
373 if (value & (1 << i)) {
374 if (sr_bit[i])
375 seq_printf(s, " %s", sr_bit[i]);
376 else
377 seq_puts(s, " UNKNOWN");
378 }
379 }
380 seq_putc(s, '\n');
381}
382
383static int atmci_regs_show(struct seq_file *s, void *v)
384{
385 struct atmel_mci *host = s->private;
386 u32 *buf;
Boris BREZILLONb3894f22013-07-18 09:38:52 +0200387 int ret = 0;
388
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200389
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000390 buf = kmalloc(ATMCI_REGS_SIZE, GFP_KERNEL);
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200391 if (!buf)
392 return -ENOMEM;
393
Wenyou Yangae552ab2014-10-30 12:00:41 +0800394 pm_runtime_get_sync(&host->pdev->dev);
395
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200396 /*
397 * Grab a more or less consistent snapshot. Note that we're
398 * not disabling interrupts, so IMR and SR may not be
399 * consistent.
400 */
401 spin_lock_bh(&host->lock);
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000402 memcpy_fromio(buf, host->regs, ATMCI_REGS_SIZE);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200403 spin_unlock_bh(&host->lock);
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200404
Wenyou Yangae552ab2014-10-30 12:00:41 +0800405 pm_runtime_mark_last_busy(&host->pdev->dev);
406 pm_runtime_put_autosuspend(&host->pdev->dev);
Boris BREZILLONb3894f22013-07-18 09:38:52 +0200407
Nicolas Ferre8a4de072012-07-06 12:11:51 +0200408 seq_printf(s, "MR:\t0x%08x%s%s ",
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000409 buf[ATMCI_MR / 4],
410 buf[ATMCI_MR / 4] & ATMCI_MR_RDPROOF ? " RDPROOF" : "",
Nicolas Ferre8a4de072012-07-06 12:11:51 +0200411 buf[ATMCI_MR / 4] & ATMCI_MR_WRPROOF ? " WRPROOF" : "");
412 if (host->caps.has_odd_clk_div)
413 seq_printf(s, "{CLKDIV,CLKODD}=%u\n",
414 ((buf[ATMCI_MR / 4] & 0xff) << 1)
415 | ((buf[ATMCI_MR / 4] >> 16) & 1));
416 else
417 seq_printf(s, "CLKDIV=%u\n",
418 (buf[ATMCI_MR / 4] & 0xff));
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000419 seq_printf(s, "DTOR:\t0x%08x\n", buf[ATMCI_DTOR / 4]);
420 seq_printf(s, "SDCR:\t0x%08x\n", buf[ATMCI_SDCR / 4]);
421 seq_printf(s, "ARGR:\t0x%08x\n", buf[ATMCI_ARGR / 4]);
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200422 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000423 buf[ATMCI_BLKR / 4],
424 buf[ATMCI_BLKR / 4] & 0xffff,
425 (buf[ATMCI_BLKR / 4] >> 16) & 0xffff);
Ludovic Desroches796211b2011-08-11 15:25:44 +0000426 if (host->caps.has_cstor_reg)
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000427 seq_printf(s, "CSTOR:\t0x%08x\n", buf[ATMCI_CSTOR / 4]);
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200428
429 /* Don't read RSPR and RDR; it will consume the data there */
430
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000431 atmci_show_status_reg(s, "SR", buf[ATMCI_SR / 4]);
432 atmci_show_status_reg(s, "IMR", buf[ATMCI_IMR / 4]);
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200433
Hein_Tiboschccdfe612012-08-30 16:34:38 +0000434 if (host->caps.has_dma_conf_reg) {
Nicolas Ferre74791a22009-12-14 18:01:31 -0800435 u32 val;
436
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000437 val = buf[ATMCI_DMA / 4];
Nicolas Ferre74791a22009-12-14 18:01:31 -0800438 seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n",
439 val, val & 3,
440 ((val >> 4) & 3) ?
441 1 << (((val >> 4) & 3) + 1) : 1,
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000442 val & ATMCI_DMAEN ? " DMAEN" : "");
Ludovic Desroches796211b2011-08-11 15:25:44 +0000443 }
444 if (host->caps.has_cfg_reg) {
445 u32 val;
Nicolas Ferre74791a22009-12-14 18:01:31 -0800446
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000447 val = buf[ATMCI_CFG / 4];
Nicolas Ferre74791a22009-12-14 18:01:31 -0800448 seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n",
449 val,
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000450 val & ATMCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "",
451 val & ATMCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "",
452 val & ATMCI_CFG_HSMODE ? " HSMODE" : "",
453 val & ATMCI_CFG_LSYNC ? " LSYNC" : "");
Nicolas Ferre74791a22009-12-14 18:01:31 -0800454 }
455
Haavard Skinnemoenb17339a2008-09-19 21:09:28 +0200456 kfree(buf);
457
Boris BREZILLONb3894f22013-07-18 09:38:52 +0200458 return ret;
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200459}
460
461static int atmci_regs_open(struct inode *inode, struct file *file)
462{
463 return single_open(file, atmci_regs_show, inode->i_private);
464}
465
466static const struct file_operations atmci_regs_fops = {
467 .owner = THIS_MODULE,
468 .open = atmci_regs_open,
469 .read = seq_read,
470 .llseek = seq_lseek,
471 .release = single_release,
472};
473
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200474static void atmci_init_debugfs(struct atmel_mci_slot *slot)
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200475{
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200476 struct mmc_host *mmc = slot->mmc;
477 struct atmel_mci *host = slot->host;
478 struct dentry *root;
479 struct dentry *node;
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200480
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200481 root = mmc->debugfs_root;
482 if (!root)
483 return;
484
485 node = debugfs_create_file("regs", S_IRUSR, root, host,
486 &atmci_regs_fops);
487 if (IS_ERR(node))
488 return;
489 if (!node)
490 goto err;
491
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200492 node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200493 if (!node)
494 goto err;
495
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +0200496 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
497 if (!node)
498 goto err;
499
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200500 node = debugfs_create_x32("pending_events", S_IRUSR, root,
501 (u32 *)&host->pending_events);
502 if (!node)
503 goto err;
504
505 node = debugfs_create_x32("completed_events", S_IRUSR, root,
506 (u32 *)&host->completed_events);
507 if (!node)
508 goto err;
509
510 return;
511
512err:
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200513 dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +0200514}
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200515
Ludovic Desrochese919fd22012-07-24 15:30:03 +0200516#if defined(CONFIG_OF)
517static const struct of_device_id atmci_dt_ids[] = {
518 { .compatible = "atmel,hsmci" },
519 { /* sentinel */ }
520};
521
522MODULE_DEVICE_TABLE(of, atmci_dt_ids);
523
Bill Pembertonc3be1ef2012-11-19 13:23:06 -0500524static struct mci_platform_data*
Ludovic Desrochese919fd22012-07-24 15:30:03 +0200525atmci_of_init(struct platform_device *pdev)
526{
527 struct device_node *np = pdev->dev.of_node;
528 struct device_node *cnp;
529 struct mci_platform_data *pdata;
530 u32 slot_id;
531
532 if (!np) {
533 dev_err(&pdev->dev, "device node not found\n");
534 return ERR_PTR(-EINVAL);
535 }
536
537 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
538 if (!pdata) {
539 dev_err(&pdev->dev, "could not allocate memory for pdata\n");
540 return ERR_PTR(-ENOMEM);
541 }
542
543 for_each_child_of_node(np, cnp) {
544 if (of_property_read_u32(cnp, "reg", &slot_id)) {
545 dev_warn(&pdev->dev, "reg property is missing for %s\n",
546 cnp->full_name);
547 continue;
548 }
549
550 if (slot_id >= ATMCI_MAX_NR_SLOTS) {
551 dev_warn(&pdev->dev, "can't have more than %d slots\n",
552 ATMCI_MAX_NR_SLOTS);
553 break;
554 }
555
556 if (of_property_read_u32(cnp, "bus-width",
557 &pdata->slot[slot_id].bus_width))
558 pdata->slot[slot_id].bus_width = 1;
559
560 pdata->slot[slot_id].detect_pin =
561 of_get_named_gpio(cnp, "cd-gpios", 0);
562
563 pdata->slot[slot_id].detect_is_active_high =
564 of_property_read_bool(cnp, "cd-inverted");
565
Timo Kokkonen76d55562014-11-03 13:12:59 +0200566 pdata->slot[slot_id].non_removable =
567 of_property_read_bool(cnp, "non-removable");
568
Ludovic Desrochese919fd22012-07-24 15:30:03 +0200569 pdata->slot[slot_id].wp_pin =
570 of_get_named_gpio(cnp, "wp-gpios", 0);
571 }
572
573 return pdata;
574}
575#else /* CONFIG_OF */
576static inline struct mci_platform_data*
577atmci_of_init(struct platform_device *dev)
578{
579 return ERR_PTR(-EINVAL);
580}
581#endif
582
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200583static inline unsigned int atmci_get_version(struct atmel_mci *host)
584{
585 return atmci_readl(host, ATMCI_VERSION) & 0x00000fff;
586}
587
Ludovic Desroches24011f32012-05-16 15:26:00 +0200588static void atmci_timeout_timer(unsigned long data)
589{
590 struct atmel_mci *host;
591
592 host = (struct atmel_mci *)data;
593
594 dev_dbg(&host->pdev->dev, "software timeout\n");
595
596 if (host->mrq->cmd->data) {
597 host->mrq->cmd->data->error = -ETIMEDOUT;
598 host->data = NULL;
Ludovic Desrochesc1fa3422013-09-09 17:29:56 +0200599 /*
600 * With some SDIO modules, sometimes DMA transfer hangs. If
601 * stop_transfer() is not called then the DMA request is not
602 * removed, following ones are queued and never computed.
603 */
604 if (host->state == STATE_DATA_XFER)
605 host->stop_transfer(host);
Ludovic Desroches24011f32012-05-16 15:26:00 +0200606 } else {
607 host->mrq->cmd->error = -ETIMEDOUT;
608 host->cmd = NULL;
609 }
610 host->need_reset = 1;
611 host->state = STATE_END_REQUEST;
612 smp_wmb();
613 tasklet_schedule(&host->tasklet);
614}
615
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000616static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host,
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200617 unsigned int ns)
618{
Ludovic Desroches66292ad2012-03-28 12:28:33 +0200619 /*
620 * It is easier here to use us instead of ns for the timeout,
621 * it prevents from overflows during calculation.
622 */
623 unsigned int us = DIV_ROUND_UP(ns, 1000);
624
625 /* Maximum clock frequency is host->bus_hz/2 */
626 return us * (DIV_ROUND_UP(host->bus_hz, 2000000));
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200627}
628
629static void atmci_set_timeout(struct atmel_mci *host,
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200630 struct atmel_mci_slot *slot, struct mmc_data *data)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200631{
632 static unsigned dtomul_to_shift[] = {
633 0, 4, 7, 8, 10, 12, 16, 20
634 };
635 unsigned timeout;
636 unsigned dtocyc;
637 unsigned dtomul;
638
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000639 timeout = atmci_ns_to_clocks(host, data->timeout_ns)
640 + data->timeout_clks;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200641
642 for (dtomul = 0; dtomul < 8; dtomul++) {
643 unsigned shift = dtomul_to_shift[dtomul];
644 dtocyc = (timeout + (1 << shift) - 1) >> shift;
645 if (dtocyc < 15)
646 break;
647 }
648
649 if (dtomul >= 8) {
650 dtomul = 7;
651 dtocyc = 15;
652 }
653
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200654 dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200655 dtocyc << dtomul_to_shift[dtomul]);
Ludovic Desroches03fc9a72011-08-11 15:25:42 +0000656 atmci_writel(host, ATMCI_DTOR, (ATMCI_DTOMUL(dtomul) | ATMCI_DTOCYC(dtocyc)));
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200657}
658
659/*
660 * Return mask with command flags to be enabled for this command.
661 */
662static u32 atmci_prepare_command(struct mmc_host *mmc,
663 struct mmc_command *cmd)
664{
665 struct mmc_data *data;
666 u32 cmdr;
667
668 cmd->error = -EINPROGRESS;
669
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000670 cmdr = ATMCI_CMDR_CMDNB(cmd->opcode);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200671
672 if (cmd->flags & MMC_RSP_PRESENT) {
673 if (cmd->flags & MMC_RSP_136)
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000674 cmdr |= ATMCI_CMDR_RSPTYP_136BIT;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200675 else
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000676 cmdr |= ATMCI_CMDR_RSPTYP_48BIT;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200677 }
678
679 /*
680 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
681 * it's too difficult to determine whether this is an ACMD or
682 * not. Better make it 64.
683 */
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000684 cmdr |= ATMCI_CMDR_MAXLAT_64CYC;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200685
686 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000687 cmdr |= ATMCI_CMDR_OPDCMD;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200688
689 data = cmd->data;
690 if (data) {
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000691 cmdr |= ATMCI_CMDR_START_XFER;
Nicolas Ferre2f1d7912010-12-10 19:14:32 +0100692
693 if (cmd->opcode == SD_IO_RW_EXTENDED) {
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000694 cmdr |= ATMCI_CMDR_SDIO_BLOCK;
Nicolas Ferre2f1d7912010-12-10 19:14:32 +0100695 } else {
696 if (data->flags & MMC_DATA_STREAM)
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000697 cmdr |= ATMCI_CMDR_STREAM;
Nicolas Ferre2f1d7912010-12-10 19:14:32 +0100698 else if (data->blocks > 1)
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000699 cmdr |= ATMCI_CMDR_MULTI_BLOCK;
Nicolas Ferre2f1d7912010-12-10 19:14:32 +0100700 else
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000701 cmdr |= ATMCI_CMDR_BLOCK;
Nicolas Ferre2f1d7912010-12-10 19:14:32 +0100702 }
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200703
704 if (data->flags & MMC_DATA_READ)
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000705 cmdr |= ATMCI_CMDR_TRDIR_READ;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200706 }
707
708 return cmdr;
709}
710
Ludovic Desroches11d14882011-08-11 15:25:45 +0000711static void atmci_send_command(struct atmel_mci *host,
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200712 struct mmc_command *cmd, u32 cmd_flags)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200713{
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200714 WARN_ON(host->cmd);
715 host->cmd = cmd;
716
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +0200717 dev_vdbg(&host->pdev->dev,
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200718 "start command: ARGR=0x%08x CMDR=0x%08x\n",
719 cmd->arg, cmd_flags);
720
Ludovic Desroches03fc9a72011-08-11 15:25:42 +0000721 atmci_writel(host, ATMCI_ARGR, cmd->arg);
722 atmci_writel(host, ATMCI_CMDR, cmd_flags);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200723}
724
Ludovic Desroches2c96a292011-08-11 15:25:41 +0000725static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200726{
Ludovic Desroches6801c412012-05-16 15:26:01 +0200727 dev_dbg(&host->pdev->dev, "send stop command\n");
Ludovic Desroches11d14882011-08-11 15:25:45 +0000728 atmci_send_command(host, data->stop, host->stop_cmdr);
Ludovic Desroches03fc9a72011-08-11 15:25:42 +0000729 atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +0200730}
731
Ludovic Desroches796211b2011-08-11 15:25:44 +0000732/*
733 * Configure given PDC buffer taking care of alignement issues.
734 * Update host->data_size and host->sg.
735 */
736static void atmci_pdc_set_single_buf(struct atmel_mci *host,
737 enum atmci_xfer_dir dir, enum atmci_pdc_buf buf_nb)
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200738{
Ludovic Desroches796211b2011-08-11 15:25:44 +0000739 u32 pointer_reg, counter_reg;
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200740 unsigned int buf_size;
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200741
Ludovic Desroches796211b2011-08-11 15:25:44 +0000742 if (dir == XFER_RECEIVE) {
743 pointer_reg = ATMEL_PDC_RPR;
744 counter_reg = ATMEL_PDC_RCR;
745 } else {
746 pointer_reg = ATMEL_PDC_TPR;
747 counter_reg = ATMEL_PDC_TCR;
748 }
749
750 if (buf_nb == PDC_SECOND_BUF) {
Ludovic Desroches1ebbe3d2011-08-11 15:25:46 +0000751 pointer_reg += ATMEL_PDC_SCND_BUF_OFF;
752 counter_reg += ATMEL_PDC_SCND_BUF_OFF;
Ludovic Desroches796211b2011-08-11 15:25:44 +0000753 }
754
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200755 if (!host->caps.has_rwproof) {
756 buf_size = host->buf_size;
757 atmci_writel(host, pointer_reg, host->buf_phys_addr);
758 } else {
759 buf_size = sg_dma_len(host->sg);
760 atmci_writel(host, pointer_reg, sg_dma_address(host->sg));
761 }
762
763 if (host->data_size <= buf_size) {
Ludovic Desroches796211b2011-08-11 15:25:44 +0000764 if (host->data_size & 0x3) {
765 /* If size is different from modulo 4, transfer bytes */
766 atmci_writel(host, counter_reg, host->data_size);
767 atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCFBYTE);
768 } else {
769 /* Else transfer 32-bits words */
770 atmci_writel(host, counter_reg, host->data_size / 4);
771 }
772 host->data_size = 0;
773 } else {
774 /* We assume the size of a page is 32-bits aligned */
Ludovic Desroches341fa4c2011-08-11 15:25:47 +0000775 atmci_writel(host, counter_reg, sg_dma_len(host->sg) / 4);
776 host->data_size -= sg_dma_len(host->sg);
Ludovic Desroches796211b2011-08-11 15:25:44 +0000777 if (host->data_size)
778 host->sg = sg_next(host->sg);
779 }
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200780}
781
Ludovic Desroches796211b2011-08-11 15:25:44 +0000782/*
783 * Configure PDC buffer according to the data size ie configuring one or two
784 * buffers. Don't use this function if you want to configure only the second
785 * buffer. In this case, use atmci_pdc_set_single_buf.
786 */
787static void atmci_pdc_set_both_buf(struct atmel_mci *host, int dir)
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200788{
Ludovic Desroches796211b2011-08-11 15:25:44 +0000789 atmci_pdc_set_single_buf(host, dir, PDC_FIRST_BUF);
790 if (host->data_size)
791 atmci_pdc_set_single_buf(host, dir, PDC_SECOND_BUF);
792}
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200793
Ludovic Desroches796211b2011-08-11 15:25:44 +0000794/*
795 * Unmap sg lists, called when transfer is finished.
796 */
797static void atmci_pdc_cleanup(struct atmel_mci *host)
798{
799 struct mmc_data *data = host->data;
800
801 if (data)
802 dma_unmap_sg(&host->pdev->dev,
803 data->sg, data->sg_len,
804 ((data->flags & MMC_DATA_WRITE)
805 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
806}
807
808/*
809 * Disable PDC transfers. Update pending flags to EVENT_XFER_COMPLETE after
810 * having received ATMCI_TXBUFE or ATMCI_RXBUFF interrupt. Enable ATMCI_NOTBUSY
811 * interrupt needed for both transfer directions.
812 */
813static void atmci_pdc_complete(struct atmel_mci *host)
814{
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200815 int transfer_size = host->data->blocks * host->data->blksz;
Ludovic Desroches24011f32012-05-16 15:26:00 +0200816 int i;
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200817
Ludovic Desroches796211b2011-08-11 15:25:44 +0000818 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200819
820 if ((!host->caps.has_rwproof)
Ludovic Desroches24011f32012-05-16 15:26:00 +0200821 && (host->data->flags & MMC_DATA_READ)) {
822 if (host->caps.has_bad_data_ordering)
823 for (i = 0; i < transfer_size; i++)
824 host->buffer[i] = swab32(host->buffer[i]);
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200825 sg_copy_from_buffer(host->data->sg, host->data->sg_len,
826 host->buffer, transfer_size);
Ludovic Desroches24011f32012-05-16 15:26:00 +0200827 }
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200828
Ludovic Desroches796211b2011-08-11 15:25:44 +0000829 atmci_pdc_cleanup(host);
830
Alexandre Belloni6e9e4062014-05-06 17:43:26 +0200831 dev_dbg(&host->pdev->dev, "(%s) set pending xfer complete\n", __func__);
832 atmci_set_pending(host, EVENT_XFER_COMPLETE);
833 tasklet_schedule(&host->tasklet);
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200834}
835
Ludovic Desroches796211b2011-08-11 15:25:44 +0000836static void atmci_dma_cleanup(struct atmel_mci *host)
837{
838 struct mmc_data *data = host->data;
839
840 if (data)
841 dma_unmap_sg(host->dma.chan->device->dev,
842 data->sg, data->sg_len,
843 ((data->flags & MMC_DATA_WRITE)
844 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
845}
846
847/*
848 * This function is called by the DMA driver from tasklet context.
849 */
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200850static void atmci_dma_complete(void *arg)
851{
852 struct atmel_mci *host = arg;
853 struct mmc_data *data = host->data;
854
855 dev_vdbg(&host->pdev->dev, "DMA complete\n");
856
Hein_Tiboschccdfe612012-08-30 16:34:38 +0000857 if (host->caps.has_dma_conf_reg)
Nicolas Ferre74791a22009-12-14 18:01:31 -0800858 /* Disable DMA hardware handshaking on MCI */
Ludovic Desroches03fc9a72011-08-11 15:25:42 +0000859 atmci_writel(host, ATMCI_DMA, atmci_readl(host, ATMCI_DMA) & ~ATMCI_DMAEN);
Nicolas Ferre74791a22009-12-14 18:01:31 -0800860
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200861 atmci_dma_cleanup(host);
862
863 /*
864 * If the card was removed, data will be NULL. No point trying
865 * to send the stop command or waiting for NBUSY in this case.
866 */
867 if (data) {
Ludovic Desroches6801c412012-05-16 15:26:01 +0200868 dev_dbg(&host->pdev->dev,
869 "(%s) set pending xfer complete\n", __func__);
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200870 atmci_set_pending(host, EVENT_XFER_COMPLETE);
871 tasklet_schedule(&host->tasklet);
872
873 /*
874 * Regardless of what the documentation says, we have
875 * to wait for NOTBUSY even after block read
876 * operations.
877 *
878 * When the DMA transfer is complete, the controller
879 * may still be reading the CRC from the card, i.e.
880 * the data transfer is still in progress and we
881 * haven't seen all the potential error bits yet.
882 *
883 * The interrupt handler will schedule a different
884 * tasklet to finish things up when the data transfer
885 * is completely done.
886 *
887 * We may not complete the mmc request here anyway
888 * because the mmc layer may call back and cause us to
889 * violate the "don't submit new operations from the
890 * completion callback" rule of the dma engine
891 * framework.
892 */
Ludovic Desroches03fc9a72011-08-11 15:25:42 +0000893 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200894 }
895}
896
Ludovic Desroches796211b2011-08-11 15:25:44 +0000897/*
898 * Returns a mask of interrupt flags to be enabled after the whole
899 * request has been prepared.
900 */
901static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data)
902{
903 u32 iflags;
904
905 data->error = -EINPROGRESS;
906
907 host->sg = data->sg;
Terry Barnabybdbc5d02013-04-08 12:05:47 -0400908 host->sg_len = data->sg_len;
Ludovic Desroches796211b2011-08-11 15:25:44 +0000909 host->data = data;
910 host->data_chan = NULL;
911
912 iflags = ATMCI_DATA_ERROR_FLAGS;
913
914 /*
915 * Errata: MMC data write operation with less than 12
916 * bytes is impossible.
917 *
918 * Errata: MCI Transmit Data Register (TDR) FIFO
919 * corruption when length is not multiple of 4.
920 */
921 if (data->blocks * data->blksz < 12
922 || (data->blocks * data->blksz) & 3)
923 host->need_reset = true;
924
925 host->pio_offset = 0;
926 if (data->flags & MMC_DATA_READ)
927 iflags |= ATMCI_RXRDY;
928 else
929 iflags |= ATMCI_TXRDY;
930
931 return iflags;
932}
933
934/*
935 * Set interrupt flags and set block length into the MCI mode register even
936 * if this value is also accessible in the MCI block register. It seems to be
937 * necessary before the High Speed MCI version. It also map sg and configure
938 * PDC registers.
939 */
940static u32
941atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data)
942{
943 u32 iflags, tmp;
944 unsigned int sg_len;
945 enum dma_data_direction dir;
Ludovic Desroches24011f32012-05-16 15:26:00 +0200946 int i;
Ludovic Desroches796211b2011-08-11 15:25:44 +0000947
948 data->error = -EINPROGRESS;
949
950 host->data = data;
951 host->sg = data->sg;
952 iflags = ATMCI_DATA_ERROR_FLAGS;
953
954 /* Enable pdc mode */
955 atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCMODE);
956
957 if (data->flags & MMC_DATA_READ) {
958 dir = DMA_FROM_DEVICE;
959 iflags |= ATMCI_ENDRX | ATMCI_RXBUFF;
960 } else {
961 dir = DMA_TO_DEVICE;
Ludovic Desrochesf5177542012-05-16 15:25:59 +0200962 iflags |= ATMCI_ENDTX | ATMCI_TXBUFE | ATMCI_BLKE;
Ludovic Desroches796211b2011-08-11 15:25:44 +0000963 }
964
965 /* Set BLKLEN */
966 tmp = atmci_readl(host, ATMCI_MR);
967 tmp &= 0x0000ffff;
968 tmp |= ATMCI_BLKLEN(data->blksz);
969 atmci_writel(host, ATMCI_MR, tmp);
970
971 /* Configure PDC */
972 host->data_size = data->blocks * data->blksz;
973 sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir);
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200974
975 if ((!host->caps.has_rwproof)
Ludovic Desroches24011f32012-05-16 15:26:00 +0200976 && (host->data->flags & MMC_DATA_WRITE)) {
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200977 sg_copy_to_buffer(host->data->sg, host->data->sg_len,
978 host->buffer, host->data_size);
Ludovic Desroches24011f32012-05-16 15:26:00 +0200979 if (host->caps.has_bad_data_ordering)
980 for (i = 0; i < host->data_size; i++)
981 host->buffer[i] = swab32(host->buffer[i]);
982 }
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +0200983
Ludovic Desroches796211b2011-08-11 15:25:44 +0000984 if (host->data_size)
985 atmci_pdc_set_both_buf(host,
986 ((dir == DMA_FROM_DEVICE) ? XFER_RECEIVE : XFER_TRANSMIT));
987
988 return iflags;
989}
990
991static u32
Nicolas Ferre74791a22009-12-14 18:01:31 -0800992atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data)
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +0200993{
994 struct dma_chan *chan;
995 struct dma_async_tx_descriptor *desc;
996 struct scatterlist *sg;
997 unsigned int i;
998 enum dma_data_direction direction;
Vinod Koule0d23ef2011-11-17 14:54:38 +0530999 enum dma_transfer_direction slave_dirn;
Atsushi Nemoto657a77fa2009-09-08 17:53:05 -07001000 unsigned int sglen;
Nicolas Ferre693e5e22012-06-06 12:19:44 +02001001 u32 maxburst;
Ludovic Desroches796211b2011-08-11 15:25:44 +00001002 u32 iflags;
1003
1004 data->error = -EINPROGRESS;
1005
1006 WARN_ON(host->data);
1007 host->sg = NULL;
1008 host->data = data;
1009
1010 iflags = ATMCI_DATA_ERROR_FLAGS;
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001011
1012 /*
1013 * We don't do DMA on "complex" transfers, i.e. with
1014 * non-word-aligned buffers or lengths. Also, we don't bother
1015 * with all the DMA setup overhead for short transfers.
1016 */
Ludovic Desroches796211b2011-08-11 15:25:44 +00001017 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
1018 return atmci_prepare_data(host, data);
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001019 if (data->blksz & 3)
Ludovic Desroches796211b2011-08-11 15:25:44 +00001020 return atmci_prepare_data(host, data);
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001021
1022 for_each_sg(data->sg, sg, data->sg_len, i) {
1023 if (sg->offset & 3 || sg->length & 3)
Ludovic Desroches796211b2011-08-11 15:25:44 +00001024 return atmci_prepare_data(host, data);
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001025 }
1026
1027 /* If we don't have a channel, we can't do DMA */
1028 chan = host->dma.chan;
Dan Williams6f49a572009-01-06 11:38:14 -07001029 if (chan)
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001030 host->data_chan = chan;
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001031
1032 if (!chan)
1033 return -ENODEV;
1034
Vinod Koule0d23ef2011-11-17 14:54:38 +05301035 if (data->flags & MMC_DATA_READ) {
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001036 direction = DMA_FROM_DEVICE;
Viresh Kumare2b35f32012-02-01 16:12:27 +05301037 host->dma_conf.direction = slave_dirn = DMA_DEV_TO_MEM;
Nicolas Ferre693e5e22012-06-06 12:19:44 +02001038 maxburst = atmci_convert_chksize(host->dma_conf.src_maxburst);
Vinod Koule0d23ef2011-11-17 14:54:38 +05301039 } else {
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001040 direction = DMA_TO_DEVICE;
Viresh Kumare2b35f32012-02-01 16:12:27 +05301041 host->dma_conf.direction = slave_dirn = DMA_MEM_TO_DEV;
Nicolas Ferre693e5e22012-06-06 12:19:44 +02001042 maxburst = atmci_convert_chksize(host->dma_conf.dst_maxburst);
Vinod Koule0d23ef2011-11-17 14:54:38 +05301043 }
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001044
Hein_Tiboschccdfe612012-08-30 16:34:38 +00001045 if (host->caps.has_dma_conf_reg)
1046 atmci_writel(host, ATMCI_DMA, ATMCI_DMA_CHKSIZE(maxburst) |
1047 ATMCI_DMAEN);
Nicolas Ferre693e5e22012-06-06 12:19:44 +02001048
Linus Walleij266ac3f2011-02-10 16:08:06 +01001049 sglen = dma_map_sg(chan->device->dev, data->sg,
Ludovic Desroches796211b2011-08-11 15:25:44 +00001050 data->sg_len, direction);
Linus Walleij88ce4db32011-02-10 16:08:16 +01001051
Viresh Kumare2b35f32012-02-01 16:12:27 +05301052 dmaengine_slave_config(chan, &host->dma_conf);
Alexandre Bounine16052822012-03-08 16:11:18 -05001053 desc = dmaengine_prep_slave_sg(chan,
Vinod Koule0d23ef2011-11-17 14:54:38 +05301054 data->sg, sglen, slave_dirn,
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001055 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1056 if (!desc)
Atsushi Nemoto657a77fa2009-09-08 17:53:05 -07001057 goto unmap_exit;
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001058
1059 host->dma.data_desc = desc;
1060 desc->callback = atmci_dma_complete;
1061 desc->callback_param = host;
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001062
Ludovic Desroches796211b2011-08-11 15:25:44 +00001063 return iflags;
Atsushi Nemoto657a77fa2009-09-08 17:53:05 -07001064unmap_exit:
Linus Walleij88ce4db32011-02-10 16:08:16 +01001065 dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction);
Atsushi Nemoto657a77fa2009-09-08 17:53:05 -07001066 return -ENOMEM;
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001067}
1068
Ludovic Desroches796211b2011-08-11 15:25:44 +00001069static void
1070atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
1071{
1072 return;
1073}
1074
1075/*
1076 * Start PDC according to transfer direction.
1077 */
1078static void
1079atmci_submit_data_pdc(struct atmel_mci *host, struct mmc_data *data)
1080{
1081 if (data->flags & MMC_DATA_READ)
1082 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
1083 else
1084 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
1085}
1086
1087static void
1088atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
Nicolas Ferre74791a22009-12-14 18:01:31 -08001089{
1090 struct dma_chan *chan = host->data_chan;
1091 struct dma_async_tx_descriptor *desc = host->dma.data_desc;
1092
1093 if (chan) {
Linus Walleij53289062011-02-10 16:08:26 +01001094 dmaengine_submit(desc);
1095 dma_async_issue_pending(chan);
Nicolas Ferre74791a22009-12-14 18:01:31 -08001096 }
1097}
1098
Ludovic Desroches796211b2011-08-11 15:25:44 +00001099static void atmci_stop_transfer(struct atmel_mci *host)
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001100{
Ludovic Desroches6801c412012-05-16 15:26:01 +02001101 dev_dbg(&host->pdev->dev,
1102 "(%s) set pending xfer complete\n", __func__);
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001103 atmci_set_pending(host, EVENT_XFER_COMPLETE);
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001104 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02001105}
1106
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001107/*
Masanari Iida7122bbb2012-08-05 23:25:40 +09001108 * Stop data transfer because error(s) occurred.
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001109 */
Ludovic Desroches796211b2011-08-11 15:25:44 +00001110static void atmci_stop_transfer_pdc(struct atmel_mci *host)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001111{
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001112 atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001113}
1114
Ludovic Desroches796211b2011-08-11 15:25:44 +00001115static void atmci_stop_transfer_dma(struct atmel_mci *host)
1116{
1117 struct dma_chan *chan = host->data_chan;
1118
1119 if (chan) {
1120 dmaengine_terminate_all(chan);
1121 atmci_dma_cleanup(host);
1122 } else {
1123 /* Data transfer was stopped by the interrupt handler */
Ludovic Desroches6801c412012-05-16 15:26:01 +02001124 dev_dbg(&host->pdev->dev,
1125 "(%s) set pending xfer complete\n", __func__);
Ludovic Desroches796211b2011-08-11 15:25:44 +00001126 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1127 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1128 }
1129}
1130
1131/*
1132 * Start a request: prepare data if needed, prepare the command and activate
1133 * interrupts.
1134 */
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001135static void atmci_start_request(struct atmel_mci *host,
1136 struct atmel_mci_slot *slot)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001137{
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001138 struct mmc_request *mrq;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001139 struct mmc_command *cmd;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001140 struct mmc_data *data;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001141 u32 iflags;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001142 u32 cmdflags;
1143
1144 mrq = slot->mrq;
1145 host->cur_slot = slot;
1146 host->mrq = mrq;
1147
1148 host->pending_events = 0;
1149 host->completed_events = 0;
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001150 host->cmd_status = 0;
Haavard Skinnemoenca55f462008-10-05 15:16:59 +02001151 host->data_status = 0;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001152
Ludovic Desroches6801c412012-05-16 15:26:01 +02001153 dev_dbg(&host->pdev->dev, "start request: cmd %u\n", mrq->cmd->opcode);
1154
Ludovic Desroches24011f32012-05-16 15:26:00 +02001155 if (host->need_reset || host->caps.need_reset_after_xfer) {
Ludovic Desroches18ee6842012-02-09 11:55:29 +01001156 iflags = atmci_readl(host, ATMCI_IMR);
1157 iflags &= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB);
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001158 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1159 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
1160 atmci_writel(host, ATMCI_MR, host->mode_reg);
Ludovic Desroches796211b2011-08-11 15:25:44 +00001161 if (host->caps.has_cfg_reg)
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001162 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
Ludovic Desroches18ee6842012-02-09 11:55:29 +01001163 atmci_writel(host, ATMCI_IER, iflags);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001164 host->need_reset = false;
1165 }
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001166 atmci_writel(host, ATMCI_SDCR, slot->sdc_reg);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001167
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001168 iflags = atmci_readl(host, ATMCI_IMR);
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001169 if (iflags & ~(ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001170 dev_dbg(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001171 iflags);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001172
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001173 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
1174 /* Send init sequence (74 clock cycles) */
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001175 atmci_writel(host, ATMCI_CMDR, ATMCI_CMDR_SPCMD_INIT);
1176 while (!(atmci_readl(host, ATMCI_SR) & ATMCI_CMDRDY))
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001177 cpu_relax();
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001178 }
Nicolas Ferre74791a22009-12-14 18:01:31 -08001179 iflags = 0;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001180 data = mrq->data;
1181 if (data) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001182 atmci_set_timeout(host, slot, data);
Haavard Skinnemoena252e3e2008-10-03 14:46:17 +02001183
1184 /* Must set block count/size before sending command */
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001185 atmci_writel(host, ATMCI_BLKR, ATMCI_BCNT(data->blocks)
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001186 | ATMCI_BLKLEN(data->blksz));
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001187 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001188 ATMCI_BCNT(data->blocks) | ATMCI_BLKLEN(data->blksz));
Nicolas Ferre74791a22009-12-14 18:01:31 -08001189
Ludovic Desroches796211b2011-08-11 15:25:44 +00001190 iflags |= host->prepare_data(host, data);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001191 }
1192
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001193 iflags |= ATMCI_CMDRDY;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001194 cmd = mrq->cmd;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001195 cmdflags = atmci_prepare_command(slot->mmc, cmd);
Ludovic Desroches66b512e2013-11-20 16:01:11 +01001196
1197 /*
1198 * DMA transfer should be started before sending the command to avoid
1199 * unexpected errors especially for read operations in SDIO mode.
1200 * Unfortunately, in PDC mode, command has to be sent before starting
1201 * the transfer.
1202 */
1203 if (host->submit_data != &atmci_submit_data_dma)
1204 atmci_send_command(host, cmd, cmdflags);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001205
1206 if (data)
Ludovic Desroches796211b2011-08-11 15:25:44 +00001207 host->submit_data(host, data);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001208
Ludovic Desroches66b512e2013-11-20 16:01:11 +01001209 if (host->submit_data == &atmci_submit_data_dma)
1210 atmci_send_command(host, cmd, cmdflags);
1211
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001212 if (mrq->stop) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001213 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001214 host->stop_cmdr |= ATMCI_CMDR_STOP_XFER;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001215 if (!(data->flags & MMC_DATA_WRITE))
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001216 host->stop_cmdr |= ATMCI_CMDR_TRDIR_READ;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001217 if (data->flags & MMC_DATA_STREAM)
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001218 host->stop_cmdr |= ATMCI_CMDR_STREAM;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001219 else
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001220 host->stop_cmdr |= ATMCI_CMDR_MULTI_BLOCK;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001221 }
1222
1223 /*
1224 * We could have enabled interrupts earlier, but I suspect
1225 * that would open up a nice can of interesting race
1226 * conditions (e.g. command and data complete, but stop not
1227 * prepared yet.)
1228 */
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001229 atmci_writel(host, ATMCI_IER, iflags);
Ludovic Desroches24011f32012-05-16 15:26:00 +02001230
1231 mod_timer(&host->timer, jiffies + msecs_to_jiffies(2000));
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001232}
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001233
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001234static void atmci_queue_request(struct atmel_mci *host,
1235 struct atmel_mci_slot *slot, struct mmc_request *mrq)
1236{
1237 dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
1238 host->state);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001239
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001240 spin_lock_bh(&host->lock);
1241 slot->mrq = mrq;
1242 if (host->state == STATE_IDLE) {
1243 host->state = STATE_SENDING_CMD;
1244 atmci_start_request(host, slot);
1245 } else {
Ludovic Desroches6801c412012-05-16 15:26:01 +02001246 dev_dbg(&host->pdev->dev, "queue request\n");
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001247 list_add_tail(&slot->queue_node, &host->queue);
1248 }
1249 spin_unlock_bh(&host->lock);
1250}
1251
1252static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1253{
1254 struct atmel_mci_slot *slot = mmc_priv(mmc);
1255 struct atmel_mci *host = slot->host;
1256 struct mmc_data *data;
1257
1258 WARN_ON(slot->mrq);
Ludovic Desroches6801c412012-05-16 15:26:01 +02001259 dev_dbg(&host->pdev->dev, "MRQ: cmd %u\n", mrq->cmd->opcode);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001260
Wenyou Yangae552ab2014-10-30 12:00:41 +08001261 pm_runtime_get_sync(&host->pdev->dev);
1262
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001263 /*
1264 * We may "know" the card is gone even though there's still an
1265 * electrical connection. If so, we really need to communicate
1266 * this to the MMC core since there won't be any more
1267 * interrupts as the card is completely removed. Otherwise,
1268 * the MMC core might believe the card is still there even
1269 * though the card was just removed very slowly.
1270 */
1271 if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
1272 mrq->cmd->error = -ENOMEDIUM;
1273 mmc_request_done(mmc, mrq);
1274 return;
1275 }
1276
1277 /* We don't support multiple blocks of weird lengths. */
1278 data = mrq->data;
1279 if (data && data->blocks > 1 && data->blksz & 3) {
1280 mrq->cmd->error = -EINVAL;
1281 mmc_request_done(mmc, mrq);
1282 }
1283
1284 atmci_queue_request(host, slot, mrq);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001285}
1286
1287static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1288{
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001289 struct atmel_mci_slot *slot = mmc_priv(mmc);
1290 struct atmel_mci *host = slot->host;
1291 unsigned int i;
Wenyou Yangae552ab2014-10-30 12:00:41 +08001292
1293 pm_runtime_get_sync(&host->pdev->dev);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001294
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001295 slot->sdc_reg &= ~ATMCI_SDCBUS_MASK;
Haavard Skinnemoen945533b2008-10-03 17:48:16 +02001296 switch (ios->bus_width) {
1297 case MMC_BUS_WIDTH_1:
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001298 slot->sdc_reg |= ATMCI_SDCBUS_1BIT;
Haavard Skinnemoen945533b2008-10-03 17:48:16 +02001299 break;
1300 case MMC_BUS_WIDTH_4:
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001301 slot->sdc_reg |= ATMCI_SDCBUS_4BIT;
Haavard Skinnemoen945533b2008-10-03 17:48:16 +02001302 break;
1303 }
1304
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001305 if (ios->clock) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001306 unsigned int clock_min = ~0U;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001307 u32 clkdiv;
1308
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001309 spin_lock_bh(&host->lock);
1310 if (!host->mode_reg) {
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001311 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1312 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
Ludovic Desroches796211b2011-08-11 15:25:44 +00001313 if (host->caps.has_cfg_reg)
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001314 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001315 }
Haavard Skinnemoen945533b2008-10-03 17:48:16 +02001316
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001317 /*
1318 * Use mirror of ios->clock to prevent race with mmc
1319 * core ios update when finding the minimum.
1320 */
1321 slot->clock = ios->clock;
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001322 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001323 if (host->slot[i] && host->slot[i]->clock
1324 && host->slot[i]->clock < clock_min)
1325 clock_min = host->slot[i]->clock;
1326 }
1327
1328 /* Calculate clock divider */
Ludovic Desrochesfaf81802012-03-21 16:41:23 +01001329 if (host->caps.has_odd_clk_div) {
1330 clkdiv = DIV_ROUND_UP(host->bus_hz, clock_min) - 2;
1331 if (clkdiv > 511) {
1332 dev_warn(&mmc->class_dev,
1333 "clock %u too slow; using %lu\n",
1334 clock_min, host->bus_hz / (511 + 2));
1335 clkdiv = 511;
1336 }
1337 host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1)
1338 | ATMCI_MR_CLKODD(clkdiv & 1);
1339 } else {
1340 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
1341 if (clkdiv > 255) {
1342 dev_warn(&mmc->class_dev,
1343 "clock %u too slow; using %lu\n",
1344 clock_min, host->bus_hz / (2 * 256));
1345 clkdiv = 255;
1346 }
1347 host->mode_reg = ATMCI_MR_CLKDIV(clkdiv);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001348 }
1349
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001350 /*
1351 * WRPROOF and RDPROOF prevent overruns/underruns by
1352 * stopping the clock when the FIFO is full/empty.
1353 * This state is not expected to last for long.
1354 */
Ludovic Desroches796211b2011-08-11 15:25:44 +00001355 if (host->caps.has_rwproof)
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001356 host->mode_reg |= (ATMCI_MR_WRPROOF | ATMCI_MR_RDPROOF);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001357
Ludovic Desroches796211b2011-08-11 15:25:44 +00001358 if (host->caps.has_cfg_reg) {
Nicolas Ferre99ddffd2010-05-26 14:41:59 -07001359 /* setup High Speed mode in relation with card capacity */
1360 if (ios->timing == MMC_TIMING_SD_HS)
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001361 host->cfg_reg |= ATMCI_CFG_HSMODE;
Nicolas Ferre99ddffd2010-05-26 14:41:59 -07001362 else
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001363 host->cfg_reg &= ~ATMCI_CFG_HSMODE;
Nicolas Ferre99ddffd2010-05-26 14:41:59 -07001364 }
1365
1366 if (list_empty(&host->queue)) {
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001367 atmci_writel(host, ATMCI_MR, host->mode_reg);
Ludovic Desroches796211b2011-08-11 15:25:44 +00001368 if (host->caps.has_cfg_reg)
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001369 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
Nicolas Ferre99ddffd2010-05-26 14:41:59 -07001370 } else {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001371 host->need_clock_update = true;
Nicolas Ferre99ddffd2010-05-26 14:41:59 -07001372 }
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001373
1374 spin_unlock_bh(&host->lock);
Haavard Skinnemoen945533b2008-10-03 17:48:16 +02001375 } else {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001376 bool any_slot_active = false;
1377
1378 spin_lock_bh(&host->lock);
1379 slot->clock = 0;
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001380 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001381 if (host->slot[i] && host->slot[i]->clock) {
1382 any_slot_active = true;
1383 break;
1384 }
Haavard Skinnemoen945533b2008-10-03 17:48:16 +02001385 }
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001386 if (!any_slot_active) {
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001387 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001388 if (host->mode_reg) {
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001389 atmci_readl(host, ATMCI_MR);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001390 }
1391 host->mode_reg = 0;
1392 }
1393 spin_unlock_bh(&host->lock);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001394 }
1395
1396 switch (ios->power_mode) {
Alexandre Belloni9e7861f2013-10-17 12:46:48 +02001397 case MMC_POWER_OFF:
1398 if (!IS_ERR(mmc->supply.vmmc))
1399 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
1400 break;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001401 case MMC_POWER_UP:
1402 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
Alexandre Belloni9e7861f2013-10-17 12:46:48 +02001403 if (!IS_ERR(mmc->supply.vmmc))
1404 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001405 break;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001406 default:
1407 /*
1408 * TODO: None of the currently available AVR32-based
1409 * boards allow MMC power to be turned off. Implement
1410 * power control when this can be tested properly.
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001411 *
1412 * We also need to hook this into the clock management
1413 * somehow so that newly inserted cards aren't
1414 * subjected to a fast clock before we have a chance
1415 * to figure out what the maximum rate is. Currently,
1416 * there's no way to avoid this, and there never will
1417 * be for boards that don't support power control.
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001418 */
1419 break;
1420 }
Wenyou Yangae552ab2014-10-30 12:00:41 +08001421
1422 pm_runtime_mark_last_busy(&host->pdev->dev);
1423 pm_runtime_put_autosuspend(&host->pdev->dev);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001424}
1425
1426static int atmci_get_ro(struct mmc_host *mmc)
1427{
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001428 int read_only = -ENOSYS;
1429 struct atmel_mci_slot *slot = mmc_priv(mmc);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001430
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001431 if (gpio_is_valid(slot->wp_pin)) {
1432 read_only = gpio_get_value(slot->wp_pin);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001433 dev_dbg(&mmc->class_dev, "card is %s\n",
1434 read_only ? "read-only" : "read-write");
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001435 }
1436
1437 return read_only;
1438}
1439
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001440static int atmci_get_cd(struct mmc_host *mmc)
1441{
1442 int present = -ENOSYS;
1443 struct atmel_mci_slot *slot = mmc_priv(mmc);
1444
1445 if (gpio_is_valid(slot->detect_pin)) {
Jonas Larsson1c1452b2009-03-31 11:16:48 +02001446 present = !(gpio_get_value(slot->detect_pin) ^
1447 slot->detect_is_active_high);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001448 dev_dbg(&mmc->class_dev, "card is %spresent\n",
1449 present ? "" : "not ");
1450 }
1451
1452 return present;
1453}
1454
Anders Grahn88ff82e2010-05-26 14:42:01 -07001455static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1456{
1457 struct atmel_mci_slot *slot = mmc_priv(mmc);
1458 struct atmel_mci *host = slot->host;
1459
1460 if (enable)
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001461 atmci_writel(host, ATMCI_IER, slot->sdio_irq);
Anders Grahn88ff82e2010-05-26 14:42:01 -07001462 else
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001463 atmci_writel(host, ATMCI_IDR, slot->sdio_irq);
Anders Grahn88ff82e2010-05-26 14:42:01 -07001464}
1465
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001466static const struct mmc_host_ops atmci_ops = {
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001467 .request = atmci_request,
1468 .set_ios = atmci_set_ios,
1469 .get_ro = atmci_get_ro,
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001470 .get_cd = atmci_get_cd,
Anders Grahn88ff82e2010-05-26 14:42:01 -07001471 .enable_sdio_irq = atmci_enable_sdio_irq,
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001472};
1473
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001474/* Called with host->lock held */
1475static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
1476 __releases(&host->lock)
1477 __acquires(&host->lock)
1478{
1479 struct atmel_mci_slot *slot = NULL;
1480 struct mmc_host *prev_mmc = host->cur_slot->mmc;
1481
1482 WARN_ON(host->cmd || host->data);
1483
1484 /*
1485 * Update the MMC clock rate if necessary. This may be
1486 * necessary if set_ios() is called when a different slot is
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001487 * busy transferring data.
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001488 */
Nicolas Ferre99ddffd2010-05-26 14:41:59 -07001489 if (host->need_clock_update) {
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001490 atmci_writel(host, ATMCI_MR, host->mode_reg);
Ludovic Desroches796211b2011-08-11 15:25:44 +00001491 if (host->caps.has_cfg_reg)
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001492 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
Nicolas Ferre99ddffd2010-05-26 14:41:59 -07001493 }
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001494
1495 host->cur_slot->mrq = NULL;
1496 host->mrq = NULL;
1497 if (!list_empty(&host->queue)) {
1498 slot = list_entry(host->queue.next,
1499 struct atmel_mci_slot, queue_node);
1500 list_del(&slot->queue_node);
1501 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
1502 mmc_hostname(slot->mmc));
1503 host->state = STATE_SENDING_CMD;
1504 atmci_start_request(host, slot);
1505 } else {
1506 dev_vdbg(&host->pdev->dev, "list empty\n");
1507 host->state = STATE_IDLE;
1508 }
1509
Ludovic Desroches24011f32012-05-16 15:26:00 +02001510 del_timer(&host->timer);
1511
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001512 spin_unlock(&host->lock);
1513 mmc_request_done(prev_mmc, mrq);
1514 spin_lock(&host->lock);
Wenyou Yangae552ab2014-10-30 12:00:41 +08001515
1516 pm_runtime_mark_last_busy(&host->pdev->dev);
1517 pm_runtime_put_autosuspend(&host->pdev->dev);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001518}
1519
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001520static void atmci_command_complete(struct atmel_mci *host,
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001521 struct mmc_command *cmd)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001522{
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001523 u32 status = host->cmd_status;
1524
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001525 /* Read the response from the card (up to 16 bytes) */
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001526 cmd->resp[0] = atmci_readl(host, ATMCI_RSPR);
1527 cmd->resp[1] = atmci_readl(host, ATMCI_RSPR);
1528 cmd->resp[2] = atmci_readl(host, ATMCI_RSPR);
1529 cmd->resp[3] = atmci_readl(host, ATMCI_RSPR);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001530
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001531 if (status & ATMCI_RTOE)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001532 cmd->error = -ETIMEDOUT;
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001533 else if ((cmd->flags & MMC_RSP_CRC) && (status & ATMCI_RCRCE))
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001534 cmd->error = -EILSEQ;
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001535 else if (status & (ATMCI_RINDE | ATMCI_RDIRE | ATMCI_RENDE))
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001536 cmd->error = -EIO;
Ludovic Desroches24011f32012-05-16 15:26:00 +02001537 else if (host->mrq->data && (host->mrq->data->blksz & 3)) {
1538 if (host->caps.need_blksz_mul_4) {
1539 cmd->error = -EINVAL;
1540 host->need_reset = 1;
1541 }
1542 } else
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001543 cmd->error = 0;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001544}
1545
1546static void atmci_detect_change(unsigned long data)
1547{
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001548 struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data;
1549 bool present;
1550 bool present_old;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001551
1552 /*
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001553 * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1554 * freeing the interrupt. We must not re-enable the interrupt
1555 * if it has been freed, and if we're shutting down, it
1556 * doesn't really matter whether the card is present or not.
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001557 */
1558 smp_rmb();
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001559 if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001560 return;
1561
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001562 enable_irq(gpio_to_irq(slot->detect_pin));
Jonas Larsson1c1452b2009-03-31 11:16:48 +02001563 present = !(gpio_get_value(slot->detect_pin) ^
1564 slot->detect_is_active_high);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001565 present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001566
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001567 dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1568 present, present_old);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001569
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001570 if (present != present_old) {
1571 struct atmel_mci *host = slot->host;
1572 struct mmc_request *mrq;
1573
1574 dev_dbg(&slot->mmc->class_dev, "card %s\n",
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001575 present ? "inserted" : "removed");
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001576
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001577 spin_lock(&host->lock);
1578
1579 if (!present)
1580 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1581 else
1582 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001583
1584 /* Clean up queue if present */
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001585 mrq = slot->mrq;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001586 if (mrq) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001587 if (mrq == host->mrq) {
1588 /*
1589 * Reset controller to terminate any ongoing
1590 * commands or data transfers.
1591 */
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001592 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
1593 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
1594 atmci_writel(host, ATMCI_MR, host->mode_reg);
Ludovic Desroches796211b2011-08-11 15:25:44 +00001595 if (host->caps.has_cfg_reg)
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001596 atmci_writel(host, ATMCI_CFG, host->cfg_reg);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001597
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001598 host->data = NULL;
1599 host->cmd = NULL;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001600
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001601 switch (host->state) {
1602 case STATE_IDLE:
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001603 break;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001604 case STATE_SENDING_CMD:
1605 mrq->cmd->error = -ENOMEDIUM;
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001606 if (mrq->data)
1607 host->stop_transfer(host);
1608 break;
1609 case STATE_DATA_XFER:
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001610 mrq->data->error = -ENOMEDIUM;
Ludovic Desroches796211b2011-08-11 15:25:44 +00001611 host->stop_transfer(host);
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001612 break;
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001613 case STATE_WAITING_NOTBUSY:
1614 mrq->data->error = -ENOMEDIUM;
1615 break;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001616 case STATE_SENDING_STOP:
1617 mrq->stop->error = -ENOMEDIUM;
1618 break;
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001619 case STATE_END_REQUEST:
1620 break;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001621 }
1622
1623 atmci_request_end(host, mrq);
1624 } else {
1625 list_del(&slot->queue_node);
1626 mrq->cmd->error = -ENOMEDIUM;
1627 if (mrq->data)
1628 mrq->data->error = -ENOMEDIUM;
1629 if (mrq->stop)
1630 mrq->stop->error = -ENOMEDIUM;
1631
1632 spin_unlock(&host->lock);
1633 mmc_request_done(slot->mmc, mrq);
1634 spin_lock(&host->lock);
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001635 }
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001636 }
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001637 spin_unlock(&host->lock);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001638
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001639 mmc_detect_change(slot->mmc, 0);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001640 }
1641}
1642
1643static void atmci_tasklet_func(unsigned long priv)
1644{
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001645 struct atmel_mci *host = (struct atmel_mci *)priv;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001646 struct mmc_request *mrq = host->mrq;
1647 struct mmc_data *data = host->data;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001648 enum atmel_mci_state state = host->state;
1649 enum atmel_mci_state prev_state;
1650 u32 status;
1651
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001652 spin_lock(&host->lock);
1653
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001654 state = host->state;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001655
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001656 dev_vdbg(&host->pdev->dev,
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001657 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1658 state, host->pending_events, host->completed_events,
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001659 atmci_readl(host, ATMCI_IMR));
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001660
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001661 do {
1662 prev_state = state;
Ludovic Desroches6801c412012-05-16 15:26:01 +02001663 dev_dbg(&host->pdev->dev, "FSM: state=%d\n", state);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001664
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001665 switch (state) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001666 case STATE_IDLE:
1667 break;
1668
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001669 case STATE_SENDING_CMD:
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001670 /*
1671 * Command has been sent, we are waiting for command
1672 * ready. Then we have three next states possible:
1673 * END_REQUEST by default, WAITING_NOTBUSY if it's a
1674 * command needing it or DATA_XFER if there is data.
1675 */
Ludovic Desroches6801c412012-05-16 15:26:01 +02001676 dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n");
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001677 if (!atmci_test_and_clear_pending(host,
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001678 EVENT_CMD_RDY))
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001679 break;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001680
Ludovic Desroches6801c412012-05-16 15:26:01 +02001681 dev_dbg(&host->pdev->dev, "set completed cmd ready\n");
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001682 host->cmd = NULL;
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001683 atmci_set_completed(host, EVENT_CMD_RDY);
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001684 atmci_command_complete(host, mrq->cmd);
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001685 if (mrq->data) {
Ludovic Desroches6801c412012-05-16 15:26:01 +02001686 dev_dbg(&host->pdev->dev,
1687 "command with data transfer");
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001688 /*
1689 * If there is a command error don't start
1690 * data transfer.
1691 */
1692 if (mrq->cmd->error) {
1693 host->stop_transfer(host);
1694 host->data = NULL;
1695 atmci_writel(host, ATMCI_IDR,
1696 ATMCI_TXRDY | ATMCI_RXRDY
1697 | ATMCI_DATA_ERROR_FLAGS);
1698 state = STATE_END_REQUEST;
1699 } else
1700 state = STATE_DATA_XFER;
1701 } else if ((!mrq->data) && (mrq->cmd->flags & MMC_RSP_BUSY)) {
Ludovic Desroches6801c412012-05-16 15:26:01 +02001702 dev_dbg(&host->pdev->dev,
1703 "command response need waiting notbusy");
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001704 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1705 state = STATE_WAITING_NOTBUSY;
1706 } else
1707 state = STATE_END_REQUEST;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001708
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001709 break;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001710
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001711 case STATE_DATA_XFER:
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001712 if (atmci_test_and_clear_pending(host,
1713 EVENT_DATA_ERROR)) {
Ludovic Desroches6801c412012-05-16 15:26:01 +02001714 dev_dbg(&host->pdev->dev, "set completed data error\n");
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001715 atmci_set_completed(host, EVENT_DATA_ERROR);
1716 state = STATE_END_REQUEST;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001717 break;
1718 }
1719
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001720 /*
1721 * A data transfer is in progress. The event expected
1722 * to move to the next state depends of data transfer
1723 * type (PDC or DMA). Once transfer done we can move
1724 * to the next step which is WAITING_NOTBUSY in write
1725 * case and directly SENDING_STOP in read case.
1726 */
Ludovic Desroches6801c412012-05-16 15:26:01 +02001727 dev_dbg(&host->pdev->dev, "FSM: xfer complete?\n");
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001728 if (!atmci_test_and_clear_pending(host,
1729 EVENT_XFER_COMPLETE))
1730 break;
1731
Ludovic Desroches6801c412012-05-16 15:26:01 +02001732 dev_dbg(&host->pdev->dev,
1733 "(%s) set completed xfer complete\n",
1734 __func__);
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001735 atmci_set_completed(host, EVENT_XFER_COMPLETE);
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001736
Ludovic Desroches077d4072012-07-24 11:42:04 +02001737 if (host->caps.need_notbusy_for_read_ops ||
1738 (host->data->flags & MMC_DATA_WRITE)) {
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001739 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1740 state = STATE_WAITING_NOTBUSY;
1741 } else if (host->mrq->stop) {
1742 atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY);
1743 atmci_send_stop_cmd(host, data);
1744 state = STATE_SENDING_STOP;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001745 } else {
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001746 host->data = NULL;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001747 data->bytes_xfered = data->blocks * data->blksz;
1748 data->error = 0;
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001749 state = STATE_END_REQUEST;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001750 }
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001751 break;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001752
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001753 case STATE_WAITING_NOTBUSY:
1754 /*
1755 * We can be in the state for two reasons: a command
1756 * requiring waiting not busy signal (stop command
1757 * included) or a write operation. In the latest case,
1758 * we need to send a stop command.
1759 */
Ludovic Desroches6801c412012-05-16 15:26:01 +02001760 dev_dbg(&host->pdev->dev, "FSM: not busy?\n");
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001761 if (!atmci_test_and_clear_pending(host,
1762 EVENT_NOTBUSY))
1763 break;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001764
Ludovic Desroches6801c412012-05-16 15:26:01 +02001765 dev_dbg(&host->pdev->dev, "set completed not busy\n");
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001766 atmci_set_completed(host, EVENT_NOTBUSY);
1767
1768 if (host->data) {
1769 /*
1770 * For some commands such as CMD53, even if
1771 * there is data transfer, there is no stop
1772 * command to send.
1773 */
1774 if (host->mrq->stop) {
1775 atmci_writel(host, ATMCI_IER,
1776 ATMCI_CMDRDY);
1777 atmci_send_stop_cmd(host, data);
1778 state = STATE_SENDING_STOP;
1779 } else {
1780 host->data = NULL;
1781 data->bytes_xfered = data->blocks
1782 * data->blksz;
1783 data->error = 0;
1784 state = STATE_END_REQUEST;
1785 }
1786 } else
1787 state = STATE_END_REQUEST;
1788 break;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001789
1790 case STATE_SENDING_STOP:
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001791 /*
1792 * In this state, it is important to set host->data to
1793 * NULL (which is tested in the waiting notbusy state)
1794 * in order to go to the end request state instead of
1795 * sending stop again.
1796 */
Ludovic Desroches6801c412012-05-16 15:26:01 +02001797 dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n");
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001798 if (!atmci_test_and_clear_pending(host,
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001799 EVENT_CMD_RDY))
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001800 break;
1801
Ludovic Desroches6801c412012-05-16 15:26:01 +02001802 dev_dbg(&host->pdev->dev, "FSM: cmd ready\n");
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001803 host->cmd = NULL;
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001804 data->bytes_xfered = data->blocks * data->blksz;
1805 data->error = 0;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001806 atmci_command_complete(host, mrq->stop);
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001807 if (mrq->stop->error) {
1808 host->stop_transfer(host);
1809 atmci_writel(host, ATMCI_IDR,
1810 ATMCI_TXRDY | ATMCI_RXRDY
1811 | ATMCI_DATA_ERROR_FLAGS);
1812 state = STATE_END_REQUEST;
1813 } else {
1814 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
1815 state = STATE_WAITING_NOTBUSY;
1816 }
Nicolas Ferre41b4e9a2012-07-06 11:58:33 +02001817 host->data = NULL;
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001818 break;
1819
1820 case STATE_END_REQUEST:
1821 atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY | ATMCI_RXRDY
1822 | ATMCI_DATA_ERROR_FLAGS);
1823 status = host->data_status;
1824 if (unlikely(status)) {
1825 host->stop_transfer(host);
1826 host->data = NULL;
Rodolfo Giomettifbd986c2013-09-09 17:31:59 +02001827 if (data) {
1828 if (status & ATMCI_DTOE) {
1829 data->error = -ETIMEDOUT;
1830 } else if (status & ATMCI_DCRCE) {
1831 data->error = -EILSEQ;
1832 } else {
1833 data->error = -EIO;
1834 }
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001835 }
1836 }
1837
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001838 atmci_request_end(host, host->mrq);
Ludovic Desrochesf5177542012-05-16 15:25:59 +02001839 state = STATE_IDLE;
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001840 break;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001841 }
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001842 } while (state != prev_state);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001843
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001844 host->state = state;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001845
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001846 spin_unlock(&host->lock);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001847}
1848
1849static void atmci_read_data_pio(struct atmel_mci *host)
1850{
1851 struct scatterlist *sg = host->sg;
1852 void *buf = sg_virt(sg);
1853 unsigned int offset = host->pio_offset;
1854 struct mmc_data *data = host->data;
1855 u32 value;
1856 u32 status;
1857 unsigned int nbytes = 0;
1858
1859 do {
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001860 value = atmci_readl(host, ATMCI_RDR);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001861 if (likely(offset + 4 <= sg->length)) {
1862 put_unaligned(value, (u32 *)(buf + offset));
1863
1864 offset += 4;
1865 nbytes += 4;
1866
1867 if (offset == sg->length) {
Haavard Skinnemoen5e7184a2008-10-05 15:27:50 +02001868 flush_dcache_page(sg_page(sg));
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001869 host->sg = sg = sg_next(sg);
Terry Barnabybdbc5d02013-04-08 12:05:47 -04001870 host->sg_len--;
1871 if (!sg || !host->sg_len)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001872 goto done;
1873
1874 offset = 0;
1875 buf = sg_virt(sg);
1876 }
1877 } else {
1878 unsigned int remaining = sg->length - offset;
1879 memcpy(buf + offset, &value, remaining);
1880 nbytes += remaining;
1881
1882 flush_dcache_page(sg_page(sg));
1883 host->sg = sg = sg_next(sg);
Terry Barnabybdbc5d02013-04-08 12:05:47 -04001884 host->sg_len--;
1885 if (!sg || !host->sg_len)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001886 goto done;
1887
1888 offset = 4 - remaining;
1889 buf = sg_virt(sg);
1890 memcpy(buf, (u8 *)&value + remaining, offset);
1891 nbytes += offset;
1892 }
1893
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001894 status = atmci_readl(host, ATMCI_SR);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001895 if (status & ATMCI_DATA_ERROR_FLAGS) {
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001896 atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_RXRDY
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001897 | ATMCI_DATA_ERROR_FLAGS));
1898 host->data_status = status;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001899 data->bytes_xfered += nbytes;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001900 return;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001901 }
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001902 } while (status & ATMCI_RXRDY);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001903
1904 host->pio_offset = offset;
1905 data->bytes_xfered += nbytes;
1906
1907 return;
1908
1909done:
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001910 atmci_writel(host, ATMCI_IDR, ATMCI_RXRDY);
1911 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001912 data->bytes_xfered += nbytes;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001913 smp_wmb();
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001914 atmci_set_pending(host, EVENT_XFER_COMPLETE);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001915}
1916
1917static void atmci_write_data_pio(struct atmel_mci *host)
1918{
1919 struct scatterlist *sg = host->sg;
1920 void *buf = sg_virt(sg);
1921 unsigned int offset = host->pio_offset;
1922 struct mmc_data *data = host->data;
1923 u32 value;
1924 u32 status;
1925 unsigned int nbytes = 0;
1926
1927 do {
1928 if (likely(offset + 4 <= sg->length)) {
1929 value = get_unaligned((u32 *)(buf + offset));
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001930 atmci_writel(host, ATMCI_TDR, value);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001931
1932 offset += 4;
1933 nbytes += 4;
1934 if (offset == sg->length) {
1935 host->sg = sg = sg_next(sg);
Terry Barnabybdbc5d02013-04-08 12:05:47 -04001936 host->sg_len--;
1937 if (!sg || !host->sg_len)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001938 goto done;
1939
1940 offset = 0;
1941 buf = sg_virt(sg);
1942 }
1943 } else {
1944 unsigned int remaining = sg->length - offset;
1945
1946 value = 0;
1947 memcpy(&value, buf + offset, remaining);
1948 nbytes += remaining;
1949
1950 host->sg = sg = sg_next(sg);
Terry Barnabybdbc5d02013-04-08 12:05:47 -04001951 host->sg_len--;
1952 if (!sg || !host->sg_len) {
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001953 atmci_writel(host, ATMCI_TDR, value);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001954 goto done;
1955 }
1956
1957 offset = 4 - remaining;
1958 buf = sg_virt(sg);
1959 memcpy((u8 *)&value + remaining, buf, offset);
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001960 atmci_writel(host, ATMCI_TDR, value);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001961 nbytes += offset;
1962 }
1963
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001964 status = atmci_readl(host, ATMCI_SR);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001965 if (status & ATMCI_DATA_ERROR_FLAGS) {
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001966 atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_TXRDY
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001967 | ATMCI_DATA_ERROR_FLAGS));
1968 host->data_status = status;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001969 data->bytes_xfered += nbytes;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001970 return;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001971 }
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001972 } while (status & ATMCI_TXRDY);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001973
1974 host->pio_offset = offset;
1975 data->bytes_xfered += nbytes;
1976
1977 return;
1978
1979done:
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00001980 atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY);
1981 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001982 data->bytes_xfered += nbytes;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02001983 smp_wmb();
Haavard Skinnemoenc06ad252008-07-31 14:49:16 +02001984 atmci_set_pending(host, EVENT_XFER_COMPLETE);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02001985}
1986
Anders Grahn88ff82e2010-05-26 14:42:01 -07001987static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status)
1988{
1989 int i;
1990
Ludovic Desroches2c96a292011-08-11 15:25:41 +00001991 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
Anders Grahn88ff82e2010-05-26 14:42:01 -07001992 struct atmel_mci_slot *slot = host->slot[i];
1993 if (slot && (status & slot->sdio_irq)) {
1994 mmc_signal_sdio_irq(slot->mmc);
1995 }
1996 }
1997}
1998
1999
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002000static irqreturn_t atmci_interrupt(int irq, void *dev_id)
2001{
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002002 struct atmel_mci *host = dev_id;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002003 u32 status, mask, pending;
2004 unsigned int pass_count = 0;
2005
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002006 do {
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00002007 status = atmci_readl(host, ATMCI_SR);
2008 mask = atmci_readl(host, ATMCI_IMR);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002009 pending = status & mask;
2010 if (!pending)
2011 break;
2012
2013 if (pending & ATMCI_DATA_ERROR_FLAGS) {
Ludovic Desroches6801c412012-05-16 15:26:01 +02002014 dev_dbg(&host->pdev->dev, "IRQ: data error\n");
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00002015 atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS
Ludovic Desrochesf5177542012-05-16 15:25:59 +02002016 | ATMCI_RXRDY | ATMCI_TXRDY
2017 | ATMCI_ENDRX | ATMCI_ENDTX
2018 | ATMCI_RXBUFF | ATMCI_TXBUFE);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002019
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002020 host->data_status = status;
Ludovic Desroches6801c412012-05-16 15:26:01 +02002021 dev_dbg(&host->pdev->dev, "set pending data error\n");
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002022 smp_wmb();
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002023 atmci_set_pending(host, EVENT_DATA_ERROR);
2024 tasklet_schedule(&host->tasklet);
2025 }
Ludovic Desroches796211b2011-08-11 15:25:44 +00002026
Ludovic Desroches796211b2011-08-11 15:25:44 +00002027 if (pending & ATMCI_TXBUFE) {
Ludovic Desroches6801c412012-05-16 15:26:01 +02002028 dev_dbg(&host->pdev->dev, "IRQ: tx buffer empty\n");
Ludovic Desroches796211b2011-08-11 15:25:44 +00002029 atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE);
Ludovic Desroches7e8ba222011-08-11 15:25:48 +00002030 atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
Ludovic Desroches796211b2011-08-11 15:25:44 +00002031 /*
2032 * We can receive this interruption before having configured
2033 * the second pdc buffer, so we need to reconfigure first and
2034 * second buffers again
2035 */
2036 if (host->data_size) {
2037 atmci_pdc_set_both_buf(host, XFER_TRANSMIT);
Ludovic Desroches7e8ba222011-08-11 15:25:48 +00002038 atmci_writel(host, ATMCI_IER, ATMCI_ENDTX);
Ludovic Desroches796211b2011-08-11 15:25:44 +00002039 atmci_writel(host, ATMCI_IER, ATMCI_TXBUFE);
2040 } else {
2041 atmci_pdc_complete(host);
2042 }
Ludovic Desroches7e8ba222011-08-11 15:25:48 +00002043 } else if (pending & ATMCI_ENDTX) {
Ludovic Desroches6801c412012-05-16 15:26:01 +02002044 dev_dbg(&host->pdev->dev, "IRQ: end of tx buffer\n");
Ludovic Desroches7e8ba222011-08-11 15:25:48 +00002045 atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX);
2046
2047 if (host->data_size) {
2048 atmci_pdc_set_single_buf(host,
2049 XFER_TRANSMIT, PDC_SECOND_BUF);
2050 atmci_writel(host, ATMCI_IER, ATMCI_ENDTX);
2051 }
Ludovic Desroches796211b2011-08-11 15:25:44 +00002052 }
2053
Ludovic Desroches7e8ba222011-08-11 15:25:48 +00002054 if (pending & ATMCI_RXBUFF) {
Ludovic Desroches6801c412012-05-16 15:26:01 +02002055 dev_dbg(&host->pdev->dev, "IRQ: rx buffer full\n");
Ludovic Desroches7e8ba222011-08-11 15:25:48 +00002056 atmci_writel(host, ATMCI_IDR, ATMCI_RXBUFF);
2057 atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);
2058 /*
2059 * We can receive this interruption before having configured
2060 * the second pdc buffer, so we need to reconfigure first and
2061 * second buffers again
2062 */
2063 if (host->data_size) {
2064 atmci_pdc_set_both_buf(host, XFER_RECEIVE);
2065 atmci_writel(host, ATMCI_IER, ATMCI_ENDRX);
2066 atmci_writel(host, ATMCI_IER, ATMCI_RXBUFF);
2067 } else {
2068 atmci_pdc_complete(host);
2069 }
2070 } else if (pending & ATMCI_ENDRX) {
Ludovic Desroches6801c412012-05-16 15:26:01 +02002071 dev_dbg(&host->pdev->dev, "IRQ: end of rx buffer\n");
Ludovic Desroches796211b2011-08-11 15:25:44 +00002072 atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX);
2073
2074 if (host->data_size) {
2075 atmci_pdc_set_single_buf(host,
2076 XFER_RECEIVE, PDC_SECOND_BUF);
2077 atmci_writel(host, ATMCI_IER, ATMCI_ENDRX);
2078 }
2079 }
2080
Ludovic Desrochesf5177542012-05-16 15:25:59 +02002081 /*
2082 * First mci IPs, so mainly the ones having pdc, have some
2083 * issues with the notbusy signal. You can't get it after
2084 * data transmission if you have not sent a stop command.
2085 * The appropriate workaround is to use the BLKE signal.
2086 */
2087 if (pending & ATMCI_BLKE) {
Ludovic Desroches6801c412012-05-16 15:26:01 +02002088 dev_dbg(&host->pdev->dev, "IRQ: blke\n");
Ludovic Desrochesf5177542012-05-16 15:25:59 +02002089 atmci_writel(host, ATMCI_IDR, ATMCI_BLKE);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002090 smp_wmb();
Ludovic Desroches6801c412012-05-16 15:26:01 +02002091 dev_dbg(&host->pdev->dev, "set pending notbusy\n");
Ludovic Desrochesf5177542012-05-16 15:25:59 +02002092 atmci_set_pending(host, EVENT_NOTBUSY);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002093 tasklet_schedule(&host->tasklet);
2094 }
Ludovic Desrochesf5177542012-05-16 15:25:59 +02002095
2096 if (pending & ATMCI_NOTBUSY) {
Ludovic Desroches6801c412012-05-16 15:26:01 +02002097 dev_dbg(&host->pdev->dev, "IRQ: not_busy\n");
Ludovic Desrochesf5177542012-05-16 15:25:59 +02002098 atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY);
2099 smp_wmb();
Ludovic Desroches6801c412012-05-16 15:26:01 +02002100 dev_dbg(&host->pdev->dev, "set pending notbusy\n");
Ludovic Desrochesf5177542012-05-16 15:25:59 +02002101 atmci_set_pending(host, EVENT_NOTBUSY);
2102 tasklet_schedule(&host->tasklet);
2103 }
2104
Ludovic Desroches2c96a292011-08-11 15:25:41 +00002105 if (pending & ATMCI_RXRDY)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002106 atmci_read_data_pio(host);
Ludovic Desroches2c96a292011-08-11 15:25:41 +00002107 if (pending & ATMCI_TXRDY)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002108 atmci_write_data_pio(host);
2109
Ludovic Desrochesf5177542012-05-16 15:25:59 +02002110 if (pending & ATMCI_CMDRDY) {
Ludovic Desroches6801c412012-05-16 15:26:01 +02002111 dev_dbg(&host->pdev->dev, "IRQ: cmd ready\n");
Ludovic Desrochesf5177542012-05-16 15:25:59 +02002112 atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY);
2113 host->cmd_status = status;
2114 smp_wmb();
Ludovic Desroches6801c412012-05-16 15:26:01 +02002115 dev_dbg(&host->pdev->dev, "set pending cmd rdy\n");
Ludovic Desrochesf5177542012-05-16 15:25:59 +02002116 atmci_set_pending(host, EVENT_CMD_RDY);
2117 tasklet_schedule(&host->tasklet);
2118 }
Anders Grahn88ff82e2010-05-26 14:42:01 -07002119
Ludovic Desroches2c96a292011-08-11 15:25:41 +00002120 if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB))
Anders Grahn88ff82e2010-05-26 14:42:01 -07002121 atmci_sdio_interrupt(host, status);
2122
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002123 } while (pass_count++ < 5);
2124
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002125 return pass_count ? IRQ_HANDLED : IRQ_NONE;
2126}
2127
2128static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
2129{
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002130 struct atmel_mci_slot *slot = dev_id;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002131
2132 /*
2133 * Disable interrupts until the pin has stabilized and check
2134 * the state then. Use mod_timer() since we may be in the
2135 * middle of the timer routine when this interrupt triggers.
2136 */
2137 disable_irq_nosync(irq);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002138 mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002139
2140 return IRQ_HANDLED;
2141}
2142
ludovic.desroches@atmel.comab050b92014-12-01 15:35:07 +01002143static int atmci_init_slot(struct atmel_mci *host,
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002144 struct mci_slot_pdata *slot_data, unsigned int id,
Anders Grahn88ff82e2010-05-26 14:42:01 -07002145 u32 sdc_reg, u32 sdio_irq)
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002146{
2147 struct mmc_host *mmc;
2148 struct atmel_mci_slot *slot;
2149
2150 mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
2151 if (!mmc)
2152 return -ENOMEM;
2153
2154 slot = mmc_priv(mmc);
2155 slot->mmc = mmc;
2156 slot->host = host;
2157 slot->detect_pin = slot_data->detect_pin;
2158 slot->wp_pin = slot_data->wp_pin;
Jonas Larsson1c1452b2009-03-31 11:16:48 +02002159 slot->detect_is_active_high = slot_data->detect_is_active_high;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002160 slot->sdc_reg = sdc_reg;
Anders Grahn88ff82e2010-05-26 14:42:01 -07002161 slot->sdio_irq = sdio_irq;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002162
Ludovic Desrochese919fd22012-07-24 15:30:03 +02002163 dev_dbg(&mmc->class_dev,
2164 "slot[%u]: bus_width=%u, detect_pin=%d, "
2165 "detect_is_active_high=%s, wp_pin=%d\n",
2166 id, slot_data->bus_width, slot_data->detect_pin,
2167 slot_data->detect_is_active_high ? "true" : "false",
2168 slot_data->wp_pin);
2169
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002170 mmc->ops = &atmci_ops;
2171 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
2172 mmc->f_max = host->bus_hz / 2;
2173 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
Anders Grahn88ff82e2010-05-26 14:42:01 -07002174 if (sdio_irq)
2175 mmc->caps |= MMC_CAP_SDIO_IRQ;
Ludovic Desroches796211b2011-08-11 15:25:44 +00002176 if (host->caps.has_highspeed)
Nicolas Ferre99ddffd2010-05-26 14:41:59 -07002177 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +02002178 /*
2179 * Without the read/write proof capability, it is strongly suggested to
2180 * use only one bit for data to prevent fifo underruns and overruns
2181 * which will corrupt data.
2182 */
2183 if ((slot_data->bus_width >= 4) && host->caps.has_rwproof)
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002184 mmc->caps |= MMC_CAP_4_BIT_DATA;
2185
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +02002186 if (atmci_get_version(host) < 0x200) {
2187 mmc->max_segs = 256;
2188 mmc->max_blk_size = 4095;
2189 mmc->max_blk_count = 256;
2190 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
2191 mmc->max_seg_size = mmc->max_blk_size * mmc->max_segs;
2192 } else {
2193 mmc->max_segs = 64;
2194 mmc->max_req_size = 32768 * 512;
2195 mmc->max_blk_size = 32768;
2196 mmc->max_blk_count = 512;
2197 }
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002198
2199 /* Assume card is present initially */
2200 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
2201 if (gpio_is_valid(slot->detect_pin)) {
Pramod Gurav7bca6462014-09-23 18:21:48 +05302202 if (devm_gpio_request(&host->pdev->dev, slot->detect_pin,
2203 "mmc_detect")) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002204 dev_dbg(&mmc->class_dev, "no detect pin available\n");
2205 slot->detect_pin = -EBUSY;
Jonas Larsson1c1452b2009-03-31 11:16:48 +02002206 } else if (gpio_get_value(slot->detect_pin) ^
2207 slot->detect_is_active_high) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002208 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
2209 }
2210 }
2211
Timo Kokkonen76d55562014-11-03 13:12:59 +02002212 if (!gpio_is_valid(slot->detect_pin)) {
2213 if (slot_data->non_removable)
2214 mmc->caps |= MMC_CAP_NONREMOVABLE;
2215 else
2216 mmc->caps |= MMC_CAP_NEEDS_POLL;
2217 }
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002218
2219 if (gpio_is_valid(slot->wp_pin)) {
Pramod Gurav7bca6462014-09-23 18:21:48 +05302220 if (devm_gpio_request(&host->pdev->dev, slot->wp_pin,
2221 "mmc_wp")) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002222 dev_dbg(&mmc->class_dev, "no WP pin available\n");
2223 slot->wp_pin = -EBUSY;
2224 }
2225 }
2226
2227 host->slot[id] = slot;
Alexandre Belloni9e7861f2013-10-17 12:46:48 +02002228 mmc_regulator_get_supply(mmc);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002229 mmc_add_host(mmc);
2230
2231 if (gpio_is_valid(slot->detect_pin)) {
2232 int ret;
2233
2234 setup_timer(&slot->detect_timer, atmci_detect_change,
2235 (unsigned long)slot);
2236
2237 ret = request_irq(gpio_to_irq(slot->detect_pin),
2238 atmci_detect_interrupt,
2239 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
2240 "mmc-detect", slot);
2241 if (ret) {
2242 dev_dbg(&mmc->class_dev,
2243 "could not request IRQ %d for detect pin\n",
2244 gpio_to_irq(slot->detect_pin));
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002245 slot->detect_pin = -EBUSY;
2246 }
2247 }
2248
2249 atmci_init_debugfs(slot);
2250
2251 return 0;
2252}
2253
Arnd Bergmann5fef3652014-09-26 21:34:58 +02002254static void atmci_cleanup_slot(struct atmel_mci_slot *slot,
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002255 unsigned int id)
2256{
2257 /* Debugfs stuff is cleaned up by mmc core */
2258
2259 set_bit(ATMCI_SHUTDOWN, &slot->flags);
2260 smp_wmb();
2261
2262 mmc_remove_host(slot->mmc);
2263
2264 if (gpio_is_valid(slot->detect_pin)) {
2265 int pin = slot->detect_pin;
2266
2267 free_irq(gpio_to_irq(pin), slot);
2268 del_timer_sync(&slot->detect_timer);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002269 }
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002270
2271 slot->host->slot[id] = NULL;
2272 mmc_free_host(slot->mmc);
2273}
2274
ludovic.desroches@atmel.com467e0812014-12-01 15:35:09 +01002275static int atmci_configure_dma(struct atmel_mci *host)
Nicolas Ferre2635d1b2009-12-14 18:01:30 -08002276{
ludovic.desroches@atmel.com467e0812014-12-01 15:35:09 +01002277 host->dma.chan = dma_request_slave_channel_reason(&host->pdev->dev,
2278 "rxtx");
2279 if (IS_ERR(host->dma.chan))
2280 return PTR_ERR(host->dma.chan);
Nicolas Ferre2635d1b2009-12-14 18:01:30 -08002281
ludovic.desroches@atmel.com467e0812014-12-01 15:35:09 +01002282 dev_info(&host->pdev->dev, "using %s for DMA transfers\n",
2283 dma_chan_name(host->dma.chan));
Viresh Kumare2b35f32012-02-01 16:12:27 +05302284
ludovic.desroches@atmel.com467e0812014-12-01 15:35:09 +01002285 host->dma_conf.src_addr = host->mapbase + ATMCI_RDR;
2286 host->dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
2287 host->dma_conf.src_maxburst = 1;
2288 host->dma_conf.dst_addr = host->mapbase + ATMCI_TDR;
2289 host->dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
2290 host->dma_conf.dst_maxburst = 1;
2291 host->dma_conf.device_fc = false;
2292
2293 return 0;
Nicolas Ferre2635d1b2009-12-14 18:01:30 -08002294}
Ludovic Desroches796211b2011-08-11 15:25:44 +00002295
Ludovic Desroches796211b2011-08-11 15:25:44 +00002296/*
2297 * HSMCI (High Speed MCI) module is not fully compatible with MCI module.
2298 * HSMCI provides DMA support and a new config register but no more supports
2299 * PDC.
2300 */
ludovic.desroches@atmel.comab050b92014-12-01 15:35:07 +01002301static void atmci_get_cap(struct atmel_mci *host)
Ludovic Desroches796211b2011-08-11 15:25:44 +00002302{
2303 unsigned int version;
2304
2305 version = atmci_get_version(host);
2306 dev_info(&host->pdev->dev,
2307 "version: 0x%x\n", version);
2308
Hein_Tiboschccdfe612012-08-30 16:34:38 +00002309 host->caps.has_dma_conf_reg = 0;
Hein_Tibosch6bf2af82012-08-30 16:34:27 +00002310 host->caps.has_pdc = ATMCI_PDC_CONNECTED;
Ludovic Desroches796211b2011-08-11 15:25:44 +00002311 host->caps.has_cfg_reg = 0;
2312 host->caps.has_cstor_reg = 0;
2313 host->caps.has_highspeed = 0;
2314 host->caps.has_rwproof = 0;
Ludovic Desrochesfaf81802012-03-21 16:41:23 +01002315 host->caps.has_odd_clk_div = 0;
Ludovic Desroches24011f32012-05-16 15:26:00 +02002316 host->caps.has_bad_data_ordering = 1;
2317 host->caps.need_reset_after_xfer = 1;
2318 host->caps.need_blksz_mul_4 = 1;
Ludovic Desroches077d4072012-07-24 11:42:04 +02002319 host->caps.need_notbusy_for_read_ops = 0;
Ludovic Desroches796211b2011-08-11 15:25:44 +00002320
2321 /* keep only major version number */
2322 switch (version & 0xf00) {
Nicolas Ferre215ba392014-06-12 09:47:45 +02002323 case 0x600:
Ludovic Desroches796211b2011-08-11 15:25:44 +00002324 case 0x500:
Ludovic Desrochesfaf81802012-03-21 16:41:23 +01002325 host->caps.has_odd_clk_div = 1;
2326 case 0x400:
2327 case 0x300:
Hein_Tiboschccdfe612012-08-30 16:34:38 +00002328 host->caps.has_dma_conf_reg = 1;
Ludovic Desrochesfaf81802012-03-21 16:41:23 +01002329 host->caps.has_pdc = 0;
Ludovic Desroches796211b2011-08-11 15:25:44 +00002330 host->caps.has_cfg_reg = 1;
2331 host->caps.has_cstor_reg = 1;
2332 host->caps.has_highspeed = 1;
Ludovic Desrochesfaf81802012-03-21 16:41:23 +01002333 case 0x200:
Ludovic Desroches796211b2011-08-11 15:25:44 +00002334 host->caps.has_rwproof = 1;
Ludovic Desroches24011f32012-05-16 15:26:00 +02002335 host->caps.need_blksz_mul_4 = 0;
Ludovic Desroches077d4072012-07-24 11:42:04 +02002336 host->caps.need_notbusy_for_read_ops = 1;
Ludovic Desrochesfaf81802012-03-21 16:41:23 +01002337 case 0x100:
Ludovic Desroches24011f32012-05-16 15:26:00 +02002338 host->caps.has_bad_data_ordering = 0;
2339 host->caps.need_reset_after_xfer = 0;
2340 case 0x0:
Ludovic Desroches796211b2011-08-11 15:25:44 +00002341 break;
2342 default:
Ludovic Desrochesfaf81802012-03-21 16:41:23 +01002343 host->caps.has_pdc = 0;
Ludovic Desroches796211b2011-08-11 15:25:44 +00002344 dev_warn(&host->pdev->dev,
2345 "Unmanaged mci version, set minimum capabilities\n");
2346 break;
2347 }
2348}
Dan Williams74465b42009-01-06 11:38:16 -07002349
ludovic.desroches@atmel.comab050b92014-12-01 15:35:07 +01002350static int atmci_probe(struct platform_device *pdev)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002351{
2352 struct mci_platform_data *pdata;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002353 struct atmel_mci *host;
2354 struct resource *regs;
2355 unsigned int nr_slots;
2356 int irq;
Pramod Gurav528bc782014-09-23 15:50:06 +05302357 int ret, i;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002358
2359 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2360 if (!regs)
2361 return -ENXIO;
2362 pdata = pdev->dev.platform_data;
Ludovic Desrochese919fd22012-07-24 15:30:03 +02002363 if (!pdata) {
2364 pdata = atmci_of_init(pdev);
2365 if (IS_ERR(pdata)) {
2366 dev_err(&pdev->dev, "platform data not available\n");
2367 return PTR_ERR(pdata);
2368 }
2369 }
2370
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002371 irq = platform_get_irq(pdev, 0);
2372 if (irq < 0)
2373 return irq;
2374
Pramod Gurav7bca6462014-09-23 18:21:48 +05302375 host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002376 if (!host)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002377 return -ENOMEM;
2378
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002379 host->pdev = pdev;
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002380 spin_lock_init(&host->lock);
2381 INIT_LIST_HEAD(&host->queue);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002382
Pramod Gurav7bca6462014-09-23 18:21:48 +05302383 host->mck = devm_clk_get(&pdev->dev, "mci_clk");
2384 if (IS_ERR(host->mck))
2385 return PTR_ERR(host->mck);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002386
Pramod Gurav7bca6462014-09-23 18:21:48 +05302387 host->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002388 if (!host->regs)
Pramod Gurav7bca6462014-09-23 18:21:48 +05302389 return -ENOMEM;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002390
Boris BREZILLONb3894f22013-07-18 09:38:52 +02002391 ret = clk_prepare_enable(host->mck);
2392 if (ret)
Pramod Gurav7bca6462014-09-23 18:21:48 +05302393 return ret;
2394
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00002395 atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002396 host->bus_hz = clk_get_rate(host->mck);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002397
2398 host->mapbase = regs->start;
2399
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002400 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002401
Kay Sievers89c8aa22009-02-02 21:08:30 +01002402 ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
Wenyou Yangae552ab2014-10-30 12:00:41 +08002403 if (ret) {
2404 clk_disable_unprepare(host->mck);
Pramod Gurav7bca6462014-09-23 18:21:48 +05302405 return ret;
Wenyou Yangae552ab2014-10-30 12:00:41 +08002406 }
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002407
Ludovic Desroches796211b2011-08-11 15:25:44 +00002408 /* Get MCI capabilities and set operations according to it */
2409 atmci_get_cap(host);
ludovic.desroches@atmel.com467e0812014-12-01 15:35:09 +01002410 ret = atmci_configure_dma(host);
2411 if (ret == -EPROBE_DEFER)
2412 goto err_dma_probe_defer;
2413 if (ret == 0) {
Ludovic Desroches796211b2011-08-11 15:25:44 +00002414 host->prepare_data = &atmci_prepare_data_dma;
2415 host->submit_data = &atmci_submit_data_dma;
2416 host->stop_transfer = &atmci_stop_transfer_dma;
2417 } else if (host->caps.has_pdc) {
2418 dev_info(&pdev->dev, "using PDC\n");
2419 host->prepare_data = &atmci_prepare_data_pdc;
2420 host->submit_data = &atmci_submit_data_pdc;
2421 host->stop_transfer = &atmci_stop_transfer_pdc;
2422 } else {
Ludovic Desrochesef878192012-02-09 16:33:53 +01002423 dev_info(&pdev->dev, "using PIO\n");
Ludovic Desroches796211b2011-08-11 15:25:44 +00002424 host->prepare_data = &atmci_prepare_data;
2425 host->submit_data = &atmci_submit_data;
2426 host->stop_transfer = &atmci_stop_transfer;
2427 }
2428
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002429 platform_set_drvdata(pdev, host);
2430
Ludovic Desrochesb87cc1b2012-05-23 15:52:15 +02002431 setup_timer(&host->timer, atmci_timeout_timer, (unsigned long)host);
2432
Wenyou Yangae552ab2014-10-30 12:00:41 +08002433 pm_runtime_get_noresume(&pdev->dev);
2434 pm_runtime_set_active(&pdev->dev);
2435 pm_runtime_set_autosuspend_delay(&pdev->dev, AUTOSUSPEND_DELAY);
2436 pm_runtime_use_autosuspend(&pdev->dev);
2437 pm_runtime_enable(&pdev->dev);
2438
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002439 /* We need at least one slot to succeed */
2440 nr_slots = 0;
2441 ret = -ENODEV;
2442 if (pdata->slot[0].bus_width) {
2443 ret = atmci_init_slot(host, &pdata->slot[0],
Ludovic Desroches2c96a292011-08-11 15:25:41 +00002444 0, ATMCI_SDCSEL_SLOT_A, ATMCI_SDIOIRQA);
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +02002445 if (!ret) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002446 nr_slots++;
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +02002447 host->buf_size = host->slot[0]->mmc->max_req_size;
2448 }
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002449 }
2450 if (pdata->slot[1].bus_width) {
2451 ret = atmci_init_slot(host, &pdata->slot[1],
Ludovic Desroches2c96a292011-08-11 15:25:41 +00002452 1, ATMCI_SDCSEL_SLOT_B, ATMCI_SDIOIRQB);
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +02002453 if (!ret) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002454 nr_slots++;
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +02002455 if (host->slot[1]->mmc->max_req_size > host->buf_size)
2456 host->buf_size =
2457 host->slot[1]->mmc->max_req_size;
2458 }
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002459 }
2460
Rob Emanuele04d699c2009-09-22 16:45:19 -07002461 if (!nr_slots) {
2462 dev_err(&pdev->dev, "init failed: no slot defined\n");
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002463 goto err_init_slot;
Rob Emanuele04d699c2009-09-22 16:45:19 -07002464 }
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002465
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +02002466 if (!host->caps.has_rwproof) {
2467 host->buffer = dma_alloc_coherent(&pdev->dev, host->buf_size,
2468 &host->buf_phys_addr,
2469 GFP_KERNEL);
2470 if (!host->buffer) {
2471 ret = -ENOMEM;
2472 dev_err(&pdev->dev, "buffer allocation failed\n");
Pramod Gurav528bc782014-09-23 15:50:06 +05302473 goto err_dma_alloc;
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +02002474 }
2475 }
2476
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002477 dev_info(&pdev->dev,
2478 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
2479 host->mapbase, irq, nr_slots);
Haavard Skinnemoendeec9ae2008-07-24 14:18:59 +02002480
Wenyou Yangae552ab2014-10-30 12:00:41 +08002481 pm_runtime_mark_last_busy(&host->pdev->dev);
2482 pm_runtime_put_autosuspend(&pdev->dev);
2483
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002484 return 0;
2485
Pramod Gurav528bc782014-09-23 15:50:06 +05302486err_dma_alloc:
2487 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
2488 if (host->slot[i])
2489 atmci_cleanup_slot(host->slot[i], i);
2490 }
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002491err_init_slot:
Wenyou Yangae552ab2014-10-30 12:00:41 +08002492 clk_disable_unprepare(host->mck);
2493
2494 pm_runtime_disable(&pdev->dev);
2495 pm_runtime_put_noidle(&pdev->dev);
2496
Pramod Gurav528bc782014-09-23 15:50:06 +05302497 del_timer_sync(&host->timer);
ludovic.desroches@atmel.com467e0812014-12-01 15:35:09 +01002498 if (!IS_ERR(host->dma.chan))
Dan Williams74465b42009-01-06 11:38:16 -07002499 dma_release_channel(host->dma.chan);
ludovic.desroches@atmel.com467e0812014-12-01 15:35:09 +01002500err_dma_probe_defer:
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002501 free_irq(irq, host);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002502 return ret;
2503}
2504
ludovic.desroches@atmel.comab050b92014-12-01 15:35:07 +01002505static int atmci_remove(struct platform_device *pdev)
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002506{
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002507 struct atmel_mci *host = platform_get_drvdata(pdev);
2508 unsigned int i;
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002509
Wenyou Yangae552ab2014-10-30 12:00:41 +08002510 pm_runtime_get_sync(&pdev->dev);
2511
Ludovic Desroches7a90dcc2012-05-16 15:25:58 +02002512 if (host->buffer)
2513 dma_free_coherent(&pdev->dev, host->buf_size,
2514 host->buffer, host->buf_phys_addr);
2515
Ludovic Desroches2c96a292011-08-11 15:25:41 +00002516 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002517 if (host->slot[i])
2518 atmci_cleanup_slot(host->slot[i], i);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002519 }
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002520
Ludovic Desroches03fc9a72011-08-11 15:25:42 +00002521 atmci_writel(host, ATMCI_IDR, ~0UL);
2522 atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
2523 atmci_readl(host, ATMCI_SR);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002524
Pramod Gurav528bc782014-09-23 15:50:06 +05302525 del_timer_sync(&host->timer);
ludovic.desroches@atmel.com467e0812014-12-01 15:35:09 +01002526 if (!IS_ERR(host->dma.chan))
Dan Williams74465b42009-01-06 11:38:16 -07002527 dma_release_channel(host->dma.chan);
Haavard Skinnemoen65e8b082008-07-30 20:29:03 +02002528
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002529 free_irq(platform_get_irq(pdev, 0), host);
Haavard Skinnemoen965ebf32008-09-17 20:53:55 +02002530
Wenyou Yangae552ab2014-10-30 12:00:41 +08002531 clk_disable_unprepare(host->mck);
2532
2533 pm_runtime_disable(&pdev->dev);
2534 pm_runtime_put_noidle(&pdev->dev);
2535
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002536 return 0;
2537}
2538
Wenyou Yangae552ab2014-10-30 12:00:41 +08002539#ifdef CONFIG_PM
2540static int atmci_runtime_suspend(struct device *dev)
2541{
2542 struct atmel_mci *host = dev_get_drvdata(dev);
2543
2544 clk_disable_unprepare(host->mck);
2545
Wenyou Yangb5b64fa2014-11-07 08:48:13 +08002546 pinctrl_pm_select_sleep_state(dev);
2547
Wenyou Yangae552ab2014-10-30 12:00:41 +08002548 return 0;
2549}
2550
2551static int atmci_runtime_resume(struct device *dev)
2552{
2553 struct atmel_mci *host = dev_get_drvdata(dev);
2554
Wenyou Yangb5b64fa2014-11-07 08:48:13 +08002555 pinctrl_pm_select_default_state(dev);
2556
Wenyou Yangae552ab2014-10-30 12:00:41 +08002557 return clk_prepare_enable(host->mck);
2558}
2559#endif
2560
2561static const struct dev_pm_ops atmci_dev_pm_ops = {
2562 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
2563 pm_runtime_force_resume)
Ludovic Desrochesc3cb6ba2014-12-13 00:44:11 +01002564 SET_RUNTIME_PM_OPS(atmci_runtime_suspend, atmci_runtime_resume, NULL)
Wenyou Yangae552ab2014-10-30 12:00:41 +08002565};
2566
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002567static struct platform_driver atmci_driver = {
ludovic.desroches@atmel.com5e0fe892014-12-01 15:35:08 +01002568 .probe = atmci_probe,
ludovic.desroches@atmel.comab050b92014-12-01 15:35:07 +01002569 .remove = atmci_remove,
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002570 .driver = {
2571 .name = "atmel_mci",
Ludovic Desrochese919fd22012-07-24 15:30:03 +02002572 .of_match_table = of_match_ptr(atmci_dt_ids),
Wenyou Yangae552ab2014-10-30 12:00:41 +08002573 .pm = &atmci_dev_pm_ops,
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002574 },
2575};
ludovic.desroches@atmel.com5e0fe892014-12-01 15:35:08 +01002576module_platform_driver(atmci_driver);
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002577
2578MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
Jean Delvaree05503e2011-05-18 16:49:24 +02002579MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
Haavard Skinnemoen7d2be072008-06-30 18:35:03 +02002580MODULE_LICENSE("GPL v2");