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Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02001/*
Wim Van Sebroeckcb711a12009-11-15 13:44:54 +00002 * intel TCO Watchdog Driver
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02003 *
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +02004 * (c) Copyright 2006-2011 Wim Van Sebroeck <wim@iguana.be>.
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02005 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
12 * provide warranty for any of this software. This material is
13 * provided "AS-IS" and at no charge.
14 *
15 * The TCO watchdog is implemented in the following I/O controller hubs:
16 * (See the intel documentation on http://developer.intel.com.)
Wim Van Sebroeckcb711a12009-11-15 13:44:54 +000017 * document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO)
18 * document number 290687-002, 298242-027: 82801BA (ICH2)
19 * document number 290733-003, 290739-013: 82801CA (ICH3-S)
20 * document number 290716-001, 290718-007: 82801CAM (ICH3-M)
21 * document number 290744-001, 290745-025: 82801DB (ICH4)
22 * document number 252337-001, 252663-008: 82801DBM (ICH4-M)
23 * document number 273599-001, 273645-002: 82801E (C-ICH)
24 * document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)
25 * document number 300641-004, 300884-013: 6300ESB
26 * document number 301473-002, 301474-026: 82801F (ICH6)
27 * document number 313082-001, 313075-006: 631xESB, 632xESB
28 * document number 307013-003, 307014-024: 82801G (ICH7)
Wim Van Sebroeckd38bd472010-12-31 14:10:45 +000029 * document number 322896-001, 322897-001: NM10
Wim Van Sebroeckcb711a12009-11-15 13:44:54 +000030 * document number 313056-003, 313057-017: 82801H (ICH8)
31 * document number 316972-004, 316973-012: 82801I (ICH9)
32 * document number 319973-002, 319974-002: 82801J (ICH10)
Seth Heasley3c9d8ec2010-01-14 20:58:05 +000033 * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH)
Imre Kaloz4946f832009-12-07 20:42:26 +010034 * document number 320066-003, 320257-008: EP80597 (IICH)
Seth Heasley203f8d82011-01-07 17:11:08 -080035 * document number 324645-001, 324646-001: Cougar Point (CPT)
Seth Heasleyc54fb812010-11-17 12:15:08 -070036 * document number TBD : Patsburg (PBG)
Seth Heasley203f8d82011-01-07 17:11:08 -080037 * document number TBD : DH89xxCC
Seth Heasleyaa1f4652011-04-20 10:56:20 -070038 * document number TBD : Panther Point
Seth Heasley84e83c22012-01-23 16:40:55 -080039 * document number TBD : Lynx Point
James Ralston7fb9c1a2012-08-09 09:46:13 -070040 * document number TBD : Lynx Point-LP
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020041 */
42
43/*
44 * Includes, defines, variables, module parameters, ...
45 */
46
Joe Perches27c766a2012-02-15 15:06:19 -080047#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
48
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020049/* Module and version information */
Wim Van Sebroeck7944d3a2008-08-06 20:19:41 +000050#define DRV_NAME "iTCO_wdt"
Peter Tyser24b3a162014-03-10 16:34:55 -050051#define DRV_VERSION "1.11"
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020052
53/* Includes */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020054#include <linux/module.h> /* For module specific items */
55#include <linux/moduleparam.h> /* For new moduleparam's */
56#include <linux/types.h> /* For standard types (like size_t) */
57#include <linux/errno.h> /* For the -ENODEV/... values */
58#include <linux/kernel.h> /* For printk/panic/... */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020059#include <linux/watchdog.h> /* For the watchdog specific items */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020060#include <linux/init.h> /* For __init/__exit/... */
61#include <linux/fs.h> /* For file operations */
62#include <linux/platform_device.h> /* For platform_driver framework */
63#include <linux/pci.h> /* For pci functions */
64#include <linux/ioport.h> /* For io-port access */
65#include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
Alan Cox0e6fa3f2008-05-19 14:06:25 +010066#include <linux/uaccess.h> /* For copy_to_user/put_user/... */
67#include <linux/io.h> /* For inb/outb/... */
Aaron Sierra887c8ec2012-04-20 14:14:11 -050068#include <linux/mfd/core.h>
69#include <linux/mfd/lpc_ich.h>
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020070
Alan Cox0e6fa3f2008-05-19 14:06:25 +010071#include "iTCO_vendor.h"
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020072
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020073/* Address definitions for the TCO */
Alan Cox0e6fa3f2008-05-19 14:06:25 +010074/* TCO base address */
Aaron Sierra887c8ec2012-04-20 14:14:11 -050075#define TCOBASE (iTCO_wdt_private.tco_res->start)
Alan Cox0e6fa3f2008-05-19 14:06:25 +010076/* SMI Control and Enable Register */
Aaron Sierra887c8ec2012-04-20 14:14:11 -050077#define SMI_EN (iTCO_wdt_private.smi_res->start)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020078
Wim Van Sebroeck0a7e65822009-04-14 20:20:07 +000079#define TCO_RLD (TCOBASE + 0x00) /* TCO Timer Reload and Curr. Value */
80#define TCOv1_TMR (TCOBASE + 0x01) /* TCOv1 Timer Initial Value */
81#define TCO_DAT_IN (TCOBASE + 0x02) /* TCO Data In Register */
82#define TCO_DAT_OUT (TCOBASE + 0x03) /* TCO Data Out Register */
83#define TCO1_STS (TCOBASE + 0x04) /* TCO1 Status Register */
84#define TCO2_STS (TCOBASE + 0x06) /* TCO2 Status Register */
85#define TCO1_CNT (TCOBASE + 0x08) /* TCO1 Control Register */
86#define TCO2_CNT (TCOBASE + 0x0a) /* TCO2 Control Register */
87#define TCOv2_TMR (TCOBASE + 0x12) /* TCOv2 Timer Initial Value */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020088
89/* internal variables */
Alan Cox0e6fa3f2008-05-19 14:06:25 +010090static struct { /* this is private data for the iTCO_wdt device */
91 /* TCO version/generation */
92 unsigned int iTCO_version;
Aaron Sierra887c8ec2012-04-20 14:14:11 -050093 struct resource *tco_res;
94 struct resource *smi_res;
Peter Tyser24b3a162014-03-10 16:34:55 -050095 /*
96 * NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2),
97 * or memory-mapped PMC register bit 4 (TCO version 3).
98 */
99 struct resource *gcs_pmc_res;
100 unsigned long __iomem *gcs_pmc;
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100101 /* the lock for io operations */
102 spinlock_t io_lock;
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500103 struct platform_device *dev;
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100104 /* the PCI-device */
105 struct pci_dev *pdev;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200106} iTCO_wdt_private;
107
108/* module parameters */
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200109#define WATCHDOG_TIMEOUT 30 /* 30 sec default heartbeat */
110static int heartbeat = WATCHDOG_TIMEOUT; /* in seconds */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200111module_param(heartbeat, int, 0);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100112MODULE_PARM_DESC(heartbeat, "Watchdog timeout in seconds. "
113 "5..76 (TCO v1) or 3..614 (TCO v2), default="
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200114 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200115
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +0100116static bool nowayout = WATCHDOG_NOWAYOUT;
117module_param(nowayout, bool, 0);
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100118MODULE_PARM_DESC(nowayout,
119 "Watchdog cannot be stopped once started (default="
120 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100121
Wim Van Sebroeck0d098582011-12-26 15:23:51 +0100122static int turn_SMI_watchdog_clear_off = 1;
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +0200123module_param(turn_SMI_watchdog_clear_off, int, 0);
124MODULE_PARM_DESC(turn_SMI_watchdog_clear_off,
Wim Van Sebroeck0d098582011-12-26 15:23:51 +0100125 "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)");
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +0200126
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200127/*
128 * Some TCO specific functions
129 */
130
Peter Tyser24b3a162014-03-10 16:34:55 -0500131/*
132 * The iTCO v1 and v2's internal timer is stored as ticks which decrement
133 * every 0.6 seconds. v3's internal timer is stored as seconds (some
134 * datasheets incorrectly state 0.6 seconds).
135 */
136static inline unsigned int seconds_to_ticks(int secs)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200137{
Peter Tyser24b3a162014-03-10 16:34:55 -0500138 return iTCO_wdt_private.iTCO_version == 3 ? secs : (secs * 10) / 6;
139}
140
141static inline unsigned int ticks_to_seconds(int ticks)
142{
143 return iTCO_wdt_private.iTCO_version == 3 ? ticks : (ticks * 6) / 10;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200144}
145
146static void iTCO_wdt_set_NO_REBOOT_bit(void)
147{
148 u32 val32;
149
150 /* Set the NO_REBOOT bit: this disables reboots */
Peter Tyser24b3a162014-03-10 16:34:55 -0500151 if (iTCO_wdt_private.iTCO_version == 3) {
152 val32 = readl(iTCO_wdt_private.gcs_pmc);
153 val32 |= 0x00000010;
154 writel(val32, iTCO_wdt_private.gcs_pmc);
155 } else if (iTCO_wdt_private.iTCO_version == 2) {
156 val32 = readl(iTCO_wdt_private.gcs_pmc);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200157 val32 |= 0x00000020;
Peter Tyser24b3a162014-03-10 16:34:55 -0500158 writel(val32, iTCO_wdt_private.gcs_pmc);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200159 } else if (iTCO_wdt_private.iTCO_version == 1) {
160 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
161 val32 |= 0x00000002;
162 pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
163 }
164}
165
166static int iTCO_wdt_unset_NO_REBOOT_bit(void)
167{
168 int ret = 0;
169 u32 val32;
170
171 /* Unset the NO_REBOOT bit: this enables reboots */
Peter Tyser24b3a162014-03-10 16:34:55 -0500172 if (iTCO_wdt_private.iTCO_version == 3) {
173 val32 = readl(iTCO_wdt_private.gcs_pmc);
174 val32 &= 0xffffffef;
175 writel(val32, iTCO_wdt_private.gcs_pmc);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200176
Peter Tyser24b3a162014-03-10 16:34:55 -0500177 val32 = readl(iTCO_wdt_private.gcs_pmc);
178 if (val32 & 0x00000010)
179 ret = -EIO;
180 } else if (iTCO_wdt_private.iTCO_version == 2) {
181 val32 = readl(iTCO_wdt_private.gcs_pmc);
182 val32 &= 0xffffffdf;
183 writel(val32, iTCO_wdt_private.gcs_pmc);
184
185 val32 = readl(iTCO_wdt_private.gcs_pmc);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200186 if (val32 & 0x00000020)
187 ret = -EIO;
188 } else if (iTCO_wdt_private.iTCO_version == 1) {
189 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
190 val32 &= 0xfffffffd;
191 pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
192
193 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
194 if (val32 & 0x00000002)
195 ret = -EIO;
196 }
197
198 return ret; /* returns: 0 = OK, -EIO = Error */
199}
200
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200201static int iTCO_wdt_start(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200202{
203 unsigned int val;
204
205 spin_lock(&iTCO_wdt_private.io_lock);
206
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200207 iTCO_vendor_pre_start(iTCO_wdt_private.smi_res, wd_dev->timeout);
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100208
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200209 /* disable chipset's NO_REBOOT bit */
210 if (iTCO_wdt_unset_NO_REBOOT_bit()) {
Roel Kluin2ba7d7b2007-10-23 03:08:27 +0200211 spin_unlock(&iTCO_wdt_private.io_lock);
Joe Perches27c766a2012-02-15 15:06:19 -0800212 pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware/BIOS\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200213 return -EIO;
214 }
215
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000216 /* Force the timer to its reload value by writing to the TCO_RLD
217 register */
Peter Tyser24b3a162014-03-10 16:34:55 -0500218 if (iTCO_wdt_private.iTCO_version >= 2)
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000219 outw(0x01, TCO_RLD);
220 else if (iTCO_wdt_private.iTCO_version == 1)
221 outb(0x01, TCO_RLD);
222
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200223 /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
224 val = inw(TCO1_CNT);
225 val &= 0xf7ff;
226 outw(val, TCO1_CNT);
227 val = inw(TCO1_CNT);
228 spin_unlock(&iTCO_wdt_private.io_lock);
229
230 if (val & 0x0800)
231 return -1;
232 return 0;
233}
234
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200235static int iTCO_wdt_stop(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200236{
237 unsigned int val;
238
239 spin_lock(&iTCO_wdt_private.io_lock);
240
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500241 iTCO_vendor_pre_stop(iTCO_wdt_private.smi_res);
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100242
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200243 /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
244 val = inw(TCO1_CNT);
245 val |= 0x0800;
246 outw(val, TCO1_CNT);
247 val = inw(TCO1_CNT);
248
249 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
250 iTCO_wdt_set_NO_REBOOT_bit();
251
252 spin_unlock(&iTCO_wdt_private.io_lock);
253
254 if ((val & 0x0800) == 0)
255 return -1;
256 return 0;
257}
258
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200259static int iTCO_wdt_ping(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200260{
261 spin_lock(&iTCO_wdt_private.io_lock);
262
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200263 iTCO_vendor_pre_keepalive(iTCO_wdt_private.smi_res, wd_dev->timeout);
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100264
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200265 /* Reload the timer by writing to the TCO Timer Counter register */
Peter Tyser24b3a162014-03-10 16:34:55 -0500266 if (iTCO_wdt_private.iTCO_version >= 2) {
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200267 outw(0x01, TCO_RLD);
Peter Tyser24b3a162014-03-10 16:34:55 -0500268 } else if (iTCO_wdt_private.iTCO_version == 1) {
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100269 /* Reset the timeout status bit so that the timer
270 * needs to count down twice again before rebooting */
271 outw(0x0008, TCO1_STS); /* write 1 to clear bit */
272
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200273 outb(0x01, TCO_RLD);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100274 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200275
276 spin_unlock(&iTCO_wdt_private.io_lock);
277 return 0;
278}
279
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200280static int iTCO_wdt_set_timeout(struct watchdog_device *wd_dev, unsigned int t)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200281{
282 unsigned int val16;
283 unsigned char val8;
284 unsigned int tmrval;
285
286 tmrval = seconds_to_ticks(t);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100287
288 /* For TCO v1 the timer counts down twice before rebooting */
289 if (iTCO_wdt_private.iTCO_version == 1)
290 tmrval /= 2;
291
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200292 /* from the specs: */
293 /* "Values of 0h-3h are ignored and should not be attempted" */
294 if (tmrval < 0x04)
295 return -EINVAL;
Peter Tyser24b3a162014-03-10 16:34:55 -0500296 if (((iTCO_wdt_private.iTCO_version >= 2) && (tmrval > 0x3ff)) ||
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200297 ((iTCO_wdt_private.iTCO_version == 1) && (tmrval > 0x03f)))
298 return -EINVAL;
299
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100300 iTCO_vendor_pre_set_heartbeat(tmrval);
301
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200302 /* Write new heartbeat to watchdog */
Peter Tyser24b3a162014-03-10 16:34:55 -0500303 if (iTCO_wdt_private.iTCO_version >= 2) {
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200304 spin_lock(&iTCO_wdt_private.io_lock);
305 val16 = inw(TCOv2_TMR);
306 val16 &= 0xfc00;
307 val16 |= tmrval;
308 outw(val16, TCOv2_TMR);
309 val16 = inw(TCOv2_TMR);
310 spin_unlock(&iTCO_wdt_private.io_lock);
311
312 if ((val16 & 0x3ff) != tmrval)
313 return -EINVAL;
314 } else if (iTCO_wdt_private.iTCO_version == 1) {
315 spin_lock(&iTCO_wdt_private.io_lock);
316 val8 = inb(TCOv1_TMR);
317 val8 &= 0xc0;
318 val8 |= (tmrval & 0xff);
319 outb(val8, TCOv1_TMR);
320 val8 = inb(TCOv1_TMR);
321 spin_unlock(&iTCO_wdt_private.io_lock);
322
323 if ((val8 & 0x3f) != tmrval)
324 return -EINVAL;
325 }
326
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200327 wd_dev->timeout = t;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200328 return 0;
329}
330
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200331static unsigned int iTCO_wdt_get_timeleft(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200332{
333 unsigned int val16;
334 unsigned char val8;
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200335 unsigned int time_left = 0;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200336
337 /* read the TCO Timer */
Peter Tyser24b3a162014-03-10 16:34:55 -0500338 if (iTCO_wdt_private.iTCO_version >= 2) {
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200339 spin_lock(&iTCO_wdt_private.io_lock);
340 val16 = inw(TCO_RLD);
341 val16 &= 0x3ff;
342 spin_unlock(&iTCO_wdt_private.io_lock);
343
Peter Tyser24b3a162014-03-10 16:34:55 -0500344 time_left = ticks_to_seconds(val16);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200345 } else if (iTCO_wdt_private.iTCO_version == 1) {
346 spin_lock(&iTCO_wdt_private.io_lock);
347 val8 = inb(TCO_RLD);
348 val8 &= 0x3f;
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100349 if (!(inw(TCO1_STS) & 0x0008))
350 val8 += (inb(TCOv1_TMR) & 0x3f);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200351 spin_unlock(&iTCO_wdt_private.io_lock);
352
Peter Tyser24b3a162014-03-10 16:34:55 -0500353 time_left = ticks_to_seconds(val8);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200354 }
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200355 return time_left;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200356}
357
358/*
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200359 * Kernel Interfaces
360 */
361
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200362static const struct watchdog_info ident = {
363 .options = WDIOF_SETTIMEOUT |
364 WDIOF_KEEPALIVEPING |
365 WDIOF_MAGICCLOSE,
366 .firmware_version = 0,
367 .identity = DRV_NAME,
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200368};
369
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200370static const struct watchdog_ops iTCO_wdt_ops = {
371 .owner = THIS_MODULE,
372 .start = iTCO_wdt_start,
Jingoo Han5f5e1902014-02-27 14:41:42 +0900373 .stop = iTCO_wdt_stop,
374 .ping = iTCO_wdt_ping,
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200375 .set_timeout = iTCO_wdt_set_timeout,
376 .get_timeleft = iTCO_wdt_get_timeleft,
377};
378
379static struct watchdog_device iTCO_wdt_watchdog_dev = {
380 .info = &ident,
Jingoo Han5f5e1902014-02-27 14:41:42 +0900381 .ops = &iTCO_wdt_ops,
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200382};
383
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200384/*
385 * Init & exit routines
386 */
387
Bill Pemberton4b12b892012-11-19 13:26:24 -0500388static void iTCO_wdt_cleanup(void)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200389{
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500390 /* Stop the timer before we leave */
391 if (!nowayout)
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200392 iTCO_wdt_stop(&iTCO_wdt_watchdog_dev);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500393
394 /* Deregister */
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200395 watchdog_unregister_device(&iTCO_wdt_watchdog_dev);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500396
397 /* release resources */
398 release_region(iTCO_wdt_private.tco_res->start,
399 resource_size(iTCO_wdt_private.tco_res));
400 release_region(iTCO_wdt_private.smi_res->start,
401 resource_size(iTCO_wdt_private.smi_res));
Peter Tyser24b3a162014-03-10 16:34:55 -0500402 if (iTCO_wdt_private.iTCO_version >= 2) {
403 iounmap(iTCO_wdt_private.gcs_pmc);
404 release_mem_region(iTCO_wdt_private.gcs_pmc_res->start,
405 resource_size(iTCO_wdt_private.gcs_pmc_res));
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500406 }
407
408 iTCO_wdt_private.tco_res = NULL;
409 iTCO_wdt_private.smi_res = NULL;
Peter Tyser24b3a162014-03-10 16:34:55 -0500410 iTCO_wdt_private.gcs_pmc_res = NULL;
411 iTCO_wdt_private.gcs_pmc = NULL;
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500412}
413
Bill Pemberton2d991a12012-11-19 13:21:41 -0500414static int iTCO_wdt_probe(struct platform_device *dev)
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500415{
416 int ret = -ENODEV;
Wim Van Sebroeck12d60e22009-01-28 20:51:04 +0000417 unsigned long val32;
Jingoo Hanbc8fdfb2013-07-30 19:58:51 +0900418 struct lpc_ich_info *ich_info = dev_get_platdata(&dev->dev);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500419
420 if (!ich_info)
421 goto out;
422
423 spin_lock_init(&iTCO_wdt_private.io_lock);
424
425 iTCO_wdt_private.tco_res =
426 platform_get_resource(dev, IORESOURCE_IO, ICH_RES_IO_TCO);
427 if (!iTCO_wdt_private.tco_res)
428 goto out;
429
430 iTCO_wdt_private.smi_res =
431 platform_get_resource(dev, IORESOURCE_IO, ICH_RES_IO_SMI);
432 if (!iTCO_wdt_private.smi_res)
433 goto out;
434
435 iTCO_wdt_private.iTCO_version = ich_info->iTCO_version;
436 iTCO_wdt_private.dev = dev;
437 iTCO_wdt_private.pdev = to_pci_dev(dev->dev.parent);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200438
439 /*
Peter Tyser24b3a162014-03-10 16:34:55 -0500440 * Get the Memory-Mapped GCS or PMC register, we need it for the
441 * NO_REBOOT flag (TCO v2 and v3).
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200442 */
Peter Tyser24b3a162014-03-10 16:34:55 -0500443 if (iTCO_wdt_private.iTCO_version >= 2) {
444 iTCO_wdt_private.gcs_pmc_res = platform_get_resource(dev,
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500445 IORESOURCE_MEM,
Peter Tyser24b3a162014-03-10 16:34:55 -0500446 ICH_RES_MEM_GCS_PMC);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500447
Peter Tyser24b3a162014-03-10 16:34:55 -0500448 if (!iTCO_wdt_private.gcs_pmc_res)
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500449 goto out;
450
Peter Tyser24b3a162014-03-10 16:34:55 -0500451 if (!request_mem_region(iTCO_wdt_private.gcs_pmc_res->start,
452 resource_size(iTCO_wdt_private.gcs_pmc_res), dev->name)) {
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500453 ret = -EBUSY;
Denis V. Lunevde8cd9a2009-06-05 15:13:08 +0400454 goto out;
455 }
Peter Tyser24b3a162014-03-10 16:34:55 -0500456 iTCO_wdt_private.gcs_pmc = ioremap(iTCO_wdt_private.gcs_pmc_res->start,
457 resource_size(iTCO_wdt_private.gcs_pmc_res));
458 if (!iTCO_wdt_private.gcs_pmc) {
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500459 ret = -EIO;
Peter Tyser24b3a162014-03-10 16:34:55 -0500460 goto unreg_gcs_pmc;
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500461 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200462 }
463
464 /* Check chipset's NO_REBOOT bit */
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100465 if (iTCO_wdt_unset_NO_REBOOT_bit() && iTCO_vendor_check_noreboot_on()) {
Joe Perches27c766a2012-02-15 15:06:19 -0800466 pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200467 ret = -ENODEV; /* Cannot reset NO_REBOOT bit */
Peter Tyser24b3a162014-03-10 16:34:55 -0500468 goto unmap_gcs_pmc;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200469 }
470
471 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
472 iTCO_wdt_set_NO_REBOOT_bit();
473
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000474 /* The TCO logic uses the TCO_EN bit in the SMI_EN register */
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500475 if (!request_region(iTCO_wdt_private.smi_res->start,
476 resource_size(iTCO_wdt_private.smi_res), dev->name)) {
477 pr_err("I/O address 0x%04llx already in use, device disabled\n",
Randy Dunlap4b98b322012-05-14 13:15:20 -0700478 (u64)SMI_EN);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500479 ret = -EBUSY;
Peter Tyser24b3a162014-03-10 16:34:55 -0500480 goto unmap_gcs_pmc;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200481 }
Wim Van Sebroeck0d098582011-12-26 15:23:51 +0100482 if (turn_SMI_watchdog_clear_off >= iTCO_wdt_private.iTCO_version) {
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500483 /*
484 * Bit 13: TCO_EN -> 0
485 * Disables TCO logic generating an SMI#
486 */
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +0200487 val32 = inl(SMI_EN);
488 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
489 outl(val32, SMI_EN);
490 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200491
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500492 if (!request_region(iTCO_wdt_private.tco_res->start,
493 resource_size(iTCO_wdt_private.tco_res), dev->name)) {
494 pr_err("I/O address 0x%04llx already in use, device disabled\n",
Randy Dunlap4b98b322012-05-14 13:15:20 -0700495 (u64)TCOBASE);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500496 ret = -EBUSY;
497 goto unreg_smi;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200498 }
499
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500500 pr_info("Found a %s TCO device (Version=%d, TCOBASE=0x%04llx)\n",
Randy Dunlap4b98b322012-05-14 13:15:20 -0700501 ich_info->name, ich_info->iTCO_version, (u64)TCOBASE);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200502
503 /* Clear out the (probably old) status */
Peter Tyser24b3a162014-03-10 16:34:55 -0500504 if (iTCO_wdt_private.iTCO_version == 3) {
505 outl(0x20008, TCO1_STS);
506 } else {
507 outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */
508 outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */
509 outw(0x0004, TCO2_STS); /* Clear BOOT_STS bit */
510 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200511
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200512 iTCO_wdt_watchdog_dev.bootstatus = 0;
513 iTCO_wdt_watchdog_dev.timeout = WATCHDOG_TIMEOUT;
514 watchdog_set_nowayout(&iTCO_wdt_watchdog_dev, nowayout);
Jean Delvarec90789b2014-03-10 21:28:17 +0100515 iTCO_wdt_watchdog_dev.parent = &dev->dev;
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200516
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200517 /* Make sure the watchdog is not running */
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200518 iTCO_wdt_stop(&iTCO_wdt_watchdog_dev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200519
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100520 /* Check that the heartbeat value is within it's range;
521 if not reset to the default */
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200522 if (iTCO_wdt_set_timeout(&iTCO_wdt_watchdog_dev, heartbeat)) {
523 iTCO_wdt_set_timeout(&iTCO_wdt_watchdog_dev, WATCHDOG_TIMEOUT);
524 pr_info("timeout value out of range, using %d\n",
525 WATCHDOG_TIMEOUT);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200526 }
527
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200528 ret = watchdog_register_device(&iTCO_wdt_watchdog_dev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200529 if (ret != 0) {
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200530 pr_err("cannot register watchdog device (err=%d)\n", ret);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500531 goto unreg_tco;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200532 }
533
Joe Perches27c766a2012-02-15 15:06:19 -0800534 pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n",
535 heartbeat, nowayout);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200536
537 return 0;
538
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500539unreg_tco:
540 release_region(iTCO_wdt_private.tco_res->start,
541 resource_size(iTCO_wdt_private.tco_res));
542unreg_smi:
543 release_region(iTCO_wdt_private.smi_res->start,
544 resource_size(iTCO_wdt_private.smi_res));
Peter Tyser24b3a162014-03-10 16:34:55 -0500545unmap_gcs_pmc:
546 if (iTCO_wdt_private.iTCO_version >= 2)
547 iounmap(iTCO_wdt_private.gcs_pmc);
548unreg_gcs_pmc:
549 if (iTCO_wdt_private.iTCO_version >= 2)
550 release_mem_region(iTCO_wdt_private.gcs_pmc_res->start,
551 resource_size(iTCO_wdt_private.gcs_pmc_res));
Denis V. Lunevde8cd9a2009-06-05 15:13:08 +0400552out:
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500553 iTCO_wdt_private.tco_res = NULL;
554 iTCO_wdt_private.smi_res = NULL;
Peter Tyser24b3a162014-03-10 16:34:55 -0500555 iTCO_wdt_private.gcs_pmc_res = NULL;
556 iTCO_wdt_private.gcs_pmc = NULL;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200557
Naga Chumbalkarec269852010-02-09 00:42:02 +0100558 return ret;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200559}
560
Bill Pemberton4b12b892012-11-19 13:26:24 -0500561static int iTCO_wdt_remove(struct platform_device *dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200562{
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500563 if (iTCO_wdt_private.tco_res || iTCO_wdt_private.smi_res)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200564 iTCO_wdt_cleanup();
565
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200566 return 0;
567}
568
569static void iTCO_wdt_shutdown(struct platform_device *dev)
570{
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200571 iTCO_wdt_stop(NULL);
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200572}
573
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200574static struct platform_driver iTCO_wdt_driver = {
575 .probe = iTCO_wdt_probe,
Bill Pemberton82268712012-11-19 13:21:12 -0500576 .remove = iTCO_wdt_remove,
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200577 .shutdown = iTCO_wdt_shutdown,
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200578 .driver = {
579 .owner = THIS_MODULE,
580 .name = DRV_NAME,
581 },
582};
583
584static int __init iTCO_wdt_init_module(void)
585{
586 int err;
587
Joe Perches27c766a2012-02-15 15:06:19 -0800588 pr_info("Intel TCO WatchDog Timer Driver v%s\n", DRV_VERSION);
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200589
590 err = platform_driver_register(&iTCO_wdt_driver);
591 if (err)
592 return err;
593
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200594 return 0;
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200595}
596
597static void __exit iTCO_wdt_cleanup_module(void)
598{
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200599 platform_driver_unregister(&iTCO_wdt_driver);
Joe Perches27c766a2012-02-15 15:06:19 -0800600 pr_info("Watchdog Module Unloaded\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200601}
602
603module_init(iTCO_wdt_init_module);
604module_exit(iTCO_wdt_cleanup_module);
605
606MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
607MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver");
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200608MODULE_VERSION(DRV_VERSION);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200609MODULE_LICENSE("GPL");
Jan Beuliche5de32e2012-06-22 16:41:00 +0100610MODULE_ALIAS("platform:" DRV_NAME);