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Leela Krishna Amudala5a213a52012-08-08 09:44:49 +09001/* include/video/samsung_fimd.h
Ben Dooks8f995cc2008-11-19 15:41:30 +00002 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
Leela Krishna Amudala5a213a52012-08-08 09:44:49 +09008 * S3C Platform - new-style fimd and framebuffer register definitions
Ben Dooks8f995cc2008-11-19 15:41:30 +00009 *
Leela Krishna Amudala5a213a52012-08-08 09:44:49 +090010 * This is the register set for the fimd and new style framebuffer interface
Jingoo Hanfe6863c2013-02-21 16:42:33 -080011 * found from the S3C2443 onwards into the S3C2416, S3C2450, the
12 * S3C64XX series such as the S3C6400 and S3C6410, and EXYNOS series.
Ben Dooks8f995cc2008-11-19 15:41:30 +000013 *
Ben Dooks8f995cc2008-11-19 15:41:30 +000014 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17*/
18
Ben Dooks8f995cc2008-11-19 15:41:30 +000019/* VIDCON0 */
20
Jingoo Hanfe6863c2013-02-21 16:42:33 -080021#define VIDCON0 0x00
Ben Dooks8f995cc2008-11-19 15:41:30 +000022#define VIDCON0_INTERLACE (1 << 29)
Jingoo Hanb4da9c92012-09-25 16:19:03 +090023#define VIDCON0_VIDOUT_MASK (0x7 << 26)
Jingoo Hanfe6863c2013-02-21 16:42:33 -080024#define VIDCON0_VIDOUT_SHIFT 26
Ben Dooks8f995cc2008-11-19 15:41:30 +000025#define VIDCON0_VIDOUT_RGB (0x0 << 26)
26#define VIDCON0_VIDOUT_TV (0x1 << 26)
27#define VIDCON0_VIDOUT_I80_LDI0 (0x2 << 26)
28#define VIDCON0_VIDOUT_I80_LDI1 (0x3 << 26)
Jingoo Hanb4da9c92012-09-25 16:19:03 +090029#define VIDCON0_VIDOUT_WB_RGB (0x4 << 26)
30#define VIDCON0_VIDOUT_WB_I80_LDI0 (0x6 << 26)
31#define VIDCON0_VIDOUT_WB_I80_LDI1 (0x7 << 26)
Ben Dooks8f995cc2008-11-19 15:41:30 +000032
33#define VIDCON0_L1_DATA_MASK (0x7 << 23)
Jingoo Hanfe6863c2013-02-21 16:42:33 -080034#define VIDCON0_L1_DATA_SHIFT 23
Ben Dooks8f995cc2008-11-19 15:41:30 +000035#define VIDCON0_L1_DATA_16BPP (0x0 << 23)
36#define VIDCON0_L1_DATA_18BPP16 (0x1 << 23)
37#define VIDCON0_L1_DATA_18BPP9 (0x2 << 23)
38#define VIDCON0_L1_DATA_24BPP (0x3 << 23)
39#define VIDCON0_L1_DATA_18BPP (0x4 << 23)
40#define VIDCON0_L1_DATA_16BPP8 (0x5 << 23)
41
42#define VIDCON0_L0_DATA_MASK (0x7 << 20)
Jingoo Hanfe6863c2013-02-21 16:42:33 -080043#define VIDCON0_L0_DATA_SHIFT 20
Ben Dooks8f995cc2008-11-19 15:41:30 +000044#define VIDCON0_L0_DATA_16BPP (0x0 << 20)
45#define VIDCON0_L0_DATA_18BPP16 (0x1 << 20)
46#define VIDCON0_L0_DATA_18BPP9 (0x2 << 20)
47#define VIDCON0_L0_DATA_24BPP (0x3 << 20)
48#define VIDCON0_L0_DATA_18BPP (0x4 << 20)
49#define VIDCON0_L0_DATA_16BPP8 (0x5 << 20)
50
51#define VIDCON0_PNRMODE_MASK (0x3 << 17)
Jingoo Hanfe6863c2013-02-21 16:42:33 -080052#define VIDCON0_PNRMODE_SHIFT 17
Ben Dooks8f995cc2008-11-19 15:41:30 +000053#define VIDCON0_PNRMODE_RGB (0x0 << 17)
54#define VIDCON0_PNRMODE_BGR (0x1 << 17)
55#define VIDCON0_PNRMODE_SERIAL_RGB (0x2 << 17)
56#define VIDCON0_PNRMODE_SERIAL_BGR (0x3 << 17)
57
58#define VIDCON0_CLKVALUP (1 << 16)
59#define VIDCON0_CLKVAL_F_MASK (0xff << 6)
Jingoo Hanfe6863c2013-02-21 16:42:33 -080060#define VIDCON0_CLKVAL_F_SHIFT 6
61#define VIDCON0_CLKVAL_F_LIMIT 0xff
Ben Dooks8f995cc2008-11-19 15:41:30 +000062#define VIDCON0_CLKVAL_F(_x) ((_x) << 6)
63#define VIDCON0_VLCKFREE (1 << 5)
64#define VIDCON0_CLKDIR (1 << 4)
65
66#define VIDCON0_CLKSEL_MASK (0x3 << 2)
Jingoo Hanfe6863c2013-02-21 16:42:33 -080067#define VIDCON0_CLKSEL_SHIFT 2
Ben Dooks8f995cc2008-11-19 15:41:30 +000068#define VIDCON0_CLKSEL_HCLK (0x0 << 2)
69#define VIDCON0_CLKSEL_LCD (0x1 << 2)
70#define VIDCON0_CLKSEL_27M (0x3 << 2)
71
72#define VIDCON0_ENVID (1 << 1)
73#define VIDCON0_ENVID_F (1 << 0)
74
Jingoo Hanfe6863c2013-02-21 16:42:33 -080075#define VIDCON1 0x04
Ben Dooks8f995cc2008-11-19 15:41:30 +000076#define VIDCON1_LINECNT_MASK (0x7ff << 16)
Jingoo Hanfe6863c2013-02-21 16:42:33 -080077#define VIDCON1_LINECNT_SHIFT 16
Ben Dooks8f995cc2008-11-19 15:41:30 +000078#define VIDCON1_LINECNT_GET(_v) (((_v) >> 16) & 0x7ff)
Jingoo Han31dd94f2012-09-25 17:30:36 +090079#define VIDCON1_FSTATUS_EVEN (1 << 15)
Ben Dooks8f995cc2008-11-19 15:41:30 +000080#define VIDCON1_VSTATUS_MASK (0x3 << 13)
Jingoo Hanfe6863c2013-02-21 16:42:33 -080081#define VIDCON1_VSTATUS_SHIFT 13
Ben Dooks8f995cc2008-11-19 15:41:30 +000082#define VIDCON1_VSTATUS_VSYNC (0x0 << 13)
83#define VIDCON1_VSTATUS_BACKPORCH (0x1 << 13)
84#define VIDCON1_VSTATUS_ACTIVE (0x2 << 13)
Tomasz Figa678268e2013-02-21 16:42:36 -080085#define VIDCON1_VSTATUS_FRONTPORCH (0x3 << 13)
Jingoo Hand8b97db2012-01-27 14:47:55 +090086#define VIDCON1_VCLK_MASK (0x3 << 9)
87#define VIDCON1_VCLK_HOLD (0x0 << 9)
88#define VIDCON1_VCLK_RUN (0x1 << 9)
Ben Dooks8f995cc2008-11-19 15:41:30 +000089
90#define VIDCON1_INV_VCLK (1 << 7)
91#define VIDCON1_INV_HSYNC (1 << 6)
92#define VIDCON1_INV_VSYNC (1 << 5)
93#define VIDCON1_INV_VDEN (1 << 4)
94
95/* VIDCON2 */
96
Jingoo Hanfe6863c2013-02-21 16:42:33 -080097#define VIDCON2 0x08
Ben Dooks8f995cc2008-11-19 15:41:30 +000098#define VIDCON2_EN601 (1 << 23)
99#define VIDCON2_TVFMTSEL_SW (1 << 14)
100
101#define VIDCON2_TVFMTSEL1_MASK (0x3 << 12)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800102#define VIDCON2_TVFMTSEL1_SHIFT 12
Ben Dooks8f995cc2008-11-19 15:41:30 +0000103#define VIDCON2_TVFMTSEL1_RGB (0x0 << 12)
104#define VIDCON2_TVFMTSEL1_YUV422 (0x1 << 12)
105#define VIDCON2_TVFMTSEL1_YUV444 (0x2 << 12)
106
107#define VIDCON2_ORGYCbCr (1 << 8)
108#define VIDCON2_YUVORDCrCb (1 << 7)
109
Pawel Osciak067b2262010-08-10 18:02:38 -0700110/* PRTCON (S3C6410, S5PC100)
111 * Might not be present in the S3C6410 documentation,
112 * but tests prove it's there almost for sure; shouldn't hurt in any case.
113 */
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800114#define PRTCON 0x0c
Pawel Osciak067b2262010-08-10 18:02:38 -0700115#define PRTCON_PROTECT (1 << 11)
116
Ben Dooks8f995cc2008-11-19 15:41:30 +0000117/* VIDTCON0 */
118
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800119#define VIDTCON0 0x10
Ben Dooks8f995cc2008-11-19 15:41:30 +0000120#define VIDTCON0_VBPDE_MASK (0xff << 24)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800121#define VIDTCON0_VBPDE_SHIFT 24
122#define VIDTCON0_VBPDE_LIMIT 0xff
Ben Dooks8f995cc2008-11-19 15:41:30 +0000123#define VIDTCON0_VBPDE(_x) ((_x) << 24)
124
125#define VIDTCON0_VBPD_MASK (0xff << 16)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800126#define VIDTCON0_VBPD_SHIFT 16
127#define VIDTCON0_VBPD_LIMIT 0xff
Ben Dooks8f995cc2008-11-19 15:41:30 +0000128#define VIDTCON0_VBPD(_x) ((_x) << 16)
129
130#define VIDTCON0_VFPD_MASK (0xff << 8)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800131#define VIDTCON0_VFPD_SHIFT 8
132#define VIDTCON0_VFPD_LIMIT 0xff
Ben Dooks8f995cc2008-11-19 15:41:30 +0000133#define VIDTCON0_VFPD(_x) ((_x) << 8)
134
135#define VIDTCON0_VSPW_MASK (0xff << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800136#define VIDTCON0_VSPW_SHIFT 0
137#define VIDTCON0_VSPW_LIMIT 0xff
Ben Dooks8f995cc2008-11-19 15:41:30 +0000138#define VIDTCON0_VSPW(_x) ((_x) << 0)
139
140/* VIDTCON1 */
141
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800142#define VIDTCON1 0x14
Ben Dooks8f995cc2008-11-19 15:41:30 +0000143#define VIDTCON1_VFPDE_MASK (0xff << 24)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800144#define VIDTCON1_VFPDE_SHIFT 24
145#define VIDTCON1_VFPDE_LIMIT 0xff
Ben Dooks8f995cc2008-11-19 15:41:30 +0000146#define VIDTCON1_VFPDE(_x) ((_x) << 24)
147
148#define VIDTCON1_HBPD_MASK (0xff << 16)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800149#define VIDTCON1_HBPD_SHIFT 16
150#define VIDTCON1_HBPD_LIMIT 0xff
Ben Dooks8f995cc2008-11-19 15:41:30 +0000151#define VIDTCON1_HBPD(_x) ((_x) << 16)
152
153#define VIDTCON1_HFPD_MASK (0xff << 8)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800154#define VIDTCON1_HFPD_SHIFT 8
155#define VIDTCON1_HFPD_LIMIT 0xff
Ben Dooks8f995cc2008-11-19 15:41:30 +0000156#define VIDTCON1_HFPD(_x) ((_x) << 8)
157
158#define VIDTCON1_HSPW_MASK (0xff << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800159#define VIDTCON1_HSPW_SHIFT 0
160#define VIDTCON1_HSPW_LIMIT 0xff
Ben Dooks8f995cc2008-11-19 15:41:30 +0000161#define VIDTCON1_HSPW(_x) ((_x) << 0)
162
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800163#define VIDTCON2 0x18
Jingoo Han5c447782012-03-06 15:53:41 +0900164#define VIDTCON2_LINEVAL_E(_x) ((((_x) & 0x800) >> 11) << 23)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000165#define VIDTCON2_LINEVAL_MASK (0x7ff << 11)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800166#define VIDTCON2_LINEVAL_SHIFT 11
167#define VIDTCON2_LINEVAL_LIMIT 0x7ff
Jingoo Han5c447782012-03-06 15:53:41 +0900168#define VIDTCON2_LINEVAL(_x) (((_x) & 0x7ff) << 11)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000169
Jingoo Han5c447782012-03-06 15:53:41 +0900170#define VIDTCON2_HOZVAL_E(_x) ((((_x) & 0x800) >> 11) << 22)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000171#define VIDTCON2_HOZVAL_MASK (0x7ff << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800172#define VIDTCON2_HOZVAL_SHIFT 0
173#define VIDTCON2_HOZVAL_LIMIT 0x7ff
Jingoo Han5c447782012-03-06 15:53:41 +0900174#define VIDTCON2_HOZVAL(_x) (((_x) & 0x7ff) << 0)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000175
176/* WINCONx */
177
Jingoo Han36ff8d52012-09-25 15:37:45 +0900178#define WINCON(_win) (0x20 + ((_win) * 4))
Jingoo Han90dd0b02013-02-21 16:42:34 -0800179#define WINCONx_CSCCON_EQ601 (0x0 << 28)
180#define WINCONx_CSCCON_EQ709 (0x1 << 28)
Jingoo Han36ff8d52012-09-25 15:37:45 +0900181#define WINCONx_CSCWIDTH_MASK (0x3 << 26)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800182#define WINCONx_CSCWIDTH_SHIFT 26
Jingoo Han36ff8d52012-09-25 15:37:45 +0900183#define WINCONx_CSCWIDTH_WIDE (0x0 << 26)
184#define WINCONx_CSCWIDTH_NARROW (0x3 << 26)
185#define WINCONx_ENLOCAL (1 << 22)
186#define WINCONx_BUFSTATUS (1 << 21)
187#define WINCONx_BUFSEL (1 << 20)
188#define WINCONx_BUFAUTOEN (1 << 19)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000189#define WINCONx_BITSWP (1 << 18)
190#define WINCONx_BYTSWP (1 << 17)
191#define WINCONx_HAWSWP (1 << 16)
InKi Daedc8498c2010-08-10 18:02:32 -0700192#define WINCONx_WSWP (1 << 15)
Jingoo Han36ff8d52012-09-25 15:37:45 +0900193#define WINCONx_YCbCr (1 << 13)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000194#define WINCONx_BURSTLEN_MASK (0x3 << 9)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800195#define WINCONx_BURSTLEN_SHIFT 9
Ben Dooks8f995cc2008-11-19 15:41:30 +0000196#define WINCONx_BURSTLEN_16WORD (0x0 << 9)
197#define WINCONx_BURSTLEN_8WORD (0x1 << 9)
198#define WINCONx_BURSTLEN_4WORD (0x2 << 9)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000199#define WINCONx_ENWIN (1 << 0)
Jingoo Han36ff8d52012-09-25 15:37:45 +0900200
Ben Dooks8f995cc2008-11-19 15:41:30 +0000201#define WINCON0_BPPMODE_MASK (0xf << 2)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800202#define WINCON0_BPPMODE_SHIFT 2
Ben Dooks8f995cc2008-11-19 15:41:30 +0000203#define WINCON0_BPPMODE_1BPP (0x0 << 2)
204#define WINCON0_BPPMODE_2BPP (0x1 << 2)
205#define WINCON0_BPPMODE_4BPP (0x2 << 2)
206#define WINCON0_BPPMODE_8BPP_PALETTE (0x3 << 2)
207#define WINCON0_BPPMODE_16BPP_565 (0x5 << 2)
208#define WINCON0_BPPMODE_16BPP_1555 (0x7 << 2)
209#define WINCON0_BPPMODE_18BPP_666 (0x8 << 2)
210#define WINCON0_BPPMODE_24BPP_888 (0xb << 2)
211
Jingoo Han36ff8d52012-09-25 15:37:45 +0900212#define WINCON1_LOCALSEL_CAMIF (1 << 23)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000213#define WINCON1_BLD_PIX (1 << 6)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000214#define WINCON1_BPPMODE_MASK (0xf << 2)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800215#define WINCON1_BPPMODE_SHIFT 2
Ben Dooks8f995cc2008-11-19 15:41:30 +0000216#define WINCON1_BPPMODE_1BPP (0x0 << 2)
217#define WINCON1_BPPMODE_2BPP (0x1 << 2)
218#define WINCON1_BPPMODE_4BPP (0x2 << 2)
219#define WINCON1_BPPMODE_8BPP_PALETTE (0x3 << 2)
220#define WINCON1_BPPMODE_8BPP_1232 (0x4 << 2)
221#define WINCON1_BPPMODE_16BPP_565 (0x5 << 2)
222#define WINCON1_BPPMODE_16BPP_A1555 (0x6 << 2)
223#define WINCON1_BPPMODE_16BPP_I1555 (0x7 << 2)
224#define WINCON1_BPPMODE_18BPP_666 (0x8 << 2)
225#define WINCON1_BPPMODE_18BPP_A1665 (0x9 << 2)
226#define WINCON1_BPPMODE_19BPP_A1666 (0xa << 2)
227#define WINCON1_BPPMODE_24BPP_888 (0xb << 2)
228#define WINCON1_BPPMODE_24BPP_A1887 (0xc << 2)
229#define WINCON1_BPPMODE_25BPP_A1888 (0xd << 2)
230#define WINCON1_BPPMODE_28BPP_A4888 (0xd << 2)
Jingoo Han36ff8d52012-09-25 15:37:45 +0900231#define WINCON1_ALPHA_SEL (1 << 1)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000232
Pawel Osciakf5ec5462010-08-10 18:02:40 -0700233/* S5PV210 */
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800234#define SHADOWCON 0x34
Pawel Osciakf5ec5462010-08-10 18:02:40 -0700235#define SHADOWCON_WINx_PROTECT(_win) (1 << (10 + (_win)))
Pawel Osciak04ab9ef2010-08-10 18:02:43 -0700236/* DMA channels (all windows) */
237#define SHADOWCON_CHx_ENABLE(_win) (1 << (_win))
238/* Local input channels (windows 0-2) */
239#define SHADOWCON_CHx_LOCAL_ENABLE(_win) (1 << (5 + (_win)))
Ben Dooks8f995cc2008-11-19 15:41:30 +0000240
Jingoo Han99a2c612012-09-25 16:43:16 +0900241/* VIDOSDx */
242
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800243#define VIDOSD_BASE 0x40
Jingoo Han5c447782012-03-06 15:53:41 +0900244#define VIDOSDxA_TOPLEFT_X_E(_x) ((((_x) & 0x800) >> 11) << 23)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000245#define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800246#define VIDOSDxA_TOPLEFT_X_SHIFT 11
247#define VIDOSDxA_TOPLEFT_X_LIMIT 0x7ff
Jingoo Han5c447782012-03-06 15:53:41 +0900248#define VIDOSDxA_TOPLEFT_X(_x) (((_x) & 0x7ff) << 11)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000249
Jingoo Han5c447782012-03-06 15:53:41 +0900250#define VIDOSDxA_TOPLEFT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000251#define VIDOSDxA_TOPLEFT_Y_MASK (0x7ff << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800252#define VIDOSDxA_TOPLEFT_Y_SHIFT 0
253#define VIDOSDxA_TOPLEFT_Y_LIMIT 0x7ff
Jingoo Han5c447782012-03-06 15:53:41 +0900254#define VIDOSDxA_TOPLEFT_Y(_x) (((_x) & 0x7ff) << 0)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000255
Jingoo Han5c447782012-03-06 15:53:41 +0900256#define VIDOSDxB_BOTRIGHT_X_E(_x) ((((_x) & 0x800) >> 11) << 23)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000257#define VIDOSDxB_BOTRIGHT_X_MASK (0x7ff << 11)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800258#define VIDOSDxB_BOTRIGHT_X_SHIFT 11
259#define VIDOSDxB_BOTRIGHT_X_LIMIT 0x7ff
Jingoo Han5c447782012-03-06 15:53:41 +0900260#define VIDOSDxB_BOTRIGHT_X(_x) (((_x) & 0x7ff) << 11)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000261
Jingoo Han5c447782012-03-06 15:53:41 +0900262#define VIDOSDxB_BOTRIGHT_Y_E(_x) ((((_x) & 0x800) >> 11) << 22)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000263#define VIDOSDxB_BOTRIGHT_Y_MASK (0x7ff << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800264#define VIDOSDxB_BOTRIGHT_Y_SHIFT 0
265#define VIDOSDxB_BOTRIGHT_Y_LIMIT 0x7ff
Jingoo Han5c447782012-03-06 15:53:41 +0900266#define VIDOSDxB_BOTRIGHT_Y(_x) (((_x) & 0x7ff) << 0)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000267
268/* For VIDOSD[1..4]C */
269#define VIDISD14C_ALPHA0_R(_x) ((_x) << 20)
270#define VIDISD14C_ALPHA0_G_MASK (0xf << 16)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800271#define VIDISD14C_ALPHA0_G_SHIFT 16
272#define VIDISD14C_ALPHA0_G_LIMIT 0xf
Ben Dooks8f995cc2008-11-19 15:41:30 +0000273#define VIDISD14C_ALPHA0_G(_x) ((_x) << 16)
274#define VIDISD14C_ALPHA0_B_MASK (0xf << 12)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800275#define VIDISD14C_ALPHA0_B_SHIFT 12
276#define VIDISD14C_ALPHA0_B_LIMIT 0xf
Ben Dooks8f995cc2008-11-19 15:41:30 +0000277#define VIDISD14C_ALPHA0_B(_x) ((_x) << 12)
278#define VIDISD14C_ALPHA1_R_MASK (0xf << 8)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800279#define VIDISD14C_ALPHA1_R_SHIFT 8
280#define VIDISD14C_ALPHA1_R_LIMIT 0xf
Ben Dooks8f995cc2008-11-19 15:41:30 +0000281#define VIDISD14C_ALPHA1_R(_x) ((_x) << 8)
282#define VIDISD14C_ALPHA1_G_MASK (0xf << 4)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800283#define VIDISD14C_ALPHA1_G_SHIFT 4
284#define VIDISD14C_ALPHA1_G_LIMIT 0xf
Ben Dooks8f995cc2008-11-19 15:41:30 +0000285#define VIDISD14C_ALPHA1_G(_x) ((_x) << 4)
286#define VIDISD14C_ALPHA1_B_MASK (0xf << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800287#define VIDISD14C_ALPHA1_B_SHIFT 0
288#define VIDISD14C_ALPHA1_B_LIMIT 0xf
Ben Dooks8f995cc2008-11-19 15:41:30 +0000289#define VIDISD14C_ALPHA1_B(_x) ((_x) << 0)
290
291/* Video buffer addresses */
292#define VIDW_BUF_START(_buff) (0xA0 + ((_buff) * 8))
293#define VIDW_BUF_START1(_buff) (0xA4 + ((_buff) * 8))
294#define VIDW_BUF_END(_buff) (0xD0 + ((_buff) * 8))
295#define VIDW_BUF_END1(_buff) (0xD4 + ((_buff) * 8))
296#define VIDW_BUF_SIZE(_buff) (0x100 + ((_buff) * 4))
297
Jingoo Han5c447782012-03-06 15:53:41 +0900298#define VIDW_BUF_SIZE_OFFSET_E(_x) ((((_x) & 0x2000) >> 13) << 27)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000299#define VIDW_BUF_SIZE_OFFSET_MASK (0x1fff << 13)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800300#define VIDW_BUF_SIZE_OFFSET_SHIFT 13
301#define VIDW_BUF_SIZE_OFFSET_LIMIT 0x1fff
Jingoo Han5c447782012-03-06 15:53:41 +0900302#define VIDW_BUF_SIZE_OFFSET(_x) (((_x) & 0x1fff) << 13)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000303
Jingoo Han5c447782012-03-06 15:53:41 +0900304#define VIDW_BUF_SIZE_PAGEWIDTH_E(_x) ((((_x) & 0x2000) >> 13) << 26)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000305#define VIDW_BUF_SIZE_PAGEWIDTH_MASK (0x1fff << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800306#define VIDW_BUF_SIZE_PAGEWIDTH_SHIFT 0
307#define VIDW_BUF_SIZE_PAGEWIDTH_LIMIT 0x1fff
Jingoo Han5c447782012-03-06 15:53:41 +0900308#define VIDW_BUF_SIZE_PAGEWIDTH(_x) (((_x) & 0x1fff) << 0)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000309
310/* Interrupt controls and status */
311
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800312#define VIDINTCON0 0x130
Ben Dooks8f995cc2008-11-19 15:41:30 +0000313#define VIDINTCON0_FIFOINTERVAL_MASK (0x3f << 20)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800314#define VIDINTCON0_FIFOINTERVAL_SHIFT 20
315#define VIDINTCON0_FIFOINTERVAL_LIMIT 0x3f
Ben Dooks8f995cc2008-11-19 15:41:30 +0000316#define VIDINTCON0_FIFOINTERVAL(_x) ((_x) << 20)
317
318#define VIDINTCON0_INT_SYSMAINCON (1 << 19)
319#define VIDINTCON0_INT_SYSSUBCON (1 << 18)
320#define VIDINTCON0_INT_I80IFDONE (1 << 17)
321
322#define VIDINTCON0_FRAMESEL0_MASK (0x3 << 15)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800323#define VIDINTCON0_FRAMESEL0_SHIFT 15
Ben Dooks8f995cc2008-11-19 15:41:30 +0000324#define VIDINTCON0_FRAMESEL0_BACKPORCH (0x0 << 15)
325#define VIDINTCON0_FRAMESEL0_VSYNC (0x1 << 15)
326#define VIDINTCON0_FRAMESEL0_ACTIVE (0x2 << 15)
327#define VIDINTCON0_FRAMESEL0_FRONTPORCH (0x3 << 15)
328
Pawel Osciak9fa424a2010-08-10 18:02:36 -0700329#define VIDINTCON0_FRAMESEL1 (1 << 13)
Pawel Osciakefdc8462010-08-10 18:02:38 -0700330#define VIDINTCON0_FRAMESEL1_MASK (0x3 << 13)
Pawel Osciak9fa424a2010-08-10 18:02:36 -0700331#define VIDINTCON0_FRAMESEL1_NONE (0x0 << 13)
332#define VIDINTCON0_FRAMESEL1_BACKPORCH (0x1 << 13)
333#define VIDINTCON0_FRAMESEL1_VSYNC (0x2 << 13)
334#define VIDINTCON0_FRAMESEL1_FRONTPORCH (0x3 << 13)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000335
336#define VIDINTCON0_INT_FRAME (1 << 12)
337#define VIDINTCON0_FIFIOSEL_MASK (0x7f << 5)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800338#define VIDINTCON0_FIFIOSEL_SHIFT 5
Ben Dooks8f995cc2008-11-19 15:41:30 +0000339#define VIDINTCON0_FIFIOSEL_WINDOW0 (0x1 << 5)
340#define VIDINTCON0_FIFIOSEL_WINDOW1 (0x2 << 5)
Jingoo Han60eb8d82012-09-25 16:55:18 +0900341#define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5)
342#define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5)
343#define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000344
345#define VIDINTCON0_FIFOLEVEL_MASK (0x7 << 2)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800346#define VIDINTCON0_FIFOLEVEL_SHIFT 2
Ben Dooks8f995cc2008-11-19 15:41:30 +0000347#define VIDINTCON0_FIFOLEVEL_TO25PC (0x0 << 2)
348#define VIDINTCON0_FIFOLEVEL_TO50PC (0x1 << 2)
349#define VIDINTCON0_FIFOLEVEL_TO75PC (0x2 << 2)
350#define VIDINTCON0_FIFOLEVEL_EMPTY (0x3 << 2)
351#define VIDINTCON0_FIFOLEVEL_FULL (0x4 << 2)
352
353#define VIDINTCON0_INT_FIFO_MASK (0x3 << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800354#define VIDINTCON0_INT_FIFO_SHIFT 0
Ben Dooks8f995cc2008-11-19 15:41:30 +0000355#define VIDINTCON0_INT_ENABLE (1 << 0)
356
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800357#define VIDINTCON1 0x134
Ben Dooks8f995cc2008-11-19 15:41:30 +0000358#define VIDINTCON1_INT_I180 (1 << 2)
359#define VIDINTCON1_INT_FRAME (1 << 1)
360#define VIDINTCON1_INT_FIFO (1 << 0)
361
362/* Window colour-key control registers */
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800363#define WKEYCON 0x140
Ben Dooksc4bb6ff2010-08-10 18:02:34 -0700364
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800365#define WKEYCON0 0x00
366#define WKEYCON1 0x04
Ben Dooks8f995cc2008-11-19 15:41:30 +0000367
368#define WxKEYCON0_KEYBL_EN (1 << 26)
369#define WxKEYCON0_KEYEN_F (1 << 25)
370#define WxKEYCON0_DIRCON (1 << 24)
371#define WxKEYCON0_COMPKEY_MASK (0xffffff << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800372#define WxKEYCON0_COMPKEY_SHIFT 0
373#define WxKEYCON0_COMPKEY_LIMIT 0xffffff
Ben Dooks8f995cc2008-11-19 15:41:30 +0000374#define WxKEYCON0_COMPKEY(_x) ((_x) << 0)
375#define WxKEYCON1_COLVAL_MASK (0xffffff << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800376#define WxKEYCON1_COLVAL_SHIFT 0
377#define WxKEYCON1_COLVAL_LIMIT 0xffffff
Ben Dooks8f995cc2008-11-19 15:41:30 +0000378#define WxKEYCON1_COLVAL(_x) ((_x) << 0)
379
Jingoo Han31dd94f2012-09-25 17:30:36 +0900380/* Dithering control */
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800381#define DITHMODE 0x170
Jingoo Han31dd94f2012-09-25 17:30:36 +0900382#define DITHMODE_R_POS_MASK (0x3 << 5)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800383#define DITHMODE_R_POS_SHIFT 5
Jingoo Han31dd94f2012-09-25 17:30:36 +0900384#define DITHMODE_R_POS_8BIT (0x0 << 5)
385#define DITHMODE_R_POS_6BIT (0x1 << 5)
386#define DITHMODE_R_POS_5BIT (0x2 << 5)
387#define DITHMODE_G_POS_MASK (0x3 << 3)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800388#define DITHMODE_G_POS_SHIFT 3
Jingoo Han31dd94f2012-09-25 17:30:36 +0900389#define DITHMODE_G_POS_8BIT (0x0 << 3)
390#define DITHMODE_G_POS_6BIT (0x1 << 3)
391#define DITHMODE_G_POS_5BIT (0x2 << 3)
392#define DITHMODE_B_POS_MASK (0x3 << 1)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800393#define DITHMODE_B_POS_SHIFT 1
Jingoo Han31dd94f2012-09-25 17:30:36 +0900394#define DITHMODE_B_POS_8BIT (0x0 << 1)
395#define DITHMODE_B_POS_6BIT (0x1 << 1)
396#define DITHMODE_B_POS_5BIT (0x2 << 1)
397#define DITHMODE_DITH_EN (1 << 0)
398
Ben Dooks8f995cc2008-11-19 15:41:30 +0000399/* Window blanking (MAP) */
Jingoo Han22254542012-09-25 17:16:52 +0900400#define WINxMAP(_win) (0x180 + ((_win) * 4))
Ben Dooks8f995cc2008-11-19 15:41:30 +0000401#define WINxMAP_MAP (1 << 24)
402#define WINxMAP_MAP_COLOUR_MASK (0xffffff << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800403#define WINxMAP_MAP_COLOUR_SHIFT 0
404#define WINxMAP_MAP_COLOUR_LIMIT 0xffffff
Ben Dooks8f995cc2008-11-19 15:41:30 +0000405#define WINxMAP_MAP_COLOUR(_x) ((_x) << 0)
406
Jingoo Han22254542012-09-25 17:16:52 +0900407/* Winodw palette control */
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800408#define WPALCON 0x1A0
Ben Dooks8f995cc2008-11-19 15:41:30 +0000409#define WPALCON_PAL_UPDATE (1 << 9)
Jingoo Han22254542012-09-25 17:16:52 +0900410#define WPALCON_W4PAL_16BPP_A555 (1 << 8)
411#define WPALCON_W3PAL_16BPP_A555 (1 << 7)
412#define WPALCON_W2PAL_16BPP_A555 (1 << 6)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000413#define WPALCON_W1PAL_MASK (0x7 << 3)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800414#define WPALCON_W1PAL_SHIFT 3
Ben Dooks8f995cc2008-11-19 15:41:30 +0000415#define WPALCON_W1PAL_25BPP_A888 (0x0 << 3)
416#define WPALCON_W1PAL_24BPP (0x1 << 3)
417#define WPALCON_W1PAL_19BPP_A666 (0x2 << 3)
418#define WPALCON_W1PAL_18BPP_A665 (0x3 << 3)
419#define WPALCON_W1PAL_18BPP (0x4 << 3)
420#define WPALCON_W1PAL_16BPP_A555 (0x5 << 3)
421#define WPALCON_W1PAL_16BPP_565 (0x6 << 3)
Ben Dooks8f995cc2008-11-19 15:41:30 +0000422#define WPALCON_W0PAL_MASK (0x7 << 0)
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800423#define WPALCON_W0PAL_SHIFT 0
Ben Dooks8f995cc2008-11-19 15:41:30 +0000424#define WPALCON_W0PAL_25BPP_A888 (0x0 << 0)
425#define WPALCON_W0PAL_24BPP (0x1 << 0)
426#define WPALCON_W0PAL_19BPP_A666 (0x2 << 0)
427#define WPALCON_W0PAL_18BPP_A665 (0x3 << 0)
428#define WPALCON_W0PAL_18BPP (0x4 << 0)
429#define WPALCON_W0PAL_16BPP_A555 (0x5 << 0)
430#define WPALCON_W0PAL_16BPP_565 (0x6 << 0)
431
Jingoo Hanf7f31e52012-01-27 14:47:22 +0900432/* Blending equation control */
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800433#define BLENDCON 0x260
Jingoo Hanf7f31e52012-01-27 14:47:22 +0900434#define BLENDCON_NEW_MASK (1 << 0)
435#define BLENDCON_NEW_8BIT_ALPHA_VALUE (1 << 0)
436#define BLENDCON_NEW_4BIT_ALPHA_VALUE (0 << 0)
437
Leela Krishna Amudala5a213a52012-08-08 09:44:49 +0900438/* Notes on per-window bpp settings
439 *
440 * Value Win0 Win1 Win2 Win3 Win 4
441 * 0000 1(P) 1(P) 1(P) 1(P) 1(P)
442 * 0001 2(P) 2(P) 2(P) 2(P) 2(P)
443 * 0010 4(P) 4(P) 4(P) 4(P) -none-
444 * 0011 8(P) 8(P) -none- -none- -none-
445 * 0100 -none- 8(A232) 8(A232) -none- -none-
446 * 0101 16(565) 16(565) 16(565) 16(565) 16(565)
447 * 0110 -none- 16(A555) 16(A555) 16(A555) 16(A555)
448 * 0111 16(I555) 16(I565) 16(I555) 16(I555) 16(I555)
449 * 1000 18(666) 18(666) 18(666) 18(666) 18(666)
450 * 1001 -none- 18(A665) 18(A665) 18(A665) 16(A665)
451 * 1010 -none- 19(A666) 19(A666) 19(A666) 19(A666)
452 * 1011 24(888) 24(888) 24(888) 24(888) 24(888)
453 * 1100 -none- 24(A887) 24(A887) 24(A887) 24(A887)
454 * 1101 -none- 25(A888) 25(A888) 25(A888) 25(A888)
455 * 1110 -none- -none- -none- -none- -none-
456 * 1111 -none- -none- -none- -none- -none-
457*/
Leela Krishna Amudalaa44cf752012-08-08 09:44:50 +0900458
459/* FIMD Version 8 register offset definitions */
Jingoo Hanfe6863c2013-02-21 16:42:33 -0800460#define FIMD_V8_VIDTCON0 0x20010
461#define FIMD_V8_VIDTCON1 0x20014
462#define FIMD_V8_VIDTCON2 0x20018
463#define FIMD_V8_VIDTCON3 0x2001C
464#define FIMD_V8_VIDCON1 0x20004