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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * arch/ppc/platforms/pplus.h
3 *
4 * Definitions for Motorola MCG Falcon/Raven & HAWK North Bridge & Memory ctlr.
5 *
6 * Author: Mark A. Greerinclude/asm-ppc/hawk.h
7 * mgreer@mvista.com
8 *
9 * Modified by Randy Vinson (rvinson@mvista.com)
10 *
11 * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
12 * the terms of the GNU General Public License version 2. This program
13 * is licensed "as is" without any warranty of any kind, whether express
14 * or implied.
15 */
16
17#ifndef __PPC_PPLUS_H
18#define __PPC_PPLUS_H
19
20#include <asm/io.h>
21
22/*
23 * Due to limiations imposed by legacy hardware (primaryily IDE controllers),
24 * the PPLUS boards operate using a PReP address map.
25 *
26 * From Processor (physical) -> PCI:
27 * PCI Mem Space: 0xc0000000 - 0xfe000000 -> 0x00000000 - 0x3e000000 (768 MB)
28 * PCI I/O Space: 0x80000000 - 0x90000000 -> 0x00000000 - 0x10000000 (256 MB)
29 * Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area
30 *
31 * From PCI -> Processor (physical):
32 * System Memory: 0x80000000 -> 0x00000000
33 */
34
35#define PPLUS_ISA_MEM_BASE PREP_ISA_MEM_BASE
36#define PPLUS_ISA_IO_BASE PREP_ISA_IO_BASE
37
38/* PCI Memory space mapping info */
39#define PPLUS_PCI_MEM_SIZE 0x30000000U
40#define PPLUS_PROC_PCI_MEM_START PPLUS_ISA_MEM_BASE
41#define PPLUS_PROC_PCI_MEM_END (PPLUS_PROC_PCI_MEM_START + \
42 PPLUS_PCI_MEM_SIZE - 1)
43#define PPLUS_PCI_MEM_START 0x00000000U
44#define PPLUS_PCI_MEM_END (PPLUS_PCI_MEM_START + \
45 PPLUS_PCI_MEM_SIZE - 1)
46
47/* PCI I/O space mapping info */
48#define PPLUS_PCI_IO_SIZE 0x10000000U
49#define PPLUS_PROC_PCI_IO_START PPLUS_ISA_IO_BASE
50#define PPLUS_PROC_PCI_IO_END (PPLUS_PROC_PCI_IO_START + \
51 PPLUS_PCI_IO_SIZE - 1)
52#define PPLUS_PCI_IO_START 0x00000000U
53#define PPLUS_PCI_IO_END (PPLUS_PCI_IO_START + \
54 PPLUS_PCI_IO_SIZE - 1)
55/* System memory mapping info */
56#define PPLUS_PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET
57#define PPLUS_PCI_PHY_MEM_OFFSET (PPLUS_ISA_MEM_BASE-PPLUS_PCI_MEM_START)
58
59/* Define base addresses for important sets of registers */
60#define PPLUS_HAWK_SMC_BASE 0xfef80000U
61#define PPLUS_HAWK_PPC_REG_BASE 0xfeff0000U
62#define PPLUS_SYS_CONFIG_REG 0xfef80400U
63#define PPLUS_L2_CONTROL_REG 0x8000081cU
64
65#define PPLUS_VGA_MEM_BASE 0xf0000000U
66
67#endif /* __PPC_PPLUS_H */