| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM |
| 3 | * |
| 4 | * Based on alpha version. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #ifndef OP_IMPL_H |
| 13 | #define OP_IMPL_H 1 |
| 14 | |
| 15 | #define OP_MAX_COUNTER 8 |
| 16 | |
| 17 | /* Per-counter configuration as set via oprofilefs. */ |
| 18 | struct op_counter_config { |
| 19 | unsigned long valid; |
| 20 | unsigned long enabled; |
| 21 | unsigned long event; |
| 22 | unsigned long count; |
| 23 | unsigned long kernel; |
| 24 | /* We dont support per counter user/kernel selection */ |
| 25 | unsigned long user; |
| 26 | unsigned long unit_mask; |
| 27 | }; |
| 28 | |
| 29 | /* System-wide configuration as set via oprofilefs. */ |
| 30 | struct op_system_config { |
| 31 | unsigned long mmcr0; |
| 32 | unsigned long mmcr1; |
| 33 | unsigned long mmcra; |
| 34 | unsigned long enable_kernel; |
| 35 | unsigned long enable_user; |
| 36 | unsigned long backtrace_spinlocks; |
| 37 | }; |
| 38 | |
| 39 | /* Per-arch configuration */ |
| 40 | struct op_ppc64_model { |
| 41 | void (*reg_setup) (struct op_counter_config *, |
| 42 | struct op_system_config *, |
| 43 | int num_counters); |
| 44 | void (*cpu_setup) (void *); |
| 45 | void (*start) (struct op_counter_config *); |
| 46 | void (*stop) (void); |
| 47 | void (*handle_interrupt) (struct pt_regs *, |
| 48 | struct op_counter_config *); |
| 49 | int num_counters; |
| 50 | }; |
| 51 | |
| 52 | static inline unsigned int ctr_read(unsigned int i) |
| 53 | { |
| 54 | switch(i) { |
| 55 | case 0: |
| 56 | return mfspr(SPRN_PMC1); |
| 57 | case 1: |
| 58 | return mfspr(SPRN_PMC2); |
| 59 | case 2: |
| 60 | return mfspr(SPRN_PMC3); |
| 61 | case 3: |
| 62 | return mfspr(SPRN_PMC4); |
| 63 | case 4: |
| 64 | return mfspr(SPRN_PMC5); |
| 65 | case 5: |
| 66 | return mfspr(SPRN_PMC6); |
| 67 | case 6: |
| 68 | return mfspr(SPRN_PMC7); |
| 69 | case 7: |
| 70 | return mfspr(SPRN_PMC8); |
| 71 | default: |
| 72 | return 0; |
| 73 | } |
| 74 | } |
| 75 | |
| 76 | static inline void ctr_write(unsigned int i, unsigned int val) |
| 77 | { |
| 78 | switch(i) { |
| 79 | case 0: |
| 80 | mtspr(SPRN_PMC1, val); |
| 81 | break; |
| 82 | case 1: |
| 83 | mtspr(SPRN_PMC2, val); |
| 84 | break; |
| 85 | case 2: |
| 86 | mtspr(SPRN_PMC3, val); |
| 87 | break; |
| 88 | case 3: |
| 89 | mtspr(SPRN_PMC4, val); |
| 90 | break; |
| 91 | case 4: |
| 92 | mtspr(SPRN_PMC5, val); |
| 93 | break; |
| 94 | case 5: |
| 95 | mtspr(SPRN_PMC6, val); |
| 96 | break; |
| 97 | case 6: |
| 98 | mtspr(SPRN_PMC7, val); |
| 99 | break; |
| 100 | case 7: |
| 101 | mtspr(SPRN_PMC8, val); |
| 102 | break; |
| 103 | default: |
| 104 | break; |
| 105 | } |
| 106 | } |
| 107 | |
| 108 | #endif |