blob: db059bb8edc3f049f006e6b05844a3f76c48cb25 [file] [log] [blame]
Jamie Iles7779b342014-02-25 17:01:01 -06001/*
2 * Copyright (c) 2011 Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * All enquiries to support@picochip.com
9 */
10#include <linux/basic_mmio_gpio.h>
11#include <linux/err.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <linux/ioport.h>
16#include <linux/irq.h>
17#include <linux/irqdomain.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_address.h>
21#include <linux/of_irq.h>
22#include <linux/platform_device.h>
23#include <linux/spinlock.h>
Weike Chen3d2613c2014-09-17 09:18:39 -070024#include <linux/platform_data/gpio-dwapb.h>
25#include <linux/slab.h>
Jamie Iles7779b342014-02-25 17:01:01 -060026
27#define GPIO_SWPORTA_DR 0x00
28#define GPIO_SWPORTA_DDR 0x04
29#define GPIO_SWPORTB_DR 0x0c
30#define GPIO_SWPORTB_DDR 0x10
31#define GPIO_SWPORTC_DR 0x18
32#define GPIO_SWPORTC_DDR 0x1c
33#define GPIO_SWPORTD_DR 0x24
34#define GPIO_SWPORTD_DDR 0x28
35#define GPIO_INTEN 0x30
36#define GPIO_INTMASK 0x34
37#define GPIO_INTTYPE_LEVEL 0x38
38#define GPIO_INT_POLARITY 0x3c
39#define GPIO_INTSTATUS 0x40
Weike Chen5d60d9e2014-09-17 09:18:41 -070040#define GPIO_PORTA_DEBOUNCE 0x48
Jamie Iles7779b342014-02-25 17:01:01 -060041#define GPIO_PORTA_EOI 0x4c
42#define GPIO_EXT_PORTA 0x50
43#define GPIO_EXT_PORTB 0x54
44#define GPIO_EXT_PORTC 0x58
45#define GPIO_EXT_PORTD 0x5c
46
47#define DWAPB_MAX_PORTS 4
48#define GPIO_EXT_PORT_SIZE (GPIO_EXT_PORTB - GPIO_EXT_PORTA)
49#define GPIO_SWPORT_DR_SIZE (GPIO_SWPORTB_DR - GPIO_SWPORTA_DR)
50#define GPIO_SWPORT_DDR_SIZE (GPIO_SWPORTB_DDR - GPIO_SWPORTA_DDR)
51
52struct dwapb_gpio;
53
54struct dwapb_gpio_port {
55 struct bgpio_chip bgc;
56 bool is_registered;
57 struct dwapb_gpio *gpio;
58};
59
60struct dwapb_gpio {
61 struct device *dev;
62 void __iomem *regs;
63 struct dwapb_gpio_port *ports;
64 unsigned int nr_ports;
65 struct irq_domain *domain;
66};
67
Weike Chen5d60d9e2014-09-17 09:18:41 -070068static inline struct dwapb_gpio_port *
69to_dwapb_gpio_port(struct bgpio_chip *bgc)
70{
71 return container_of(bgc, struct dwapb_gpio_port, bgc);
72}
73
Weike Chen67809b92014-09-17 09:18:40 -070074static inline u32 dwapb_read(struct dwapb_gpio *gpio, unsigned int offset)
75{
76 struct bgpio_chip *bgc = &gpio->ports[0].bgc;
77 void __iomem *reg_base = gpio->regs;
78
79 return bgc->read_reg(reg_base + offset);
80}
81
82static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset,
83 u32 val)
84{
85 struct bgpio_chip *bgc = &gpio->ports[0].bgc;
86 void __iomem *reg_base = gpio->regs;
87
88 bgc->write_reg(reg_base + offset, val);
89}
90
Jamie Iles7779b342014-02-25 17:01:01 -060091static int dwapb_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
92{
93 struct bgpio_chip *bgc = to_bgpio_chip(gc);
Weike Chen5d60d9e2014-09-17 09:18:41 -070094 struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc);
Jamie Iles7779b342014-02-25 17:01:01 -060095 struct dwapb_gpio *gpio = port->gpio;
96
97 return irq_find_mapping(gpio->domain, offset);
98}
99
100static void dwapb_toggle_trigger(struct dwapb_gpio *gpio, unsigned int offs)
101{
Weike Chen67809b92014-09-17 09:18:40 -0700102 u32 v = dwapb_read(gpio, GPIO_INT_POLARITY);
Jamie Iles7779b342014-02-25 17:01:01 -0600103
104 if (gpio_get_value(gpio->ports[0].bgc.gc.base + offs))
105 v &= ~BIT(offs);
106 else
107 v |= BIT(offs);
108
Weike Chen67809b92014-09-17 09:18:40 -0700109 dwapb_write(gpio, GPIO_INT_POLARITY, v);
Jamie Iles7779b342014-02-25 17:01:01 -0600110}
111
Weike Chen3d2613c2014-09-17 09:18:39 -0700112static u32 dwapb_do_irq(struct dwapb_gpio *gpio)
Jamie Iles7779b342014-02-25 17:01:01 -0600113{
Jamie Iles7779b342014-02-25 17:01:01 -0600114 u32 irq_status = readl_relaxed(gpio->regs + GPIO_INTSTATUS);
Weike Chen3d2613c2014-09-17 09:18:39 -0700115 u32 ret = irq_status;
Jamie Iles7779b342014-02-25 17:01:01 -0600116
117 while (irq_status) {
118 int hwirq = fls(irq_status) - 1;
119 int gpio_irq = irq_find_mapping(gpio->domain, hwirq);
120
121 generic_handle_irq(gpio_irq);
122 irq_status &= ~BIT(hwirq);
123
124 if ((irq_get_trigger_type(gpio_irq) & IRQ_TYPE_SENSE_MASK)
125 == IRQ_TYPE_EDGE_BOTH)
126 dwapb_toggle_trigger(gpio, hwirq);
127 }
128
Weike Chen3d2613c2014-09-17 09:18:39 -0700129 return ret;
130}
131
132static void dwapb_irq_handler(u32 irq, struct irq_desc *desc)
133{
134 struct dwapb_gpio *gpio = irq_get_handler_data(irq);
135 struct irq_chip *chip = irq_desc_get_chip(desc);
136
137 dwapb_do_irq(gpio);
138
Jamie Iles7779b342014-02-25 17:01:01 -0600139 if (chip->irq_eoi)
140 chip->irq_eoi(irq_desc_get_irq_data(desc));
141}
142
143static void dwapb_irq_enable(struct irq_data *d)
144{
145 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
146 struct dwapb_gpio *gpio = igc->private;
147 struct bgpio_chip *bgc = &gpio->ports[0].bgc;
148 unsigned long flags;
149 u32 val;
150
151 spin_lock_irqsave(&bgc->lock, flags);
Weike Chen67809b92014-09-17 09:18:40 -0700152 val = dwapb_read(gpio, GPIO_INTEN);
Jamie Iles7779b342014-02-25 17:01:01 -0600153 val |= BIT(d->hwirq);
Weike Chen67809b92014-09-17 09:18:40 -0700154 dwapb_write(gpio, GPIO_INTEN, val);
Jamie Iles7779b342014-02-25 17:01:01 -0600155 spin_unlock_irqrestore(&bgc->lock, flags);
156}
157
158static void dwapb_irq_disable(struct irq_data *d)
159{
160 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
161 struct dwapb_gpio *gpio = igc->private;
162 struct bgpio_chip *bgc = &gpio->ports[0].bgc;
163 unsigned long flags;
164 u32 val;
165
166 spin_lock_irqsave(&bgc->lock, flags);
Weike Chen67809b92014-09-17 09:18:40 -0700167 val = dwapb_read(gpio, GPIO_INTEN);
Jamie Iles7779b342014-02-25 17:01:01 -0600168 val &= ~BIT(d->hwirq);
Weike Chen67809b92014-09-17 09:18:40 -0700169 dwapb_write(gpio, GPIO_INTEN, val);
Jamie Iles7779b342014-02-25 17:01:01 -0600170 spin_unlock_irqrestore(&bgc->lock, flags);
171}
172
Linus Walleij57ef0422014-03-14 18:16:20 +0100173static int dwapb_irq_reqres(struct irq_data *d)
Jamie Iles7779b342014-02-25 17:01:01 -0600174{
175 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
176 struct dwapb_gpio *gpio = igc->private;
177 struct bgpio_chip *bgc = &gpio->ports[0].bgc;
178
Linus Walleij57ef0422014-03-14 18:16:20 +0100179 if (gpio_lock_as_irq(&bgc->gc, irqd_to_hwirq(d))) {
Jamie Iles7779b342014-02-25 17:01:01 -0600180 dev_err(gpio->dev, "unable to lock HW IRQ %lu for IRQ\n",
181 irqd_to_hwirq(d));
Linus Walleij57ef0422014-03-14 18:16:20 +0100182 return -EINVAL;
183 }
Jamie Iles7779b342014-02-25 17:01:01 -0600184 return 0;
185}
186
Linus Walleij57ef0422014-03-14 18:16:20 +0100187static void dwapb_irq_relres(struct irq_data *d)
Jamie Iles7779b342014-02-25 17:01:01 -0600188{
189 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
190 struct dwapb_gpio *gpio = igc->private;
191 struct bgpio_chip *bgc = &gpio->ports[0].bgc;
192
Jamie Iles7779b342014-02-25 17:01:01 -0600193 gpio_unlock_as_irq(&bgc->gc, irqd_to_hwirq(d));
194}
195
196static int dwapb_irq_set_type(struct irq_data *d, u32 type)
197{
198 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
199 struct dwapb_gpio *gpio = igc->private;
200 struct bgpio_chip *bgc = &gpio->ports[0].bgc;
201 int bit = d->hwirq;
202 unsigned long level, polarity, flags;
203
204 if (type & ~(IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
205 IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
206 return -EINVAL;
207
208 spin_lock_irqsave(&bgc->lock, flags);
Weike Chen67809b92014-09-17 09:18:40 -0700209 level = dwapb_read(gpio, GPIO_INTTYPE_LEVEL);
210 polarity = dwapb_read(gpio, GPIO_INT_POLARITY);
Jamie Iles7779b342014-02-25 17:01:01 -0600211
212 switch (type) {
213 case IRQ_TYPE_EDGE_BOTH:
214 level |= BIT(bit);
215 dwapb_toggle_trigger(gpio, bit);
216 break;
217 case IRQ_TYPE_EDGE_RISING:
218 level |= BIT(bit);
219 polarity |= BIT(bit);
220 break;
221 case IRQ_TYPE_EDGE_FALLING:
222 level |= BIT(bit);
223 polarity &= ~BIT(bit);
224 break;
225 case IRQ_TYPE_LEVEL_HIGH:
226 level &= ~BIT(bit);
227 polarity |= BIT(bit);
228 break;
229 case IRQ_TYPE_LEVEL_LOW:
230 level &= ~BIT(bit);
231 polarity &= ~BIT(bit);
232 break;
233 }
234
Sebastian Andrzej Siewior6a2f4b72014-05-26 22:58:14 +0200235 irq_setup_alt_chip(d, type);
236
Weike Chen67809b92014-09-17 09:18:40 -0700237 dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level);
238 dwapb_write(gpio, GPIO_INT_POLARITY, polarity);
Jamie Iles7779b342014-02-25 17:01:01 -0600239 spin_unlock_irqrestore(&bgc->lock, flags);
240
241 return 0;
242}
243
Weike Chen5d60d9e2014-09-17 09:18:41 -0700244static int dwapb_gpio_set_debounce(struct gpio_chip *gc,
245 unsigned offset, unsigned debounce)
246{
247 struct bgpio_chip *bgc = to_bgpio_chip(gc);
248 struct dwapb_gpio_port *port = to_dwapb_gpio_port(bgc);
249 struct dwapb_gpio *gpio = port->gpio;
250 unsigned long flags, val_deb;
251 unsigned long mask = bgc->pin2mask(bgc, offset);
252
253 spin_lock_irqsave(&bgc->lock, flags);
254
255 val_deb = dwapb_read(gpio, GPIO_PORTA_DEBOUNCE);
256 if (debounce)
257 dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb | mask);
258 else
259 dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb & ~mask);
260
261 spin_unlock_irqrestore(&bgc->lock, flags);
262
263 return 0;
264}
265
Weike Chen3d2613c2014-09-17 09:18:39 -0700266static irqreturn_t dwapb_irq_handler_mfd(int irq, void *dev_id)
267{
268 u32 worked;
269 struct dwapb_gpio *gpio = dev_id;
270
271 worked = dwapb_do_irq(gpio);
272
273 return worked ? IRQ_HANDLED : IRQ_NONE;
274}
275
Jamie Iles7779b342014-02-25 17:01:01 -0600276static void dwapb_configure_irqs(struct dwapb_gpio *gpio,
Weike Chen3d2613c2014-09-17 09:18:39 -0700277 struct dwapb_gpio_port *port,
278 struct dwapb_port_property *pp)
Jamie Iles7779b342014-02-25 17:01:01 -0600279{
280 struct gpio_chip *gc = &port->bgc.gc;
Weike Chen3d2613c2014-09-17 09:18:39 -0700281 struct device_node *node = pp->node;
282 struct irq_chip_generic *irq_gc = NULL;
Jamie Iles7779b342014-02-25 17:01:01 -0600283 unsigned int hwirq, ngpio = gc->ngpio;
284 struct irq_chip_type *ct;
Weike Chen3d2613c2014-09-17 09:18:39 -0700285 int err, i;
Jamie Iles7779b342014-02-25 17:01:01 -0600286
287 gpio->domain = irq_domain_add_linear(node, ngpio,
288 &irq_generic_chip_ops, gpio);
289 if (!gpio->domain)
290 return;
291
Sebastian Andrzej Siewior6a2f4b72014-05-26 22:58:14 +0200292 err = irq_alloc_domain_generic_chips(gpio->domain, ngpio, 2,
Jamie Iles7779b342014-02-25 17:01:01 -0600293 "gpio-dwapb", handle_level_irq,
294 IRQ_NOREQUEST, 0,
295 IRQ_GC_INIT_NESTED_LOCK);
296 if (err) {
297 dev_info(gpio->dev, "irq_alloc_domain_generic_chips failed\n");
298 irq_domain_remove(gpio->domain);
299 gpio->domain = NULL;
300 return;
301 }
302
303 irq_gc = irq_get_domain_generic_chip(gpio->domain, 0);
304 if (!irq_gc) {
305 irq_domain_remove(gpio->domain);
306 gpio->domain = NULL;
307 return;
308 }
309
310 irq_gc->reg_base = gpio->regs;
311 irq_gc->private = gpio;
312
Sebastian Andrzej Siewior6a2f4b72014-05-26 22:58:14 +0200313 for (i = 0; i < 2; i++) {
314 ct = &irq_gc->chip_types[i];
315 ct->chip.irq_ack = irq_gc_ack_set_bit;
316 ct->chip.irq_mask = irq_gc_mask_set_bit;
317 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
318 ct->chip.irq_set_type = dwapb_irq_set_type;
319 ct->chip.irq_enable = dwapb_irq_enable;
320 ct->chip.irq_disable = dwapb_irq_disable;
321 ct->chip.irq_request_resources = dwapb_irq_reqres;
322 ct->chip.irq_release_resources = dwapb_irq_relres;
323 ct->regs.ack = GPIO_PORTA_EOI;
324 ct->regs.mask = GPIO_INTMASK;
325 ct->type = IRQ_TYPE_LEVEL_MASK;
326 }
327
328 irq_gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK;
329 irq_gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH;
330 irq_gc->chip_types[1].handler = handle_edge_irq;
Jamie Iles7779b342014-02-25 17:01:01 -0600331
Weike Chen3d2613c2014-09-17 09:18:39 -0700332 if (!pp->irq_shared) {
333 irq_set_chained_handler(pp->irq, dwapb_irq_handler);
334 irq_set_handler_data(pp->irq, gpio);
335 } else {
336 /*
337 * Request a shared IRQ since where MFD would have devices
338 * using the same irq pin
339 */
340 err = devm_request_irq(gpio->dev, pp->irq,
341 dwapb_irq_handler_mfd,
342 IRQF_SHARED, "gpio-dwapb-mfd", gpio);
343 if (err) {
344 dev_err(gpio->dev, "error requesting IRQ\n");
345 irq_domain_remove(gpio->domain);
346 gpio->domain = NULL;
347 return;
348 }
349 }
Jamie Iles7779b342014-02-25 17:01:01 -0600350
351 for (hwirq = 0 ; hwirq < ngpio ; hwirq++)
352 irq_create_mapping(gpio->domain, hwirq);
353
354 port->bgc.gc.to_irq = dwapb_gpio_to_irq;
355}
356
357static void dwapb_irq_teardown(struct dwapb_gpio *gpio)
358{
359 struct dwapb_gpio_port *port = &gpio->ports[0];
360 struct gpio_chip *gc = &port->bgc.gc;
361 unsigned int ngpio = gc->ngpio;
362 irq_hw_number_t hwirq;
363
364 if (!gpio->domain)
365 return;
366
367 for (hwirq = 0 ; hwirq < ngpio ; hwirq++)
368 irq_dispose_mapping(irq_find_mapping(gpio->domain, hwirq));
369
370 irq_domain_remove(gpio->domain);
371 gpio->domain = NULL;
372}
373
374static int dwapb_gpio_add_port(struct dwapb_gpio *gpio,
Weike Chen3d2613c2014-09-17 09:18:39 -0700375 struct dwapb_port_property *pp,
Jamie Iles7779b342014-02-25 17:01:01 -0600376 unsigned int offs)
377{
378 struct dwapb_gpio_port *port;
Jamie Iles7779b342014-02-25 17:01:01 -0600379 void __iomem *dat, *set, *dirout;
380 int err;
381
Jamie Iles7779b342014-02-25 17:01:01 -0600382 port = &gpio->ports[offs];
383 port->gpio = gpio;
384
Weike Chen3d2613c2014-09-17 09:18:39 -0700385 dat = gpio->regs + GPIO_EXT_PORTA + (pp->idx * GPIO_EXT_PORT_SIZE);
386 set = gpio->regs + GPIO_SWPORTA_DR + (pp->idx * GPIO_SWPORT_DR_SIZE);
Jamie Iles7779b342014-02-25 17:01:01 -0600387 dirout = gpio->regs + GPIO_SWPORTA_DDR +
Weike Chen3d2613c2014-09-17 09:18:39 -0700388 (pp->idx * GPIO_SWPORT_DDR_SIZE);
Jamie Iles7779b342014-02-25 17:01:01 -0600389
390 err = bgpio_init(&port->bgc, gpio->dev, 4, dat, set, NULL, dirout,
391 NULL, false);
392 if (err) {
393 dev_err(gpio->dev, "failed to init gpio chip for %s\n",
Weike Chen3d2613c2014-09-17 09:18:39 -0700394 pp->name);
Jamie Iles7779b342014-02-25 17:01:01 -0600395 return err;
396 }
397
Weike Chen3d2613c2014-09-17 09:18:39 -0700398#ifdef CONFIG_OF_GPIO
399 port->bgc.gc.of_node = pp->node;
400#endif
401 port->bgc.gc.ngpio = pp->ngpio;
402 port->bgc.gc.base = pp->gpio_base;
Jamie Iles7779b342014-02-25 17:01:01 -0600403
Weike Chen5d60d9e2014-09-17 09:18:41 -0700404 /* Only port A support debounce */
405 if (pp->idx == 0)
406 port->bgc.gc.set_debounce = dwapb_gpio_set_debounce;
407
Weike Chen3d2613c2014-09-17 09:18:39 -0700408 if (pp->irq)
409 dwapb_configure_irqs(gpio, port, pp);
Jamie Iles7779b342014-02-25 17:01:01 -0600410
411 err = gpiochip_add(&port->bgc.gc);
412 if (err)
413 dev_err(gpio->dev, "failed to register gpiochip for %s\n",
Weike Chen3d2613c2014-09-17 09:18:39 -0700414 pp->name);
Jamie Iles7779b342014-02-25 17:01:01 -0600415 else
416 port->is_registered = true;
417
418 return err;
419}
420
421static void dwapb_gpio_unregister(struct dwapb_gpio *gpio)
422{
423 unsigned int m;
424
425 for (m = 0; m < gpio->nr_ports; ++m)
426 if (gpio->ports[m].is_registered)
abdoulaye berthe9f5132a2014-07-12 22:30:12 +0200427 gpiochip_remove(&gpio->ports[m].bgc.gc);
Jamie Iles7779b342014-02-25 17:01:01 -0600428}
429
Weike Chen3d2613c2014-09-17 09:18:39 -0700430static struct dwapb_platform_data *
431dwapb_gpio_get_pdata_of(struct device *dev)
432{
433 struct device_node *node, *port_np;
434 struct dwapb_platform_data *pdata;
435 struct dwapb_port_property *pp;
436 int nports;
437 int i;
438
439 node = dev->of_node;
440 if (!IS_ENABLED(CONFIG_OF_GPIO) || !node)
441 return ERR_PTR(-ENODEV);
442
443 nports = of_get_child_count(node);
444 if (nports == 0)
445 return ERR_PTR(-ENODEV);
446
447 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
448 if (!pdata)
449 return ERR_PTR(-ENOMEM);
450
451 pdata->properties = kcalloc(nports, sizeof(*pp), GFP_KERNEL);
452 if (!pdata->properties) {
453 kfree(pdata);
454 return ERR_PTR(-ENOMEM);
455 }
456
457 pdata->nports = nports;
458
459 i = 0;
460 for_each_child_of_node(node, port_np) {
461 pp = &pdata->properties[i++];
462 pp->node = port_np;
463
464 if (of_property_read_u32(port_np, "reg", &pp->idx) ||
465 pp->idx >= DWAPB_MAX_PORTS) {
466 dev_err(dev, "missing/invalid port index for %s\n",
467 port_np->full_name);
468 kfree(pdata->properties);
469 kfree(pdata);
470 return ERR_PTR(-EINVAL);
471 }
472
473 if (of_property_read_u32(port_np, "snps,nr-gpios",
474 &pp->ngpio)) {
475 dev_info(dev, "failed to get number of gpios for %s\n",
476 port_np->full_name);
477 pp->ngpio = 32;
478 }
479
480 /*
481 * Only port A can provide interrupts in all configurations of
482 * the IP.
483 */
484 if (pp->idx == 0 &&
485 of_property_read_bool(port_np, "interrupt-controller")) {
486 pp->irq = irq_of_parse_and_map(port_np, 0);
487 if (!pp->irq) {
488 dev_warn(dev, "no irq for bank %s\n",
489 port_np->full_name);
490 }
491 }
492
493 pp->irq_shared = false;
494 pp->gpio_base = -1;
495 pp->name = port_np->full_name;
496 }
497
498 return pdata;
499}
500
501static inline void dwapb_free_pdata_of(struct dwapb_platform_data *pdata)
502{
503 if (!IS_ENABLED(CONFIG_OF_GPIO) || !pdata)
504 return;
505
506 kfree(pdata->properties);
507 kfree(pdata);
508}
509
Jamie Iles7779b342014-02-25 17:01:01 -0600510static int dwapb_gpio_probe(struct platform_device *pdev)
511{
Weike Chen3d2613c2014-09-17 09:18:39 -0700512 unsigned int i;
Jamie Iles7779b342014-02-25 17:01:01 -0600513 struct resource *res;
514 struct dwapb_gpio *gpio;
Jamie Iles7779b342014-02-25 17:01:01 -0600515 int err;
Weike Chen3d2613c2014-09-17 09:18:39 -0700516 struct device *dev = &pdev->dev;
517 struct dwapb_platform_data *pdata = dev_get_platdata(dev);
518 bool is_pdata_alloc = !pdata;
Jamie Iles7779b342014-02-25 17:01:01 -0600519
Weike Chen3d2613c2014-09-17 09:18:39 -0700520 if (is_pdata_alloc) {
521 pdata = dwapb_gpio_get_pdata_of(dev);
522 if (IS_ERR(pdata))
523 return PTR_ERR(pdata);
524 }
Jamie Iles7779b342014-02-25 17:01:01 -0600525
Weike Chen3d2613c2014-09-17 09:18:39 -0700526 if (!pdata->nports) {
527 err = -ENODEV;
Jamie Iles7779b342014-02-25 17:01:01 -0600528 goto out_err;
529 }
Weike Chen3d2613c2014-09-17 09:18:39 -0700530
531 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
532 if (!gpio) {
533 err = -ENOMEM;
534 goto out_err;
535 }
536 gpio->dev = &pdev->dev;
537 gpio->nr_ports = pdata->nports;
538
539 gpio->ports = devm_kcalloc(&pdev->dev, gpio->nr_ports,
Jamie Iles7779b342014-02-25 17:01:01 -0600540 sizeof(*gpio->ports), GFP_KERNEL);
541 if (!gpio->ports) {
542 err = -ENOMEM;
543 goto out_err;
544 }
545
546 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
547 gpio->regs = devm_ioremap_resource(&pdev->dev, res);
548 if (IS_ERR(gpio->regs)) {
549 err = PTR_ERR(gpio->regs);
550 goto out_err;
551 }
552
Weike Chen3d2613c2014-09-17 09:18:39 -0700553 for (i = 0; i < gpio->nr_ports; i++) {
554 err = dwapb_gpio_add_port(gpio, &pdata->properties[i], i);
Jamie Iles7779b342014-02-25 17:01:01 -0600555 if (err)
556 goto out_unregister;
557 }
558 platform_set_drvdata(pdev, gpio);
559
Weike Chen3d2613c2014-09-17 09:18:39 -0700560 goto out_err;
Jamie Iles7779b342014-02-25 17:01:01 -0600561
562out_unregister:
563 dwapb_gpio_unregister(gpio);
564 dwapb_irq_teardown(gpio);
565
566out_err:
Weike Chen3d2613c2014-09-17 09:18:39 -0700567 if (is_pdata_alloc)
568 dwapb_free_pdata_of(pdata);
569
Jamie Iles7779b342014-02-25 17:01:01 -0600570 return err;
571}
572
573static int dwapb_gpio_remove(struct platform_device *pdev)
574{
575 struct dwapb_gpio *gpio = platform_get_drvdata(pdev);
576
577 dwapb_gpio_unregister(gpio);
578 dwapb_irq_teardown(gpio);
579
580 return 0;
581}
582
583static const struct of_device_id dwapb_of_match[] = {
584 { .compatible = "snps,dw-apb-gpio" },
585 { /* Sentinel */ }
586};
587MODULE_DEVICE_TABLE(of, dwapb_of_match);
588
589static struct platform_driver dwapb_gpio_driver = {
590 .driver = {
591 .name = "gpio-dwapb",
592 .owner = THIS_MODULE,
593 .of_match_table = of_match_ptr(dwapb_of_match),
594 },
595 .probe = dwapb_gpio_probe,
596 .remove = dwapb_gpio_remove,
597};
598
599module_platform_driver(dwapb_gpio_driver);
600
601MODULE_LICENSE("GPL");
602MODULE_AUTHOR("Jamie Iles");
603MODULE_DESCRIPTION("Synopsys DesignWare APB GPIO driver");