| Florian Fainelli | e090d50 | 2010-03-21 01:06:05 +0100 | [diff] [blame] | 1 | #ifndef __RDC321X_MFD_H |
| 2 | #define __RDC321X_MFD_H |
| 3 | |
| 4 | #include <linux/types.h> |
| 5 | #include <linux/pci.h> |
| 6 | |
| 7 | /* Offsets to be accessed in the southbridge PCI |
| 8 | * device configuration register */ |
| 9 | #define RDC321X_WDT_CTRL 0x44 |
| 10 | #define RDC321X_GPIO_CTRL_REG1 0x48 |
| 11 | #define RDC321X_GPIO_DATA_REG1 0x4c |
| 12 | #define RDC321X_GPIO_CTRL_REG2 0x84 |
| 13 | #define RDC321X_GPIO_DATA_REG2 0x88 |
| 14 | |
| Axel Lin | 1ec93b9 | 2014-04-25 09:24:21 +0800 | [diff] [blame^] | 15 | #define RDC321X_NUM_GPIO 59 |
| Florian Fainelli | e090d50 | 2010-03-21 01:06:05 +0100 | [diff] [blame] | 16 | |
| 17 | struct rdc321x_gpio_pdata { |
| 18 | struct pci_dev *sb_pdev; |
| 19 | unsigned max_gpios; |
| 20 | }; |
| 21 | |
| 22 | struct rdc321x_wdt_pdata { |
| 23 | struct pci_dev *sb_pdev; |
| 24 | }; |
| 25 | |
| 26 | #endif /* __RDC321X_MFD_H */ |