Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2010-2011 Calxeda, Inc. |
| 3 | * Copyright 2012 Pavel Machek <pavel@denx.de> |
| 4 | * Based on platsmp.c, Copyright (C) 2002 ARM Ltd. |
| 5 | * Copyright (C) 2012 Altera Corporation |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms and conditions of the GNU General Public License, |
| 9 | * version 2, as published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 14 | * more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along with |
| 17 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | #include <linux/delay.h> |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/smp.h> |
| 22 | #include <linux/io.h> |
| 23 | #include <linux/of.h> |
| 24 | #include <linux/of_address.h> |
| 25 | |
| 26 | #include <asm/cacheflush.h> |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 27 | #include <asm/smp_scu.h> |
| 28 | #include <asm/smp_plat.h> |
| 29 | |
| 30 | #include "core.h" |
| 31 | |
Paul Gortmaker | 8bd26e3 | 2013-06-17 15:43:14 -0400 | [diff] [blame] | 32 | static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle) |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 33 | { |
| 34 | int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; |
| 35 | |
Dinh Nguyen | 3a4356c | 2014-10-01 05:44:48 -0500 | [diff] [blame] | 36 | if (socfpga_cpu1start_addr) { |
Alan Tull | d686ce4 | 2014-10-14 19:33:38 +0000 | [diff] [blame] | 37 | /* This will put CPU #1 into reset. */ |
| 38 | writel(RSTMGR_MPUMODRST_CPU1, |
| 39 | rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST); |
| 40 | |
Dinh Nguyen | d6dd735 | 2013-02-11 17:30:33 -0600 | [diff] [blame] | 41 | memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 42 | |
Russell King | 02b4e27 | 2015-05-19 17:06:44 +0100 | [diff] [blame] | 43 | writel(virt_to_phys(secondary_startup), |
Alan Tull | d686ce4 | 2014-10-14 19:33:38 +0000 | [diff] [blame] | 44 | sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff)); |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 45 | |
Dinh Nguyen | d6dd735 | 2013-02-11 17:30:33 -0600 | [diff] [blame] | 46 | flush_cache_all(); |
| 47 | smp_wmb(); |
| 48 | outer_clean_range(0, trampoline_size); |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 49 | |
Alan Tull | d686ce4 | 2014-10-14 19:33:38 +0000 | [diff] [blame] | 50 | /* This will release CPU #1 out of reset. */ |
| 51 | writel(0, rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST); |
Dinh Nguyen | d6dd735 | 2013-02-11 17:30:33 -0600 | [diff] [blame] | 52 | } |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 53 | |
| 54 | return 0; |
| 55 | } |
| 56 | |
Dinh Nguyen | 45be0cd | 2015-06-02 21:14:02 -0500 | [diff] [blame] | 57 | static int socfpga_a10_boot_secondary(unsigned int cpu, struct task_struct *idle) |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 58 | { |
Dinh Nguyen | 45be0cd | 2015-06-02 21:14:02 -0500 | [diff] [blame] | 59 | int trampoline_size = &secondary_trampoline_end - &secondary_trampoline; |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 60 | |
Dinh Nguyen | 45be0cd | 2015-06-02 21:14:02 -0500 | [diff] [blame] | 61 | if (socfpga_cpu1start_addr) { |
| 62 | writel(RSTMGR_MPUMODRST_CPU1, rst_manager_base_addr + |
| 63 | SOCFPGA_A10_RSTMGR_MODMPURST); |
| 64 | memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size); |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 65 | |
Kevin Hilman | 89b8da0 | 2015-06-11 15:41:58 -0700 | [diff] [blame] | 66 | writel(virt_to_phys(secondary_startup), |
Dinh Nguyen | 45be0cd | 2015-06-02 21:14:02 -0500 | [diff] [blame] | 67 | sys_manager_base_addr + (socfpga_cpu1start_addr & 0x00000fff)); |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 68 | |
Dinh Nguyen | 45be0cd | 2015-06-02 21:14:02 -0500 | [diff] [blame] | 69 | flush_cache_all(); |
| 70 | smp_wmb(); |
| 71 | outer_clean_range(0, trampoline_size); |
| 72 | |
| 73 | /* This will release CPU #1 out of reset. */ |
| 74 | writel(0, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_MODMPURST); |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 75 | } |
| 76 | |
Dinh Nguyen | 45be0cd | 2015-06-02 21:14:02 -0500 | [diff] [blame] | 77 | return 0; |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 78 | } |
| 79 | |
| 80 | static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus) |
| 81 | { |
Dinh Nguyen | 122694a | 2015-05-12 16:49:21 -0500 | [diff] [blame] | 82 | struct device_node *np; |
| 83 | void __iomem *socfpga_scu_base_addr; |
| 84 | |
| 85 | np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); |
| 86 | if (!np) { |
| 87 | pr_err("%s: missing scu\n", __func__); |
| 88 | return; |
| 89 | } |
| 90 | |
| 91 | socfpga_scu_base_addr = of_iomap(np, 0); |
| 92 | if (!socfpga_scu_base_addr) |
| 93 | return; |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 94 | scu_enable(socfpga_scu_base_addr); |
| 95 | } |
| 96 | |
| 97 | /* |
| 98 | * platform-specific code to shutdown a CPU |
| 99 | * |
| 100 | * Called with IRQs disabled |
| 101 | */ |
| 102 | static void socfpga_cpu_die(unsigned int cpu) |
| 103 | { |
Alan Tull | d686ce4 | 2014-10-14 19:33:38 +0000 | [diff] [blame] | 104 | /* Do WFI. If we wake up early, go back into WFI */ |
| 105 | while (1) |
| 106 | cpu_do_idle(); |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 107 | } |
| 108 | |
Hiraku Toyooka | b33612e | 2015-06-10 07:47:19 +0000 | [diff] [blame] | 109 | /* |
| 110 | * We need a dummy function so that platform_can_cpu_hotplug() knows |
| 111 | * we support CPU hotplug. However, the function does not need to do |
| 112 | * anything, because CPUs going offline just do WFI. We could reset |
| 113 | * the CPUs but it would increase power consumption. |
| 114 | */ |
| 115 | static int socfpga_cpu_kill(unsigned int cpu) |
| 116 | { |
| 117 | return 1; |
| 118 | } |
| 119 | |
Dinh Nguyen | 5f763ef8 | 2015-06-02 21:14:01 -0500 | [diff] [blame] | 120 | static struct smp_operations socfpga_smp_ops __initdata = { |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 121 | .smp_prepare_cpus = socfpga_smp_prepare_cpus, |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 122 | .smp_boot_secondary = socfpga_boot_secondary, |
| 123 | #ifdef CONFIG_HOTPLUG_CPU |
| 124 | .cpu_die = socfpga_cpu_die, |
Hiraku Toyooka | b33612e | 2015-06-10 07:47:19 +0000 | [diff] [blame] | 125 | .cpu_kill = socfpga_cpu_kill, |
Dinh Nguyen | 9c4566a | 2012-10-25 10:41:39 -0600 | [diff] [blame] | 126 | #endif |
| 127 | }; |
Dinh Nguyen | 5f763ef8 | 2015-06-02 21:14:01 -0500 | [diff] [blame] | 128 | |
Dinh Nguyen | 45be0cd | 2015-06-02 21:14:02 -0500 | [diff] [blame] | 129 | static struct smp_operations socfpga_a10_smp_ops __initdata = { |
| 130 | .smp_prepare_cpus = socfpga_smp_prepare_cpus, |
| 131 | .smp_boot_secondary = socfpga_a10_boot_secondary, |
| 132 | #ifdef CONFIG_HOTPLUG_CPU |
| 133 | .cpu_die = socfpga_cpu_die, |
Hiraku Toyooka | b33612e | 2015-06-10 07:47:19 +0000 | [diff] [blame] | 134 | .cpu_kill = socfpga_cpu_kill, |
Dinh Nguyen | 45be0cd | 2015-06-02 21:14:02 -0500 | [diff] [blame] | 135 | #endif |
| 136 | }; |
| 137 | |
Dinh Nguyen | 5f763ef8 | 2015-06-02 21:14:01 -0500 | [diff] [blame] | 138 | CPU_METHOD_OF_DECLARE(socfpga_smp, "altr,socfpga-smp", &socfpga_smp_ops); |
Dinh Nguyen | 45be0cd | 2015-06-02 21:14:02 -0500 | [diff] [blame] | 139 | CPU_METHOD_OF_DECLARE(socfpga_a10_smp, "altr,socfpga-a10-smp", &socfpga_a10_smp_ops); |