blob: 1490e5e1c23292a82be44e842ee7ec1cff19cc31 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001
2/*
3 * ATI Mach64 Hardware Acceleration
4 */
5
6#include <linux/sched.h>
7#include <linux/delay.h>
8#include <linux/fb.h>
9#include <video/mach64.h>
10#include "atyfb.h"
11
12 /*
13 * Generic Mach64 routines
14 */
15
16/* this is for DMA GUI engine! work in progress */
17typedef struct {
18 u32 frame_buf_offset;
19 u32 system_mem_addr;
20 u32 command;
21 u32 reserved;
22} BM_DESCRIPTOR_ENTRY;
23
24#define LAST_DESCRIPTOR (1 << 31)
25#define SYSTEM_TO_FRAME_BUFFER 0
26
27static u32 rotation24bpp(u32 dx, u32 direction)
28{
29 u32 rotation;
30 if (direction & DST_X_LEFT_TO_RIGHT) {
31 rotation = (dx / 4) % 6;
32 } else {
33 rotation = ((dx + 2) / 4) % 6;
34 }
35
36 return ((rotation << 8) | DST_24_ROTATION_ENABLE);
37}
38
39void aty_reset_engine(const struct atyfb_par *par)
40{
41 /* reset engine */
42 aty_st_le32(GEN_TEST_CNTL,
43 aty_ld_le32(GEN_TEST_CNTL, par) & ~GUI_ENGINE_ENABLE, par);
44 /* enable engine */
45 aty_st_le32(GEN_TEST_CNTL,
46 aty_ld_le32(GEN_TEST_CNTL, par) | GUI_ENGINE_ENABLE, par);
47 /* ensure engine is not locked up by clearing any FIFO or */
48 /* HOST errors */
49 aty_st_le32(BUS_CNTL,
50 aty_ld_le32(BUS_CNTL, par) | BUS_HOST_ERR_ACK | BUS_FIFO_ERR_ACK, par);
51}
52
53static void reset_GTC_3D_engine(const struct atyfb_par *par)
54{
55 aty_st_le32(SCALE_3D_CNTL, 0xc0, par);
56 mdelay(GTC_3D_RESET_DELAY);
57 aty_st_le32(SETUP_CNTL, 0x00, par);
58 mdelay(GTC_3D_RESET_DELAY);
59 aty_st_le32(SCALE_3D_CNTL, 0x00, par);
60 mdelay(GTC_3D_RESET_DELAY);
61}
62
63void aty_init_engine(struct atyfb_par *par, struct fb_info *info)
64{
65 u32 pitch_value;
66
67 /* determine modal information from global mode structure */
68 pitch_value = info->var.xres_virtual;
69
70 if (info->var.bits_per_pixel == 24) {
71 /* In 24 bpp, the engine is in 8 bpp - this requires that all */
72 /* horizontal coordinates and widths must be adjusted */
73 pitch_value *= 3;
74 }
75
76 /* On GTC (RagePro), we need to reset the 3D engine before */
77 if (M64_HAS(RESET_3D))
78 reset_GTC_3D_engine(par);
79
80 /* Reset engine, enable, and clear any engine errors */
81 aty_reset_engine(par);
82 /* Ensure that vga page pointers are set to zero - the upper */
83 /* page pointers are set to 1 to handle overflows in the */
84 /* lower page */
85 aty_st_le32(MEM_VGA_WP_SEL, 0x00010000, par);
86 aty_st_le32(MEM_VGA_RP_SEL, 0x00010000, par);
87
88 /* ---- Setup standard engine context ---- */
89
90 /* All GUI registers here are FIFOed - therefore, wait for */
91 /* the appropriate number of empty FIFO entries */
92 wait_for_fifo(14, par);
93
94 /* enable all registers to be loaded for context loads */
95 aty_st_le32(CONTEXT_MASK, 0xFFFFFFFF, par);
96
97 /* set destination pitch to modal pitch, set offset to zero */
98 aty_st_le32(DST_OFF_PITCH, (pitch_value / 8) << 22, par);
99
100 /* zero these registers (set them to a known state) */
101 aty_st_le32(DST_Y_X, 0, par);
102 aty_st_le32(DST_HEIGHT, 0, par);
103 aty_st_le32(DST_BRES_ERR, 0, par);
104 aty_st_le32(DST_BRES_INC, 0, par);
105 aty_st_le32(DST_BRES_DEC, 0, par);
106
107 /* set destination drawing attributes */
108 aty_st_le32(DST_CNTL, DST_LAST_PEL | DST_Y_TOP_TO_BOTTOM |
109 DST_X_LEFT_TO_RIGHT, par);
110
111 /* set source pitch to modal pitch, set offset to zero */
112 aty_st_le32(SRC_OFF_PITCH, (pitch_value / 8) << 22, par);
113
114 /* set these registers to a known state */
115 aty_st_le32(SRC_Y_X, 0, par);
116 aty_st_le32(SRC_HEIGHT1_WIDTH1, 1, par);
117 aty_st_le32(SRC_Y_X_START, 0, par);
118 aty_st_le32(SRC_HEIGHT2_WIDTH2, 1, par);
119
120 /* set source pixel retrieving attributes */
121 aty_st_le32(SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT, par);
122
123 /* set host attributes */
124 wait_for_fifo(13, par);
125 aty_st_le32(HOST_CNTL, 0, par);
126
127 /* set pattern attributes */
128 aty_st_le32(PAT_REG0, 0, par);
129 aty_st_le32(PAT_REG1, 0, par);
130 aty_st_le32(PAT_CNTL, 0, par);
131
132 /* set scissors to modal size */
133 aty_st_le32(SC_LEFT, 0, par);
134 aty_st_le32(SC_TOP, 0, par);
135 aty_st_le32(SC_BOTTOM, par->crtc.vyres - 1, par);
136 aty_st_le32(SC_RIGHT, pitch_value - 1, par);
137
138 /* set background color to minimum value (usually BLACK) */
139 aty_st_le32(DP_BKGD_CLR, 0, par);
140
141 /* set foreground color to maximum value (usually WHITE) */
142 aty_st_le32(DP_FRGD_CLR, 0xFFFFFFFF, par);
143
144 /* set write mask to effect all pixel bits */
145 aty_st_le32(DP_WRITE_MASK, 0xFFFFFFFF, par);
146
147 /* set foreground mix to overpaint and background mix to */
148 /* no-effect */
149 aty_st_le32(DP_MIX, FRGD_MIX_S | BKGD_MIX_D, par);
150
151 /* set primary source pixel channel to foreground color */
152 /* register */
153 aty_st_le32(DP_SRC, FRGD_SRC_FRGD_CLR, par);
154
155 /* set compare functionality to false (no-effect on */
156 /* destination) */
157 wait_for_fifo(3, par);
158 aty_st_le32(CLR_CMP_CLR, 0, par);
159 aty_st_le32(CLR_CMP_MASK, 0xFFFFFFFF, par);
160 aty_st_le32(CLR_CMP_CNTL, 0, par);
161
162 /* set pixel depth */
163 wait_for_fifo(2, par);
164 aty_st_le32(DP_PIX_WIDTH, par->crtc.dp_pix_width, par);
165 aty_st_le32(DP_CHAIN_MASK, par->crtc.dp_chain_mask, par);
166
167 wait_for_fifo(5, par);
168 aty_st_le32(SCALE_3D_CNTL, 0, par);
169 aty_st_le32(Z_CNTL, 0, par);
170 aty_st_le32(CRTC_INT_CNTL, aty_ld_le32(CRTC_INT_CNTL, par) & ~0x20,
171 par);
172 aty_st_le32(GUI_TRAJ_CNTL, 0x100023, par);
173
174 /* insure engine is idle before leaving */
175 wait_for_idle(par);
176}
177
178 /*
179 * Accelerated functions
180 */
181
182static inline void draw_rect(s16 x, s16 y, u16 width, u16 height,
183 struct atyfb_par *par)
184{
185 /* perform rectangle fill */
186 wait_for_fifo(2, par);
187 aty_st_le32(DST_Y_X, (x << 16) | y, par);
188 aty_st_le32(DST_HEIGHT_WIDTH, (width << 16) | height, par);
189 par->blitter_may_be_busy = 1;
190}
191
192void atyfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
193{
194 struct atyfb_par *par = (struct atyfb_par *) info->par;
195 u32 dy = area->dy, sy = area->sy, direction = DST_LAST_PEL;
196 u32 sx = area->sx, dx = area->dx, width = area->width, rotation = 0;
197
198 if (par->asleep)
199 return;
200 if (!area->width || !area->height)
201 return;
202 if (!par->accel_flags) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203 cfb_copyarea(info, area);
204 return;
205 }
206
207 if (info->var.bits_per_pixel == 24) {
208 /* In 24 bpp, the engine is in 8 bpp - this requires that all */
209 /* horizontal coordinates and widths must be adjusted */
210 sx *= 3;
211 dx *= 3;
212 width *= 3;
213 }
214
215 if (area->sy < area->dy) {
216 dy += area->height - 1;
217 sy += area->height - 1;
218 } else
219 direction |= DST_Y_TOP_TO_BOTTOM;
220
221 if (sx < dx) {
222 dx += width - 1;
223 sx += width - 1;
224 } else
225 direction |= DST_X_LEFT_TO_RIGHT;
226
227 if (info->var.bits_per_pixel == 24) {
228 rotation = rotation24bpp(dx, direction);
229 }
230
231 wait_for_fifo(4, par);
232 aty_st_le32(DP_SRC, FRGD_SRC_BLIT, par);
233 aty_st_le32(SRC_Y_X, (sx << 16) | sy, par);
234 aty_st_le32(SRC_HEIGHT1_WIDTH1, (width << 16) | area->height, par);
235 aty_st_le32(DST_CNTL, direction | rotation, par);
236 draw_rect(dx, dy, width, area->height, par);
237}
238
239void atyfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
240{
241 struct atyfb_par *par = (struct atyfb_par *) info->par;
242 u32 color = rect->color, dx = rect->dx, width = rect->width, rotation = 0;
243
244 if (par->asleep)
245 return;
246 if (!rect->width || !rect->height)
247 return;
248 if (!par->accel_flags) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249 cfb_fillrect(info, rect);
250 return;
251 }
252
253 color |= (rect->color << 8);
254 color |= (rect->color << 16);
255
256 if (info->var.bits_per_pixel == 24) {
257 /* In 24 bpp, the engine is in 8 bpp - this requires that all */
258 /* horizontal coordinates and widths must be adjusted */
259 dx *= 3;
260 width *= 3;
261 rotation = rotation24bpp(dx, DST_X_LEFT_TO_RIGHT);
262 }
263
264 wait_for_fifo(3, par);
265 aty_st_le32(DP_FRGD_CLR, color, par);
266 aty_st_le32(DP_SRC,
267 BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR | MONO_SRC_ONE,
268 par);
269 aty_st_le32(DST_CNTL,
270 DST_LAST_PEL | DST_Y_TOP_TO_BOTTOM |
271 DST_X_LEFT_TO_RIGHT | rotation, par);
272 draw_rect(dx, rect->dy, width, rect->height, par);
273}
274
275void atyfb_imageblit(struct fb_info *info, const struct fb_image *image)
276{
277 struct atyfb_par *par = (struct atyfb_par *) info->par;
278 u32 src_bytes, dx = image->dx, dy = image->dy, width = image->width;
279 u32 pix_width_save, pix_width, host_cntl, rotation = 0, src, mix;
280
281 if (par->asleep)
282 return;
283 if (!image->width || !image->height)
284 return;
285 if (!par->accel_flags ||
286 (image->depth != 1 && info->var.bits_per_pixel != image->depth)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287 cfb_imageblit(info, image);
288 return;
289 }
290
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 pix_width = pix_width_save = aty_ld_le32(DP_PIX_WIDTH, par);
292 host_cntl = aty_ld_le32(HOST_CNTL, par) | HOST_BYTE_ALIGN;
293
294 switch (image->depth) {
295 case 1:
296 pix_width &= ~(BYTE_ORDER_MASK | HOST_MASK);
297 pix_width |= (BYTE_ORDER_MSB_TO_LSB | HOST_1BPP);
298 break;
299 case 4:
300 pix_width &= ~(BYTE_ORDER_MASK | HOST_MASK);
301 pix_width |= (BYTE_ORDER_MSB_TO_LSB | HOST_4BPP);
302 break;
303 case 8:
304 pix_width &= ~HOST_MASK;
305 pix_width |= HOST_8BPP;
306 break;
307 case 15:
308 pix_width &= ~HOST_MASK;
309 pix_width |= HOST_15BPP;
310 break;
311 case 16:
312 pix_width &= ~HOST_MASK;
313 pix_width |= HOST_16BPP;
314 break;
315 case 24:
316 pix_width &= ~HOST_MASK;
317 pix_width |= HOST_24BPP;
318 break;
319 case 32:
320 pix_width &= ~HOST_MASK;
321 pix_width |= HOST_32BPP;
322 break;
323 }
324
325 if (info->var.bits_per_pixel == 24) {
326 /* In 24 bpp, the engine is in 8 bpp - this requires that all */
327 /* horizontal coordinates and widths must be adjusted */
328 dx *= 3;
329 width *= 3;
330
331 rotation = rotation24bpp(dx, DST_X_LEFT_TO_RIGHT);
332
333 pix_width &= ~DST_MASK;
334 pix_width |= DST_8BPP;
335
336 /*
337 * since Rage 3D IIc we have DP_HOST_TRIPLE_EN bit
338 * this hwaccelerated triple has an issue with not aligned data
339 */
340 if (M64_HAS(HW_TRIPLE) && image->width % 8 == 0)
341 pix_width |= DP_HOST_TRIPLE_EN;
342 }
343
344 if (image->depth == 1) {
345 u32 fg, bg;
346 if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
347 info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
348 fg = ((u32*)(info->pseudo_palette))[image->fg_color];
349 bg = ((u32*)(info->pseudo_palette))[image->bg_color];
350 } else {
351 fg = image->fg_color;
352 bg = image->bg_color;
353 }
354
355 wait_for_fifo(2, par);
356 aty_st_le32(DP_BKGD_CLR, bg, par);
357 aty_st_le32(DP_FRGD_CLR, fg, par);
358 src = MONO_SRC_HOST | FRGD_SRC_FRGD_CLR | BKGD_SRC_BKGD_CLR;
359 mix = FRGD_MIX_S | BKGD_MIX_S;
360 } else {
361 src = MONO_SRC_ONE | FRGD_SRC_HOST;
362 mix = FRGD_MIX_D_XOR_S | BKGD_MIX_D;
363 }
364
365 wait_for_fifo(6, par);
366 aty_st_le32(DP_WRITE_MASK, 0xFFFFFFFF, par);
367 aty_st_le32(DP_PIX_WIDTH, pix_width, par);
368 aty_st_le32(DP_MIX, mix, par);
369 aty_st_le32(DP_SRC, src, par);
370 aty_st_le32(HOST_CNTL, host_cntl, par);
371 aty_st_le32(DST_CNTL, DST_Y_TOP_TO_BOTTOM | DST_X_LEFT_TO_RIGHT | rotation, par);
372
373 draw_rect(dx, dy, width, image->height, par);
374 src_bytes = (((image->width * image->depth) + 7) / 8) * image->height;
375
376 /* manual triple each pixel */
377 if (info->var.bits_per_pixel == 24 && !(pix_width & DP_HOST_TRIPLE_EN)) {
378 int inbit, outbit, mult24, byte_id_in_dword, width;
379 u8 *pbitmapin = (u8*)image->data, *pbitmapout;
380 u32 hostdword;
381
382 for (width = image->width, inbit = 7, mult24 = 0; src_bytes; ) {
383 for (hostdword = 0, pbitmapout = (u8*)&hostdword, byte_id_in_dword = 0;
384 byte_id_in_dword < 4 && src_bytes;
385 byte_id_in_dword++, pbitmapout++) {
386 for (outbit = 7; outbit >= 0; outbit--) {
387 *pbitmapout |= (((*pbitmapin >> inbit) & 1) << outbit);
388 mult24++;
389 /* next bit */
390 if (mult24 == 3) {
391 mult24 = 0;
392 inbit--;
393 width--;
394 }
395
396 /* next byte */
397 if (inbit < 0 || width == 0) {
398 src_bytes--;
399 pbitmapin++;
400 inbit = 7;
401
402 if (width == 0) {
403 width = image->width;
404 outbit = 0;
405 }
406 }
407 }
408 }
409 wait_for_fifo(1, par);
410 aty_st_le32(HOST_DATA0, hostdword, par);
411 }
412 } else {
413 u32 *pbitmap, dwords = (src_bytes + 3) / 4;
414 for (pbitmap = (u32*)(image->data); dwords; dwords--, pbitmap++) {
415 wait_for_fifo(1, par);
416 aty_st_le32(HOST_DATA0, le32_to_cpup(pbitmap), par);
417 }
418 }
419
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420 /* restore pix_width */
421 wait_for_fifo(1, par);
422 aty_st_le32(DP_PIX_WIDTH, pix_width_save, par);
423}