blob: 5e81de58d932d4bb73c948c8d0fbe487a212ee9f [file] [log] [blame]
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +03001/*
2 * linux/drivers/video/omap2/dss/sdi.c
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#define DSS_SUBSYS_NAME "SDI"
21
22#include <linux/kernel.h>
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +030023#include <linux/delay.h>
24#include <linux/err.h>
Roger Quadros508886c2010-03-17 13:35:21 +010025#include <linux/regulator/consumer.h>
Paul Gortmakera8a35932011-07-10 13:20:26 -040026#include <linux/export.h>
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +020027#include <linux/platform_device.h>
Tomi Valkeinen13b1ba72012-09-28 10:03:03 +030028#include <linux/string.h>
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +030029
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030030#include <video/omapdss.h>
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +030031#include "dss.h"
32
33static struct {
Tomi Valkeinen46c4b642013-03-19 13:46:40 +020034 struct platform_device *pdev;
35
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +030036 bool update_enabled;
Roger Quadros508886c2010-03-17 13:35:21 +010037 struct regulator *vdds_sdi_reg;
Archit Taneja37a57992012-06-29 14:33:18 +053038
39 struct dss_lcd_mgr_config mgr_config;
Archit Taneja9b4a5712012-08-08 16:56:06 +053040 struct omap_video_timings timings;
Archit Taneja889b4fd2012-07-20 17:18:49 +053041 int datapairs;
Archit Taneja81b87f52012-09-26 16:30:49 +053042
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +030043 struct omap_dss_device output;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +030044} sdi;
45
Tomi Valkeinen36816fa2013-03-05 17:06:26 +020046struct sdi_clk_calc_ctx {
47 unsigned long pck_min, pck_max;
48
49 struct dss_clock_info dss_cinfo;
50 struct dispc_clock_info dispc_cinfo;
51};
52
53static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
54 unsigned long pck, void *data)
55{
56 struct sdi_clk_calc_ctx *ctx = data;
57
58 ctx->dispc_cinfo.lck_div = lckd;
59 ctx->dispc_cinfo.pck_div = pckd;
60 ctx->dispc_cinfo.lck = lck;
61 ctx->dispc_cinfo.pck = pck;
62
63 return true;
64}
65
66static bool dpi_calc_dss_cb(int fckd, unsigned long fck, void *data)
67{
68 struct sdi_clk_calc_ctx *ctx = data;
69
70 ctx->dss_cinfo.fck = fck;
71 ctx->dss_cinfo.fck_div = fckd;
72
73 return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
74 dpi_calc_dispc_cb, ctx);
75}
76
77static int sdi_calc_clock_div(unsigned long pclk,
78 struct dss_clock_info *dss_cinfo,
79 struct dispc_clock_info *dispc_cinfo)
80{
81 int i;
82 struct sdi_clk_calc_ctx ctx;
83
84 /*
85 * DSS fclk gives us very few possibilities, so finding a good pixel
86 * clock may not be possible. We try multiple times to find the clock,
87 * each time widening the pixel clock range we look for, up to
88 * +/- 1MHz.
89 */
90
91 for (i = 0; i < 10; ++i) {
92 bool ok;
93
94 memset(&ctx, 0, sizeof(ctx));
95 if (pclk > 1000 * i * i * i)
96 ctx.pck_min = max(pclk - 1000 * i * i * i, 0lu);
97 else
98 ctx.pck_min = 0;
99 ctx.pck_max = pclk + 1000 * i * i * i;
100
101 ok = dss_div_calc(ctx.pck_min, dpi_calc_dss_cb, &ctx);
102 if (ok) {
103 *dss_cinfo = ctx.dss_cinfo;
104 *dispc_cinfo = ctx.dispc_cinfo;
105 return 0;
106 }
107 }
108
109 return -EINVAL;
110}
111
Archit Taneja37a57992012-06-29 14:33:18 +0530112static void sdi_config_lcd_manager(struct omap_dss_device *dssdev)
Sumit Semwal64ba4f72010-12-02 11:27:10 +0000113{
Tomi Valkeinen7ae9a712013-05-10 15:27:07 +0300114 struct omap_overlay_manager *mgr = sdi.output.manager;
Archit Taneja7d6069e2012-09-04 11:49:30 +0530115
Archit Taneja37a57992012-06-29 14:33:18 +0530116 sdi.mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
117
118 sdi.mgr_config.stallmode = false;
119 sdi.mgr_config.fifohandcheck = false;
120
121 sdi.mgr_config.video_port_width = 24;
122 sdi.mgr_config.lcden_sig_polarity = 1;
123
Archit Taneja7d6069e2012-09-04 11:49:30 +0530124 dss_mgr_set_lcd_config(mgr, &sdi.mgr_config);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300125}
126
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200127int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300128{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300129 struct omap_dss_device *out = &sdi.output;
Archit Taneja9b4a5712012-08-08 16:56:06 +0530130 struct omap_video_timings *t = &sdi.timings;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300131 struct dss_clock_info dss_cinfo;
132 struct dispc_clock_info dispc_cinfo;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300133 unsigned long pck;
134 int r;
135
Archit Taneja7d6069e2012-09-04 11:49:30 +0530136 if (out == NULL || out->manager == NULL) {
137 DSSERR("failed to enable display: no output/manager\n");
Tomi Valkeinen05e1d602011-06-23 16:38:21 +0300138 return -ENODEV;
139 }
140
Roger Quadros508886c2010-03-17 13:35:21 +0100141 r = regulator_enable(sdi.vdds_sdi_reg);
142 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300143 goto err_reg_enable;
Roger Quadros508886c2010-03-17 13:35:21 +0100144
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300145 r = dispc_runtime_get();
146 if (r)
147 goto err_get_dispc;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300148
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300149 /* 15.5.9.1.2 */
Archit Taneja9b4a5712012-08-08 16:56:06 +0530150 t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
151 t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
Archit Tanejaa8d5e412012-06-25 12:26:38 +0530152
Tomi Valkeinen36816fa2013-03-05 17:06:26 +0200153 r = sdi_calc_clock_div(t->pixel_clock * 1000, &dss_cinfo, &dispc_cinfo);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300154 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300155 goto err_calc_clock_div;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300156
Archit Taneja37a57992012-06-29 14:33:18 +0530157 sdi.mgr_config.clock_info = dispc_cinfo;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300158
Archit Taneja37a57992012-06-29 14:33:18 +0530159 pck = dss_cinfo.fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div / 1000;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300160
161 if (pck != t->pixel_clock) {
162 DSSWARN("Could not find exact pixel clock. Requested %d kHz, "
163 "got %lu kHz\n",
164 t->pixel_clock, pck);
165
166 t->pixel_clock = pck;
167 }
168
169
Archit Taneja7d6069e2012-09-04 11:49:30 +0530170 dss_mgr_set_timings(out->manager, t);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300171
172 r = dss_set_clock_div(&dss_cinfo);
173 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300174 goto err_set_dss_clock_div;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300175
Archit Taneja37a57992012-06-29 14:33:18 +0530176 sdi_config_lcd_manager(dssdev);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300177
Tomi Valkeinen35d67862012-08-21 09:09:47 +0300178 /*
179 * LCLK and PCLK divisors are located in shadow registers, and we
180 * normally write them to DISPC registers when enabling the output.
181 * However, SDI uses pck-free as source clock for its PLL, and pck-free
182 * is affected by the divisors. And as we need the PLL before enabling
183 * the output, we need to write the divisors early.
184 *
185 * It seems just writing to the DISPC register is enough, and we don't
186 * need to care about the shadow register mechanism for pck-free. The
187 * exact reason for this is unknown.
188 */
Archit Taneja7d6069e2012-09-04 11:49:30 +0530189 dispc_mgr_set_clock_div(out->manager->id, &sdi.mgr_config.clock_info);
Archit Taneja889b4fd2012-07-20 17:18:49 +0530190
Tomi Valkeinen66591452012-09-11 11:28:59 +0300191 dss_sdi_init(sdi.datapairs);
Tomi Valkeinen42c9dee2011-03-02 12:29:27 +0200192 r = dss_sdi_enable();
193 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300194 goto err_sdi_enable;
Tomi Valkeinen42c9dee2011-03-02 12:29:27 +0200195 mdelay(2);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300196
Archit Taneja7d6069e2012-09-04 11:49:30 +0530197 r = dss_mgr_enable(out->manager);
Tomi Valkeinen33ca2372011-11-21 13:42:58 +0200198 if (r)
199 goto err_mgr_enable;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300200
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300201 return 0;
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300202
Tomi Valkeinen33ca2372011-11-21 13:42:58 +0200203err_mgr_enable:
204 dss_sdi_disable();
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300205err_sdi_enable:
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300206err_set_dss_clock_div:
207err_calc_clock_div:
208 dispc_runtime_put();
209err_get_dispc:
Roger Quadros508886c2010-03-17 13:35:21 +0100210 regulator_disable(sdi.vdds_sdi_reg);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300211err_reg_enable:
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300212 return r;
213}
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200214EXPORT_SYMBOL(omapdss_sdi_display_enable);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300215
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200216void omapdss_sdi_display_disable(struct omap_dss_device *dssdev)
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300217{
Tomi Valkeinen7ae9a712013-05-10 15:27:07 +0300218 struct omap_overlay_manager *mgr = sdi.output.manager;
Archit Taneja7d6069e2012-09-04 11:49:30 +0530219
220 dss_mgr_disable(mgr);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300221
222 dss_sdi_disable();
223
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300224 dispc_runtime_put();
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300225
Roger Quadros508886c2010-03-17 13:35:21 +0100226 regulator_disable(sdi.vdds_sdi_reg);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300227}
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200228EXPORT_SYMBOL(omapdss_sdi_display_disable);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300229
Archit Tanejac7833f72012-07-05 17:11:12 +0530230void omapdss_sdi_set_timings(struct omap_dss_device *dssdev,
231 struct omap_video_timings *timings)
232{
Archit Taneja9b4a5712012-08-08 16:56:06 +0530233 sdi.timings = *timings;
Archit Tanejac7833f72012-07-05 17:11:12 +0530234}
235EXPORT_SYMBOL(omapdss_sdi_set_timings);
236
Archit Taneja889b4fd2012-07-20 17:18:49 +0530237void omapdss_sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs)
238{
239 sdi.datapairs = datapairs;
240}
241EXPORT_SYMBOL(omapdss_sdi_set_datapairs);
242
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300243static int sdi_init_regulator(void)
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300244{
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300245 struct regulator *vdds_sdi;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300246
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300247 if (sdi.vdds_sdi_reg)
248 return 0;
Tomi Valkeinen5f42f2c2011-02-22 15:53:46 +0200249
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300250 vdds_sdi = dss_get_vdds_sdi();
Tomi Valkeinen5f42f2c2011-02-22 15:53:46 +0200251
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300252 if (IS_ERR(vdds_sdi)) {
Tomi Valkeinen46c4b642013-03-19 13:46:40 +0200253 vdds_sdi = devm_regulator_get(&sdi.pdev->dev, "vdds_sdi");
254 if (IS_ERR(vdds_sdi)) {
255 DSSERR("can't get VDDS_SDI regulator\n");
256 return PTR_ERR(vdds_sdi);
257 }
Tomi Valkeinen5f42f2c2011-02-22 15:53:46 +0200258 }
259
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300260 sdi.vdds_sdi_reg = vdds_sdi;
261
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300262 return 0;
263}
264
Tomi Valkeinend23b3352013-05-02 11:56:35 +0300265static struct omap_dss_device *sdi_find_dssdev(struct platform_device *pdev)
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300266{
Tomi Valkeinen35deca32012-03-01 15:45:53 +0200267 struct omap_dss_board_info *pdata = pdev->dev.platform_data;
Tomi Valkeinen2bbcce52012-10-29 12:40:46 +0200268 const char *def_disp_name = omapdss_get_default_display_name();
Tomi Valkeinen15216532012-09-06 14:29:31 +0300269 struct omap_dss_device *def_dssdev;
270 int i;
271
272 def_dssdev = NULL;
Tomi Valkeinen35deca32012-03-01 15:45:53 +0200273
274 for (i = 0; i < pdata->num_devices; ++i) {
275 struct omap_dss_device *dssdev = pdata->devices[i];
276
277 if (dssdev->type != OMAP_DISPLAY_TYPE_SDI)
278 continue;
279
Tomi Valkeinen15216532012-09-06 14:29:31 +0300280 if (def_dssdev == NULL)
281 def_dssdev = dssdev;
Tomi Valkeinen9d8232a2012-03-01 16:58:39 +0200282
Tomi Valkeinen15216532012-09-06 14:29:31 +0300283 if (def_disp_name != NULL &&
284 strcmp(dssdev->name, def_disp_name) == 0) {
285 def_dssdev = dssdev;
286 break;
287 }
288 }
289
290 return def_dssdev;
291}
292
Tomi Valkeinene1086272013-05-02 12:10:37 +0300293static int sdi_probe_pdata(struct platform_device *sdidev)
Tomi Valkeinen15216532012-09-06 14:29:31 +0300294{
Tomi Valkeinen52744842012-09-10 13:58:29 +0300295 struct omap_dss_device *plat_dssdev;
Tomi Valkeinen15216532012-09-06 14:29:31 +0300296 struct omap_dss_device *dssdev;
297 int r;
298
Tomi Valkeinen52744842012-09-10 13:58:29 +0300299 plat_dssdev = sdi_find_dssdev(sdidev);
Tomi Valkeinen15216532012-09-06 14:29:31 +0300300
Tomi Valkeinen52744842012-09-10 13:58:29 +0300301 if (!plat_dssdev)
Tomi Valkeinene1086272013-05-02 12:10:37 +0300302 return 0;
Tomi Valkeinen52744842012-09-10 13:58:29 +0300303
304 dssdev = dss_alloc_and_init_device(&sdidev->dev);
Tomi Valkeinen15216532012-09-06 14:29:31 +0300305 if (!dssdev)
Tomi Valkeinene1086272013-05-02 12:10:37 +0300306 return -ENOMEM;
Tomi Valkeinen15216532012-09-06 14:29:31 +0300307
Tomi Valkeinen52744842012-09-10 13:58:29 +0300308 dss_copy_device_pdata(dssdev, plat_dssdev);
309
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300310 r = sdi_init_regulator();
Tomi Valkeinen15216532012-09-06 14:29:31 +0300311 if (r) {
312 DSSERR("device %s init failed: %d\n", dssdev->name, r);
Tomi Valkeinen52744842012-09-10 13:58:29 +0300313 dss_put_device(dssdev);
Tomi Valkeinene1086272013-05-02 12:10:37 +0300314 return r;
Tomi Valkeinen15216532012-09-06 14:29:31 +0300315 }
316
Tomi Valkeinen486c0e12012-12-07 12:50:08 +0200317 r = omapdss_output_set_device(&sdi.output, dssdev);
318 if (r) {
319 DSSERR("failed to connect output to new device: %s\n",
320 dssdev->name);
321 dss_put_device(dssdev);
Tomi Valkeinene1086272013-05-02 12:10:37 +0300322 return r;
Tomi Valkeinen486c0e12012-12-07 12:50:08 +0200323 }
324
Tomi Valkeinen52744842012-09-10 13:58:29 +0300325 r = dss_add_device(dssdev);
Tomi Valkeinen15216532012-09-06 14:29:31 +0300326 if (r) {
327 DSSERR("device %s register failed: %d\n", dssdev->name, r);
Tomi Valkeinen486c0e12012-12-07 12:50:08 +0200328 omapdss_output_unset_device(&sdi.output);
Tomi Valkeinen52744842012-09-10 13:58:29 +0300329 dss_put_device(dssdev);
Tomi Valkeinene1086272013-05-02 12:10:37 +0300330 return r;
Tomi Valkeinen35deca32012-03-01 15:45:53 +0200331 }
Tomi Valkeinene1086272013-05-02 12:10:37 +0300332
333 return 0;
Tomi Valkeinen38f3daf2012-05-02 14:55:12 +0300334}
335
Tomi Valkeinend23b3352013-05-02 11:56:35 +0300336static void sdi_init_output(struct platform_device *pdev)
Archit Taneja81b87f52012-09-26 16:30:49 +0530337{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300338 struct omap_dss_device *out = &sdi.output;
Archit Taneja81b87f52012-09-26 16:30:49 +0530339
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300340 out->dev = &pdev->dev;
Archit Taneja81b87f52012-09-26 16:30:49 +0530341 out->id = OMAP_DSS_OUTPUT_SDI;
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300342 out->output_type = OMAP_DISPLAY_TYPE_SDI;
Tomi Valkeinen7286a082013-02-18 13:06:01 +0200343 out->name = "sdi.0";
Tomi Valkeinen2eea5ae2013-02-13 11:23:54 +0200344 out->dispc_channel = OMAP_DSS_CHANNEL_LCD;
Archit Taneja81b87f52012-09-26 16:30:49 +0530345
346 dss_register_output(out);
347}
348
349static void __exit sdi_uninit_output(struct platform_device *pdev)
350{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300351 struct omap_dss_device *out = &sdi.output;
Archit Taneja81b87f52012-09-26 16:30:49 +0530352
353 dss_unregister_output(out);
354}
355
Tomi Valkeinend23b3352013-05-02 11:56:35 +0300356static int omap_sdi_probe(struct platform_device *pdev)
Tomi Valkeinen38f3daf2012-05-02 14:55:12 +0300357{
Tomi Valkeinene1086272013-05-02 12:10:37 +0300358 int r;
359
Tomi Valkeinen46c4b642013-03-19 13:46:40 +0200360 sdi.pdev = pdev;
361
Archit Taneja81b87f52012-09-26 16:30:49 +0530362 sdi_init_output(pdev);
363
Tomi Valkeinenc6ca5b22013-03-14 15:47:29 +0200364 if (pdev->dev.platform_data) {
365 r = sdi_probe_pdata(pdev);
366 if (r)
367 goto err_probe;
Tomi Valkeinene1086272013-05-02 12:10:37 +0300368 }
Tomi Valkeinen35deca32012-03-01 15:45:53 +0200369
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300370 return 0;
Tomi Valkeinenc6ca5b22013-03-14 15:47:29 +0200371
372err_probe:
373 sdi_uninit_output(pdev);
374 return r;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300375}
376
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200377static int __exit omap_sdi_remove(struct platform_device *pdev)
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300378{
Tomi Valkeinen52744842012-09-10 13:58:29 +0300379 dss_unregister_child_devices(&pdev->dev);
Tomi Valkeinen35deca32012-03-01 15:45:53 +0200380
Archit Taneja81b87f52012-09-26 16:30:49 +0530381 sdi_uninit_output(pdev);
382
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +0200383 return 0;
384}
385
386static struct platform_driver omap_sdi_driver = {
Tomi Valkeinend23b3352013-05-02 11:56:35 +0300387 .probe = omap_sdi_probe,
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200388 .remove = __exit_p(omap_sdi_remove),
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +0200389 .driver = {
390 .name = "omapdss_sdi",
391 .owner = THIS_MODULE,
392 },
393};
394
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200395int __init sdi_init_platform_driver(void)
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +0200396{
Tomi Valkeinend23b3352013-05-02 11:56:35 +0300397 return platform_driver_register(&omap_sdi_driver);
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +0200398}
399
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200400void __exit sdi_uninit_platform_driver(void)
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +0200401{
402 platform_driver_unregister(&omap_sdi_driver);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300403}