blob: d85a2c1fad54e42de057b494bf74ce9154cc57d8 [file] [log] [blame]
Huang Shijie10a2bca2011-09-08 10:47:09 +08001/*
2 * Freescale GPMI NAND Flash Driver
3 *
4 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5 * Copyright (C) 2008 Embedded Alley Solutions, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21#include <linux/clk.h>
22#include <linux/slab.h>
23#include <linux/interrupt.h>
Wolfram Sangdf16c862011-11-23 15:57:06 +010024#include <linux/module.h>
Huang Shijie10a2bca2011-09-08 10:47:09 +080025#include <linux/mtd/gpmi-nand.h>
26#include <linux/mtd/partitions.h>
Huang Shijie10a2bca2011-09-08 10:47:09 +080027#include "gpmi-nand.h"
28
29/* add our owner bbt descriptor */
30static uint8_t scan_ff_pattern[] = { 0xff };
31static struct nand_bbt_descr gpmi_bbt_descr = {
32 .options = 0,
33 .offs = 0,
34 .len = 1,
35 .pattern = scan_ff_pattern
36};
37
38/* We will use all the (page + OOB). */
39static struct nand_ecclayout gpmi_hw_ecclayout = {
40 .eccbytes = 0,
41 .eccpos = { 0, },
42 .oobfree = { {.offset = 0, .length = 0} }
43};
44
45static irqreturn_t bch_irq(int irq, void *cookie)
46{
47 struct gpmi_nand_data *this = cookie;
48
49 gpmi_clear_bch(this);
50 complete(&this->bch_done);
51 return IRQ_HANDLED;
52}
53
54/*
55 * Calculate the ECC strength by hand:
56 * E : The ECC strength.
57 * G : the length of Galois Field.
58 * N : The chunk count of per page.
59 * O : the oobsize of the NAND chip.
60 * M : the metasize of per page.
61 *
62 * The formula is :
63 * E * G * N
64 * ------------ <= (O - M)
65 * 8
66 *
67 * So, we get E by:
68 * (O - M) * 8
69 * E <= -------------
70 * G * N
71 */
72static inline int get_ecc_strength(struct gpmi_nand_data *this)
73{
74 struct bch_geometry *geo = &this->bch_geometry;
75 struct mtd_info *mtd = &this->mtd;
76 int ecc_strength;
77
78 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
79 / (geo->gf_len * geo->ecc_chunk_count);
80
81 /* We need the minor even number. */
82 return round_down(ecc_strength, 2);
83}
84
85int common_nfc_set_geometry(struct gpmi_nand_data *this)
86{
87 struct bch_geometry *geo = &this->bch_geometry;
88 struct mtd_info *mtd = &this->mtd;
89 unsigned int metadata_size;
90 unsigned int status_size;
91 unsigned int block_mark_bit_offset;
92
93 /*
94 * The size of the metadata can be changed, though we set it to 10
95 * bytes now. But it can't be too large, because we have to save
96 * enough space for BCH.
97 */
98 geo->metadata_size = 10;
99
100 /* The default for the length of Galois Field. */
101 geo->gf_len = 13;
102
103 /* The default for chunk size. There is no oobsize greater then 512. */
104 geo->ecc_chunk_size = 512;
105 while (geo->ecc_chunk_size < mtd->oobsize)
106 geo->ecc_chunk_size *= 2; /* keep C >= O */
107
108 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
109
110 /* We use the same ECC strength for all chunks. */
111 geo->ecc_strength = get_ecc_strength(this);
112 if (!geo->ecc_strength) {
113 pr_err("We get a wrong ECC strength.\n");
114 return -EINVAL;
115 }
116
117 geo->page_size = mtd->writesize + mtd->oobsize;
118 geo->payload_size = mtd->writesize;
119
120 /*
121 * The auxiliary buffer contains the metadata and the ECC status. The
122 * metadata is padded to the nearest 32-bit boundary. The ECC status
123 * contains one byte for every ECC chunk, and is also padded to the
124 * nearest 32-bit boundary.
125 */
126 metadata_size = ALIGN(geo->metadata_size, 4);
127 status_size = ALIGN(geo->ecc_chunk_count, 4);
128
129 geo->auxiliary_size = metadata_size + status_size;
130 geo->auxiliary_status_offset = metadata_size;
131
132 if (!this->swap_block_mark)
133 return 0;
134
135 /*
136 * We need to compute the byte and bit offsets of
137 * the physical block mark within the ECC-based view of the page.
138 *
139 * NAND chip with 2K page shows below:
140 * (Block Mark)
141 * | |
142 * | D |
143 * |<---->|
144 * V V
145 * +---+----------+-+----------+-+----------+-+----------+-+
146 * | M | data |E| data |E| data |E| data |E|
147 * +---+----------+-+----------+-+----------+-+----------+-+
148 *
149 * The position of block mark moves forward in the ECC-based view
150 * of page, and the delta is:
151 *
152 * E * G * (N - 1)
153 * D = (---------------- + M)
154 * 8
155 *
156 * With the formula to compute the ECC strength, and the condition
157 * : C >= O (C is the ecc chunk size)
158 *
159 * It's easy to deduce to the following result:
160 *
161 * E * G (O - M) C - M C - M
162 * ----------- <= ------- <= -------- < ---------
163 * 8 N N (N - 1)
164 *
165 * So, we get:
166 *
167 * E * G * (N - 1)
168 * D = (---------------- + M) < C
169 * 8
170 *
171 * The above inequality means the position of block mark
172 * within the ECC-based view of the page is still in the data chunk,
173 * and it's NOT in the ECC bits of the chunk.
174 *
175 * Use the following to compute the bit position of the
176 * physical block mark within the ECC-based view of the page:
177 * (page_size - D) * 8
178 *
179 * --Huang Shijie
180 */
181 block_mark_bit_offset = mtd->writesize * 8 -
182 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
183 + geo->metadata_size * 8);
184
185 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
186 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
187 return 0;
188}
189
190struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
191{
192 int chipnr = this->current_chip;
193
194 return this->dma_chans[chipnr];
195}
196
197/* Can we use the upper's buffer directly for DMA? */
198void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr)
199{
200 struct scatterlist *sgl = &this->data_sgl;
201 int ret;
202
203 this->direct_dma_map_ok = true;
204
205 /* first try to map the upper buffer directly */
206 sg_init_one(sgl, this->upper_buf, this->upper_len);
207 ret = dma_map_sg(this->dev, sgl, 1, dr);
208 if (ret == 0) {
209 /* We have to use our own DMA buffer. */
210 sg_init_one(sgl, this->data_buffer_dma, PAGE_SIZE);
211
212 if (dr == DMA_TO_DEVICE)
213 memcpy(this->data_buffer_dma, this->upper_buf,
214 this->upper_len);
215
216 ret = dma_map_sg(this->dev, sgl, 1, dr);
217 if (ret == 0)
218 pr_err("map failed.\n");
219
220 this->direct_dma_map_ok = false;
221 }
222}
223
224/* This will be called after the DMA operation is finished. */
225static void dma_irq_callback(void *param)
226{
227 struct gpmi_nand_data *this = param;
228 struct completion *dma_c = &this->dma_done;
229
230 complete(dma_c);
231
232 switch (this->dma_type) {
233 case DMA_FOR_COMMAND:
234 dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE);
235 break;
236
237 case DMA_FOR_READ_DATA:
238 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE);
239 if (this->direct_dma_map_ok == false)
240 memcpy(this->upper_buf, this->data_buffer_dma,
241 this->upper_len);
242 break;
243
244 case DMA_FOR_WRITE_DATA:
245 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE);
246 break;
247
248 case DMA_FOR_READ_ECC_PAGE:
249 case DMA_FOR_WRITE_ECC_PAGE:
250 /* We have to wait the BCH interrupt to finish. */
251 break;
252
253 default:
254 pr_err("in wrong DMA operation.\n");
255 }
256}
257
258int start_dma_without_bch_irq(struct gpmi_nand_data *this,
259 struct dma_async_tx_descriptor *desc)
260{
261 struct completion *dma_c = &this->dma_done;
262 int err;
263
264 init_completion(dma_c);
265
266 desc->callback = dma_irq_callback;
267 desc->callback_param = this;
268 dmaengine_submit(desc);
Shawn Guod04525e2012-04-11 13:29:31 +0800269 dma_async_issue_pending(get_dma_chan(this));
Huang Shijie10a2bca2011-09-08 10:47:09 +0800270
271 /* Wait for the interrupt from the DMA block. */
272 err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000));
273 if (!err) {
274 pr_err("DMA timeout, last DMA :%d\n", this->last_dma_type);
275 gpmi_dump_info(this);
276 return -ETIMEDOUT;
277 }
278 return 0;
279}
280
281/*
282 * This function is used in BCH reading or BCH writing pages.
283 * It will wait for the BCH interrupt as long as ONE second.
284 * Actually, we must wait for two interrupts :
285 * [1] firstly the DMA interrupt and
286 * [2] secondly the BCH interrupt.
287 */
288int start_dma_with_bch_irq(struct gpmi_nand_data *this,
289 struct dma_async_tx_descriptor *desc)
290{
291 struct completion *bch_c = &this->bch_done;
292 int err;
293
294 /* Prepare to receive an interrupt from the BCH block. */
295 init_completion(bch_c);
296
297 /* start the DMA */
298 start_dma_without_bch_irq(this, desc);
299
300 /* Wait for the interrupt from the BCH block. */
301 err = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000));
302 if (!err) {
303 pr_err("BCH timeout, last DMA :%d\n", this->last_dma_type);
304 gpmi_dump_info(this);
305 return -ETIMEDOUT;
306 }
307 return 0;
308}
309
310static int __devinit
311acquire_register_block(struct gpmi_nand_data *this, const char *res_name)
312{
313 struct platform_device *pdev = this->pdev;
314 struct resources *res = &this->resources;
315 struct resource *r;
316 void *p;
317
318 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
319 if (!r) {
320 pr_err("Can't get resource for %s\n", res_name);
321 return -ENXIO;
322 }
323
324 p = ioremap(r->start, resource_size(r));
325 if (!p) {
326 pr_err("Can't remap %s\n", res_name);
327 return -ENOMEM;
328 }
329
330 if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME))
331 res->gpmi_regs = p;
332 else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME))
333 res->bch_regs = p;
334 else
335 pr_err("unknown resource name : %s\n", res_name);
336
337 return 0;
338}
339
340static void release_register_block(struct gpmi_nand_data *this)
341{
342 struct resources *res = &this->resources;
343 if (res->gpmi_regs)
344 iounmap(res->gpmi_regs);
345 if (res->bch_regs)
346 iounmap(res->bch_regs);
347 res->gpmi_regs = NULL;
348 res->bch_regs = NULL;
349}
350
351static int __devinit
352acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h)
353{
354 struct platform_device *pdev = this->pdev;
355 struct resources *res = &this->resources;
356 const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME;
357 struct resource *r;
358 int err;
359
360 r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
361 if (!r) {
362 pr_err("Can't get resource for %s\n", res_name);
363 return -ENXIO;
364 }
365
366 err = request_irq(r->start, irq_h, 0, res_name, this);
367 if (err) {
368 pr_err("Can't own %s\n", res_name);
369 return err;
370 }
371
372 res->bch_low_interrupt = r->start;
373 res->bch_high_interrupt = r->end;
374 return 0;
375}
376
377static void release_bch_irq(struct gpmi_nand_data *this)
378{
379 struct resources *res = &this->resources;
380 int i = res->bch_low_interrupt;
381
382 for (; i <= res->bch_high_interrupt; i++)
383 free_irq(i, this);
384}
385
386static bool gpmi_dma_filter(struct dma_chan *chan, void *param)
387{
388 struct gpmi_nand_data *this = param;
389 struct resource *r = this->private;
390
391 if (!mxs_dma_is_apbh(chan))
392 return false;
393 /*
394 * only catch the GPMI dma channels :
395 * for mx23 : MX23_DMA_GPMI0 ~ MX23_DMA_GPMI3
396 * (These four channels share the same IRQ!)
397 *
398 * for mx28 : MX28_DMA_GPMI0 ~ MX28_DMA_GPMI7
399 * (These eight channels share the same IRQ!)
400 */
401 if (r->start <= chan->chan_id && chan->chan_id <= r->end) {
402 chan->private = &this->dma_data;
403 return true;
404 }
405 return false;
406}
407
408static void release_dma_channels(struct gpmi_nand_data *this)
409{
410 unsigned int i;
411 for (i = 0; i < DMA_CHANS; i++)
412 if (this->dma_chans[i]) {
413 dma_release_channel(this->dma_chans[i]);
414 this->dma_chans[i] = NULL;
415 }
416}
417
418static int __devinit acquire_dma_channels(struct gpmi_nand_data *this)
419{
420 struct platform_device *pdev = this->pdev;
421 struct gpmi_nand_platform_data *pdata = this->pdata;
422 struct resources *res = &this->resources;
423 struct resource *r, *r_dma;
424 unsigned int i;
425
426 r = platform_get_resource_byname(pdev, IORESOURCE_DMA,
427 GPMI_NAND_DMA_CHANNELS_RES_NAME);
428 r_dma = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
429 GPMI_NAND_DMA_INTERRUPT_RES_NAME);
430 if (!r || !r_dma) {
431 pr_err("Can't get resource for DMA\n");
432 return -ENXIO;
433 }
434
435 /* used in gpmi_dma_filter() */
436 this->private = r;
437
438 for (i = r->start; i <= r->end; i++) {
439 struct dma_chan *dma_chan;
440 dma_cap_mask_t mask;
441
442 if (i - r->start >= pdata->max_chip_count)
443 break;
444
445 dma_cap_zero(mask);
446 dma_cap_set(DMA_SLAVE, mask);
447
448 /* get the DMA interrupt */
449 if (r_dma->start == r_dma->end) {
450 /* only register the first. */
451 if (i == r->start)
452 this->dma_data.chan_irq = r_dma->start;
453 else
454 this->dma_data.chan_irq = NO_IRQ;
455 } else
456 this->dma_data.chan_irq = r_dma->start + (i - r->start);
457
458 dma_chan = dma_request_channel(mask, gpmi_dma_filter, this);
459 if (!dma_chan)
460 goto acquire_err;
461
462 /* fill the first empty item */
463 this->dma_chans[i - r->start] = dma_chan;
464 }
465
466 res->dma_low_channel = r->start;
467 res->dma_high_channel = i;
468 return 0;
469
470acquire_err:
471 pr_err("Can't acquire DMA channel %u\n", i);
472 release_dma_channels(this);
473 return -EINVAL;
474}
475
476static int __devinit acquire_resources(struct gpmi_nand_data *this)
477{
478 struct resources *res = &this->resources;
479 int ret;
480
481 ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME);
482 if (ret)
483 goto exit_regs;
484
485 ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME);
486 if (ret)
487 goto exit_regs;
488
489 ret = acquire_bch_irq(this, bch_irq);
490 if (ret)
491 goto exit_regs;
492
493 ret = acquire_dma_channels(this);
494 if (ret)
495 goto exit_dma_channels;
496
497 res->clock = clk_get(&this->pdev->dev, NULL);
498 if (IS_ERR(res->clock)) {
499 pr_err("can not get the clock\n");
500 ret = -ENOENT;
501 goto exit_clock;
502 }
503 return 0;
504
505exit_clock:
506 release_dma_channels(this);
507exit_dma_channels:
508 release_bch_irq(this);
509exit_regs:
510 release_register_block(this);
511 return ret;
512}
513
514static void release_resources(struct gpmi_nand_data *this)
515{
516 struct resources *r = &this->resources;
517
518 clk_put(r->clock);
519 release_register_block(this);
520 release_bch_irq(this);
521 release_dma_channels(this);
522}
523
524static int __devinit init_hardware(struct gpmi_nand_data *this)
525{
526 int ret;
527
528 /*
529 * This structure contains the "safe" GPMI timing that should succeed
530 * with any NAND Flash device
531 * (although, with less-than-optimal performance).
532 */
533 struct nand_timing safe_timing = {
534 .data_setup_in_ns = 80,
535 .data_hold_in_ns = 60,
536 .address_setup_in_ns = 25,
537 .gpmi_sample_delay_in_ns = 6,
538 .tREA_in_ns = -1,
539 .tRLOH_in_ns = -1,
540 .tRHOH_in_ns = -1,
541 };
542
543 /* Initialize the hardwares. */
544 ret = gpmi_init(this);
545 if (ret)
546 return ret;
547
548 this->timing = safe_timing;
549 return 0;
550}
551
552static int read_page_prepare(struct gpmi_nand_data *this,
553 void *destination, unsigned length,
554 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
555 void **use_virt, dma_addr_t *use_phys)
556{
557 struct device *dev = this->dev;
558
559 if (virt_addr_valid(destination)) {
560 dma_addr_t dest_phys;
561
562 dest_phys = dma_map_single(dev, destination,
563 length, DMA_FROM_DEVICE);
564 if (dma_mapping_error(dev, dest_phys)) {
565 if (alt_size < length) {
566 pr_err("Alternate buffer is too small\n");
567 return -ENOMEM;
568 }
569 goto map_failed;
570 }
571 *use_virt = destination;
572 *use_phys = dest_phys;
573 this->direct_dma_map_ok = true;
574 return 0;
575 }
576
577map_failed:
578 *use_virt = alt_virt;
579 *use_phys = alt_phys;
580 this->direct_dma_map_ok = false;
581 return 0;
582}
583
584static inline void read_page_end(struct gpmi_nand_data *this,
585 void *destination, unsigned length,
586 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
587 void *used_virt, dma_addr_t used_phys)
588{
589 if (this->direct_dma_map_ok)
590 dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE);
591}
592
593static inline void read_page_swap_end(struct gpmi_nand_data *this,
594 void *destination, unsigned length,
595 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
596 void *used_virt, dma_addr_t used_phys)
597{
598 if (!this->direct_dma_map_ok)
599 memcpy(destination, alt_virt, length);
600}
601
602static int send_page_prepare(struct gpmi_nand_data *this,
603 const void *source, unsigned length,
604 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
605 const void **use_virt, dma_addr_t *use_phys)
606{
607 struct device *dev = this->dev;
608
609 if (virt_addr_valid(source)) {
610 dma_addr_t source_phys;
611
612 source_phys = dma_map_single(dev, (void *)source, length,
613 DMA_TO_DEVICE);
614 if (dma_mapping_error(dev, source_phys)) {
615 if (alt_size < length) {
616 pr_err("Alternate buffer is too small\n");
617 return -ENOMEM;
618 }
619 goto map_failed;
620 }
621 *use_virt = source;
622 *use_phys = source_phys;
623 return 0;
624 }
625map_failed:
626 /*
627 * Copy the content of the source buffer into the alternate
628 * buffer and set up the return values accordingly.
629 */
630 memcpy(alt_virt, source, length);
631
632 *use_virt = alt_virt;
633 *use_phys = alt_phys;
634 return 0;
635}
636
637static void send_page_end(struct gpmi_nand_data *this,
638 const void *source, unsigned length,
639 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
640 const void *used_virt, dma_addr_t used_phys)
641{
642 struct device *dev = this->dev;
643 if (used_virt == source)
644 dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE);
645}
646
647static void gpmi_free_dma_buffer(struct gpmi_nand_data *this)
648{
649 struct device *dev = this->dev;
650
651 if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt))
652 dma_free_coherent(dev, this->page_buffer_size,
653 this->page_buffer_virt,
654 this->page_buffer_phys);
655 kfree(this->cmd_buffer);
656 kfree(this->data_buffer_dma);
657
658 this->cmd_buffer = NULL;
659 this->data_buffer_dma = NULL;
660 this->page_buffer_virt = NULL;
661 this->page_buffer_size = 0;
662}
663
664/* Allocate the DMA buffers */
665static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
666{
667 struct bch_geometry *geo = &this->bch_geometry;
668 struct device *dev = this->dev;
669
670 /* [1] Allocate a command buffer. PAGE_SIZE is enough. */
671 this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA);
672 if (this->cmd_buffer == NULL)
673 goto error_alloc;
674
675 /* [2] Allocate a read/write data buffer. PAGE_SIZE is enough. */
676 this->data_buffer_dma = kzalloc(PAGE_SIZE, GFP_DMA);
677 if (this->data_buffer_dma == NULL)
678 goto error_alloc;
679
680 /*
681 * [3] Allocate the page buffer.
682 *
683 * Both the payload buffer and the auxiliary buffer must appear on
684 * 32-bit boundaries. We presume the size of the payload buffer is a
685 * power of two and is much larger than four, which guarantees the
686 * auxiliary buffer will appear on a 32-bit boundary.
687 */
688 this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
689 this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
690 &this->page_buffer_phys, GFP_DMA);
691 if (!this->page_buffer_virt)
692 goto error_alloc;
693
694
695 /* Slice up the page buffer. */
696 this->payload_virt = this->page_buffer_virt;
697 this->payload_phys = this->page_buffer_phys;
698 this->auxiliary_virt = this->payload_virt + geo->payload_size;
699 this->auxiliary_phys = this->payload_phys + geo->payload_size;
700 return 0;
701
702error_alloc:
703 gpmi_free_dma_buffer(this);
704 pr_err("allocate DMA buffer ret!!\n");
705 return -ENOMEM;
706}
707
708static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
709{
710 struct nand_chip *chip = mtd->priv;
711 struct gpmi_nand_data *this = chip->priv;
712 int ret;
713
714 /*
715 * Every operation begins with a command byte and a series of zero or
716 * more address bytes. These are distinguished by either the Address
717 * Latch Enable (ALE) or Command Latch Enable (CLE) signals being
718 * asserted. When MTD is ready to execute the command, it will deassert
719 * both latch enables.
720 *
721 * Rather than run a separate DMA operation for every single byte, we
722 * queue them up and run a single DMA operation for the entire series
723 * of command and data bytes. NAND_CMD_NONE means the END of the queue.
724 */
725 if ((ctrl & (NAND_ALE | NAND_CLE))) {
726 if (data != NAND_CMD_NONE)
727 this->cmd_buffer[this->command_length++] = data;
728 return;
729 }
730
731 if (!this->command_length)
732 return;
733
734 ret = gpmi_send_command(this);
735 if (ret)
736 pr_err("Chip: %u, Error %d\n", this->current_chip, ret);
737
738 this->command_length = 0;
739}
740
741static int gpmi_dev_ready(struct mtd_info *mtd)
742{
743 struct nand_chip *chip = mtd->priv;
744 struct gpmi_nand_data *this = chip->priv;
745
746 return gpmi_is_ready(this, this->current_chip);
747}
748
749static void gpmi_select_chip(struct mtd_info *mtd, int chipnr)
750{
751 struct nand_chip *chip = mtd->priv;
752 struct gpmi_nand_data *this = chip->priv;
753
754 if ((this->current_chip < 0) && (chipnr >= 0))
755 gpmi_begin(this);
756 else if ((this->current_chip >= 0) && (chipnr < 0))
757 gpmi_end(this);
758
759 this->current_chip = chipnr;
760}
761
762static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
763{
764 struct nand_chip *chip = mtd->priv;
765 struct gpmi_nand_data *this = chip->priv;
766
767 pr_debug("len is %d\n", len);
768 this->upper_buf = buf;
769 this->upper_len = len;
770
771 gpmi_read_data(this);
772}
773
774static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
775{
776 struct nand_chip *chip = mtd->priv;
777 struct gpmi_nand_data *this = chip->priv;
778
779 pr_debug("len is %d\n", len);
780 this->upper_buf = (uint8_t *)buf;
781 this->upper_len = len;
782
783 gpmi_send_data(this);
784}
785
786static uint8_t gpmi_read_byte(struct mtd_info *mtd)
787{
788 struct nand_chip *chip = mtd->priv;
789 struct gpmi_nand_data *this = chip->priv;
790 uint8_t *buf = this->data_buffer_dma;
791
792 gpmi_read_buf(mtd, buf, 1);
793 return buf[0];
794}
795
796/*
797 * Handles block mark swapping.
798 * It can be called in swapping the block mark, or swapping it back,
799 * because the the operations are the same.
800 */
801static void block_mark_swapping(struct gpmi_nand_data *this,
802 void *payload, void *auxiliary)
803{
804 struct bch_geometry *nfc_geo = &this->bch_geometry;
805 unsigned char *p;
806 unsigned char *a;
807 unsigned int bit;
808 unsigned char mask;
809 unsigned char from_data;
810 unsigned char from_oob;
811
812 if (!this->swap_block_mark)
813 return;
814
815 /*
816 * If control arrives here, we're swapping. Make some convenience
817 * variables.
818 */
819 bit = nfc_geo->block_mark_bit_offset;
820 p = payload + nfc_geo->block_mark_byte_offset;
821 a = auxiliary;
822
823 /*
824 * Get the byte from the data area that overlays the block mark. Since
825 * the ECC engine applies its own view to the bits in the page, the
826 * physical block mark won't (in general) appear on a byte boundary in
827 * the data.
828 */
829 from_data = (p[0] >> bit) | (p[1] << (8 - bit));
830
831 /* Get the byte from the OOB. */
832 from_oob = a[0];
833
834 /* Swap them. */
835 a[0] = from_data;
836
837 mask = (0x1 << bit) - 1;
838 p[0] = (p[0] & mask) | (from_oob << bit);
839
840 mask = ~0 << bit;
841 p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
842}
843
844static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
Brian Norris1fbb9382012-05-02 10:14:55 -0700845 uint8_t *buf, int oob_required, int page)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800846{
847 struct gpmi_nand_data *this = chip->priv;
848 struct bch_geometry *nfc_geo = &this->bch_geometry;
849 void *payload_virt;
850 dma_addr_t payload_phys;
851 void *auxiliary_virt;
852 dma_addr_t auxiliary_phys;
853 unsigned int i;
854 unsigned char *status;
855 unsigned int failed;
856 unsigned int corrected;
857 int ret;
858
859 pr_debug("page number is : %d\n", page);
860 ret = read_page_prepare(this, buf, mtd->writesize,
861 this->payload_virt, this->payload_phys,
862 nfc_geo->payload_size,
863 &payload_virt, &payload_phys);
864 if (ret) {
865 pr_err("Inadequate DMA buffer\n");
866 ret = -ENOMEM;
867 return ret;
868 }
869 auxiliary_virt = this->auxiliary_virt;
870 auxiliary_phys = this->auxiliary_phys;
871
872 /* go! */
873 ret = gpmi_read_page(this, payload_phys, auxiliary_phys);
874 read_page_end(this, buf, mtd->writesize,
875 this->payload_virt, this->payload_phys,
876 nfc_geo->payload_size,
877 payload_virt, payload_phys);
878 if (ret) {
879 pr_err("Error in ECC-based read: %d\n", ret);
880 goto exit_nfc;
881 }
882
883 /* handle the block mark swapping */
884 block_mark_swapping(this, payload_virt, auxiliary_virt);
885
886 /* Loop over status bytes, accumulating ECC status. */
887 failed = 0;
888 corrected = 0;
889 status = auxiliary_virt + nfc_geo->auxiliary_status_offset;
890
891 for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) {
892 if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED))
893 continue;
894
895 if (*status == STATUS_UNCORRECTABLE) {
896 failed++;
897 continue;
898 }
899 corrected += *status;
900 }
901
902 /*
903 * Propagate ECC status to the owning MTD only when failed or
904 * corrected times nearly reaches our ECC correction threshold.
905 */
906 if (failed || corrected >= (nfc_geo->ecc_strength - 1)) {
907 mtd->ecc_stats.failed += failed;
908 mtd->ecc_stats.corrected += corrected;
909 }
910
911 /*
912 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob() for
913 * details about our policy for delivering the OOB.
914 *
915 * We fill the caller's buffer with set bits, and then copy the block
916 * mark to th caller's buffer. Note that, if block mark swapping was
917 * necessary, it has already been done, so we can rely on the first
918 * byte of the auxiliary buffer to contain the block mark.
919 */
920 memset(chip->oob_poi, ~0, mtd->oobsize);
921 chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];
922
923 read_page_swap_end(this, buf, mtd->writesize,
924 this->payload_virt, this->payload_phys,
925 nfc_geo->payload_size,
926 payload_virt, payload_phys);
927exit_nfc:
928 return ret;
929}
930
Brian Norris1fbb9382012-05-02 10:14:55 -0700931static void gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
932 const uint8_t *buf, int oob_required)
Huang Shijie10a2bca2011-09-08 10:47:09 +0800933{
934 struct gpmi_nand_data *this = chip->priv;
935 struct bch_geometry *nfc_geo = &this->bch_geometry;
936 const void *payload_virt;
937 dma_addr_t payload_phys;
938 const void *auxiliary_virt;
939 dma_addr_t auxiliary_phys;
940 int ret;
941
942 pr_debug("ecc write page.\n");
943 if (this->swap_block_mark) {
944 /*
945 * If control arrives here, we're doing block mark swapping.
946 * Since we can't modify the caller's buffers, we must copy them
947 * into our own.
948 */
949 memcpy(this->payload_virt, buf, mtd->writesize);
950 payload_virt = this->payload_virt;
951 payload_phys = this->payload_phys;
952
953 memcpy(this->auxiliary_virt, chip->oob_poi,
954 nfc_geo->auxiliary_size);
955 auxiliary_virt = this->auxiliary_virt;
956 auxiliary_phys = this->auxiliary_phys;
957
958 /* Handle block mark swapping. */
959 block_mark_swapping(this,
960 (void *) payload_virt, (void *) auxiliary_virt);
961 } else {
962 /*
963 * If control arrives here, we're not doing block mark swapping,
964 * so we can to try and use the caller's buffers.
965 */
966 ret = send_page_prepare(this,
967 buf, mtd->writesize,
968 this->payload_virt, this->payload_phys,
969 nfc_geo->payload_size,
970 &payload_virt, &payload_phys);
971 if (ret) {
972 pr_err("Inadequate payload DMA buffer\n");
973 return;
974 }
975
976 ret = send_page_prepare(this,
977 chip->oob_poi, mtd->oobsize,
978 this->auxiliary_virt, this->auxiliary_phys,
979 nfc_geo->auxiliary_size,
980 &auxiliary_virt, &auxiliary_phys);
981 if (ret) {
982 pr_err("Inadequate auxiliary DMA buffer\n");
983 goto exit_auxiliary;
984 }
985 }
986
987 /* Ask the NFC. */
988 ret = gpmi_send_page(this, payload_phys, auxiliary_phys);
989 if (ret)
990 pr_err("Error in ECC-based write: %d\n", ret);
991
992 if (!this->swap_block_mark) {
993 send_page_end(this, chip->oob_poi, mtd->oobsize,
994 this->auxiliary_virt, this->auxiliary_phys,
995 nfc_geo->auxiliary_size,
996 auxiliary_virt, auxiliary_phys);
997exit_auxiliary:
998 send_page_end(this, buf, mtd->writesize,
999 this->payload_virt, this->payload_phys,
1000 nfc_geo->payload_size,
1001 payload_virt, payload_phys);
1002 }
1003}
1004
1005/*
1006 * There are several places in this driver where we have to handle the OOB and
1007 * block marks. This is the function where things are the most complicated, so
1008 * this is where we try to explain it all. All the other places refer back to
1009 * here.
1010 *
1011 * These are the rules, in order of decreasing importance:
1012 *
1013 * 1) Nothing the caller does can be allowed to imperil the block mark.
1014 *
1015 * 2) In read operations, the first byte of the OOB we return must reflect the
1016 * true state of the block mark, no matter where that block mark appears in
1017 * the physical page.
1018 *
1019 * 3) ECC-based read operations return an OOB full of set bits (since we never
1020 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1021 * return).
1022 *
1023 * 4) "Raw" read operations return a direct view of the physical bytes in the
1024 * page, using the conventional definition of which bytes are data and which
1025 * are OOB. This gives the caller a way to see the actual, physical bytes
1026 * in the page, without the distortions applied by our ECC engine.
1027 *
1028 *
1029 * What we do for this specific read operation depends on two questions:
1030 *
1031 * 1) Are we doing a "raw" read, or an ECC-based read?
1032 *
1033 * 2) Are we using block mark swapping or transcription?
1034 *
1035 * There are four cases, illustrated by the following Karnaugh map:
1036 *
1037 * | Raw | ECC-based |
1038 * -------------+-------------------------+-------------------------+
1039 * | Read the conventional | |
1040 * | OOB at the end of the | |
1041 * Swapping | page and return it. It | |
1042 * | contains exactly what | |
1043 * | we want. | Read the block mark and |
1044 * -------------+-------------------------+ return it in a buffer |
1045 * | Read the conventional | full of set bits. |
1046 * | OOB at the end of the | |
1047 * | page and also the block | |
1048 * Transcribing | mark in the metadata. | |
1049 * | Copy the block mark | |
1050 * | into the first byte of | |
1051 * | the OOB. | |
1052 * -------------+-------------------------+-------------------------+
1053 *
1054 * Note that we break rule #4 in the Transcribing/Raw case because we're not
1055 * giving an accurate view of the actual, physical bytes in the page (we're
1056 * overwriting the block mark). That's OK because it's more important to follow
1057 * rule #2.
1058 *
1059 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1060 * easy. When reading a page, for example, the NAND Flash MTD code calls our
1061 * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an
1062 * ECC-based or raw view of the page is implicit in which function it calls
1063 * (there is a similar pair of ECC-based/raw functions for writing).
1064 *
1065 * Since MTD assumes the OOB is not covered by ECC, there is no pair of
1066 * ECC-based/raw functions for reading or or writing the OOB. The fact that the
1067 * caller wants an ECC-based or raw view of the page is not propagated down to
1068 * this driver.
1069 */
1070static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
1071 int page, int sndcmd)
1072{
1073 struct gpmi_nand_data *this = chip->priv;
1074
1075 pr_debug("page number is %d\n", page);
1076 /* clear the OOB buffer */
1077 memset(chip->oob_poi, ~0, mtd->oobsize);
1078
1079 /* Read out the conventional OOB. */
1080 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1081 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1082
1083 /*
1084 * Now, we want to make sure the block mark is correct. In the
1085 * Swapping/Raw case, we already have it. Otherwise, we need to
1086 * explicitly read it.
1087 */
1088 if (!this->swap_block_mark) {
1089 /* Read the block mark into the first byte of the OOB buffer. */
1090 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1091 chip->oob_poi[0] = chip->read_byte(mtd);
1092 }
1093
1094 /*
1095 * Return true, indicating that the next call to this function must send
1096 * a command.
1097 */
1098 return true;
1099}
1100
1101static int
1102gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
1103{
1104 /*
1105 * The BCH will use all the (page + oob).
1106 * Our gpmi_hw_ecclayout can only prohibit the JFFS2 to write the oob.
1107 * But it can not stop some ioctls such MEMWRITEOOB which uses
Brian Norris0612b9d2011-08-30 18:45:40 -07001108 * MTD_OPS_PLACE_OOB. So We have to implement this function to prohibit
Huang Shijie10a2bca2011-09-08 10:47:09 +08001109 * these ioctls too.
1110 */
1111 return -EPERM;
1112}
1113
1114static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
1115{
1116 struct nand_chip *chip = mtd->priv;
1117 struct gpmi_nand_data *this = chip->priv;
1118 int block, ret = 0;
1119 uint8_t *block_mark;
1120 int column, page, status, chipnr;
1121
1122 /* Get block number */
1123 block = (int)(ofs >> chip->bbt_erase_shift);
1124 if (chip->bbt)
1125 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1126
1127 /* Do we have a flash based bad block table ? */
Wolfram Sang52899662012-01-31 13:10:43 +01001128 if (chip->bbt_options & NAND_BBT_USE_FLASH)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001129 ret = nand_update_bbt(mtd, ofs);
1130 else {
1131 chipnr = (int)(ofs >> chip->chip_shift);
1132 chip->select_chip(mtd, chipnr);
1133
1134 column = this->swap_block_mark ? mtd->writesize : 0;
1135
1136 /* Write the block mark. */
1137 block_mark = this->data_buffer_dma;
1138 block_mark[0] = 0; /* bad block marker */
1139
1140 /* Shift to get page */
1141 page = (int)(ofs >> chip->page_shift);
1142
1143 chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page);
1144 chip->write_buf(mtd, block_mark, 1);
1145 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1146
1147 status = chip->waitfunc(mtd, chip);
1148 if (status & NAND_STATUS_FAIL)
1149 ret = -EIO;
1150
1151 chip->select_chip(mtd, -1);
1152 }
1153 if (!ret)
1154 mtd->ecc_stats.badblocks++;
1155
1156 return ret;
1157}
1158
Wolfram Sanga78da282012-03-21 19:29:17 +01001159static int nand_boot_set_geometry(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001160{
1161 struct boot_rom_geometry *geometry = &this->rom_geometry;
1162
1163 /*
1164 * Set the boot block stride size.
1165 *
1166 * In principle, we should be reading this from the OTP bits, since
1167 * that's where the ROM is going to get it. In fact, we don't have any
1168 * way to read the OTP bits, so we go with the default and hope for the
1169 * best.
1170 */
1171 geometry->stride_size_in_pages = 64;
1172
1173 /*
1174 * Set the search area stride exponent.
1175 *
1176 * In principle, we should be reading this from the OTP bits, since
1177 * that's where the ROM is going to get it. In fact, we don't have any
1178 * way to read the OTP bits, so we go with the default and hope for the
1179 * best.
1180 */
1181 geometry->search_area_stride_exponent = 2;
1182 return 0;
1183}
1184
1185static const char *fingerprint = "STMP";
Wolfram Sanga78da282012-03-21 19:29:17 +01001186static int mx23_check_transcription_stamp(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001187{
1188 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1189 struct device *dev = this->dev;
1190 struct mtd_info *mtd = &this->mtd;
1191 struct nand_chip *chip = &this->nand;
1192 unsigned int search_area_size_in_strides;
1193 unsigned int stride;
1194 unsigned int page;
1195 loff_t byte;
1196 uint8_t *buffer = chip->buffers->databuf;
1197 int saved_chip_number;
1198 int found_an_ncb_fingerprint = false;
1199
1200 /* Compute the number of strides in a search area. */
1201 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1202
1203 saved_chip_number = this->current_chip;
1204 chip->select_chip(mtd, 0);
1205
1206 /*
1207 * Loop through the first search area, looking for the NCB fingerprint.
1208 */
1209 dev_dbg(dev, "Scanning for an NCB fingerprint...\n");
1210
1211 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1212 /* Compute the page and byte addresses. */
1213 page = stride * rom_geo->stride_size_in_pages;
1214 byte = page * mtd->writesize;
1215
1216 dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page);
1217
1218 /*
1219 * Read the NCB fingerprint. The fingerprint is four bytes long
1220 * and starts in the 12th byte of the page.
1221 */
1222 chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page);
1223 chip->read_buf(mtd, buffer, strlen(fingerprint));
1224
1225 /* Look for the fingerprint. */
1226 if (!memcmp(buffer, fingerprint, strlen(fingerprint))) {
1227 found_an_ncb_fingerprint = true;
1228 break;
1229 }
1230
1231 }
1232
1233 chip->select_chip(mtd, saved_chip_number);
1234
1235 if (found_an_ncb_fingerprint)
1236 dev_dbg(dev, "\tFound a fingerprint\n");
1237 else
1238 dev_dbg(dev, "\tNo fingerprint found\n");
1239 return found_an_ncb_fingerprint;
1240}
1241
1242/* Writes a transcription stamp. */
Wolfram Sanga78da282012-03-21 19:29:17 +01001243static int mx23_write_transcription_stamp(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001244{
1245 struct device *dev = this->dev;
1246 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1247 struct mtd_info *mtd = &this->mtd;
1248 struct nand_chip *chip = &this->nand;
1249 unsigned int block_size_in_pages;
1250 unsigned int search_area_size_in_strides;
1251 unsigned int search_area_size_in_pages;
1252 unsigned int search_area_size_in_blocks;
1253 unsigned int block;
1254 unsigned int stride;
1255 unsigned int page;
1256 loff_t byte;
1257 uint8_t *buffer = chip->buffers->databuf;
1258 int saved_chip_number;
1259 int status;
1260
1261 /* Compute the search area geometry. */
1262 block_size_in_pages = mtd->erasesize / mtd->writesize;
1263 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1264 search_area_size_in_pages = search_area_size_in_strides *
1265 rom_geo->stride_size_in_pages;
1266 search_area_size_in_blocks =
1267 (search_area_size_in_pages + (block_size_in_pages - 1)) /
1268 block_size_in_pages;
1269
1270 dev_dbg(dev, "Search Area Geometry :\n");
1271 dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks);
1272 dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides);
1273 dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages);
1274
1275 /* Select chip 0. */
1276 saved_chip_number = this->current_chip;
1277 chip->select_chip(mtd, 0);
1278
1279 /* Loop over blocks in the first search area, erasing them. */
1280 dev_dbg(dev, "Erasing the search area...\n");
1281
1282 for (block = 0; block < search_area_size_in_blocks; block++) {
1283 /* Compute the page address. */
1284 page = block * block_size_in_pages;
1285
1286 /* Erase this block. */
1287 dev_dbg(dev, "\tErasing block 0x%x\n", block);
1288 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1289 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1290
1291 /* Wait for the erase to finish. */
1292 status = chip->waitfunc(mtd, chip);
1293 if (status & NAND_STATUS_FAIL)
1294 dev_err(dev, "[%s] Erase failed.\n", __func__);
1295 }
1296
1297 /* Write the NCB fingerprint into the page buffer. */
1298 memset(buffer, ~0, mtd->writesize);
1299 memset(chip->oob_poi, ~0, mtd->oobsize);
1300 memcpy(buffer + 12, fingerprint, strlen(fingerprint));
1301
1302 /* Loop through the first search area, writing NCB fingerprints. */
1303 dev_dbg(dev, "Writing NCB fingerprints...\n");
1304 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1305 /* Compute the page and byte addresses. */
1306 page = stride * rom_geo->stride_size_in_pages;
1307 byte = page * mtd->writesize;
1308
1309 /* Write the first page of the current stride. */
1310 dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page);
1311 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
Brian Norris1fbb9382012-05-02 10:14:55 -07001312 chip->ecc.write_page_raw(mtd, chip, buffer, 0);
Huang Shijie10a2bca2011-09-08 10:47:09 +08001313 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1314
1315 /* Wait for the write to finish. */
1316 status = chip->waitfunc(mtd, chip);
1317 if (status & NAND_STATUS_FAIL)
1318 dev_err(dev, "[%s] Write failed.\n", __func__);
1319 }
1320
1321 /* Deselect chip 0. */
1322 chip->select_chip(mtd, saved_chip_number);
1323 return 0;
1324}
1325
Wolfram Sanga78da282012-03-21 19:29:17 +01001326static int mx23_boot_init(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001327{
1328 struct device *dev = this->dev;
1329 struct nand_chip *chip = &this->nand;
1330 struct mtd_info *mtd = &this->mtd;
1331 unsigned int block_count;
1332 unsigned int block;
1333 int chipnr;
1334 int page;
1335 loff_t byte;
1336 uint8_t block_mark;
1337 int ret = 0;
1338
1339 /*
1340 * If control arrives here, we can't use block mark swapping, which
1341 * means we're forced to use transcription. First, scan for the
1342 * transcription stamp. If we find it, then we don't have to do
1343 * anything -- the block marks are already transcribed.
1344 */
1345 if (mx23_check_transcription_stamp(this))
1346 return 0;
1347
1348 /*
1349 * If control arrives here, we couldn't find a transcription stamp, so
1350 * so we presume the block marks are in the conventional location.
1351 */
1352 dev_dbg(dev, "Transcribing bad block marks...\n");
1353
1354 /* Compute the number of blocks in the entire medium. */
1355 block_count = chip->chipsize >> chip->phys_erase_shift;
1356
1357 /*
1358 * Loop over all the blocks in the medium, transcribing block marks as
1359 * we go.
1360 */
1361 for (block = 0; block < block_count; block++) {
1362 /*
1363 * Compute the chip, page and byte addresses for this block's
1364 * conventional mark.
1365 */
1366 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift);
1367 page = block << (chip->phys_erase_shift - chip->page_shift);
1368 byte = block << chip->phys_erase_shift;
1369
1370 /* Send the command to read the conventional block mark. */
1371 chip->select_chip(mtd, chipnr);
1372 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1373 block_mark = chip->read_byte(mtd);
1374 chip->select_chip(mtd, -1);
1375
1376 /*
1377 * Check if the block is marked bad. If so, we need to mark it
1378 * again, but this time the result will be a mark in the
1379 * location where we transcribe block marks.
1380 */
1381 if (block_mark != 0xff) {
1382 dev_dbg(dev, "Transcribing mark in block %u\n", block);
1383 ret = chip->block_markbad(mtd, byte);
1384 if (ret)
1385 dev_err(dev, "Failed to mark block bad with "
1386 "ret %d\n", ret);
1387 }
1388 }
1389
1390 /* Write the stamp that indicates we've transcribed the block marks. */
1391 mx23_write_transcription_stamp(this);
1392 return 0;
1393}
1394
Wolfram Sanga78da282012-03-21 19:29:17 +01001395static int nand_boot_init(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001396{
1397 nand_boot_set_geometry(this);
1398
1399 /* This is ROM arch-specific initilization before the BBT scanning. */
1400 if (GPMI_IS_MX23(this))
1401 return mx23_boot_init(this);
1402 return 0;
1403}
1404
Wolfram Sanga78da282012-03-21 19:29:17 +01001405static int gpmi_set_geometry(struct gpmi_nand_data *this)
Huang Shijie10a2bca2011-09-08 10:47:09 +08001406{
1407 int ret;
1408
1409 /* Free the temporary DMA memory for reading ID. */
1410 gpmi_free_dma_buffer(this);
1411
1412 /* Set up the NFC geometry which is used by BCH. */
1413 ret = bch_set_geometry(this);
1414 if (ret) {
1415 pr_err("set geometry ret : %d\n", ret);
1416 return ret;
1417 }
1418
1419 /* Alloc the new DMA buffers according to the pagesize and oobsize */
1420 return gpmi_alloc_dma_buffer(this);
1421}
1422
1423static int gpmi_pre_bbt_scan(struct gpmi_nand_data *this)
1424{
1425 int ret;
1426
1427 /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */
1428 if (GPMI_IS_MX23(this))
1429 this->swap_block_mark = false;
1430 else
1431 this->swap_block_mark = true;
1432
1433 /* Set up the medium geometry */
1434 ret = gpmi_set_geometry(this);
1435 if (ret)
1436 return ret;
1437
1438 /* NAND boot init, depends on the gpmi_set_geometry(). */
1439 return nand_boot_init(this);
1440}
1441
1442static int gpmi_scan_bbt(struct mtd_info *mtd)
1443{
1444 struct nand_chip *chip = mtd->priv;
1445 struct gpmi_nand_data *this = chip->priv;
1446 int ret;
1447
1448 /* Prepare for the BBT scan. */
1449 ret = gpmi_pre_bbt_scan(this);
1450 if (ret)
1451 return ret;
1452
1453 /* use the default BBT implementation */
1454 return nand_default_bbt(mtd);
1455}
1456
1457void gpmi_nfc_exit(struct gpmi_nand_data *this)
1458{
1459 nand_release(&this->mtd);
1460 gpmi_free_dma_buffer(this);
1461}
1462
1463static int __devinit gpmi_nfc_init(struct gpmi_nand_data *this)
1464{
1465 struct gpmi_nand_platform_data *pdata = this->pdata;
1466 struct mtd_info *mtd = &this->mtd;
1467 struct nand_chip *chip = &this->nand;
1468 int ret;
1469
1470 /* init current chip */
1471 this->current_chip = -1;
1472
1473 /* init the MTD data structures */
1474 mtd->priv = chip;
1475 mtd->name = "gpmi-nand";
1476 mtd->owner = THIS_MODULE;
1477
1478 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
1479 chip->priv = this;
1480 chip->select_chip = gpmi_select_chip;
1481 chip->cmd_ctrl = gpmi_cmd_ctrl;
1482 chip->dev_ready = gpmi_dev_ready;
1483 chip->read_byte = gpmi_read_byte;
1484 chip->read_buf = gpmi_read_buf;
1485 chip->write_buf = gpmi_write_buf;
1486 chip->ecc.read_page = gpmi_ecc_read_page;
1487 chip->ecc.write_page = gpmi_ecc_write_page;
1488 chip->ecc.read_oob = gpmi_ecc_read_oob;
1489 chip->ecc.write_oob = gpmi_ecc_write_oob;
1490 chip->scan_bbt = gpmi_scan_bbt;
1491 chip->badblock_pattern = &gpmi_bbt_descr;
1492 chip->block_markbad = gpmi_block_markbad;
1493 chip->options |= NAND_NO_SUBPAGE_WRITE;
1494 chip->ecc.mode = NAND_ECC_HW;
1495 chip->ecc.size = 1;
1496 chip->ecc.layout = &gpmi_hw_ecclayout;
1497
1498 /* Allocate a temporary DMA buffer for reading ID in the nand_scan() */
1499 this->bch_geometry.payload_size = 1024;
1500 this->bch_geometry.auxiliary_size = 128;
1501 ret = gpmi_alloc_dma_buffer(this);
1502 if (ret)
1503 goto err_out;
1504
1505 ret = nand_scan(mtd, pdata->max_chip_count);
1506 if (ret) {
1507 pr_err("Chip scan failed\n");
1508 goto err_out;
1509 }
1510
1511 ret = mtd_device_parse_register(mtd, NULL, NULL,
1512 pdata->partitions, pdata->partition_count);
1513 if (ret)
1514 goto err_out;
1515 return 0;
1516
1517err_out:
1518 gpmi_nfc_exit(this);
1519 return ret;
1520}
1521
1522static int __devinit gpmi_nand_probe(struct platform_device *pdev)
1523{
1524 struct gpmi_nand_platform_data *pdata = pdev->dev.platform_data;
1525 struct gpmi_nand_data *this;
1526 int ret;
1527
1528 this = kzalloc(sizeof(*this), GFP_KERNEL);
1529 if (!this) {
1530 pr_err("Failed to allocate per-device memory\n");
1531 return -ENOMEM;
1532 }
1533
1534 platform_set_drvdata(pdev, this);
1535 this->pdev = pdev;
1536 this->dev = &pdev->dev;
1537 this->pdata = pdata;
1538
1539 if (pdata->platform_init) {
1540 ret = pdata->platform_init();
1541 if (ret)
1542 goto platform_init_error;
1543 }
1544
1545 ret = acquire_resources(this);
1546 if (ret)
1547 goto exit_acquire_resources;
1548
1549 ret = init_hardware(this);
1550 if (ret)
1551 goto exit_nfc_init;
1552
1553 ret = gpmi_nfc_init(this);
1554 if (ret)
1555 goto exit_nfc_init;
1556
1557 return 0;
1558
1559exit_nfc_init:
1560 release_resources(this);
1561platform_init_error:
1562exit_acquire_resources:
1563 platform_set_drvdata(pdev, NULL);
1564 kfree(this);
1565 return ret;
1566}
1567
1568static int __exit gpmi_nand_remove(struct platform_device *pdev)
1569{
1570 struct gpmi_nand_data *this = platform_get_drvdata(pdev);
1571
1572 gpmi_nfc_exit(this);
1573 release_resources(this);
1574 platform_set_drvdata(pdev, NULL);
1575 kfree(this);
1576 return 0;
1577}
1578
1579static const struct platform_device_id gpmi_ids[] = {
1580 {
1581 .name = "imx23-gpmi-nand",
1582 .driver_data = IS_MX23,
1583 }, {
1584 .name = "imx28-gpmi-nand",
1585 .driver_data = IS_MX28,
1586 }, {},
1587};
1588
1589static struct platform_driver gpmi_nand_driver = {
1590 .driver = {
1591 .name = "gpmi-nand",
1592 },
1593 .probe = gpmi_nand_probe,
1594 .remove = __exit_p(gpmi_nand_remove),
1595 .id_table = gpmi_ids,
1596};
1597
1598static int __init gpmi_nand_init(void)
1599{
1600 int err;
1601
1602 err = platform_driver_register(&gpmi_nand_driver);
1603 if (err == 0)
1604 printk(KERN_INFO "GPMI NAND driver registered. (IMX)\n");
1605 else
1606 pr_err("i.MX GPMI NAND driver registration failed\n");
1607 return err;
1608}
1609
1610static void __exit gpmi_nand_exit(void)
1611{
1612 platform_driver_unregister(&gpmi_nand_driver);
1613}
1614
1615module_init(gpmi_nand_init);
1616module_exit(gpmi_nand_exit);
1617
1618MODULE_AUTHOR("Freescale Semiconductor, Inc.");
1619MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver");
1620MODULE_LICENSE("GPL");