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Stefan Agner7f2691a2014-10-16 21:47:58 +02001/*
2 * vf610 GPIO support through PORT and GPIO module
3 *
4 * Copyright (c) 2014 Toradex AG.
5 *
6 * Author: Stefan Agner <stefan@agner.ch>.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#include <linux/bitops.h>
19#include <linux/err.h>
20#include <linux/gpio.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/io.h>
24#include <linux/ioport.h>
25#include <linux/irq.h>
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/of.h>
29#include <linux/of_device.h>
30#include <linux/of_irq.h>
31
32#define VF610_GPIO_PER_PORT 32
33
34struct vf610_gpio_port {
35 struct gpio_chip gc;
36 void __iomem *base;
37 void __iomem *gpio_base;
38 u8 irqc[VF610_GPIO_PER_PORT];
39 int irq;
40};
41
42#define GPIO_PDOR 0x00
43#define GPIO_PSOR 0x04
44#define GPIO_PCOR 0x08
45#define GPIO_PTOR 0x0c
46#define GPIO_PDIR 0x10
47
48#define PORT_PCR(n) ((n) * 0x4)
49#define PORT_PCR_IRQC_OFFSET 16
50
51#define PORT_ISFR 0xa0
52#define PORT_DFER 0xc0
53#define PORT_DFCR 0xc4
54#define PORT_DFWR 0xc8
55
56#define PORT_INT_OFF 0x0
57#define PORT_INT_LOGIC_ZERO 0x8
58#define PORT_INT_RISING_EDGE 0x9
59#define PORT_INT_FALLING_EDGE 0xa
60#define PORT_INT_EITHER_EDGE 0xb
61#define PORT_INT_LOGIC_ONE 0xc
62
Stefan Agnerfd968112015-08-21 15:56:42 -070063static struct irq_chip vf610_gpio_irq_chip;
64
Linus Walleij2f930642015-08-27 14:13:46 +020065static struct vf610_gpio_port *to_vf610_gp(struct gpio_chip *gc)
66{
67 return container_of(gc, struct vf610_gpio_port, gc);
68}
69
Stefan Agner7f2691a2014-10-16 21:47:58 +020070static const struct of_device_id vf610_gpio_dt_ids[] = {
71 { .compatible = "fsl,vf610-gpio" },
72 { /* sentinel */ }
73};
74
75static inline void vf610_gpio_writel(u32 val, void __iomem *reg)
76{
77 writel_relaxed(val, reg);
78}
79
80static inline u32 vf610_gpio_readl(void __iomem *reg)
81{
82 return readl_relaxed(reg);
83}
84
85static int vf610_gpio_request(struct gpio_chip *chip, unsigned offset)
86{
87 return pinctrl_request_gpio(chip->base + offset);
88}
89
90static void vf610_gpio_free(struct gpio_chip *chip, unsigned offset)
91{
92 pinctrl_free_gpio(chip->base + offset);
93}
94
95static int vf610_gpio_get(struct gpio_chip *gc, unsigned int gpio)
96{
Linus Walleij2f930642015-08-27 14:13:46 +020097 struct vf610_gpio_port *port = to_vf610_gp(gc);
Stefan Agner7f2691a2014-10-16 21:47:58 +020098
99 return !!(vf610_gpio_readl(port->gpio_base + GPIO_PDIR) & BIT(gpio));
100}
101
102static void vf610_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
103{
Linus Walleij2f930642015-08-27 14:13:46 +0200104 struct vf610_gpio_port *port = to_vf610_gp(gc);
Stefan Agner7f2691a2014-10-16 21:47:58 +0200105 unsigned long mask = BIT(gpio);
106
107 if (val)
108 vf610_gpio_writel(mask, port->gpio_base + GPIO_PSOR);
109 else
110 vf610_gpio_writel(mask, port->gpio_base + GPIO_PCOR);
111}
112
113static int vf610_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
114{
115 return pinctrl_gpio_direction_input(chip->base + gpio);
116}
117
118static int vf610_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
119 int value)
120{
121 vf610_gpio_set(chip, gpio, value);
122
123 return pinctrl_gpio_direction_output(chip->base + gpio);
124}
125
Thomas Gleixnerbd0b9ac2015-09-14 10:42:37 +0200126static void vf610_gpio_irq_handler(struct irq_desc *desc)
Stefan Agner7f2691a2014-10-16 21:47:58 +0200127{
Linus Walleij2f930642015-08-27 14:13:46 +0200128 struct vf610_gpio_port *port =
129 to_vf610_gp(irq_desc_get_handler_data(desc));
Stefan Agner7f2691a2014-10-16 21:47:58 +0200130 struct irq_chip *chip = irq_desc_get_chip(desc);
131 int pin;
132 unsigned long irq_isfr;
133
134 chained_irq_enter(chip, desc);
135
136 irq_isfr = vf610_gpio_readl(port->base + PORT_ISFR);
137
138 for_each_set_bit(pin, &irq_isfr, VF610_GPIO_PER_PORT) {
139 vf610_gpio_writel(BIT(pin), port->base + PORT_ISFR);
140
141 generic_handle_irq(irq_find_mapping(port->gc.irqdomain, pin));
142 }
143
144 chained_irq_exit(chip, desc);
145}
146
147static void vf610_gpio_irq_ack(struct irq_data *d)
148{
Linus Walleij2f930642015-08-27 14:13:46 +0200149 struct vf610_gpio_port *port =
150 to_vf610_gp(irq_data_get_irq_chip_data(d));
Stefan Agner7f2691a2014-10-16 21:47:58 +0200151 int gpio = d->hwirq;
152
153 vf610_gpio_writel(BIT(gpio), port->base + PORT_ISFR);
154}
155
156static int vf610_gpio_irq_set_type(struct irq_data *d, u32 type)
157{
Linus Walleij2f930642015-08-27 14:13:46 +0200158 struct vf610_gpio_port *port =
159 to_vf610_gp(irq_data_get_irq_chip_data(d));
Stefan Agner7f2691a2014-10-16 21:47:58 +0200160 u8 irqc;
161
162 switch (type) {
163 case IRQ_TYPE_EDGE_RISING:
164 irqc = PORT_INT_RISING_EDGE;
165 break;
166 case IRQ_TYPE_EDGE_FALLING:
167 irqc = PORT_INT_FALLING_EDGE;
168 break;
169 case IRQ_TYPE_EDGE_BOTH:
170 irqc = PORT_INT_EITHER_EDGE;
171 break;
172 case IRQ_TYPE_LEVEL_LOW:
173 irqc = PORT_INT_LOGIC_ZERO;
174 break;
175 case IRQ_TYPE_LEVEL_HIGH:
176 irqc = PORT_INT_LOGIC_ONE;
177 break;
178 default:
179 return -EINVAL;
180 }
181
182 port->irqc[d->hwirq] = irqc;
183
Stefan Agnerfd968112015-08-21 15:56:42 -0700184 if (type & IRQ_TYPE_LEVEL_MASK)
Thomas Gleixnera7147db2015-09-16 12:51:00 +0200185 irq_set_handler_locked(d, handle_level_irq);
Stefan Agnerfd968112015-08-21 15:56:42 -0700186 else
Thomas Gleixnera7147db2015-09-16 12:51:00 +0200187 irq_set_handler_locked(d, handle_edge_irq);
Stefan Agnerfd968112015-08-21 15:56:42 -0700188
Stefan Agner7f2691a2014-10-16 21:47:58 +0200189 return 0;
190}
191
192static void vf610_gpio_irq_mask(struct irq_data *d)
193{
Linus Walleij2f930642015-08-27 14:13:46 +0200194 struct vf610_gpio_port *port =
195 to_vf610_gp(irq_data_get_irq_chip_data(d));
Stefan Agner7f2691a2014-10-16 21:47:58 +0200196 void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
197
198 vf610_gpio_writel(0, pcr_base);
199}
200
201static void vf610_gpio_irq_unmask(struct irq_data *d)
202{
Linus Walleij2f930642015-08-27 14:13:46 +0200203 struct vf610_gpio_port *port =
204 to_vf610_gp(irq_data_get_irq_chip_data(d));
Stefan Agner7f2691a2014-10-16 21:47:58 +0200205 void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq);
206
207 vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET,
208 pcr_base);
209}
210
211static int vf610_gpio_irq_set_wake(struct irq_data *d, u32 enable)
212{
Linus Walleij2f930642015-08-27 14:13:46 +0200213 struct vf610_gpio_port *port =
214 to_vf610_gp(irq_data_get_irq_chip_data(d));
Stefan Agner7f2691a2014-10-16 21:47:58 +0200215
216 if (enable)
217 enable_irq_wake(port->irq);
218 else
219 disable_irq_wake(port->irq);
220
221 return 0;
222}
223
224static struct irq_chip vf610_gpio_irq_chip = {
225 .name = "gpio-vf610",
226 .irq_ack = vf610_gpio_irq_ack,
227 .irq_mask = vf610_gpio_irq_mask,
228 .irq_unmask = vf610_gpio_irq_unmask,
229 .irq_set_type = vf610_gpio_irq_set_type,
230 .irq_set_wake = vf610_gpio_irq_set_wake,
231};
232
233static int vf610_gpio_probe(struct platform_device *pdev)
234{
235 struct device *dev = &pdev->dev;
236 struct device_node *np = dev->of_node;
237 struct vf610_gpio_port *port;
238 struct resource *iores;
239 struct gpio_chip *gc;
240 int ret;
241
242 port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
243 if (!port)
244 return -ENOMEM;
245
246 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
247 port->base = devm_ioremap_resource(dev, iores);
248 if (IS_ERR(port->base))
249 return PTR_ERR(port->base);
250
251 iores = platform_get_resource(pdev, IORESOURCE_MEM, 1);
252 port->gpio_base = devm_ioremap_resource(dev, iores);
253 if (IS_ERR(port->gpio_base))
254 return PTR_ERR(port->gpio_base);
255
256 port->irq = platform_get_irq(pdev, 0);
257 if (port->irq < 0)
258 return port->irq;
259
260 gc = &port->gc;
261 gc->of_node = np;
262 gc->dev = dev;
Axel Lind32efe32015-02-13 21:04:42 +0800263 gc->label = "vf610-gpio";
264 gc->ngpio = VF610_GPIO_PER_PORT;
Stefan Agner7f2691a2014-10-16 21:47:58 +0200265 gc->base = of_alias_get_id(np, "gpio") * VF610_GPIO_PER_PORT;
266
Axel Lind32efe32015-02-13 21:04:42 +0800267 gc->request = vf610_gpio_request;
268 gc->free = vf610_gpio_free;
269 gc->direction_input = vf610_gpio_direction_input;
270 gc->get = vf610_gpio_get;
271 gc->direction_output = vf610_gpio_direction_output;
272 gc->set = vf610_gpio_set;
Stefan Agner7f2691a2014-10-16 21:47:58 +0200273
274 ret = gpiochip_add(gc);
275 if (ret < 0)
276 return ret;
277
278 /* Clear the interrupt status register for all GPIO's */
279 vf610_gpio_writel(~0, port->base + PORT_ISFR);
280
281 ret = gpiochip_irqchip_add(gc, &vf610_gpio_irq_chip, 0,
Stefan Agnerfd968112015-08-21 15:56:42 -0700282 handle_edge_irq, IRQ_TYPE_NONE);
Stefan Agner7f2691a2014-10-16 21:47:58 +0200283 if (ret) {
284 dev_err(dev, "failed to add irqchip\n");
285 gpiochip_remove(gc);
286 return ret;
287 }
288 gpiochip_set_chained_irqchip(gc, &vf610_gpio_irq_chip, port->irq,
289 vf610_gpio_irq_handler);
290
291 return 0;
292}
293
294static struct platform_driver vf610_gpio_driver = {
295 .driver = {
296 .name = "gpio-vf610",
Stefan Agner7f2691a2014-10-16 21:47:58 +0200297 .of_match_table = vf610_gpio_dt_ids,
298 },
299 .probe = vf610_gpio_probe,
300};
301
302static int __init gpio_vf610_init(void)
303{
304 return platform_driver_register(&vf610_gpio_driver);
305}
306device_initcall(gpio_vf610_init);
307
308MODULE_AUTHOR("Stefan Agner <stefan@agner.ch>");
309MODULE_DESCRIPTION("Freescale VF610 GPIO");
310MODULE_LICENSE("GPL v2");