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gerrit-public.fairphone.software / kernel / msm-4.9 / 20407ed8a5bb271dd8e8bd4678e1d3dadeb318bd / . / drivers / net / wireless / b43 / phy_n.c
blob: afbfdf0ee6e019a86ccfe73bb6ccf193aee94b6a [file] [log] [blame]
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n PHY support
5
6 Copyright (c) 2008 Michael Buesch <mb@bu3sch.de>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; see the file COPYING. If not, write to
20 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
21 Boston, MA 02110-1301, USA.
22
23*/
24
John W. Linville819d7722008-01-17 16:57:10 -0500[diff] [blame]25#include <linux/delay.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +0900[diff] [blame]26#include <linux/slab.h>
John W. Linville819d7722008-01-17 16:57:10 -0500[diff] [blame]27#include <linux/types.h>
28
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]29#include "b43.h"
Michael Buesch3d0da752008-08-30 02:27:19 +0200[diff] [blame]30#include "phy_n.h"
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]31#include "tables_nphy.h"
Rafał Miłecki6db507f2010-10-14 19:33:36 +0200[diff] [blame]32#include "radio_2055.h"
Rafał Miłecki5161bec2010-10-14 21:16:33 +0200[diff] [blame]33#include "radio_2056.h"
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]34#include "main.h"
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]35
Rafał Miłeckif8187b52010-01-15 12:34:21 +0100[diff] [blame]36struct nphy_txgains {
37 u16 txgm[2];
38 u16 pga[2];
39 u16 pad[2];
40 u16 ipa[2];
41};
42
43struct nphy_iqcal_params {
44 u16 txgm;
45 u16 pga;
46 u16 pad;
47 u16 ipa;
48 u16 cal_gain;
49 u16 ncorr[5];
50};
51
52struct nphy_iq_est {
53 s32 iq0_prod;
54 u32 i0_pwr;
55 u32 q0_pwr;
56 s32 iq1_prod;
57 u32 i1_pwr;
58 u32 q1_pwr;
59};
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]60
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]61enum b43_nphy_rf_sequence {
62 B43_RFSEQ_RX2TX,
63 B43_RFSEQ_TX2RX,
64 B43_RFSEQ_RESET2RX,
65 B43_RFSEQ_UPDATE_GAINH,
66 B43_RFSEQ_UPDATE_GAINL,
67 B43_RFSEQ_UPDATE_GAINU,
68};
69
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]70static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
71 u8 *events, u8 *delays, u8 length);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]72static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
73 enum b43_nphy_rf_sequence seq);
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]74static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
75 u16 value, u8 core, bool off);
76static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
77 u16 value, u8 core);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]78
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200[diff] [blame]79static inline bool b43_channel_type_is_40mhz(
80 enum nl80211_channel_type channel_type)
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]81{
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200[diff] [blame]82 return (channel_type == NL80211_CHAN_HT40MINUS ||
83 channel_type == NL80211_CHAN_HT40PLUS);
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]84}
85
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]86void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
87{//TODO
88}
89
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]90static void b43_nphy_op_adjust_txpower(struct b43_wldev *dev)
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]91{//TODO
92}
93
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]94static enum b43_txpwr_result b43_nphy_op_recalc_txpower(struct b43_wldev *dev,
95 bool ignore_tssi)
96{//TODO
97 return B43_TXPWR_RES_DONE;
98}
99
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]100static void b43_chantab_radio_upload(struct b43_wldev *dev,
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]101 const struct b43_nphy_channeltab_entry_rev2 *e)
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]102{
Rafał Miłeckie5255ccc2010-02-27 13:03:35 +0100[diff] [blame]103 b43_radio_write(dev, B2055_PLL_REF, e->radio_pll_ref);
104 b43_radio_write(dev, B2055_RF_PLLMOD0, e->radio_rf_pllmod0);
105 b43_radio_write(dev, B2055_RF_PLLMOD1, e->radio_rf_pllmod1);
106 b43_radio_write(dev, B2055_VCO_CAPTAIL, e->radio_vco_captail);
107 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
108
109 b43_radio_write(dev, B2055_VCO_CAL1, e->radio_vco_cal1);
110 b43_radio_write(dev, B2055_VCO_CAL2, e->radio_vco_cal2);
111 b43_radio_write(dev, B2055_PLL_LFC1, e->radio_pll_lfc1);
112 b43_radio_write(dev, B2055_PLL_LFR1, e->radio_pll_lfr1);
113 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
114
115 b43_radio_write(dev, B2055_PLL_LFC2, e->radio_pll_lfc2);
116 b43_radio_write(dev, B2055_LGBUF_CENBUF, e->radio_lgbuf_cenbuf);
117 b43_radio_write(dev, B2055_LGEN_TUNE1, e->radio_lgen_tune1);
118 b43_radio_write(dev, B2055_LGEN_TUNE2, e->radio_lgen_tune2);
119 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
120
121 b43_radio_write(dev, B2055_C1_LGBUF_ATUNE, e->radio_c1_lgbuf_atune);
122 b43_radio_write(dev, B2055_C1_LGBUF_GTUNE, e->radio_c1_lgbuf_gtune);
123 b43_radio_write(dev, B2055_C1_RX_RFR1, e->radio_c1_rx_rfr1);
124 b43_radio_write(dev, B2055_C1_TX_PGAPADTN, e->radio_c1_tx_pgapadtn);
125 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
126
127 b43_radio_write(dev, B2055_C1_TX_MXBGTRIM, e->radio_c1_tx_mxbgtrim);
128 b43_radio_write(dev, B2055_C2_LGBUF_ATUNE, e->radio_c2_lgbuf_atune);
129 b43_radio_write(dev, B2055_C2_LGBUF_GTUNE, e->radio_c2_lgbuf_gtune);
130 b43_radio_write(dev, B2055_C2_RX_RFR1, e->radio_c2_rx_rfr1);
131 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
132
133 b43_radio_write(dev, B2055_C2_TX_PGAPADTN, e->radio_c2_tx_pgapadtn);
134 b43_radio_write(dev, B2055_C2_TX_MXBGTRIM, e->radio_c2_tx_mxbgtrim);
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]135}
136
137static void b43_chantab_phy_upload(struct b43_wldev *dev,
Rafał Miłeckib15b3032010-03-29 00:53:13 +0200[diff] [blame]138 const struct b43_phy_n_sfo_cfg *e)
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]139{
140 b43_phy_write(dev, B43_NPHY_BW1A, e->phy_bw1a);
141 b43_phy_write(dev, B43_NPHY_BW2, e->phy_bw2);
142 b43_phy_write(dev, B43_NPHY_BW3, e->phy_bw3);
143 b43_phy_write(dev, B43_NPHY_BW4, e->phy_bw4);
144 b43_phy_write(dev, B43_NPHY_BW5, e->phy_bw5);
145 b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6);
146}
147
148static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
149{
150 //TODO
151}
152
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]153
154/* http://bcm-v4.sipsolutions.net/802.11/PHY/Radio/2055Setup */
155static void b43_radio_2055_setup(struct b43_wldev *dev,
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]156 const struct b43_nphy_channeltab_entry_rev2 *e)
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]157{
158 B43_WARN_ON(dev->phy.rev >= 3);
159
160 b43_chantab_radio_upload(dev, e);
161 udelay(50);
Rafał Miłeckie58b1252010-03-29 00:53:16 +0200[diff] [blame]162 b43_radio_write(dev, B2055_VCO_CAL10, 0x05);
163 b43_radio_write(dev, B2055_VCO_CAL10, 0x45);
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]164 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
Rafał Miłeckie58b1252010-03-29 00:53:16 +0200[diff] [blame]165 b43_radio_write(dev, B2055_VCO_CAL10, 0x65);
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]166 udelay(300);
167}
168
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]169static void b43_radio_init2055_pre(struct b43_wldev *dev)
170{
171 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
172 ~B43_NPHY_RFCTL_CMD_PORFORCE);
173 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
174 B43_NPHY_RFCTL_CMD_CHIP0PU |
175 B43_NPHY_RFCTL_CMD_OEPORFORCE);
176 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
177 B43_NPHY_RFCTL_CMD_PORFORCE);
178}
179
180static void b43_radio_init2055_post(struct b43_wldev *dev)
181{
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]182 struct b43_phy_n *nphy = dev->phy.n;
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]183 struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
184 struct ssb_boardinfo *binfo = &(dev->dev->bus->boardinfo);
185 int i;
186 u16 val;
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]187 bool workaround = false;
188
189 if (sprom->revision < 4)
190 workaround = (binfo->vendor != PCI_VENDOR_ID_BROADCOM ||
191 binfo->type != 0x46D ||
192 binfo->rev < 0x41);
193 else
Rafał Miłecki7a4db8f2010-10-22 17:43:48 +0200[diff] [blame]194 workaround =
195 !(sprom->boardflags2_lo & B43_BFL2_RXBB_INT_REG_DIS);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]196
197 b43_radio_mask(dev, B2055_MASTER1, 0xFFF3);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]198 if (workaround) {
199 b43_radio_mask(dev, B2055_C1_RX_BB_REG, 0x7F);
200 b43_radio_mask(dev, B2055_C2_RX_BB_REG, 0x7F);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]201 }
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]202 b43_radio_maskset(dev, B2055_RRCCAL_NOPTSEL, 0xFFC0, 0x2C);
203 b43_radio_write(dev, B2055_CAL_MISC, 0x3C);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]204 b43_radio_mask(dev, B2055_CAL_MISC, 0xFFBE);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]205 b43_radio_set(dev, B2055_CAL_LPOCTL, 0x80);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]206 b43_radio_set(dev, B2055_CAL_MISC, 0x1);
207 msleep(1);
208 b43_radio_set(dev, B2055_CAL_MISC, 0x40);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]209 for (i = 0; i < 200; i++) {
210 val = b43_radio_read(dev, B2055_CAL_COUT2);
211 if (val & 0x80) {
212 i = 0;
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]213 break;
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]214 }
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]215 udelay(10);
216 }
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]217 if (i)
218 b43err(dev->wl, "radio post init timeout\n");
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]219 b43_radio_mask(dev, B2055_CAL_LPOCTL, 0xFF7F);
Rafał Miłecki78159782010-10-06 07:50:08 +0200[diff] [blame]220 b43_switch_channel(dev, dev->phy.channel);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]221 b43_radio_write(dev, B2055_C1_RX_BB_LPF, 0x9);
222 b43_radio_write(dev, B2055_C2_RX_BB_LPF, 0x9);
223 b43_radio_write(dev, B2055_C1_RX_BB_MIDACHP, 0x83);
224 b43_radio_write(dev, B2055_C2_RX_BB_MIDACHP, 0x83);
225 b43_radio_maskset(dev, B2055_C1_LNA_GAINBST, 0xFFF8, 0x6);
226 b43_radio_maskset(dev, B2055_C2_LNA_GAINBST, 0xFFF8, 0x6);
227 if (!nphy->gain_boost) {
228 b43_radio_set(dev, B2055_C1_RX_RFSPC1, 0x2);
229 b43_radio_set(dev, B2055_C2_RX_RFSPC1, 0x2);
230 } else {
231 b43_radio_mask(dev, B2055_C1_RX_RFSPC1, 0xFFFD);
232 b43_radio_mask(dev, B2055_C2_RX_RFSPC1, 0xFFFD);
233 }
234 udelay(2);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]235}
236
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]237/*
238 * Initialize a Broadcom 2055 N-radio
239 * http://bcm-v4.sipsolutions.net/802.11/Radio/2055/Init
240 */
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]241static void b43_radio_init2055(struct b43_wldev *dev)
242{
243 b43_radio_init2055_pre(dev);
Rafał Miłeckia2d9bc62010-10-22 17:43:49 +0200[diff] [blame]244 if (b43_status(dev) < B43_STAT_INITIALIZED) {
245 /* Follow wl, not specs. Do not force uploading all regs */
246 b2055_upload_inittab(dev, 0, 0);
247 } else {
248 bool ghz5 = b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ;
249 b2055_upload_inittab(dev, ghz5, 0);
250 }
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]251 b43_radio_init2055_post(dev);
252}
253
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]254/*
Rafał Miłeckid817f4e2010-03-29 00:53:12 +0200[diff] [blame]255 * Initialize a Broadcom 2056 N-radio
256 * http://bcm-v4.sipsolutions.net/802.11/Radio/2056/Init
257 */
258static void b43_radio_init2056(struct b43_wldev *dev)
259{
260 /* TODO */
261}
262
263
264/*
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]265 * Upload the N-PHY tables.
266 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/InitTables
267 */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]268static void b43_nphy_tables_init(struct b43_wldev *dev)
269{
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]270 if (dev->phy.rev < 3)
271 b43_nphy_rev0_1_2_tables_init(dev);
272 else
273 b43_nphy_rev3plus_tables_init(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]274}
275
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]276/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/PA%20override */
277static void b43_nphy_pa_override(struct b43_wldev *dev, bool enable)
278{
279 struct b43_phy_n *nphy = dev->phy.n;
280 enum ieee80211_band band;
281 u16 tmp;
282
283 if (!enable) {
284 nphy->rfctrl_intc1_save = b43_phy_read(dev,
285 B43_NPHY_RFCTL_INTC1);
286 nphy->rfctrl_intc2_save = b43_phy_read(dev,
287 B43_NPHY_RFCTL_INTC2);
288 band = b43_current_band(dev->wl);
289 if (dev->phy.rev >= 3) {
290 if (band == IEEE80211_BAND_5GHZ)
291 tmp = 0x600;
292 else
293 tmp = 0x480;
294 } else {
295 if (band == IEEE80211_BAND_5GHZ)
296 tmp = 0x180;
297 else
298 tmp = 0x120;
299 }
300 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp);
301 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp);
302 } else {
303 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1,
304 nphy->rfctrl_intc1_save);
305 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2,
306 nphy->rfctrl_intc2_save);
307 }
308}
309
Rafał Miłeckife3e46e2010-01-15 15:51:55 +0100[diff] [blame]310/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxLpFbw */
311static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev)
312{
313 struct b43_phy_n *nphy = dev->phy.n;
314 u16 tmp;
315 enum ieee80211_band band = b43_current_band(dev->wl);
316 bool ipa = (nphy->ipa2g_on && band == IEEE80211_BAND_2GHZ) ||
317 (nphy->ipa5g_on && band == IEEE80211_BAND_5GHZ);
318
319 if (dev->phy.rev >= 3) {
320 if (ipa) {
321 tmp = 4;
322 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S2,
323 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp);
324 }
325
326 tmp = 1;
327 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S2,
328 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp);
329 }
330}
331
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]332/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */
333static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
334{
335 u32 tmslow;
336
337 if (dev->phy.type != B43_PHYTYPE_N)
338 return;
339
340 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
341 if (force)
342 tmslow |= SSB_TMSLOW_FGC;
343 else
344 tmslow &= ~SSB_TMSLOW_FGC;
345 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
346}
347
348/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]349static void b43_nphy_reset_cca(struct b43_wldev *dev)
350{
351 u16 bbcfg;
352
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]353 b43_nphy_bmac_clock_fgc(dev, 1);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]354 bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG);
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]355 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA);
356 udelay(1);
357 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA);
358 b43_nphy_bmac_clock_fgc(dev, 0);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]359 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]360}
361
Rafał Miłeckiad9716e2010-01-17 13:03:40 +0100[diff] [blame]362/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MIMOConfig */
363static void b43_nphy_update_mimo_config(struct b43_wldev *dev, s32 preamble)
364{
365 u16 mimocfg = b43_phy_read(dev, B43_NPHY_MIMOCFG);
366
367 mimocfg |= B43_NPHY_MIMOCFG_AUTO;
368 if (preamble == 1)
369 mimocfg |= B43_NPHY_MIMOCFG_GFMIX;
370 else
371 mimocfg &= ~B43_NPHY_MIMOCFG_GFMIX;
372
373 b43_phy_write(dev, B43_NPHY_MIMOCFG, mimocfg);
374}
375
Rafał Miłecki4f4ab6c2010-01-17 13:03:55 +0100[diff] [blame]376/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Chains */
377static void b43_nphy_update_txrx_chain(struct b43_wldev *dev)
378{
379 struct b43_phy_n *nphy = dev->phy.n;
380
381 bool override = false;
382 u16 chain = 0x33;
383
384 if (nphy->txrx_chain == 0) {
385 chain = 0x11;
386 override = true;
387 } else if (nphy->txrx_chain == 1) {
388 chain = 0x22;
389 override = true;
390 }
391
392 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
393 ~(B43_NPHY_RFSEQCA_TXEN | B43_NPHY_RFSEQCA_RXEN),
394 chain);
395
396 if (override)
397 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
398 B43_NPHY_RFSEQMODE_CAOVER);
399 else
400 b43_phy_mask(dev, B43_NPHY_RFSEQMODE,
401 ~B43_NPHY_RFSEQMODE_CAOVER);
402}
403
Rafał Miłecki2faa6b82010-01-15 15:26:12 +0100[diff] [blame]404/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqEst */
405static void b43_nphy_rx_iq_est(struct b43_wldev *dev, struct nphy_iq_est *est,
406 u16 samps, u8 time, bool wait)
407{
408 int i;
409 u16 tmp;
410
411 b43_phy_write(dev, B43_NPHY_IQEST_SAMCNT, samps);
412 b43_phy_maskset(dev, B43_NPHY_IQEST_WT, ~B43_NPHY_IQEST_WT_VAL, time);
413 if (wait)
414 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_MODE);
415 else
416 b43_phy_mask(dev, B43_NPHY_IQEST_CMD, ~B43_NPHY_IQEST_CMD_MODE);
417
418 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_START);
419
420 for (i = 1000; i; i--) {
421 tmp = b43_phy_read(dev, B43_NPHY_IQEST_CMD);
422 if (!(tmp & B43_NPHY_IQEST_CMD_START)) {
423 est->i0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI0) << 16) |
424 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO0);
425 est->q0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI0) << 16) |
426 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO0);
427 est->iq0_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI0) << 16) |
428 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO0);
429
430 est->i1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI1) << 16) |
431 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO1);
432 est->q1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI1) << 16) |
433 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO1);
434 est->iq1_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI1) << 16) |
435 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO1);
436 return;
437 }
438 udelay(10);
439 }
440 memset(est, 0, sizeof(*est));
441}
442
Rafał Miłeckia67162a2010-01-15 15:16:25 +0100[diff] [blame]443/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqCoeffs */
444static void b43_nphy_rx_iq_coeffs(struct b43_wldev *dev, bool write,
445 struct b43_phy_n_iq_comp *pcomp)
446{
447 if (write) {
448 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPA0, pcomp->a0);
449 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPB0, pcomp->b0);
450 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPA1, pcomp->a1);
451 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPB1, pcomp->b1);
452 } else {
453 pcomp->a0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPA0);
454 pcomp->b0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPB0);
455 pcomp->a1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPA1);
456 pcomp->b1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPB1);
457 }
458}
459
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]460/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhyCleanup */
461static void b43_nphy_rx_cal_phy_cleanup(struct b43_wldev *dev, u8 core)
462{
463 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
464
465 b43_phy_write(dev, B43_NPHY_RFSEQCA, regs[0]);
466 if (core == 0) {
467 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[1]);
468 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]);
469 } else {
470 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]);
471 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]);
472 }
473 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[3]);
474 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[4]);
475 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, regs[5]);
476 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, regs[6]);
477 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, regs[7]);
478 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, regs[8]);
479 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]);
480 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]);
481}
482
483/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhySetup */
484static void b43_nphy_rx_cal_phy_setup(struct b43_wldev *dev, u8 core)
485{
486 u8 rxval, txval;
487 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
488
489 regs[0] = b43_phy_read(dev, B43_NPHY_RFSEQCA);
490 if (core == 0) {
491 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
492 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
493 } else {
494 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
495 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
496 }
497 regs[3] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
498 regs[4] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
499 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1);
500 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2);
501 regs[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S1);
502 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER);
503 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0);
504 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1);
505
506 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);
507 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);
508
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]509 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
510 ~B43_NPHY_RFSEQCA_RXDIS & 0xFFFF,
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]511 ((1 - core) << B43_NPHY_RFSEQCA_RXDIS_SHIFT));
512 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN,
513 ((1 - core) << B43_NPHY_RFSEQCA_TXEN_SHIFT));
514 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN,
515 (core << B43_NPHY_RFSEQCA_RXEN_SHIFT));
516 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXDIS,
517 (core << B43_NPHY_RFSEQCA_TXDIS_SHIFT));
518
519 if (core == 0) {
520 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x0007);
521 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0007);
522 } else {
523 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x0007);
524 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0007);
525 }
526
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]527 b43_nphy_rf_control_intc_override(dev, 2, 0, 3);
528 b43_nphy_rf_control_override(dev, 8, 0, 3, false);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]529 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]530
531 if (core == 0) {
532 rxval = 1;
533 txval = 8;
534 } else {
535 rxval = 4;
536 txval = 2;
537 }
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]538 b43_nphy_rf_control_intc_override(dev, 1, rxval, (core + 1));
539 b43_nphy_rf_control_intc_override(dev, 1, txval, (2 - core));
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]540}
541
Rafał Miłecki34a56f22010-01-15 15:29:05 +0100[diff] [blame]542/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalcRxIqComp */
543static void b43_nphy_calc_rx_iq_comp(struct b43_wldev *dev, u8 mask)
544{
545 int i;
546 s32 iq;
547 u32 ii;
548 u32 qq;
549 int iq_nbits, qq_nbits;
550 int arsh, brsh;
551 u16 tmp, a, b;
552
553 struct nphy_iq_est est;
554 struct b43_phy_n_iq_comp old;
555 struct b43_phy_n_iq_comp new = { };
556 bool error = false;
557
558 if (mask == 0)
559 return;
560
561 b43_nphy_rx_iq_coeffs(dev, false, &old);
562 b43_nphy_rx_iq_coeffs(dev, true, &new);
563 b43_nphy_rx_iq_est(dev, &est, 0x4000, 32, false);
564 new = old;
565
566 for (i = 0; i < 2; i++) {
567 if (i == 0 && (mask & 1)) {
568 iq = est.iq0_prod;
569 ii = est.i0_pwr;
570 qq = est.q0_pwr;
571 } else if (i == 1 && (mask & 2)) {
572 iq = est.iq1_prod;
573 ii = est.i1_pwr;
574 qq = est.q1_pwr;
575 } else {
576 B43_WARN_ON(1);
577 continue;
578 }
579
580 if (ii + qq < 2) {
581 error = true;
582 break;
583 }
584
585 iq_nbits = fls(abs(iq));
586 qq_nbits = fls(qq);
587
588 arsh = iq_nbits - 20;
589 if (arsh >= 0) {
590 a = -((iq << (30 - iq_nbits)) + (ii >> (1 + arsh)));
591 tmp = ii >> arsh;
592 } else {
593 a = -((iq << (30 - iq_nbits)) + (ii << (-1 - arsh)));
594 tmp = ii << -arsh;
595 }
596 if (tmp == 0) {
597 error = true;
598 break;
599 }
600 a /= tmp;
601
602 brsh = qq_nbits - 11;
603 if (brsh >= 0) {
604 b = (qq << (31 - qq_nbits));
605 tmp = ii >> brsh;
606 } else {
607 b = (qq << (31 - qq_nbits));
608 tmp = ii << -brsh;
609 }
610 if (tmp == 0) {
611 error = true;
612 break;
613 }
614 b = int_sqrt(b / tmp - a * a) - (1 << 10);
615
616 if (i == 0 && (mask & 0x1)) {
617 if (dev->phy.rev >= 3) {
618 new.a0 = a & 0x3FF;
619 new.b0 = b & 0x3FF;
620 } else {
621 new.a0 = b & 0x3FF;
622 new.b0 = a & 0x3FF;
623 }
624 } else if (i == 1 && (mask & 0x2)) {
625 if (dev->phy.rev >= 3) {
626 new.a1 = a & 0x3FF;
627 new.b1 = b & 0x3FF;
628 } else {
629 new.a1 = b & 0x3FF;
630 new.b1 = a & 0x3FF;
631 }
632 }
633 }
634
635 if (error)
636 new = old;
637
638 b43_nphy_rx_iq_coeffs(dev, true, &new);
639}
640
Rafał Miłecki09146402010-01-15 15:17:10 +0100[diff] [blame]641/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxIqWar */
642static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev)
643{
644 u16 array[4];
645 int i;
646
647 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C50);
648 for (i = 0; i < 4; i++)
649 array[i] = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
650
651 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW0, array[0]);
652 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW1, array[1]);
653 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW2, array[2]);
654 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW3, array[3]);
655}
656
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]657/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame^]658static void b43_nphy_write_clip_detection(struct b43_wldev *dev,
659 const u16 *clip_st)
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]660{
661 b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]);
662 b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]);
663}
664
665/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
666static void b43_nphy_read_clip_detection(struct b43_wldev *dev, u16 *clip_st)
667{
668 clip_st[0] = b43_phy_read(dev, B43_NPHY_C1_CLIP1THRES);
669 clip_st[1] = b43_phy_read(dev, B43_NPHY_C2_CLIP1THRES);
670}
671
Rafał Miłecki8987a9e2010-02-27 13:03:33 +0100[diff] [blame]672/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SuperSwitchInit */
673static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
674{
675 if (dev->phy.rev >= 3) {
676 if (!init)
677 return;
678 if (0 /* FIXME */) {
679 b43_ntab_write(dev, B43_NTAB16(9, 2), 0x211);
680 b43_ntab_write(dev, B43_NTAB16(9, 3), 0x222);
681 b43_ntab_write(dev, B43_NTAB16(9, 8), 0x144);
682 b43_ntab_write(dev, B43_NTAB16(9, 12), 0x188);
683 }
684 } else {
685 b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0);
686 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
687
688 ssb_chipco_gpio_control(&dev->dev->bus->chipco, 0xFC00,
689 0xFC00);
690 b43_write32(dev, B43_MMIO_MACCTL,
691 b43_read32(dev, B43_MMIO_MACCTL) &
692 ~B43_MACCTL_GPOUTSMSK);
693 b43_write16(dev, B43_MMIO_GPIO_MASK,
694 b43_read16(dev, B43_MMIO_GPIO_MASK) | 0xFC00);
695 b43_write16(dev, B43_MMIO_GPIO_CONTROL,
696 b43_read16(dev, B43_MMIO_GPIO_CONTROL) & ~0xFC00);
697
698 if (init) {
699 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
700 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
701 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
702 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
703 }
704 }
705}
706
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]707/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/classifier */
708static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
709{
710 u16 tmp;
711
712 if (dev->dev->id.revision == 16)
713 b43_mac_suspend(dev);
714
715 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL);
716 tmp &= (B43_NPHY_CLASSCTL_CCKEN | B43_NPHY_CLASSCTL_OFDMEN |
717 B43_NPHY_CLASSCTL_WAITEDEN);
718 tmp &= ~mask;
719 tmp |= (val & mask);
720 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp);
721
722 if (dev->dev->id.revision == 16)
723 b43_mac_enable(dev);
724
725 return tmp;
726}
727
Rafał Miłecki5c1a1402010-01-15 15:10:54 +0100[diff] [blame]728/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/carriersearch */
729static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, bool enable)
730{
731 struct b43_phy *phy = &dev->phy;
732 struct b43_phy_n *nphy = phy->n;
733
734 if (enable) {
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame^]735 static const u16 clip[] = { 0xFFFF, 0xFFFF };
Rafał Miłecki5c1a1402010-01-15 15:10:54 +0100[diff] [blame]736 if (nphy->deaf_count++ == 0) {
737 nphy->classifier_state = b43_nphy_classifier(dev, 0, 0);
738 b43_nphy_classifier(dev, 0x7, 0);
739 b43_nphy_read_clip_detection(dev, nphy->clip_state);
740 b43_nphy_write_clip_detection(dev, clip);
741 }
742 b43_nphy_reset_cca(dev);
743 } else {
744 if (--nphy->deaf_count == 0) {
745 b43_nphy_classifier(dev, 0x7, nphy->classifier_state);
746 b43_nphy_write_clip_detection(dev, nphy->clip_state);
747 }
748 }
749}
750
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]751/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/stop-playback */
752static void b43_nphy_stop_playback(struct b43_wldev *dev)
753{
754 struct b43_phy_n *nphy = dev->phy.n;
755 u16 tmp;
756
757 if (nphy->hang_avoid)
758 b43_nphy_stay_in_carrier_search(dev, 1);
759
760 tmp = b43_phy_read(dev, B43_NPHY_SAMP_STAT);
761 if (tmp & 0x1)
762 b43_phy_set(dev, B43_NPHY_SAMP_CMD, B43_NPHY_SAMP_CMD_STOP);
763 else if (tmp & 0x2)
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]764 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]765
766 b43_phy_mask(dev, B43_NPHY_SAMP_CMD, ~0x0004);
767
768 if (nphy->bb_mult_save & 0x80000000) {
769 tmp = nphy->bb_mult_save & 0xFFFF;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]770 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]771 nphy->bb_mult_save = 0;
772 }
773
774 if (nphy->hang_avoid)
775 b43_nphy_stay_in_carrier_search(dev, 0);
776}
777
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]778/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SpurWar */
779static void b43_nphy_spur_workaround(struct b43_wldev *dev)
780{
781 struct b43_phy_n *nphy = dev->phy.n;
782
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]783 u8 channel = dev->phy.channel;
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]784 int tone[2] = { 57, 58 };
785 u32 noise[2] = { 0x3FF, 0x3FF };
786
787 B43_WARN_ON(dev->phy.rev < 3);
788
789 if (nphy->hang_avoid)
790 b43_nphy_stay_in_carrier_search(dev, 1);
791
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]792 if (nphy->gband_spurwar_en) {
793 /* TODO: N PHY Adjust Analog Pfbw (7) */
794 if (channel == 11 && dev->phy.is_40mhz)
795 ; /* TODO: N PHY Adjust Min Noise Var(2, tone, noise)*/
796 else
797 ; /* TODO: N PHY Adjust Min Noise Var(0, NULL, NULL)*/
798 /* TODO: N PHY Adjust CRS Min Power (0x1E) */
799 }
800
801 if (nphy->aband_spurwar_en) {
802 if (channel == 54) {
803 tone[0] = 0x20;
804 noise[0] = 0x25F;
805 } else if (channel == 38 || channel == 102 || channel == 118) {
806 if (0 /* FIXME */) {
807 tone[0] = 0x20;
808 noise[0] = 0x21F;
809 } else {
810 tone[0] = 0;
811 noise[0] = 0;
812 }
813 } else if (channel == 134) {
814 tone[0] = 0x20;
815 noise[0] = 0x21F;
816 } else if (channel == 151) {
817 tone[0] = 0x10;
818 noise[0] = 0x23F;
819 } else if (channel == 153 || channel == 161) {
820 tone[0] = 0x30;
821 noise[0] = 0x23F;
822 } else {
823 tone[0] = 0;
824 noise[0] = 0;
825 }
826
827 if (!tone[0] && !noise[0])
828 ; /* TODO: N PHY Adjust Min Noise Var(1, tone, noise)*/
829 else
830 ; /* TODO: N PHY Adjust Min Noise Var(0, NULL, NULL)*/
831 }
832
833 if (nphy->hang_avoid)
834 b43_nphy_stay_in_carrier_search(dev, 0);
835}
836
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]837/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/AdjustLnaGainTbl */
838static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
839{
840 struct b43_phy_n *nphy = dev->phy.n;
841
842 u8 i;
843 s16 tmp;
844 u16 data[4];
845 s16 gain[2];
846 u16 minmax[2];
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame^]847 static const u16 lna_gain[4] = { -2, 10, 19, 25 };
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]848
849 if (nphy->hang_avoid)
850 b43_nphy_stay_in_carrier_search(dev, 1);
851
852 if (nphy->gain_boost) {
853 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
854 gain[0] = 6;
855 gain[1] = 6;
856 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]857 tmp = 40370 - 315 * dev->phy.channel;
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]858 gain[0] = ((tmp >> 13) + ((tmp >> 12) & 1));
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]859 tmp = 23242 - 224 * dev->phy.channel;
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]860 gain[1] = ((tmp >> 13) + ((tmp >> 12) & 1));
861 }
862 } else {
863 gain[0] = 0;
864 gain[1] = 0;
865 }
866
867 for (i = 0; i < 2; i++) {
868 if (nphy->elna_gain_config) {
869 data[0] = 19 + gain[i];
870 data[1] = 25 + gain[i];
871 data[2] = 25 + gain[i];
872 data[3] = 25 + gain[i];
873 } else {
874 data[0] = lna_gain[0] + gain[i];
875 data[1] = lna_gain[1] + gain[i];
876 data[2] = lna_gain[2] + gain[i];
877 data[3] = lna_gain[3] + gain[i];
878 }
879 b43_ntab_write_bulk(dev, B43_NTAB16(10, 8), 4, data);
880
881 minmax[i] = 23 + gain[i];
882 }
883
884 b43_phy_maskset(dev, B43_NPHY_C1_MINMAX_GAIN, ~B43_NPHY_C1_MINGAIN,
885 minmax[0] << B43_NPHY_C1_MINGAIN_SHIFT);
886 b43_phy_maskset(dev, B43_NPHY_C2_MINMAX_GAIN, ~B43_NPHY_C2_MINGAIN,
887 minmax[1] << B43_NPHY_C2_MINGAIN_SHIFT);
888
889 if (nphy->hang_avoid)
890 b43_nphy_stay_in_carrier_search(dev, 0);
891}
892
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]893/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/WorkaroundsGainCtrl */
Gábor Stefanike723ef32010-08-16 22:39:15 +0200[diff] [blame]894static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]895{
896 struct b43_phy_n *nphy = dev->phy.n;
897 u8 i, j;
898 u8 code;
899
900 /* TODO: for PHY >= 3
901 s8 *lna1_gain, *lna2_gain;
902 u8 *gain_db, *gain_bits;
903 u16 *rfseq_init;
904 u8 lpf_gain[6] = { 0x00, 0x06, 0x0C, 0x12, 0x12, 0x12 };
905 u8 lpf_bits[6] = { 0, 1, 2, 3, 3, 3 };
906 */
907
908 u8 rfseq_events[3] = { 6, 8, 7 };
909 u8 rfseq_delays[3] = { 10, 30, 1 };
910
911 if (dev->phy.rev >= 3) {
912 /* TODO */
913 } else {
914 /* Set Clip 2 detect */
915 b43_phy_set(dev, B43_NPHY_C1_CGAINI,
916 B43_NPHY_C1_CGAINI_CL2DETECT);
917 b43_phy_set(dev, B43_NPHY_C2_CGAINI,
918 B43_NPHY_C2_CGAINI_CL2DETECT);
919
920 /* Set narrowband clip threshold */
921 b43_phy_set(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84);
922 b43_phy_set(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84);
923
924 if (!dev->phy.is_40mhz) {
925 /* Set dwell lengths */
926 b43_phy_set(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B);
927 b43_phy_set(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B);
928 b43_phy_set(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009);
929 b43_phy_set(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009);
930 }
931
932 /* Set wideband clip 2 threshold */
933 b43_phy_maskset(dev, B43_NPHY_C1_CLIPWBTHRES,
934 ~B43_NPHY_C1_CLIPWBTHRES_CLIP2,
935 21);
936 b43_phy_maskset(dev, B43_NPHY_C2_CLIPWBTHRES,
937 ~B43_NPHY_C2_CLIPWBTHRES_CLIP2,
938 21);
939
940 if (!dev->phy.is_40mhz) {
941 b43_phy_maskset(dev, B43_NPHY_C1_CGAINI,
942 ~B43_NPHY_C1_CGAINI_GAINBKOFF, 0x1);
943 b43_phy_maskset(dev, B43_NPHY_C2_CGAINI,
944 ~B43_NPHY_C2_CGAINI_GAINBKOFF, 0x1);
945 b43_phy_maskset(dev, B43_NPHY_C1_CCK_CGAINI,
946 ~B43_NPHY_C1_CCK_CGAINI_GAINBKOFF, 0x1);
947 b43_phy_maskset(dev, B43_NPHY_C2_CCK_CGAINI,
948 ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1);
949 }
950
951 b43_phy_set(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
952
953 if (nphy->gain_boost) {
954 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ &&
955 dev->phy.is_40mhz)
956 code = 4;
957 else
958 code = 5;
959 } else {
960 code = dev->phy.is_40mhz ? 6 : 7;
961 }
962
963 /* Set HPVGA2 index */
964 b43_phy_maskset(dev, B43_NPHY_C1_INITGAIN,
965 ~B43_NPHY_C1_INITGAIN_HPVGA2,
966 code << B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT);
967 b43_phy_maskset(dev, B43_NPHY_C2_INITGAIN,
968 ~B43_NPHY_C2_INITGAIN_HPVGA2,
969 code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT);
970
971 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
972 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
973 (code << 8 | 0x7C));
974 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
975 (code << 8 | 0x7C));
976
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]977 b43_nphy_adjust_lna_gain_table(dev);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]978
979 if (nphy->elna_gain_config) {
980 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0808);
981 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
982 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
983 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
984 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
985
986 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0C08);
987 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
988 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
989 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
990 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
991
992 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
993 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
994 (code << 8 | 0x74));
995 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
996 (code << 8 | 0x74));
997 }
998
999 if (dev->phy.rev == 2) {
1000 for (i = 0; i < 4; i++) {
1001 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1002 (0x0400 * i) + 0x0020);
1003 for (j = 0; j < 21; j++)
1004 b43_phy_write(dev,
1005 B43_NPHY_TABLE_DATALO, 3 * j);
1006 }
1007
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1008 b43_nphy_set_rf_sequence(dev, 5,
1009 rfseq_events, rfseq_delays, 3);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1010 b43_phy_maskset(dev, B43_NPHY_OVER_DGAIN1,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]1011 ~B43_NPHY_OVER_DGAIN_CCKDGECV & 0xFFFF,
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1012 0x5A << B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT);
1013
1014 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
1015 b43_phy_maskset(dev, B43_PHY_N(0xC5D),
1016 0xFF80, 4);
1017 }
1018 }
1019}
1020
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1021/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */
1022static void b43_nphy_workarounds(struct b43_wldev *dev)
1023{
1024 struct ssb_bus *bus = dev->dev->bus;
1025 struct b43_phy *phy = &dev->phy;
1026 struct b43_phy_n *nphy = phy->n;
1027
1028 u8 events1[7] = { 0x0, 0x1, 0x2, 0x8, 0x4, 0x5, 0x3 };
1029 u8 delays1[7] = { 0x8, 0x6, 0x6, 0x2, 0x4, 0x3C, 0x1 };
1030
1031 u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 };
1032 u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 };
1033
1034 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
1035 b43_nphy_classifier(dev, 1, 0);
1036 else
1037 b43_nphy_classifier(dev, 1, 1);
1038
1039 if (nphy->hang_avoid)
1040 b43_nphy_stay_in_carrier_search(dev, 1);
1041
1042 b43_phy_set(dev, B43_NPHY_IQFLIP,
1043 B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2);
1044
1045 if (dev->phy.rev >= 3) {
1046 /* TODO */
1047 } else {
1048 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ &&
1049 nphy->band5g_pwrgain) {
1050 b43_radio_mask(dev, B2055_C1_TX_RF_SPARE, ~0x8);
1051 b43_radio_mask(dev, B2055_C2_TX_RF_SPARE, ~0x8);
1052 } else {
1053 b43_radio_set(dev, B2055_C1_TX_RF_SPARE, 0x8);
1054 b43_radio_set(dev, B2055_C2_TX_RF_SPARE, 0x8);
1055 }
1056
1057 /* TODO: convert to b43_ntab_write? */
1058 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2000);
1059 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
1060 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2010);
1061 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
1062 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2002);
1063 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
1064 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2012);
1065 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
1066
1067 if (dev->phy.rev < 2) {
1068 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2008);
1069 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
1070 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2018);
1071 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
1072 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2007);
1073 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
1074 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2017);
1075 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
1076 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2006);
1077 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
1078 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2016);
1079 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
1080 }
1081
1082 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
1083 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
1084 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
1085 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
1086
1087 if (bus->sprom.boardflags2_lo & 0x100 &&
1088 bus->boardinfo.type == 0x8B) {
1089 delays1[0] = 0x1;
1090 delays1[5] = 0x14;
1091 }
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1092 b43_nphy_set_rf_sequence(dev, 0, events1, delays1, 7);
1093 b43_nphy_set_rf_sequence(dev, 1, events2, delays2, 7);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1094
Gábor Stefanike723ef32010-08-16 22:39:15 +0200[diff] [blame]1095 b43_nphy_gain_ctrl_workarounds(dev);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1096
1097 if (dev->phy.rev < 2) {
1098 if (b43_phy_read(dev, B43_NPHY_RXCTL) & 0x2)
Gábor Stefanike7f45d32010-08-16 22:39:14 +0200[diff] [blame]1099 b43_hf_write(dev, b43_hf_read(dev) |
1100 B43_HF_MLADVW);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1101 } else if (dev->phy.rev == 2) {
1102 b43_phy_write(dev, B43_NPHY_CRSCHECK2, 0);
1103 b43_phy_write(dev, B43_NPHY_CRSCHECK3, 0);
1104 }
1105
1106 if (dev->phy.rev < 2)
1107 b43_phy_mask(dev, B43_NPHY_SCRAM_SIGCTL,
1108 ~B43_NPHY_SCRAM_SIGCTL_SCM);
1109
1110 /* Set phase track alpha and beta */
1111 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x125);
1112 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x1B3);
1113 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x105);
1114 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x16E);
1115 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0xCD);
1116 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20);
1117
1118 b43_phy_mask(dev, B43_NPHY_PIL_DW1,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]1119 ~B43_NPHY_PIL_DW_64QAM & 0xFFFF);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1120 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B1, 0xB5);
1121 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B2, 0xA4);
1122 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B3, 0x00);
1123
1124 if (dev->phy.rev == 2)
1125 b43_phy_set(dev, B43_NPHY_FINERX2_CGC,
1126 B43_NPHY_FINERX2_CGC_DECGC);
1127 }
1128
1129 if (nphy->hang_avoid)
1130 b43_nphy_stay_in_carrier_search(dev, 0);
1131}
1132
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1133/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/LoadSampleTable */
1134static int b43_nphy_load_samples(struct b43_wldev *dev,
1135 struct b43_c32 *samples, u16 len) {
1136 struct b43_phy_n *nphy = dev->phy.n;
1137 u16 i;
1138 u32 *data;
1139
1140 data = kzalloc(len * sizeof(u32), GFP_KERNEL);
1141 if (!data) {
1142 b43err(dev->wl, "allocation for samples loading failed\n");
1143 return -ENOMEM;
1144 }
1145 if (nphy->hang_avoid)
1146 b43_nphy_stay_in_carrier_search(dev, 1);
1147
1148 for (i = 0; i < len; i++) {
1149 data[i] = (samples[i].i & 0x3FF << 10);
1150 data[i] |= samples[i].q & 0x3FF;
1151 }
1152 b43_ntab_write_bulk(dev, B43_NTAB32(17, 0), len, data);
1153
1154 kfree(data);
1155 if (nphy->hang_avoid)
1156 b43_nphy_stay_in_carrier_search(dev, 0);
1157 return 0;
1158}
1159
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1160/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GenLoadSamples */
1161static u16 b43_nphy_gen_load_samples(struct b43_wldev *dev, u32 freq, u16 max,
1162 bool test)
1163{
1164 int i;
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1165 u16 bw, len, rot, angle;
Larry Fingerda860472010-01-26 16:42:02 -0600[diff] [blame]1166 struct b43_c32 *samples;
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1167
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1168
1169 bw = (dev->phy.is_40mhz) ? 40 : 20;
1170 len = bw << 3;
1171
1172 if (test) {
1173 if (b43_phy_read(dev, B43_NPHY_BBCFG) & B43_NPHY_BBCFG_RSTRX)
1174 bw = 82;
1175 else
1176 bw = 80;
1177
1178 if (dev->phy.is_40mhz)
1179 bw <<= 1;
1180
1181 len = bw << 1;
1182 }
1183
Joe Perchesbaeb2ff2010-08-11 07:02:48 +0000[diff] [blame]1184 samples = kcalloc(len, sizeof(struct b43_c32), GFP_KERNEL);
Rafał Miłecki40bd5202010-02-04 13:11:54 +0100[diff] [blame]1185 if (!samples) {
1186 b43err(dev->wl, "allocation for samples generation failed\n");
1187 return 0;
1188 }
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1189 rot = (((freq * 36) / bw) << 16) / 100;
1190 angle = 0;
1191
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1192 for (i = 0; i < len; i++) {
1193 samples[i] = b43_cordic(angle);
1194 angle += rot;
1195 samples[i].q = CORDIC_CONVERT(samples[i].q * max);
1196 samples[i].i = CORDIC_CONVERT(samples[i].i * max);
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1197 }
1198
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1199 i = b43_nphy_load_samples(dev, samples, len);
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1200 kfree(samples);
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1201 return (i < 0) ? 0 : len;
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1202}
1203
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]1204/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RunSamples */
1205static void b43_nphy_run_samples(struct b43_wldev *dev, u16 samps, u16 loops,
1206 u16 wait, bool iqmode, bool dac_test)
1207{
1208 struct b43_phy_n *nphy = dev->phy.n;
1209 int i;
1210 u16 seq_mode;
1211 u32 tmp;
1212
1213 if (nphy->hang_avoid)
1214 b43_nphy_stay_in_carrier_search(dev, true);
1215
1216 if ((nphy->bb_mult_save & 0x80000000) == 0) {
1217 tmp = b43_ntab_read(dev, B43_NTAB16(15, 87));
1218 nphy->bb_mult_save = (tmp & 0xFFFF) | 0x80000000;
1219 }
1220
1221 if (!dev->phy.is_40mhz)
1222 tmp = 0x6464;
1223 else
1224 tmp = 0x4747;
1225 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp);
1226
1227 if (nphy->hang_avoid)
1228 b43_nphy_stay_in_carrier_search(dev, false);
1229
1230 b43_phy_write(dev, B43_NPHY_SAMP_DEPCNT, (samps - 1));
1231
1232 if (loops != 0xFFFF)
1233 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, (loops - 1));
1234 else
1235 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, loops);
1236
1237 b43_phy_write(dev, B43_NPHY_SAMP_WAITCNT, wait);
1238
1239 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
1240
1241 b43_phy_set(dev, B43_NPHY_RFSEQMODE, B43_NPHY_RFSEQMODE_CAOVER);
1242 if (iqmode) {
1243 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF);
1244 b43_phy_set(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8000);
1245 } else {
1246 if (dac_test)
1247 b43_phy_write(dev, B43_NPHY_SAMP_CMD, 5);
1248 else
1249 b43_phy_write(dev, B43_NPHY_SAMP_CMD, 1);
1250 }
1251 for (i = 0; i < 100; i++) {
1252 if (b43_phy_read(dev, B43_NPHY_RFSEQST) & 1) {
1253 i = 0;
1254 break;
1255 }
1256 udelay(10);
1257 }
1258 if (i)
1259 b43err(dev->wl, "run samples timeout\n");
1260
1261 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
1262}
1263
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1264/*
1265 * Transmits a known value for LO calibration
1266 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/TXTone
1267 */
1268static int b43_nphy_tx_tone(struct b43_wldev *dev, u32 freq, u16 max_val,
1269 bool iqmode, bool dac_test)
1270{
1271 u16 samp = b43_nphy_gen_load_samples(dev, freq, max_val, dac_test);
1272 if (samp == 0)
1273 return -1;
1274 b43_nphy_run_samples(dev, samp, 0xFFFF, 0, iqmode, dac_test);
1275 return 0;
1276}
1277
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]1278/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrCtrlCoefSetup */
1279static void b43_nphy_tx_pwr_ctrl_coef_setup(struct b43_wldev *dev)
1280{
1281 struct b43_phy_n *nphy = dev->phy.n;
1282 int i, j;
1283 u32 tmp;
1284 u32 cur_real, cur_imag, real_part, imag_part;
1285
1286 u16 buffer[7];
1287
1288 if (nphy->hang_avoid)
1289 b43_nphy_stay_in_carrier_search(dev, true);
1290
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]1291 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]1292
1293 for (i = 0; i < 2; i++) {
1294 tmp = ((buffer[i * 2] & 0x3FF) << 10) |
1295 (buffer[i * 2 + 1] & 0x3FF);
1296 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1297 (((i + 26) << 10) | 320));
1298 for (j = 0; j < 128; j++) {
1299 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI,
1300 ((tmp >> 16) & 0xFFFF));
1301 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1302 (tmp & 0xFFFF));
1303 }
1304 }
1305
1306 for (i = 0; i < 2; i++) {
1307 tmp = buffer[5 + i];
1308 real_part = (tmp >> 8) & 0xFF;
1309 imag_part = (tmp & 0xFF);
1310 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1311 (((i + 26) << 10) | 448));
1312
1313 if (dev->phy.rev >= 3) {
1314 cur_real = real_part;
1315 cur_imag = imag_part;
1316 tmp = ((cur_real & 0xFF) << 8) | (cur_imag & 0xFF);
1317 }
1318
1319 for (j = 0; j < 128; j++) {
1320 if (dev->phy.rev < 3) {
1321 cur_real = (real_part * loscale[j] + 128) >> 8;
1322 cur_imag = (imag_part * loscale[j] + 128) >> 8;
1323 tmp = ((cur_real & 0xFF) << 8) |
1324 (cur_imag & 0xFF);
1325 }
1326 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI,
1327 ((tmp >> 16) & 0xFFFF));
1328 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1329 (tmp & 0xFFFF));
1330 }
1331 }
1332
1333 if (dev->phy.rev >= 3) {
1334 b43_shm_write16(dev, B43_SHM_SHARED,
1335 B43_SHM_SH_NPHY_TXPWR_INDX0, 0xFFFF);
1336 b43_shm_write16(dev, B43_SHM_SHARED,
1337 B43_SHM_SH_NPHY_TXPWR_INDX1, 0xFFFF);
1338 }
1339
1340 if (nphy->hang_avoid)
1341 b43_nphy_stay_in_carrier_search(dev, false);
1342}
1343
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1344/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRfSeq */
1345static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
1346 u8 *events, u8 *delays, u8 length)
1347{
1348 struct b43_phy_n *nphy = dev->phy.n;
1349 u8 i;
1350 u8 end = (dev->phy.rev >= 3) ? 0x1F : 0x0F;
1351 u16 offset1 = cmd << 4;
1352 u16 offset2 = offset1 + 0x80;
1353
1354 if (nphy->hang_avoid)
1355 b43_nphy_stay_in_carrier_search(dev, true);
1356
1357 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset1), length, events);
1358 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset2), length, delays);
1359
1360 for (i = length; i < 16; i++) {
1361 b43_ntab_write(dev, B43_NTAB8(7, offset1 + i), end);
1362 b43_ntab_write(dev, B43_NTAB8(7, offset2 + i), 1);
1363 }
1364
1365 if (nphy->hang_avoid)
1366 b43_nphy_stay_in_carrier_search(dev, false);
1367}
1368
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]1369/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ForceRFSeq */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1370static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
1371 enum b43_nphy_rf_sequence seq)
1372{
1373 static const u16 trigger[] = {
1374 [B43_RFSEQ_RX2TX] = B43_NPHY_RFSEQTR_RX2TX,
1375 [B43_RFSEQ_TX2RX] = B43_NPHY_RFSEQTR_TX2RX,
1376 [B43_RFSEQ_RESET2RX] = B43_NPHY_RFSEQTR_RST2RX,
1377 [B43_RFSEQ_UPDATE_GAINH] = B43_NPHY_RFSEQTR_UPGH,
1378 [B43_RFSEQ_UPDATE_GAINL] = B43_NPHY_RFSEQTR_UPGL,
1379 [B43_RFSEQ_UPDATE_GAINU] = B43_NPHY_RFSEQTR_UPGU,
1380 };
1381 int i;
Rafał Miłeckic57199b2010-01-17 13:04:08 +0100[diff] [blame]1382 u16 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1383
1384 B43_WARN_ON(seq >= ARRAY_SIZE(trigger));
1385
1386 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
1387 B43_NPHY_RFSEQMODE_CAOVER | B43_NPHY_RFSEQMODE_TROVER);
1388 b43_phy_set(dev, B43_NPHY_RFSEQTR, trigger[seq]);
1389 for (i = 0; i < 200; i++) {
1390 if (!(b43_phy_read(dev, B43_NPHY_RFSEQST) & trigger[seq]))
1391 goto ok;
1392 msleep(1);
1393 }
1394 b43err(dev->wl, "RF sequence status timeout\n");
1395ok:
Rafał Miłeckic57199b2010-01-17 13:04:08 +0100[diff] [blame]1396 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1397}
1398
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]1399/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlOverride */
1400static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
1401 u16 value, u8 core, bool off)
1402{
1403 int i;
1404 u8 index = fls(field);
1405 u8 addr, en_addr, val_addr;
1406 /* we expect only one bit set */
Rafał Miłecki3ed0fac2010-01-25 18:59:58 +0100[diff] [blame]1407 B43_WARN_ON(field & (~(1 << (index - 1))));
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]1408
1409 if (dev->phy.rev >= 3) {
1410 const struct nphy_rf_control_override_rev3 *rf_ctrl;
1411 for (i = 0; i < 2; i++) {
1412 if (index == 0 || index == 16) {
1413 b43err(dev->wl,
1414 "Unsupported RF Ctrl Override call\n");
1415 return;
1416 }
1417
1418 rf_ctrl = &tbl_rf_control_override_rev3[index - 1];
1419 en_addr = B43_PHY_N((i == 0) ?
1420 rf_ctrl->en_addr0 : rf_ctrl->en_addr1);
1421 val_addr = B43_PHY_N((i == 0) ?
1422 rf_ctrl->val_addr0 : rf_ctrl->val_addr1);
1423
1424 if (off) {
1425 b43_phy_mask(dev, en_addr, ~(field));
1426 b43_phy_mask(dev, val_addr,
1427 ~(rf_ctrl->val_mask));
1428 } else {
1429 if (core == 0 || ((1 << core) & i) != 0) {
1430 b43_phy_set(dev, en_addr, field);
1431 b43_phy_maskset(dev, val_addr,
1432 ~(rf_ctrl->val_mask),
1433 (value << rf_ctrl->val_shift));
1434 }
1435 }
1436 }
1437 } else {
1438 const struct nphy_rf_control_override_rev2 *rf_ctrl;
1439 if (off) {
1440 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~(field));
1441 value = 0;
1442 } else {
1443 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, field);
1444 }
1445
1446 for (i = 0; i < 2; i++) {
1447 if (index <= 1 || index == 16) {
1448 b43err(dev->wl,
1449 "Unsupported RF Ctrl Override call\n");
1450 return;
1451 }
1452
1453 if (index == 2 || index == 10 ||
1454 (index >= 13 && index <= 15)) {
1455 core = 1;
1456 }
1457
1458 rf_ctrl = &tbl_rf_control_override_rev2[index - 2];
1459 addr = B43_PHY_N((i == 0) ?
1460 rf_ctrl->addr0 : rf_ctrl->addr1);
1461
1462 if ((core & (1 << i)) != 0)
1463 b43_phy_maskset(dev, addr, ~(rf_ctrl->bmask),
1464 (value << rf_ctrl->shift));
1465
1466 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, 0x1);
1467 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1468 B43_NPHY_RFCTL_CMD_START);
1469 udelay(1);
1470 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, 0xFFFE);
1471 }
1472 }
1473}
1474
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]1475/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlIntcOverride */
1476static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
1477 u16 value, u8 core)
1478{
1479 u8 i, j;
1480 u16 reg, tmp, val;
1481
1482 B43_WARN_ON(dev->phy.rev < 3);
1483 B43_WARN_ON(field > 4);
1484
1485 for (i = 0; i < 2; i++) {
1486 if ((core == 1 && i == 1) || (core == 2 && !i))
1487 continue;
1488
1489 reg = (i == 0) ?
1490 B43_NPHY_RFCTL_INTC1 : B43_NPHY_RFCTL_INTC2;
1491 b43_phy_mask(dev, reg, 0xFBFF);
1492
1493 switch (field) {
1494 case 0:
1495 b43_phy_write(dev, reg, 0);
1496 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
1497 break;
1498 case 1:
1499 if (!i) {
1500 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC1,
1501 0xFC3F, (value << 6));
1502 b43_phy_maskset(dev, B43_NPHY_TXF_40CO_B1S1,
1503 0xFFFE, 1);
1504 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1505 B43_NPHY_RFCTL_CMD_START);
1506 for (j = 0; j < 100; j++) {
1507 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_START) {
1508 j = 0;
1509 break;
1510 }
1511 udelay(10);
1512 }
1513 if (j)
1514 b43err(dev->wl,
1515 "intc override timeout\n");
1516 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1,
1517 0xFFFE);
1518 } else {
1519 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC2,
1520 0xFC3F, (value << 6));
1521 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
1522 0xFFFE, 1);
1523 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1524 B43_NPHY_RFCTL_CMD_RXTX);
1525 for (j = 0; j < 100; j++) {
1526 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_RXTX) {
1527 j = 0;
1528 break;
1529 }
1530 udelay(10);
1531 }
1532 if (j)
1533 b43err(dev->wl,
1534 "intc override timeout\n");
1535 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,
1536 0xFFFE);
1537 }
1538 break;
1539 case 2:
1540 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1541 tmp = 0x0020;
1542 val = value << 5;
1543 } else {
1544 tmp = 0x0010;
1545 val = value << 4;
1546 }
1547 b43_phy_maskset(dev, reg, ~tmp, val);
1548 break;
1549 case 3:
1550 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1551 tmp = 0x0001;
1552 val = value;
1553 } else {
1554 tmp = 0x0004;
1555 val = value << 2;
1556 }
1557 b43_phy_maskset(dev, reg, ~tmp, val);
1558 break;
1559 case 4:
1560 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1561 tmp = 0x0002;
1562 val = value << 1;
1563 } else {
1564 tmp = 0x0008;
1565 val = value << 3;
1566 }
1567 b43_phy_maskset(dev, reg, ~tmp, val);
1568 break;
1569 }
1570 }
1571}
1572
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1573static void b43_nphy_bphy_init(struct b43_wldev *dev)
1574{
1575 unsigned int i;
1576 u16 val;
1577
1578 val = 0x1E1F;
1579 for (i = 0; i < 14; i++) {
1580 b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val);
1581 val -= 0x202;
1582 }
1583 val = 0x3E3F;
1584 for (i = 0; i < 16; i++) {
1585 b43_phy_write(dev, B43_PHY_N_BMODE(0x97 + i), val);
1586 val -= 0x202;
1587 }
1588 b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);
1589}
1590
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1591/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ScaleOffsetRssi */
1592static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
1593 s8 offset, u8 core, u8 rail, u8 type)
1594{
1595 u16 tmp;
1596 bool core1or5 = (core == 1) || (core == 5);
1597 bool core2or5 = (core == 2) || (core == 5);
1598
1599 offset = clamp_val(offset, -32, 31);
1600 tmp = ((scale & 0x3F) << 8) | (offset & 0x3F);
1601
1602 if (core1or5 && (rail == 0) && (type == 2))
1603 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp);
1604 if (core1or5 && (rail == 1) && (type == 2))
1605 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp);
1606 if (core2or5 && (rail == 0) && (type == 2))
1607 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp);
1608 if (core2or5 && (rail == 1) && (type == 2))
1609 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp);
1610 if (core1or5 && (rail == 0) && (type == 0))
1611 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp);
1612 if (core1or5 && (rail == 1) && (type == 0))
1613 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp);
1614 if (core2or5 && (rail == 0) && (type == 0))
1615 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp);
1616 if (core2or5 && (rail == 1) && (type == 0))
1617 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp);
1618 if (core1or5 && (rail == 0) && (type == 1))
1619 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp);
1620 if (core1or5 && (rail == 1) && (type == 1))
1621 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp);
1622 if (core2or5 && (rail == 0) && (type == 1))
1623 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp);
1624 if (core2or5 && (rail == 1) && (type == 1))
1625 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp);
1626 if (core1or5 && (rail == 0) && (type == 6))
1627 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp);
1628 if (core1or5 && (rail == 1) && (type == 6))
1629 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp);
1630 if (core2or5 && (rail == 0) && (type == 6))
1631 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp);
1632 if (core2or5 && (rail == 1) && (type == 6))
1633 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp);
1634 if (core1or5 && (rail == 0) && (type == 3))
1635 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp);
1636 if (core1or5 && (rail == 1) && (type == 3))
1637 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp);
1638 if (core2or5 && (rail == 0) && (type == 3))
1639 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp);
1640 if (core2or5 && (rail == 1) && (type == 3))
1641 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp);
1642 if (core1or5 && (type == 4))
1643 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp);
1644 if (core2or5 && (type == 4))
1645 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp);
1646 if (core1or5 && (type == 5))
1647 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp);
1648 if (core2or5 && (type == 5))
1649 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp);
1650}
1651
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1652static void b43_nphy_rev2_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1653{
1654 u16 val;
1655
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1656 if (type < 3)
1657 val = 0;
1658 else if (type == 6)
1659 val = 1;
1660 else if (type == 3)
1661 val = 2;
1662 else
1663 val = 3;
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1664
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1665 val = (val << 12) | (val << 14);
1666 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, val);
1667 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, val);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1668
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1669 if (type < 3) {
1670 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO1, 0xFFCF,
1671 (type + 1) << 4);
1672 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO2, 0xFFCF,
1673 (type + 1) << 4);
1674 }
1675
1676 /* TODO use some definitions */
1677 if (code == 0) {
1678 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1679 if (type < 3) {
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1680 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFEC7, 0);
1681 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xEFDC, 0);
1682 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0);
1683 udelay(20);
1684 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1685 }
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1686 } else {
1687 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF,
1688 0x3000);
1689 if (type < 3) {
1690 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD,
1691 0xFEC7, 0x0180);
1692 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
1693 0xEFDC, (code << 1 | 0x1021));
1694 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0x1);
1695 udelay(20);
1696 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1697 }
1698 }
1699}
1700
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1701static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1702{
Rafał Miłecki6e3b15a2010-01-30 20:18:04 +0100[diff] [blame]1703 struct b43_phy_n *nphy = dev->phy.n;
1704 u8 i;
1705 u16 reg, val;
1706
1707 if (code == 0) {
1708 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, 0xFDFF);
1709 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, 0xFDFF);
1710 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, 0xFCFF);
1711 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, 0xFCFF);
1712 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S0, 0xFFDF);
1713 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B32S1, 0xFFDF);
1714 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0xFFC3);
1715 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0xFFC3);
1716 } else {
1717 for (i = 0; i < 2; i++) {
1718 if ((code == 1 && i == 1) || (code == 2 && !i))
1719 continue;
1720
1721 reg = (i == 0) ?
1722 B43_NPHY_AFECTL_OVER1 : B43_NPHY_AFECTL_OVER;
1723 b43_phy_maskset(dev, reg, 0xFDFF, 0x0200);
1724
1725 if (type < 3) {
1726 reg = (i == 0) ?
1727 B43_NPHY_AFECTL_C1 :
1728 B43_NPHY_AFECTL_C2;
1729 b43_phy_maskset(dev, reg, 0xFCFF, 0);
1730
1731 reg = (i == 0) ?
1732 B43_NPHY_RFCTL_LUT_TRSW_UP1 :
1733 B43_NPHY_RFCTL_LUT_TRSW_UP2;
1734 b43_phy_maskset(dev, reg, 0xFFC3, 0);
1735
1736 if (type == 0)
1737 val = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ? 4 : 8;
1738 else if (type == 1)
1739 val = 16;
1740 else
1741 val = 32;
1742 b43_phy_set(dev, reg, val);
1743
1744 reg = (i == 0) ?
1745 B43_NPHY_TXF_40CO_B1S0 :
1746 B43_NPHY_TXF_40CO_B32S1;
1747 b43_phy_set(dev, reg, 0x0020);
1748 } else {
1749 if (type == 6)
1750 val = 0x0100;
1751 else if (type == 3)
1752 val = 0x0200;
1753 else
1754 val = 0x0300;
1755
1756 reg = (i == 0) ?
1757 B43_NPHY_AFECTL_C1 :
1758 B43_NPHY_AFECTL_C2;
1759
1760 b43_phy_maskset(dev, reg, 0xFCFF, val);
1761 b43_phy_maskset(dev, reg, 0xF3FF, val << 2);
1762
1763 if (type != 3 && type != 6) {
1764 enum ieee80211_band band =
1765 b43_current_band(dev->wl);
1766
1767 if ((nphy->ipa2g_on &&
1768 band == IEEE80211_BAND_2GHZ) ||
1769 (nphy->ipa5g_on &&
1770 band == IEEE80211_BAND_5GHZ))
1771 val = (band == IEEE80211_BAND_5GHZ) ? 0xC : 0xE;
1772 else
1773 val = 0x11;
1774 reg = (i == 0) ? 0x2000 : 0x3000;
1775 reg |= B2055_PADDRV;
1776 b43_radio_write16(dev, reg, val);
1777
1778 reg = (i == 0) ?
1779 B43_NPHY_AFECTL_OVER1 :
1780 B43_NPHY_AFECTL_OVER;
1781 b43_phy_set(dev, reg, 0x0200);
1782 }
1783 }
1784 }
1785 }
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1786}
1787
1788/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSISel */
1789static void b43_nphy_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1790{
1791 if (dev->phy.rev >= 3)
1792 b43_nphy_rev3_rssi_select(dev, code, type);
1793 else
1794 b43_nphy_rev2_rssi_select(dev, code, type);
1795}
1796
Rafał Miłeckidfb4aa52010-01-15 14:45:13 +0100[diff] [blame]1797/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRssi2055Vcm */
1798static void b43_nphy_set_rssi_2055_vcm(struct b43_wldev *dev, u8 type, u8 *buf)
1799{
1800 int i;
1801 for (i = 0; i < 2; i++) {
1802 if (type == 2) {
1803 if (i == 0) {
1804 b43_radio_maskset(dev, B2055_C1_B0NB_RSSIVCM,
1805 0xFC, buf[0]);
1806 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5,
1807 0xFC, buf[1]);
1808 } else {
1809 b43_radio_maskset(dev, B2055_C2_B0NB_RSSIVCM,
1810 0xFC, buf[2 * i]);
1811 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5,
1812 0xFC, buf[2 * i + 1]);
1813 }
1814 } else {
1815 if (i == 0)
1816 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5,
1817 0xF3, buf[0] << 2);
1818 else
1819 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5,
1820 0xF3, buf[2 * i + 1] << 2);
1821 }
1822 }
1823}
1824
1825/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/PollRssi */
1826static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf,
1827 u8 nsamp)
1828{
1829 int i;
1830 int out;
1831 u16 save_regs_phy[9];
1832 u16 s[2];
1833
1834 if (dev->phy.rev >= 3) {
1835 save_regs_phy[0] = b43_phy_read(dev,
1836 B43_NPHY_RFCTL_LUT_TRSW_UP1);
1837 save_regs_phy[1] = b43_phy_read(dev,
1838 B43_NPHY_RFCTL_LUT_TRSW_UP2);
1839 save_regs_phy[2] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
1840 save_regs_phy[3] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
1841 save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
1842 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
1843 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0);
1844 save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1);
1845 }
1846
1847 b43_nphy_rssi_select(dev, 5, type);
1848
1849 if (dev->phy.rev < 2) {
1850 save_regs_phy[8] = b43_phy_read(dev, B43_NPHY_GPIO_SEL);
1851 b43_phy_write(dev, B43_NPHY_GPIO_SEL, 5);
1852 }
1853
1854 for (i = 0; i < 4; i++)
1855 buf[i] = 0;
1856
1857 for (i = 0; i < nsamp; i++) {
1858 if (dev->phy.rev < 2) {
1859 s[0] = b43_phy_read(dev, B43_NPHY_GPIO_LOOUT);
1860 s[1] = b43_phy_read(dev, B43_NPHY_GPIO_HIOUT);
1861 } else {
1862 s[0] = b43_phy_read(dev, B43_NPHY_RSSI1);
1863 s[1] = b43_phy_read(dev, B43_NPHY_RSSI2);
1864 }
1865
1866 buf[0] += ((s8)((s[0] & 0x3F) << 2)) >> 2;
1867 buf[1] += ((s8)(((s[0] >> 8) & 0x3F) << 2)) >> 2;
1868 buf[2] += ((s8)((s[1] & 0x3F) << 2)) >> 2;
1869 buf[3] += ((s8)(((s[1] >> 8) & 0x3F) << 2)) >> 2;
1870 }
1871 out = (buf[0] & 0xFF) << 24 | (buf[1] & 0xFF) << 16 |
1872 (buf[2] & 0xFF) << 8 | (buf[3] & 0xFF);
1873
1874 if (dev->phy.rev < 2)
1875 b43_phy_write(dev, B43_NPHY_GPIO_SEL, save_regs_phy[8]);
1876
1877 if (dev->phy.rev >= 3) {
1878 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1,
1879 save_regs_phy[0]);
1880 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2,
1881 save_regs_phy[1]);
1882 b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[2]);
1883 b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[3]);
1884 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, save_regs_phy[4]);
1885 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]);
1886 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]);
1887 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]);
1888 }
1889
1890 return out;
1891}
1892
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]1893/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICal */
1894static void b43_nphy_rev2_rssi_cal(struct b43_wldev *dev, u8 type)
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1895{
Rafał Miłecki90b97382010-01-15 14:48:21 +0100[diff] [blame]1896 int i, j;
1897 u8 state[4];
1898 u8 code, val;
1899 u16 class, override;
1900 u8 regs_save_radio[2];
1901 u16 regs_save_phy[2];
1902 s8 offset[4];
1903
1904 u16 clip_state[2];
1905 u16 clip_off[2] = { 0xFFFF, 0xFFFF };
1906 s32 results_min[4] = { };
1907 u8 vcm_final[4] = { };
1908 s32 results[4][4] = { };
1909 s32 miniq[4][2] = { };
1910
1911 if (type == 2) {
1912 code = 0;
1913 val = 6;
1914 } else if (type < 2) {
1915 code = 25;
1916 val = 4;
1917 } else {
1918 B43_WARN_ON(1);
1919 return;
1920 }
1921
1922 class = b43_nphy_classifier(dev, 0, 0);
1923 b43_nphy_classifier(dev, 7, 4);
1924 b43_nphy_read_clip_detection(dev, clip_state);
1925 b43_nphy_write_clip_detection(dev, clip_off);
1926
1927 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
1928 override = 0x140;
1929 else
1930 override = 0x110;
1931
1932 regs_save_phy[0] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
1933 regs_save_radio[0] = b43_radio_read16(dev, B2055_C1_PD_RXTX);
1934 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, override);
1935 b43_radio_write16(dev, B2055_C1_PD_RXTX, val);
1936
1937 regs_save_phy[1] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
1938 regs_save_radio[1] = b43_radio_read16(dev, B2055_C2_PD_RXTX);
1939 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, override);
1940 b43_radio_write16(dev, B2055_C2_PD_RXTX, val);
1941
1942 state[0] = b43_radio_read16(dev, B2055_C1_PD_RSSIMISC) & 0x07;
1943 state[1] = b43_radio_read16(dev, B2055_C2_PD_RSSIMISC) & 0x07;
1944 b43_radio_mask(dev, B2055_C1_PD_RSSIMISC, 0xF8);
1945 b43_radio_mask(dev, B2055_C2_PD_RSSIMISC, 0xF8);
1946 state[2] = b43_radio_read16(dev, B2055_C1_SP_RSSI) & 0x07;
1947 state[3] = b43_radio_read16(dev, B2055_C2_SP_RSSI) & 0x07;
1948
1949 b43_nphy_rssi_select(dev, 5, type);
1950 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 0, type);
1951 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 1, type);
1952
1953 for (i = 0; i < 4; i++) {
1954 u8 tmp[4];
1955 for (j = 0; j < 4; j++)
1956 tmp[j] = i;
1957 if (type != 1)
1958 b43_nphy_set_rssi_2055_vcm(dev, type, tmp);
1959 b43_nphy_poll_rssi(dev, type, results[i], 8);
1960 if (type < 2)
1961 for (j = 0; j < 2; j++)
1962 miniq[i][j] = min(results[i][2 * j],
1963 results[i][2 * j + 1]);
1964 }
1965
1966 for (i = 0; i < 4; i++) {
1967 s32 mind = 40;
1968 u8 minvcm = 0;
1969 s32 minpoll = 249;
1970 s32 curr;
1971 for (j = 0; j < 4; j++) {
1972 if (type == 2)
1973 curr = abs(results[j][i]);
1974 else
1975 curr = abs(miniq[j][i / 2] - code * 8);
1976
1977 if (curr < mind) {
1978 mind = curr;
1979 minvcm = j;
1980 }
1981
1982 if (results[j][i] < minpoll)
1983 minpoll = results[j][i];
1984 }
1985 results_min[i] = minpoll;
1986 vcm_final[i] = minvcm;
1987 }
1988
1989 if (type != 1)
1990 b43_nphy_set_rssi_2055_vcm(dev, type, vcm_final);
1991
1992 for (i = 0; i < 4; i++) {
1993 offset[i] = (code * 8) - results[vcm_final[i]][i];
1994
1995 if (offset[i] < 0)
1996 offset[i] = -((abs(offset[i]) + 4) / 8);
1997 else
1998 offset[i] = (offset[i] + 4) / 8;
1999
2000 if (results_min[i] == 248)
2001 offset[i] = code - 32;
2002
2003 if (i % 2 == 0)
2004 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 1, 0,
2005 type);
2006 else
2007 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 2, 1,
2008 type);
2009 }
2010
2011 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]);
2012 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[1]);
2013
2014 switch (state[2]) {
2015 case 1:
2016 b43_nphy_rssi_select(dev, 1, 2);
2017 break;
2018 case 4:
2019 b43_nphy_rssi_select(dev, 1, 0);
2020 break;
2021 case 2:
2022 b43_nphy_rssi_select(dev, 1, 1);
2023 break;
2024 default:
2025 b43_nphy_rssi_select(dev, 1, 1);
2026 break;
2027 }
2028
2029 switch (state[3]) {
2030 case 1:
2031 b43_nphy_rssi_select(dev, 2, 2);
2032 break;
2033 case 4:
2034 b43_nphy_rssi_select(dev, 2, 0);
2035 break;
2036 default:
2037 b43_nphy_rssi_select(dev, 2, 1);
2038 break;
2039 }
2040
2041 b43_nphy_rssi_select(dev, 0, type);
2042
2043 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs_save_phy[0]);
2044 b43_radio_write16(dev, B2055_C1_PD_RXTX, regs_save_radio[0]);
2045 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs_save_phy[1]);
2046 b43_radio_write16(dev, B2055_C2_PD_RXTX, regs_save_radio[1]);
2047
2048 b43_nphy_classifier(dev, 7, class);
2049 b43_nphy_write_clip_detection(dev, clip_state);
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]2050}
2051
2052/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICalRev3 */
2053static void b43_nphy_rev3_rssi_cal(struct b43_wldev *dev)
2054{
2055 /* TODO */
2056}
2057
2058/*
2059 * RSSI Calibration
2060 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICal
2061 */
2062static void b43_nphy_rssi_cal(struct b43_wldev *dev)
2063{
2064 if (dev->phy.rev >= 3) {
2065 b43_nphy_rev3_rssi_cal(dev);
2066 } else {
2067 b43_nphy_rev2_rssi_cal(dev, 2);
2068 b43_nphy_rev2_rssi_cal(dev, 0);
2069 b43_nphy_rev2_rssi_cal(dev, 1);
2070 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]2071}
2072
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]2073/*
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2074 * Restore RSSI Calibration
2075 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/RestoreRssiCal
2076 */
2077static void b43_nphy_restore_rssi_cal(struct b43_wldev *dev)
2078{
2079 struct b43_phy_n *nphy = dev->phy.n;
2080
2081 u16 *rssical_radio_regs = NULL;
2082 u16 *rssical_phy_regs = NULL;
2083
2084 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2085 if (!nphy->rssical_chanspec_2G.center_freq)
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2086 return;
2087 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_2G;
2088 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_2G;
2089 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2090 if (!nphy->rssical_chanspec_5G.center_freq)
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2091 return;
2092 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_5G;
2093 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_5G;
2094 }
2095
2096 /* TODO use some definitions */
2097 b43_radio_maskset(dev, 0x602B, 0xE3, rssical_radio_regs[0]);
2098 b43_radio_maskset(dev, 0x702B, 0xE3, rssical_radio_regs[1]);
2099
2100 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, rssical_phy_regs[0]);
2101 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, rssical_phy_regs[1]);
2102 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, rssical_phy_regs[2]);
2103 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, rssical_phy_regs[3]);
2104
2105 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, rssical_phy_regs[4]);
2106 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, rssical_phy_regs[5]);
2107 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, rssical_phy_regs[6]);
2108 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, rssical_phy_regs[7]);
2109
2110 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, rssical_phy_regs[8]);
2111 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, rssical_phy_regs[9]);
2112 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, rssical_phy_regs[10]);
2113 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, rssical_phy_regs[11]);
2114}
2115
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2116/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetIpaGainTbl */
2117static const u32 *b43_nphy_get_ipa_gain_table(struct b43_wldev *dev)
2118{
2119 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2120 if (dev->phy.rev >= 6) {
2121 /* TODO If the chip is 47162
2122 return txpwrctrl_tx_gain_ipa_rev5 */
2123 return txpwrctrl_tx_gain_ipa_rev6;
2124 } else if (dev->phy.rev >= 5) {
2125 return txpwrctrl_tx_gain_ipa_rev5;
2126 } else {
2127 return txpwrctrl_tx_gain_ipa;
2128 }
2129 } else {
2130 return txpwrctrl_tx_gain_ipa_5g;
2131 }
2132}
2133
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2134/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalRadioSetup */
2135static void b43_nphy_tx_cal_radio_setup(struct b43_wldev *dev)
2136{
2137 struct b43_phy_n *nphy = dev->phy.n;
2138 u16 *save = nphy->tx_rx_cal_radio_saveregs;
Rafał Miłecki52cb5e92010-01-30 20:18:06 +0100[diff] [blame]2139 u16 tmp;
2140 u8 offset, i;
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2141
2142 if (dev->phy.rev >= 3) {
Rafał Miłecki52cb5e92010-01-30 20:18:06 +0100[diff] [blame]2143 for (i = 0; i < 2; i++) {
2144 tmp = (i == 0) ? 0x2000 : 0x3000;
2145 offset = i * 11;
2146
2147 save[offset + 0] = b43_radio_read16(dev, B2055_CAL_RVARCTL);
2148 save[offset + 1] = b43_radio_read16(dev, B2055_CAL_LPOCTL);
2149 save[offset + 2] = b43_radio_read16(dev, B2055_CAL_TS);
2150 save[offset + 3] = b43_radio_read16(dev, B2055_CAL_RCCALRTS);
2151 save[offset + 4] = b43_radio_read16(dev, B2055_CAL_RCALRTS);
2152 save[offset + 5] = b43_radio_read16(dev, B2055_PADDRV);
2153 save[offset + 6] = b43_radio_read16(dev, B2055_XOCTL1);
2154 save[offset + 7] = b43_radio_read16(dev, B2055_XOCTL2);
2155 save[offset + 8] = b43_radio_read16(dev, B2055_XOREGUL);
2156 save[offset + 9] = b43_radio_read16(dev, B2055_XOMISC);
2157 save[offset + 10] = b43_radio_read16(dev, B2055_PLL_LFC1);
2158
2159 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2160 b43_radio_write16(dev, tmp | B2055_CAL_RVARCTL, 0x0A);
2161 b43_radio_write16(dev, tmp | B2055_CAL_LPOCTL, 0x40);
2162 b43_radio_write16(dev, tmp | B2055_CAL_TS, 0x55);
2163 b43_radio_write16(dev, tmp | B2055_CAL_RCCALRTS, 0);
2164 b43_radio_write16(dev, tmp | B2055_CAL_RCALRTS, 0);
2165 if (nphy->ipa5g_on) {
2166 b43_radio_write16(dev, tmp | B2055_PADDRV, 4);
2167 b43_radio_write16(dev, tmp | B2055_XOCTL1, 1);
2168 } else {
2169 b43_radio_write16(dev, tmp | B2055_PADDRV, 0);
2170 b43_radio_write16(dev, tmp | B2055_XOCTL1, 0x2F);
2171 }
2172 b43_radio_write16(dev, tmp | B2055_XOCTL2, 0);
2173 } else {
2174 b43_radio_write16(dev, tmp | B2055_CAL_RVARCTL, 0x06);
2175 b43_radio_write16(dev, tmp | B2055_CAL_LPOCTL, 0x40);
2176 b43_radio_write16(dev, tmp | B2055_CAL_TS, 0x55);
2177 b43_radio_write16(dev, tmp | B2055_CAL_RCCALRTS, 0);
2178 b43_radio_write16(dev, tmp | B2055_CAL_RCALRTS, 0);
2179 b43_radio_write16(dev, tmp | B2055_XOCTL1, 0);
2180 if (nphy->ipa2g_on) {
2181 b43_radio_write16(dev, tmp | B2055_PADDRV, 6);
2182 b43_radio_write16(dev, tmp | B2055_XOCTL2,
2183 (dev->phy.rev < 5) ? 0x11 : 0x01);
2184 } else {
2185 b43_radio_write16(dev, tmp | B2055_PADDRV, 0);
2186 b43_radio_write16(dev, tmp | B2055_XOCTL2, 0);
2187 }
2188 }
2189 b43_radio_write16(dev, tmp | B2055_XOREGUL, 0);
2190 b43_radio_write16(dev, tmp | B2055_XOMISC, 0);
2191 b43_radio_write16(dev, tmp | B2055_PLL_LFC1, 0);
2192 }
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2193 } else {
2194 save[0] = b43_radio_read16(dev, B2055_C1_TX_RF_IQCAL1);
2195 b43_radio_write16(dev, B2055_C1_TX_RF_IQCAL1, 0x29);
2196
2197 save[1] = b43_radio_read16(dev, B2055_C1_TX_RF_IQCAL2);
2198 b43_radio_write16(dev, B2055_C1_TX_RF_IQCAL2, 0x54);
2199
2200 save[2] = b43_radio_read16(dev, B2055_C2_TX_RF_IQCAL1);
2201 b43_radio_write16(dev, B2055_C2_TX_RF_IQCAL1, 0x29);
2202
2203 save[3] = b43_radio_read16(dev, B2055_C2_TX_RF_IQCAL2);
2204 b43_radio_write16(dev, B2055_C2_TX_RF_IQCAL2, 0x54);
2205
2206 save[3] = b43_radio_read16(dev, B2055_C1_PWRDET_RXTX);
2207 save[4] = b43_radio_read16(dev, B2055_C2_PWRDET_RXTX);
2208
2209 if (!(b43_phy_read(dev, B43_NPHY_BANDCTL) &
2210 B43_NPHY_BANDCTL_5GHZ)) {
2211 b43_radio_write16(dev, B2055_C1_PWRDET_RXTX, 0x04);
2212 b43_radio_write16(dev, B2055_C2_PWRDET_RXTX, 0x04);
2213 } else {
2214 b43_radio_write16(dev, B2055_C1_PWRDET_RXTX, 0x20);
2215 b43_radio_write16(dev, B2055_C2_PWRDET_RXTX, 0x20);
2216 }
2217
2218 if (dev->phy.rev < 2) {
2219 b43_radio_set(dev, B2055_C1_TX_BB_MXGM, 0x20);
2220 b43_radio_set(dev, B2055_C2_TX_BB_MXGM, 0x20);
2221 } else {
2222 b43_radio_mask(dev, B2055_C1_TX_BB_MXGM, ~0x20);
2223 b43_radio_mask(dev, B2055_C2_TX_BB_MXGM, ~0x20);
2224 }
2225 }
2226}
2227
Rafał Miłeckie9762492010-01-15 16:08:25 +0100[diff] [blame]2228/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/IqCalGainParams */
2229static void b43_nphy_iq_cal_gain_params(struct b43_wldev *dev, u16 core,
2230 struct nphy_txgains target,
2231 struct nphy_iqcal_params *params)
2232{
2233 int i, j, indx;
2234 u16 gain;
2235
2236 if (dev->phy.rev >= 3) {
2237 params->txgm = target.txgm[core];
2238 params->pga = target.pga[core];
2239 params->pad = target.pad[core];
2240 params->ipa = target.ipa[core];
2241 params->cal_gain = (params->txgm << 12) | (params->pga << 8) |
2242 (params->pad << 4) | (params->ipa);
2243 for (j = 0; j < 5; j++)
2244 params->ncorr[j] = 0x79;
2245 } else {
2246 gain = (target.pad[core]) | (target.pga[core] << 4) |
2247 (target.txgm[core] << 8);
2248
2249 indx = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ?
2250 1 : 0;
2251 for (i = 0; i < 9; i++)
2252 if (tbl_iqcal_gainparams[indx][i][0] == gain)
2253 break;
2254 i = min(i, 8);
2255
2256 params->txgm = tbl_iqcal_gainparams[indx][i][1];
2257 params->pga = tbl_iqcal_gainparams[indx][i][2];
2258 params->pad = tbl_iqcal_gainparams[indx][i][3];
2259 params->cal_gain = (params->txgm << 7) | (params->pga << 4) |
2260 (params->pad << 2);
2261 for (j = 0; j < 4; j++)
2262 params->ncorr[j] = tbl_iqcal_gainparams[indx][i][4 + j];
2263 }
2264}
2265
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2266/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/UpdateTxCalLadder */
2267static void b43_nphy_update_tx_cal_ladder(struct b43_wldev *dev, u16 core)
2268{
2269 struct b43_phy_n *nphy = dev->phy.n;
2270 int i;
2271 u16 scale, entry;
2272
2273 u16 tmp = nphy->txcal_bbmult;
2274 if (core == 0)
2275 tmp >>= 8;
2276 tmp &= 0xff;
2277
2278 for (i = 0; i < 18; i++) {
2279 scale = (ladder_lo[i].percent * tmp) / 100;
2280 entry = ((scale & 0xFF) << 8) | ladder_lo[i].g_env;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2281 b43_ntab_write(dev, B43_NTAB16(15, i), entry);
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2282
2283 scale = (ladder_iq[i].percent * tmp) / 100;
2284 entry = ((scale & 0xFF) << 8) | ladder_iq[i].g_env;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2285 b43_ntab_write(dev, B43_NTAB16(15, i + 32), entry);
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2286 }
2287}
2288
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]2289/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ExtPaSetTxDigiFilts */
2290static void b43_nphy_ext_pa_set_tx_dig_filters(struct b43_wldev *dev)
2291{
2292 int i;
2293 for (i = 0; i < 15; i++)
2294 b43_phy_write(dev, B43_PHY_N(0x2C5 + i),
2295 tbl_tx_filter_coef_rev4[2][i]);
2296}
2297
2298/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/IpaSetTxDigiFilts */
2299static void b43_nphy_int_pa_set_tx_dig_filters(struct b43_wldev *dev)
2300{
2301 int i, j;
2302 /* B43_NPHY_TXF_20CO_S0A1, B43_NPHY_TXF_40CO_S0A1, unknown */
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame^]2303 static const u16 offset[] = { 0x186, 0x195, 0x2C5 };
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]2304
2305 for (i = 0; i < 3; i++)
2306 for (j = 0; j < 15; j++)
2307 b43_phy_write(dev, B43_PHY_N(offset[i] + j),
2308 tbl_tx_filter_coef_rev4[i][j]);
2309
2310 if (dev->phy.is_40mhz) {
2311 for (j = 0; j < 15; j++)
2312 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2313 tbl_tx_filter_coef_rev4[3][j]);
2314 } else if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2315 for (j = 0; j < 15; j++)
2316 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2317 tbl_tx_filter_coef_rev4[5][j]);
2318 }
2319
2320 if (dev->phy.channel == 14)
2321 for (j = 0; j < 15; j++)
2322 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2323 tbl_tx_filter_coef_rev4[6][j]);
2324}
2325
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]2326/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetTxGain */
2327static struct nphy_txgains b43_nphy_get_tx_gains(struct b43_wldev *dev)
2328{
2329 struct b43_phy_n *nphy = dev->phy.n;
2330
2331 u16 curr_gain[2];
2332 struct nphy_txgains target;
2333 const u32 *table = NULL;
2334
2335 if (nphy->txpwrctrl == 0) {
2336 int i;
2337
2338 if (nphy->hang_avoid)
2339 b43_nphy_stay_in_carrier_search(dev, true);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2340 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, curr_gain);
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]2341 if (nphy->hang_avoid)
2342 b43_nphy_stay_in_carrier_search(dev, false);
2343
2344 for (i = 0; i < 2; ++i) {
2345 if (dev->phy.rev >= 3) {
2346 target.ipa[i] = curr_gain[i] & 0x000F;
2347 target.pad[i] = (curr_gain[i] & 0x00F0) >> 4;
2348 target.pga[i] = (curr_gain[i] & 0x0F00) >> 8;
2349 target.txgm[i] = (curr_gain[i] & 0x7000) >> 12;
2350 } else {
2351 target.ipa[i] = curr_gain[i] & 0x0003;
2352 target.pad[i] = (curr_gain[i] & 0x000C) >> 2;
2353 target.pga[i] = (curr_gain[i] & 0x0070) >> 4;
2354 target.txgm[i] = (curr_gain[i] & 0x0380) >> 7;
2355 }
2356 }
2357 } else {
2358 int i;
2359 u16 index[2];
2360 index[0] = (b43_phy_read(dev, B43_NPHY_C1_TXPCTL_STAT) &
2361 B43_NPHY_TXPCTL_STAT_BIDX) >>
2362 B43_NPHY_TXPCTL_STAT_BIDX_SHIFT;
2363 index[1] = (b43_phy_read(dev, B43_NPHY_C2_TXPCTL_STAT) &
2364 B43_NPHY_TXPCTL_STAT_BIDX) >>
2365 B43_NPHY_TXPCTL_STAT_BIDX_SHIFT;
2366
2367 for (i = 0; i < 2; ++i) {
2368 if (dev->phy.rev >= 3) {
2369 enum ieee80211_band band =
2370 b43_current_band(dev->wl);
2371
2372 if ((nphy->ipa2g_on &&
2373 band == IEEE80211_BAND_2GHZ) ||
2374 (nphy->ipa5g_on &&
2375 band == IEEE80211_BAND_5GHZ)) {
2376 table = b43_nphy_get_ipa_gain_table(dev);
2377 } else {
2378 if (band == IEEE80211_BAND_5GHZ) {
2379 if (dev->phy.rev == 3)
2380 table = b43_ntab_tx_gain_rev3_5ghz;
2381 else if (dev->phy.rev == 4)
2382 table = b43_ntab_tx_gain_rev4_5ghz;
2383 else
2384 table = b43_ntab_tx_gain_rev5plus_5ghz;
2385 } else {
2386 table = b43_ntab_tx_gain_rev3plus_2ghz;
2387 }
2388 }
2389
2390 target.ipa[i] = (table[index[i]] >> 16) & 0xF;
2391 target.pad[i] = (table[index[i]] >> 20) & 0xF;
2392 target.pga[i] = (table[index[i]] >> 24) & 0xF;
2393 target.txgm[i] = (table[index[i]] >> 28) & 0xF;
2394 } else {
2395 table = b43_ntab_tx_gain_rev0_1_2;
2396
2397 target.ipa[i] = (table[index[i]] >> 16) & 0x3;
2398 target.pad[i] = (table[index[i]] >> 18) & 0x3;
2399 target.pga[i] = (table[index[i]] >> 20) & 0x7;
2400 target.txgm[i] = (table[index[i]] >> 23) & 0x7;
2401 }
2402 }
2403 }
2404
2405 return target;
2406}
2407
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2408/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalPhyCleanup */
2409static void b43_nphy_tx_cal_phy_cleanup(struct b43_wldev *dev)
2410{
2411 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
2412
2413 if (dev->phy.rev >= 3) {
2414 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[0]);
2415 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]);
2416 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]);
2417 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[3]);
2418 b43_phy_write(dev, B43_NPHY_BBCFG, regs[4]);
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2419 b43_ntab_write(dev, B43_NTAB16(8, 3), regs[5]);
2420 b43_ntab_write(dev, B43_NTAB16(8, 19), regs[6]);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2421 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[7]);
2422 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[8]);
2423 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]);
2424 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]);
2425 b43_nphy_reset_cca(dev);
2426 } else {
2427 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, regs[0]);
2428 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, regs[1]);
2429 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]);
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2430 b43_ntab_write(dev, B43_NTAB16(8, 2), regs[3]);
2431 b43_ntab_write(dev, B43_NTAB16(8, 18), regs[4]);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2432 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[5]);
2433 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[6]);
2434 }
2435}
2436
2437/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalPhySetup */
2438static void b43_nphy_tx_cal_phy_setup(struct b43_wldev *dev)
2439{
2440 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
2441 u16 tmp;
2442
2443 regs[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
2444 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
2445 if (dev->phy.rev >= 3) {
2446 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0xF0FF, 0x0A00);
2447 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0xF0FF, 0x0A00);
2448
2449 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
2450 regs[2] = tmp;
2451 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, tmp | 0x0600);
2452
2453 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2454 regs[3] = tmp;
2455 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x0600);
2456
2457 regs[4] = b43_phy_read(dev, B43_NPHY_BBCFG);
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]2458 b43_phy_mask(dev, B43_NPHY_BBCFG,
2459 ~B43_NPHY_BBCFG_RSTRX & 0xFFFF);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2460
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2461 tmp = b43_ntab_read(dev, B43_NTAB16(8, 3));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2462 regs[5] = tmp;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2463 b43_ntab_write(dev, B43_NTAB16(8, 3), 0);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2464
2465 tmp = b43_ntab_read(dev, B43_NTAB16(8, 19));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2466 regs[6] = tmp;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2467 b43_ntab_write(dev, B43_NTAB16(8, 19), 0);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2468 regs[7] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
2469 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
2470
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]2471 b43_nphy_rf_control_intc_override(dev, 2, 1, 3);
2472 b43_nphy_rf_control_intc_override(dev, 1, 2, 1);
2473 b43_nphy_rf_control_intc_override(dev, 1, 8, 2);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2474
2475 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0);
2476 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1);
2477 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);
2478 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);
2479 } else {
2480 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, 0xA000);
2481 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, 0xA000);
2482 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2483 regs[2] = tmp;
2484 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x3000);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2485 tmp = b43_ntab_read(dev, B43_NTAB16(8, 2));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2486 regs[3] = tmp;
2487 tmp |= 0x2000;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2488 b43_ntab_write(dev, B43_NTAB16(8, 2), tmp);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2489 tmp = b43_ntab_read(dev, B43_NTAB16(8, 18));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2490 regs[4] = tmp;
2491 tmp |= 0x2000;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2492 b43_ntab_write(dev, B43_NTAB16(8, 18), tmp);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2493 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
2494 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
2495 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
2496 tmp = 0x0180;
2497 else
2498 tmp = 0x0120;
2499 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp);
2500 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp);
2501 }
2502}
2503
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2504/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SaveCal */
2505static void b43_nphy_save_cal(struct b43_wldev *dev)
2506{
2507 struct b43_phy_n *nphy = dev->phy.n;
2508
2509 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2510 u16 *txcal_radio_regs = NULL;
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]2511 struct b43_chanspec *iqcal_chanspec;
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2512 u16 *table = NULL;
2513
2514 if (nphy->hang_avoid)
2515 b43_nphy_stay_in_carrier_search(dev, 1);
2516
2517 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2518 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_2G;
2519 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_2G;
2520 iqcal_chanspec = &nphy->iqcal_chanspec_2G;
2521 table = nphy->cal_cache.txcal_coeffs_2G;
2522 } else {
2523 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_5G;
2524 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_5G;
2525 iqcal_chanspec = &nphy->iqcal_chanspec_5G;
2526 table = nphy->cal_cache.txcal_coeffs_5G;
2527 }
2528
2529 b43_nphy_rx_iq_coeffs(dev, false, rxcal_coeffs);
2530 /* TODO use some definitions */
2531 if (dev->phy.rev >= 3) {
2532 txcal_radio_regs[0] = b43_radio_read(dev, 0x2021);
2533 txcal_radio_regs[1] = b43_radio_read(dev, 0x2022);
2534 txcal_radio_regs[2] = b43_radio_read(dev, 0x3021);
2535 txcal_radio_regs[3] = b43_radio_read(dev, 0x3022);
2536 txcal_radio_regs[4] = b43_radio_read(dev, 0x2023);
2537 txcal_radio_regs[5] = b43_radio_read(dev, 0x2024);
2538 txcal_radio_regs[6] = b43_radio_read(dev, 0x3023);
2539 txcal_radio_regs[7] = b43_radio_read(dev, 0x3024);
2540 } else {
2541 txcal_radio_regs[0] = b43_radio_read(dev, 0x8B);
2542 txcal_radio_regs[1] = b43_radio_read(dev, 0xBA);
2543 txcal_radio_regs[2] = b43_radio_read(dev, 0x8D);
2544 txcal_radio_regs[3] = b43_radio_read(dev, 0xBC);
2545 }
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2546 iqcal_chanspec->center_freq = dev->phy.channel_freq;
2547 iqcal_chanspec->channel_type = dev->phy.channel_type;
Rafał Miłecki5818e982010-10-14 19:33:35 +0200[diff] [blame]2548 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 8, table);
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2549
2550 if (nphy->hang_avoid)
2551 b43_nphy_stay_in_carrier_search(dev, 0);
2552}
2553
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2554/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RestoreCal */
2555static void b43_nphy_restore_cal(struct b43_wldev *dev)
2556{
2557 struct b43_phy_n *nphy = dev->phy.n;
2558
2559 u16 coef[4];
2560 u16 *loft = NULL;
2561 u16 *table = NULL;
2562
2563 int i;
2564 u16 *txcal_radio_regs = NULL;
2565 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2566
2567 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2568 if (!nphy->iqcal_chanspec_2G.center_freq)
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2569 return;
2570 table = nphy->cal_cache.txcal_coeffs_2G;
2571 loft = &nphy->cal_cache.txcal_coeffs_2G[5];
2572 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2573 if (!nphy->iqcal_chanspec_5G.center_freq)
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2574 return;
2575 table = nphy->cal_cache.txcal_coeffs_5G;
2576 loft = &nphy->cal_cache.txcal_coeffs_5G[5];
2577 }
2578
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2579 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4, table);
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2580
2581 for (i = 0; i < 4; i++) {
2582 if (dev->phy.rev >= 3)
2583 table[i] = coef[i];
2584 else
2585 coef[i] = 0;
2586 }
2587
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2588 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4, coef);
2589 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2, loft);
2590 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2, loft);
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2591
2592 if (dev->phy.rev < 2)
2593 b43_nphy_tx_iq_workaround(dev);
2594
2595 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2596 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_2G;
2597 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_2G;
2598 } else {
2599 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_5G;
2600 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_5G;
2601 }
2602
2603 /* TODO use some definitions */
2604 if (dev->phy.rev >= 3) {
2605 b43_radio_write(dev, 0x2021, txcal_radio_regs[0]);
2606 b43_radio_write(dev, 0x2022, txcal_radio_regs[1]);
2607 b43_radio_write(dev, 0x3021, txcal_radio_regs[2]);
2608 b43_radio_write(dev, 0x3022, txcal_radio_regs[3]);
2609 b43_radio_write(dev, 0x2023, txcal_radio_regs[4]);
2610 b43_radio_write(dev, 0x2024, txcal_radio_regs[5]);
2611 b43_radio_write(dev, 0x3023, txcal_radio_regs[6]);
2612 b43_radio_write(dev, 0x3024, txcal_radio_regs[7]);
2613 } else {
2614 b43_radio_write(dev, 0x8B, txcal_radio_regs[0]);
2615 b43_radio_write(dev, 0xBA, txcal_radio_regs[1]);
2616 b43_radio_write(dev, 0x8D, txcal_radio_regs[2]);
2617 b43_radio_write(dev, 0xBC, txcal_radio_regs[3]);
2618 }
2619 b43_nphy_rx_iq_coeffs(dev, true, rxcal_coeffs);
2620}
2621
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2622/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalTxIqlo */
2623static int b43_nphy_cal_tx_iq_lo(struct b43_wldev *dev,
2624 struct nphy_txgains target,
2625 bool full, bool mphase)
2626{
2627 struct b43_phy_n *nphy = dev->phy.n;
2628 int i;
2629 int error = 0;
2630 int freq;
2631 bool avoid = false;
2632 u8 length;
2633 u16 tmp, core, type, count, max, numb, last, cmd;
2634 const u16 *table;
2635 bool phy6or5x;
2636
2637 u16 buffer[11];
2638 u16 diq_start = 0;
2639 u16 save[2];
2640 u16 gain[2];
2641 struct nphy_iqcal_params params[2];
2642 bool updated[2] = { };
2643
2644 b43_nphy_stay_in_carrier_search(dev, true);
2645
2646 if (dev->phy.rev >= 4) {
2647 avoid = nphy->hang_avoid;
2648 nphy->hang_avoid = 0;
2649 }
2650
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2651 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, save);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2652
2653 for (i = 0; i < 2; i++) {
2654 b43_nphy_iq_cal_gain_params(dev, i, target, &params[i]);
2655 gain[i] = params[i].cal_gain;
2656 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2657
2658 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2659
2660 b43_nphy_tx_cal_radio_setup(dev);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2661 b43_nphy_tx_cal_phy_setup(dev);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2662
2663 phy6or5x = dev->phy.rev >= 6 ||
2664 (dev->phy.rev == 5 && nphy->ipa2g_on &&
2665 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ);
2666 if (phy6or5x) {
Rafał Miłecki38bb9022010-01-30 20:18:05 +0100[diff] [blame]2667 if (dev->phy.is_40mhz) {
2668 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18,
2669 tbl_tx_iqlo_cal_loft_ladder_40);
2670 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18,
2671 tbl_tx_iqlo_cal_iqimb_ladder_40);
2672 } else {
2673 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18,
2674 tbl_tx_iqlo_cal_loft_ladder_20);
2675 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18,
2676 tbl_tx_iqlo_cal_iqimb_ladder_20);
2677 }
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2678 }
2679
2680 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8AA9);
2681
Rafał Miłeckiaa4c7b22010-01-22 01:53:12 +0100[diff] [blame]2682 if (!dev->phy.is_40mhz)
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2683 freq = 2500;
2684 else
2685 freq = 5000;
2686
2687 if (nphy->mphase_cal_phase_id > 2)
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]2688 b43_nphy_run_samples(dev, (dev->phy.is_40mhz ? 40 : 20) * 8,
2689 0xFFFF, 0, true, false);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2690 else
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]2691 error = b43_nphy_tx_tone(dev, freq, 250, true, false);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2692
2693 if (error == 0) {
2694 if (nphy->mphase_cal_phase_id > 2) {
2695 table = nphy->mphase_txcal_bestcoeffs;
2696 length = 11;
2697 if (dev->phy.rev < 3)
2698 length -= 2;
2699 } else {
2700 if (!full && nphy->txiqlocal_coeffsvalid) {
2701 table = nphy->txiqlocal_bestc;
2702 length = 11;
2703 if (dev->phy.rev < 3)
2704 length -= 2;
2705 } else {
2706 full = true;
2707 if (dev->phy.rev >= 3) {
2708 table = tbl_tx_iqlo_cal_startcoefs_nphyrev3;
2709 length = B43_NTAB_TX_IQLO_CAL_STARTCOEFS_REV3;
2710 } else {
2711 table = tbl_tx_iqlo_cal_startcoefs;
2712 length = B43_NTAB_TX_IQLO_CAL_STARTCOEFS;
2713 }
2714 }
2715 }
2716
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2717 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length, table);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2718
2719 if (full) {
2720 if (dev->phy.rev >= 3)
2721 max = B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL_REV3;
2722 else
2723 max = B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL;
2724 } else {
2725 if (dev->phy.rev >= 3)
2726 max = B43_NTAB_TX_IQLO_CAL_CMDS_RECAL_REV3;
2727 else
2728 max = B43_NTAB_TX_IQLO_CAL_CMDS_RECAL;
2729 }
2730
2731 if (mphase) {
2732 count = nphy->mphase_txcal_cmdidx;
2733 numb = min(max,
2734 (u16)(count + nphy->mphase_txcal_numcmds));
2735 } else {
2736 count = 0;
2737 numb = max;
2738 }
2739
2740 for (; count < numb; count++) {
2741 if (full) {
2742 if (dev->phy.rev >= 3)
2743 cmd = tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[count];
2744 else
2745 cmd = tbl_tx_iqlo_cal_cmds_fullcal[count];
2746 } else {
2747 if (dev->phy.rev >= 3)
2748 cmd = tbl_tx_iqlo_cal_cmds_recal_nphyrev3[count];
2749 else
2750 cmd = tbl_tx_iqlo_cal_cmds_recal[count];
2751 }
2752
2753 core = (cmd & 0x3000) >> 12;
2754 type = (cmd & 0x0F00) >> 8;
2755
2756 if (phy6or5x && updated[core] == 0) {
2757 b43_nphy_update_tx_cal_ladder(dev, core);
2758 updated[core] = 1;
2759 }
2760
2761 tmp = (params[core].ncorr[type] << 8) | 0x66;
2762 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDNNUM, tmp);
2763
2764 if (type == 1 || type == 3 || type == 4) {
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2765 buffer[0] = b43_ntab_read(dev,
2766 B43_NTAB16(15, 69 + core));
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2767 diq_start = buffer[0];
2768 buffer[0] = 0;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2769 b43_ntab_write(dev, B43_NTAB16(15, 69 + core),
2770 0);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2771 }
2772
2773 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMD, cmd);
2774 for (i = 0; i < 2000; i++) {
2775 tmp = b43_phy_read(dev, B43_NPHY_IQLOCAL_CMD);
2776 if (tmp & 0xC000)
2777 break;
2778 udelay(10);
2779 }
2780
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2781 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2782 buffer);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2783 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length,
2784 buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2785
2786 if (type == 1 || type == 3 || type == 4)
2787 buffer[0] = diq_start;
2788 }
2789
2790 if (mphase)
2791 nphy->mphase_txcal_cmdidx = (numb >= max) ? 0 : numb;
2792
2793 last = (dev->phy.rev < 3) ? 6 : 7;
2794
2795 if (!mphase || nphy->mphase_cal_phase_id == last) {
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2796 b43_ntab_write_bulk(dev, B43_NTAB16(15, 96), 4, buffer);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2797 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 4, buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2798 if (dev->phy.rev < 3) {
2799 buffer[0] = 0;
2800 buffer[1] = 0;
2801 buffer[2] = 0;
2802 buffer[3] = 0;
2803 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2804 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4,
2805 buffer);
Rafał Miłeckibc53e512010-04-01 23:11:10 +0200[diff] [blame]2806 b43_ntab_read_bulk(dev, B43_NTAB16(15, 101), 2,
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2807 buffer);
2808 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2,
2809 buffer);
2810 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2,
2811 buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2812 length = 11;
2813 if (dev->phy.rev < 3)
2814 length -= 2;
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2815 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2816 nphy->txiqlocal_bestc);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2817 nphy->txiqlocal_coeffsvalid = true;
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2818 nphy->txiqlocal_chanspec.center_freq =
2819 dev->phy.channel_freq;
2820 nphy->txiqlocal_chanspec.channel_type =
2821 dev->phy.channel_type;
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2822 } else {
2823 length = 11;
2824 if (dev->phy.rev < 3)
2825 length -= 2;
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2826 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2827 nphy->mphase_txcal_bestcoeffs);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2828 }
2829
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]2830 b43_nphy_stop_playback(dev);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2831 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0);
2832 }
2833
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2834 b43_nphy_tx_cal_phy_cleanup(dev);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2835 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, save);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2836
2837 if (dev->phy.rev < 2 && (!mphase || nphy->mphase_cal_phase_id == last))
2838 b43_nphy_tx_iq_workaround(dev);
2839
2840 if (dev->phy.rev >= 4)
2841 nphy->hang_avoid = avoid;
2842
2843 b43_nphy_stay_in_carrier_search(dev, false);
2844
2845 return error;
2846}
2847
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]2848/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ReapplyTxCalCoeffs */
2849static void b43_nphy_reapply_tx_cal_coeffs(struct b43_wldev *dev)
2850{
2851 struct b43_phy_n *nphy = dev->phy.n;
2852 u8 i;
2853 u16 buffer[7];
2854 bool equal = true;
2855
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]2856 if (!nphy->txiqlocal_coeffsvalid ||
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2857 nphy->txiqlocal_chanspec.center_freq != dev->phy.channel_freq ||
2858 nphy->txiqlocal_chanspec.channel_type != dev->phy.channel_type)
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]2859 return;
2860
2861 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
2862 for (i = 0; i < 4; i++) {
2863 if (buffer[i] != nphy->txiqlocal_bestc[i]) {
2864 equal = false;
2865 break;
2866 }
2867 }
2868
2869 if (!equal) {
2870 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4,
2871 nphy->txiqlocal_bestc);
2872 for (i = 0; i < 4; i++)
2873 buffer[i] = 0;
2874 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4,
2875 buffer);
2876 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2,
2877 &nphy->txiqlocal_bestc[5]);
2878 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2,
2879 &nphy->txiqlocal_bestc[5]);
2880 }
2881}
2882
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2883/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalRxIqRev2 */
2884static int b43_nphy_rev2_cal_rx_iq(struct b43_wldev *dev,
2885 struct nphy_txgains target, u8 type, bool debug)
2886{
2887 struct b43_phy_n *nphy = dev->phy.n;
2888 int i, j, index;
2889 u8 rfctl[2];
2890 u8 afectl_core;
2891 u16 tmp[6];
2892 u16 cur_hpf1, cur_hpf2, cur_lna;
2893 u32 real, imag;
2894 enum ieee80211_band band;
2895
2896 u8 use;
2897 u16 cur_hpf;
2898 u16 lna[3] = { 3, 3, 1 };
2899 u16 hpf1[3] = { 7, 2, 0 };
2900 u16 hpf2[3] = { 2, 0, 0 };
Rafał Miłeckide9a47f2010-01-18 00:21:49 +0100[diff] [blame]2901 u32 power[3] = { };
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2902 u16 gain_save[2];
2903 u16 cal_gain[2];
2904 struct nphy_iqcal_params cal_params[2];
2905 struct nphy_iq_est est;
2906 int ret = 0;
2907 bool playtone = true;
2908 int desired = 13;
2909
2910 b43_nphy_stay_in_carrier_search(dev, 1);
2911
2912 if (dev->phy.rev < 2)
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]2913 b43_nphy_reapply_tx_cal_coeffs(dev);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2914 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2915 for (i = 0; i < 2; i++) {
2916 b43_nphy_iq_cal_gain_params(dev, i, target, &cal_params[i]);
2917 cal_gain[i] = cal_params[i].cal_gain;
2918 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2919 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, cal_gain);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2920
2921 for (i = 0; i < 2; i++) {
2922 if (i == 0) {
2923 rfctl[0] = B43_NPHY_RFCTL_INTC1;
2924 rfctl[1] = B43_NPHY_RFCTL_INTC2;
2925 afectl_core = B43_NPHY_AFECTL_C1;
2926 } else {
2927 rfctl[0] = B43_NPHY_RFCTL_INTC2;
2928 rfctl[1] = B43_NPHY_RFCTL_INTC1;
2929 afectl_core = B43_NPHY_AFECTL_C2;
2930 }
2931
2932 tmp[1] = b43_phy_read(dev, B43_NPHY_RFSEQCA);
2933 tmp[2] = b43_phy_read(dev, afectl_core);
2934 tmp[3] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2935 tmp[4] = b43_phy_read(dev, rfctl[0]);
2936 tmp[5] = b43_phy_read(dev, rfctl[1]);
2937
2938 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]2939 ~B43_NPHY_RFSEQCA_RXDIS & 0xFFFF,
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2940 ((1 - i) << B43_NPHY_RFSEQCA_RXDIS_SHIFT));
2941 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN,
2942 (1 - i));
2943 b43_phy_set(dev, afectl_core, 0x0006);
2944 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0006);
2945
2946 band = b43_current_band(dev->wl);
2947
2948 if (nphy->rxcalparams & 0xFF000000) {
2949 if (band == IEEE80211_BAND_5GHZ)
2950 b43_phy_write(dev, rfctl[0], 0x140);
2951 else
2952 b43_phy_write(dev, rfctl[0], 0x110);
2953 } else {
2954 if (band == IEEE80211_BAND_5GHZ)
2955 b43_phy_write(dev, rfctl[0], 0x180);
2956 else
2957 b43_phy_write(dev, rfctl[0], 0x120);
2958 }
2959
2960 if (band == IEEE80211_BAND_5GHZ)
2961 b43_phy_write(dev, rfctl[1], 0x148);
2962 else
2963 b43_phy_write(dev, rfctl[1], 0x114);
2964
2965 if (nphy->rxcalparams & 0x10000) {
2966 b43_radio_maskset(dev, B2055_C1_GENSPARE2, 0xFC,
2967 (i + 1));
2968 b43_radio_maskset(dev, B2055_C2_GENSPARE2, 0xFC,
2969 (2 - i));
2970 }
2971
Rafał Miłecki30115c22010-10-22 17:43:45 +0200[diff] [blame]2972 for (j = 0; j < 4; j++) {
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2973 if (j < 3) {
2974 cur_lna = lna[j];
2975 cur_hpf1 = hpf1[j];
2976 cur_hpf2 = hpf2[j];
2977 } else {
2978 if (power[1] > 10000) {
2979 use = 1;
2980 cur_hpf = cur_hpf1;
2981 index = 2;
2982 } else {
2983 if (power[0] > 10000) {
2984 use = 1;
2985 cur_hpf = cur_hpf1;
2986 index = 1;
2987 } else {
2988 index = 0;
2989 use = 2;
2990 cur_hpf = cur_hpf2;
2991 }
2992 }
2993 cur_lna = lna[index];
2994 cur_hpf1 = hpf1[index];
2995 cur_hpf2 = hpf2[index];
2996 cur_hpf += desired - hweight32(power[index]);
2997 cur_hpf = clamp_val(cur_hpf, 0, 10);
2998 if (use == 1)
2999 cur_hpf1 = cur_hpf;
3000 else
3001 cur_hpf2 = cur_hpf;
3002 }
3003
3004 tmp[0] = ((cur_hpf2 << 8) | (cur_hpf1 << 4) |
3005 (cur_lna << 2));
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]3006 b43_nphy_rf_control_override(dev, 0x400, tmp[0], 3,
3007 false);
Rafał Miłeckide9a47f2010-01-18 00:21:49 +0100[diff] [blame]3008 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]3009 b43_nphy_stop_playback(dev);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3010
3011 if (playtone) {
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]3012 ret = b43_nphy_tx_tone(dev, 4000,
3013 (nphy->rxcalparams & 0xFFFF),
3014 false, false);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3015 playtone = false;
3016 } else {
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]3017 b43_nphy_run_samples(dev, 160, 0xFFFF, 0,
3018 false, false);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3019 }
3020
3021 if (ret == 0) {
3022 if (j < 3) {
3023 b43_nphy_rx_iq_est(dev, &est, 1024, 32,
3024 false);
3025 if (i == 0) {
3026 real = est.i0_pwr;
3027 imag = est.q0_pwr;
3028 } else {
3029 real = est.i1_pwr;
3030 imag = est.q1_pwr;
3031 }
3032 power[i] = ((real + imag) / 1024) + 1;
3033 } else {
3034 b43_nphy_calc_rx_iq_comp(dev, 1 << i);
3035 }
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]3036 b43_nphy_stop_playback(dev);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3037 }
3038
3039 if (ret != 0)
3040 break;
3041 }
3042
3043 b43_radio_mask(dev, B2055_C1_GENSPARE2, 0xFC);
3044 b43_radio_mask(dev, B2055_C2_GENSPARE2, 0xFC);
3045 b43_phy_write(dev, rfctl[1], tmp[5]);
3046 b43_phy_write(dev, rfctl[0], tmp[4]);
3047 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp[3]);
3048 b43_phy_write(dev, afectl_core, tmp[2]);
3049 b43_phy_write(dev, B43_NPHY_RFSEQCA, tmp[1]);
3050
3051 if (ret != 0)
3052 break;
3053 }
3054
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]3055 b43_nphy_rf_control_override(dev, 0x400, 0, 3, true);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]3056 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]3057 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3058
3059 b43_nphy_stay_in_carrier_search(dev, 0);
3060
3061 return ret;
3062}
3063
3064static int b43_nphy_rev3_cal_rx_iq(struct b43_wldev *dev,
3065 struct nphy_txgains target, u8 type, bool debug)
3066{
3067 return -1;
3068}
3069
3070/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalRxIq */
3071static int b43_nphy_cal_rx_iq(struct b43_wldev *dev,
3072 struct nphy_txgains target, u8 type, bool debug)
3073{
3074 if (dev->phy.rev >= 3)
3075 return b43_nphy_rev3_cal_rx_iq(dev, target, type, debug);
3076 else
3077 return b43_nphy_rev2_cal_rx_iq(dev, target, type, debug);
3078}
3079
Gábor Stefanikd2730b22010-08-16 22:39:16 +0200[diff] [blame]3080/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
3081static void b43_nphy_mac_phy_clock_set(struct b43_wldev *dev, bool on)
3082{
3083 u32 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
3084 if (on)
3085 tmslow |= SSB_TMSLOW_PHYCLK;
3086 else
3087 tmslow &= ~SSB_TMSLOW_PHYCLK;
3088 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
3089}
3090
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3091/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCoreSetState */
3092static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask)
3093{
3094 struct b43_phy *phy = &dev->phy;
3095 struct b43_phy_n *nphy = phy->n;
3096 u16 buf[16];
3097
Rafał Miłecki049fbfe2010-08-22 21:47:32 +0200[diff] [blame]3098 nphy->phyrxchain = mask;
3099
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3100 if (0 /* FIXME clk */)
3101 return;
3102
3103 b43_mac_suspend(dev);
3104
3105 if (nphy->hang_avoid)
3106 b43_nphy_stay_in_carrier_search(dev, true);
3107
3108 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN,
3109 (mask & 0x3) << B43_NPHY_RFSEQCA_RXEN_SHIFT);
3110
Rafał Miłecki049fbfe2010-08-22 21:47:32 +0200[diff] [blame]3111 if ((mask & 0x3) != 0x3) {
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3112 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 1);
3113 if (dev->phy.rev >= 3) {
3114 /* TODO */
3115 }
3116 } else {
3117 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 0x1E);
3118 if (dev->phy.rev >= 3) {
3119 /* TODO */
3120 }
3121 }
3122
3123 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
3124
3125 if (nphy->hang_avoid)
3126 b43_nphy_stay_in_carrier_search(dev, false);
3127
3128 b43_mac_enable(dev);
3129}
3130
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]3131/*
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3132 * Init N-PHY
3133 * http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N
3134 */
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3135int b43_phy_initn(struct b43_wldev *dev)
3136{
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3137 struct ssb_bus *bus = dev->dev->bus;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3138 struct b43_phy *phy = &dev->phy;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3139 struct b43_phy_n *nphy = phy->n;
3140 u8 tx_pwr_state;
3141 struct nphy_txgains target;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3142 u16 tmp;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3143 enum ieee80211_band tmp2;
3144 bool do_rssi_cal;
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3145
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3146 u16 clip[2];
3147 bool do_cal = false;
3148
3149 if ((dev->phy.rev >= 3) &&
3150 (bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
3151 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) {
3152 chipco_set32(&dev->dev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40);
3153 }
3154 nphy->deaf_count = 0;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3155 b43_nphy_tables_init(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3156 nphy->crsminpwr_adjusted = false;
3157 nphy->noisevars_adjusted = false;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3158
3159 /* Clear all overrides */
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3160 if (dev->phy.rev >= 3) {
3161 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, 0);
3162 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0);
3163 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, 0);
3164 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, 0);
3165 } else {
3166 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0);
3167 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3168 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, 0);
3169 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, 0);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3170 if (dev->phy.rev < 6) {
3171 b43_phy_write(dev, B43_NPHY_RFCTL_INTC3, 0);
3172 b43_phy_write(dev, B43_NPHY_RFCTL_INTC4, 0);
3173 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3174 b43_phy_mask(dev, B43_NPHY_RFSEQMODE,
3175 ~(B43_NPHY_RFSEQMODE_CAOVER |
3176 B43_NPHY_RFSEQMODE_TROVER));
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3177 if (dev->phy.rev >= 3)
3178 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, 0);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3179 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, 0);
3180
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3181 if (dev->phy.rev <= 2) {
3182 tmp = (dev->phy.rev == 2) ? 0x3B : 0x40;
3183 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
3184 ~B43_NPHY_BPHY_CTL3_SCALE,
3185 tmp << B43_NPHY_BPHY_CTL3_SCALE_SHIFT);
3186 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3187 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20);
3188 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20);
3189
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3190 if (bus->sprom.boardflags2_lo & 0x100 ||
3191 (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3192 bus->boardinfo.type == 0x8B))
3193 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xA0);
3194 else
3195 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xB8);
3196 b43_phy_write(dev, B43_NPHY_MIMO_CRSTXEXT, 0xC8);
3197 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x50);
3198 b43_phy_write(dev, B43_NPHY_TXRIFS_FRDEL, 0x30);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3199
Rafał Miłeckiad9716e2010-01-17 13:03:40 +0100[diff] [blame]3200 b43_nphy_update_mimo_config(dev, nphy->preamble_override);
Rafał Miłecki4f4ab6c2010-01-17 13:03:55 +0100[diff] [blame]3201 b43_nphy_update_txrx_chain(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3202
3203 if (phy->rev < 2) {
3204 b43_phy_write(dev, B43_NPHY_DUP40_GFBL, 0xAA8);
3205 b43_phy_write(dev, B43_NPHY_DUP40_BL, 0x9A4);
3206 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3207
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3208 tmp2 = b43_current_band(dev->wl);
3209 if ((nphy->ipa2g_on && tmp2 == IEEE80211_BAND_2GHZ) ||
3210 (nphy->ipa5g_on && tmp2 == IEEE80211_BAND_5GHZ)) {
3211 b43_phy_set(dev, B43_NPHY_PAPD_EN0, 0x1);
3212 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ0, 0x007F,
3213 nphy->papd_epsilon_offset[0] << 7);
3214 b43_phy_set(dev, B43_NPHY_PAPD_EN1, 0x1);
3215 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ1, 0x007F,
3216 nphy->papd_epsilon_offset[1] << 7);
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]3217 b43_nphy_int_pa_set_tx_dig_filters(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3218 } else if (phy->rev >= 5) {
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]3219 b43_nphy_ext_pa_set_tx_dig_filters(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3220 }
3221
3222 b43_nphy_workarounds(dev);
3223
3224 /* Reset CCA, in init code it differs a little from standard way */
Rafał Miłecki730dd702010-01-15 16:38:07 +0100[diff] [blame]3225 b43_nphy_bmac_clock_fgc(dev, 1);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3226 tmp = b43_phy_read(dev, B43_NPHY_BBCFG);
3227 b43_phy_write(dev, B43_NPHY_BBCFG, tmp | B43_NPHY_BBCFG_RSTCCA);
3228 b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA);
Rafał Miłecki730dd702010-01-15 16:38:07 +0100[diff] [blame]3229 b43_nphy_bmac_clock_fgc(dev, 0);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3230
Gábor Stefanikd2730b22010-08-16 22:39:16 +0200[diff] [blame]3231 b43_nphy_mac_phy_clock_set(dev, true);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3232
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]3233 b43_nphy_pa_override(dev, false);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3234 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
3235 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]3236 b43_nphy_pa_override(dev, true);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3237
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]3238 b43_nphy_classifier(dev, 0, 0);
3239 b43_nphy_read_clip_detection(dev, clip);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3240 tx_pwr_state = nphy->txpwrctrl;
3241 /* TODO N PHY TX power control with argument 0
3242 (turning off power control) */
3243 /* TODO Fix the TX Power Settings */
3244 /* TODO N PHY TX Power Control Idle TSSI */
3245 /* TODO N PHY TX Power Control Setup */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3246
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3247 if (phy->rev >= 3) {
3248 /* TODO */
3249 } else {
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]3250 b43_ntab_write_bulk(dev, B43_NTAB32(26, 192), 128,
3251 b43_ntab_tx_gain_rev0_1_2);
3252 b43_ntab_write_bulk(dev, B43_NTAB32(27, 192), 128,
3253 b43_ntab_tx_gain_rev0_1_2);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3254 }
3255
3256 if (nphy->phyrxchain != 3)
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3257 b43_nphy_set_rx_core_state(dev, nphy->phyrxchain);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3258 if (nphy->mphase_cal_phase_id > 0)
3259 ;/* TODO PHY Periodic Calibration Multi-Phase Restart */
3260
3261 do_rssi_cal = false;
3262 if (phy->rev >= 3) {
3263 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3264 do_rssi_cal = !nphy->rssical_chanspec_2G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3265 else
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3266 do_rssi_cal = !nphy->rssical_chanspec_5G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3267
3268 if (do_rssi_cal)
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]3269 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3270 else
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]3271 b43_nphy_restore_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3272 } else {
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]3273 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3274 }
3275
3276 if (!((nphy->measure_hold & 0x6) != 0)) {
3277 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3278 do_cal = !nphy->iqcal_chanspec_2G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3279 else
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3280 do_cal = !nphy->iqcal_chanspec_5G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3281
3282 if (nphy->mute)
3283 do_cal = false;
3284
3285 if (do_cal) {
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]3286 target = b43_nphy_get_tx_gains(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3287
3288 if (nphy->antsel_type == 2)
Rafał Miłecki8987a9e2010-02-27 13:03:33 +0100[diff] [blame]3289 b43_nphy_superswitch_init(dev, true);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3290 if (nphy->perical != 2) {
Rafał Miłecki90b97382010-01-15 14:48:21 +0100[diff] [blame]3291 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3292 if (phy->rev >= 3) {
3293 nphy->cal_orig_pwr_idx[0] =
3294 nphy->txpwrindex[0].index_internal;
3295 nphy->cal_orig_pwr_idx[1] =
3296 nphy->txpwrindex[1].index_internal;
3297 /* TODO N PHY Pre Calibrate TX Gain */
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]3298 target = b43_nphy_get_tx_gains(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3299 }
3300 }
3301 }
3302 }
3303
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3304 if (!b43_nphy_cal_tx_iq_lo(dev, target, true, false)) {
3305 if (b43_nphy_cal_rx_iq(dev, target, 2, 0) == 0)
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]3306 b43_nphy_save_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3307 else if (nphy->mphase_cal_phase_id == 0)
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3308 ;/* N PHY Periodic Calibration with argument 3 */
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3309 } else {
3310 b43_nphy_restore_cal(dev);
3311 }
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3312
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]3313 b43_nphy_tx_pwr_ctrl_coef_setup(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3314 /* TODO N PHY TX Power Control Enable with argument tx_pwr_state */
3315 b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015);
3316 b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320);
3317 if (phy->rev >= 3 && phy->rev <= 6)
3318 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x0014);
Rafał Miłeckife3e46e2010-01-15 15:51:55 +0100[diff] [blame]3319 b43_nphy_tx_lp_fbw(dev);
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]3320 if (phy->rev >= 3)
3321 b43_nphy_spur_workaround(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3322
3323 b43err(dev->wl, "IEEE 802.11n devices are not supported, yet.\n");
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]3324 return 0;
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3325}
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3326
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3327/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ChanspecSetup */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3328static void b43_nphy_channel_setup(struct b43_wldev *dev,
Rafał Miłeckib15b3032010-03-29 00:53:13 +0200[diff] [blame]3329 const struct b43_phy_n_sfo_cfg *e,
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3330 struct ieee80211_channel *new_channel)
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3331{
3332 struct b43_phy *phy = &dev->phy;
3333 struct b43_phy_n *nphy = dev->phy.n;
3334
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3335 u16 old_band_5ghz;
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3336 u32 tmp32;
3337
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3338 old_band_5ghz =
3339 b43_phy_read(dev, B43_NPHY_BANDCTL) & B43_NPHY_BANDCTL_5GHZ;
3340 if (new_channel->band == IEEE80211_BAND_5GHZ && !old_band_5ghz) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3341 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3342 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
3343 b43_phy_set(dev, B43_PHY_B_BBCFG, 0xC000);
3344 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32);
3345 b43_phy_set(dev, B43_NPHY_BANDCTL, B43_NPHY_BANDCTL_5GHZ);
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3346 } else if (new_channel->band == IEEE80211_BAND_2GHZ && old_band_5ghz) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3347 b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ);
3348 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3349 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]3350 b43_phy_mask(dev, B43_PHY_B_BBCFG, 0x3FFF);
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3351 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32);
3352 }
3353
3354 b43_chantab_phy_upload(dev, e);
3355
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3356 if (new_channel->hw_value == 14) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3357 b43_nphy_classifier(dev, 2, 0);
3358 b43_phy_set(dev, B43_PHY_B_TEST, 0x0800);
3359 } else {
3360 b43_nphy_classifier(dev, 2, 2);
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3361 if (new_channel->band == IEEE80211_BAND_2GHZ)
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3362 b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840);
3363 }
3364
3365 if (nphy->txpwrctrl)
3366 b43_nphy_tx_power_fix(dev);
3367
3368 if (dev->phy.rev < 3)
3369 b43_nphy_adjust_lna_gain_table(dev);
3370
3371 b43_nphy_tx_lp_fbw(dev);
3372
3373 if (dev->phy.rev >= 3 && 0) {
3374 /* TODO */
3375 }
3376
3377 b43_phy_write(dev, B43_NPHY_NDATAT_DUP40, 0x3830);
3378
3379 if (phy->rev >= 3)
3380 b43_nphy_spur_workaround(dev);
3381}
3382
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3383/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetChanspec */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3384static int b43_nphy_set_channel(struct b43_wldev *dev,
3385 struct ieee80211_channel *channel,
3386 enum nl80211_channel_type channel_type)
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3387{
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3388 struct b43_phy *phy = &dev->phy;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3389 struct b43_phy_n *nphy = dev->phy.n;
3390
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3391 const struct b43_nphy_channeltab_entry_rev2 *tabent_r2;
3392 const struct b43_nphy_channeltab_entry_rev3 *tabent_r3;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3393
3394 u8 tmp;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3395
3396 if (dev->phy.rev >= 3) {
Rafał Miłeckif2a6d6a2010-10-11 03:19:22 +0200[diff] [blame]3397 tabent_r3 = b43_nphy_get_chantabent_rev3(dev,
3398 channel->center_freq);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3399 tabent_r3 = NULL;
3400 if (!tabent_r3)
3401 return -ESRCH;
Rafał Miłeckiffd2d9b2010-03-29 00:53:14 +0200[diff] [blame]3402 } else {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3403 tabent_r2 = b43_nphy_get_chantabent_rev2(dev,
3404 channel->hw_value);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3405 if (!tabent_r2)
Rafał Miłeckiffd2d9b2010-03-29 00:53:14 +0200[diff] [blame]3406 return -ESRCH;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3407 }
3408
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3409 /* Channel is set later in common code, but we need to set it on our
3410 own to let this function's subcalls work properly. */
3411 phy->channel = channel->hw_value;
3412 phy->channel_freq = channel->center_freq;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3413
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200[diff] [blame]3414 if (b43_channel_type_is_40mhz(phy->channel_type) !=
3415 b43_channel_type_is_40mhz(channel_type))
3416 ; /* TODO: BMAC BW Set (channel_type) */
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3417
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3418 if (channel_type == NL80211_CHAN_HT40PLUS)
3419 b43_phy_set(dev, B43_NPHY_RXCTL,
3420 B43_NPHY_RXCTL_BSELU20);
3421 else if (channel_type == NL80211_CHAN_HT40MINUS)
3422 b43_phy_mask(dev, B43_NPHY_RXCTL,
3423 ~B43_NPHY_RXCTL_BSELU20);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3424
3425 if (dev->phy.rev >= 3) {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3426 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 4 : 0;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3427 b43_radio_maskset(dev, 0x08, 0xFFFB, tmp);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3428 /* TODO: PHY Radio2056 Setup (dev, tabent_r3); */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3429 b43_nphy_channel_setup(dev, &(tabent_r3->phy_regs), channel);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3430 } else {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3431 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 0x0020 : 0x0050;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3432 b43_radio_maskset(dev, B2055_MASTER1, 0xFF8F, tmp);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3433 b43_radio_2055_setup(dev, tabent_r2);
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3434 b43_nphy_channel_setup(dev, &(tabent_r2->phy_regs), channel);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3435 }
3436
3437 return 0;
3438}
3439
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3440static int b43_nphy_op_allocate(struct b43_wldev *dev)
3441{
3442 struct b43_phy_n *nphy;
3443
3444 nphy = kzalloc(sizeof(*nphy), GFP_KERNEL);
3445 if (!nphy)
3446 return -ENOMEM;
3447 dev->phy.n = nphy;
3448
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3449 return 0;
3450}
3451
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3452static void b43_nphy_op_prepare_structs(struct b43_wldev *dev)
3453{
3454 struct b43_phy *phy = &dev->phy;
3455 struct b43_phy_n *nphy = phy->n;
3456
3457 memset(nphy, 0, sizeof(*nphy));
3458
3459 //TODO init struct b43_phy_n
3460}
3461
3462static void b43_nphy_op_free(struct b43_wldev *dev)
3463{
3464 struct b43_phy *phy = &dev->phy;
3465 struct b43_phy_n *nphy = phy->n;
3466
3467 kfree(nphy);
3468 phy->n = NULL;
3469}
3470
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3471static int b43_nphy_op_init(struct b43_wldev *dev)
3472{
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3473 return b43_phy_initn(dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3474}
3475
3476static inline void check_phyreg(struct b43_wldev *dev, u16 offset)
3477{
3478#if B43_DEBUG
3479 if ((offset & B43_PHYROUTE) == B43_PHYROUTE_OFDM_GPHY) {
3480 /* OFDM registers are onnly available on A/G-PHYs */
3481 b43err(dev->wl, "Invalid OFDM PHY access at "
3482 "0x%04X on N-PHY\n", offset);
3483 dump_stack();
3484 }
3485 if ((offset & B43_PHYROUTE) == B43_PHYROUTE_EXT_GPHY) {
3486 /* Ext-G registers are only available on G-PHYs */
3487 b43err(dev->wl, "Invalid EXT-G PHY access at "
3488 "0x%04X on N-PHY\n", offset);
3489 dump_stack();
3490 }
3491#endif /* B43_DEBUG */
3492}
3493
3494static u16 b43_nphy_op_read(struct b43_wldev *dev, u16 reg)
3495{
3496 check_phyreg(dev, reg);
3497 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
3498 return b43_read16(dev, B43_MMIO_PHY_DATA);
3499}
3500
3501static void b43_nphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
3502{
3503 check_phyreg(dev, reg);
3504 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
3505 b43_write16(dev, B43_MMIO_PHY_DATA, value);
3506}
3507
3508static u16 b43_nphy_op_radio_read(struct b43_wldev *dev, u16 reg)
3509{
3510 /* Register 1 is a 32-bit register. */
3511 B43_WARN_ON(reg == 1);
3512 /* N-PHY needs 0x100 for read access */
3513 reg |= 0x100;
3514
3515 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
3516 return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
3517}
3518
3519static void b43_nphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
3520{
3521 /* Register 1 is a 32-bit register. */
3522 B43_WARN_ON(reg == 1);
3523
3524 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
3525 b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
3526}
3527
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3528/* http://bcm-v4.sipsolutions.net/802.11/Radio/Switch%20Radio */
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3529static void b43_nphy_op_software_rfkill(struct b43_wldev *dev,
Johannes Berg19d337d2009-06-02 13:01:37 +0200[diff] [blame]3530 bool blocked)
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3531{
Rafał Miłeckid817f4e2010-03-29 00:53:12 +0200[diff] [blame]3532 struct b43_phy_n *nphy = dev->phy.n;
3533
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3534 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED)
3535 b43err(dev->wl, "MAC not suspended\n");
3536
3537 if (blocked) {
3538 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
3539 ~B43_NPHY_RFCTL_CMD_CHIP0PU);
3540 if (dev->phy.rev >= 3) {
3541 b43_radio_mask(dev, 0x09, ~0x2);
3542
3543 b43_radio_write(dev, 0x204D, 0);
3544 b43_radio_write(dev, 0x2053, 0);
3545 b43_radio_write(dev, 0x2058, 0);
3546 b43_radio_write(dev, 0x205E, 0);
3547 b43_radio_mask(dev, 0x2062, ~0xF0);
3548 b43_radio_write(dev, 0x2064, 0);
3549
3550 b43_radio_write(dev, 0x304D, 0);
3551 b43_radio_write(dev, 0x3053, 0);
3552 b43_radio_write(dev, 0x3058, 0);
3553 b43_radio_write(dev, 0x305E, 0);
3554 b43_radio_mask(dev, 0x3062, ~0xF0);
3555 b43_radio_write(dev, 0x3064, 0);
3556 }
3557 } else {
3558 if (dev->phy.rev >= 3) {
Rafał Miłeckid817f4e2010-03-29 00:53:12 +0200[diff] [blame]3559 b43_radio_init2056(dev);
Rafał Miłecki78159782010-10-06 07:50:08 +0200[diff] [blame]3560 b43_switch_channel(dev, dev->phy.channel);
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3561 } else {
3562 b43_radio_init2055(dev);
3563 }
3564 }
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3565}
3566
Michael Bueschcb24f572008-09-03 12:12:20 +0200[diff] [blame]3567static void b43_nphy_op_switch_analog(struct b43_wldev *dev, bool on)
3568{
3569 b43_phy_write(dev, B43_NPHY_AFECTL_OVER,
3570 on ? 0 : 0x7FFF);
3571}
3572
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3573static int b43_nphy_op_switch_channel(struct b43_wldev *dev,
3574 unsigned int new_channel)
3575{
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3576 struct ieee80211_channel *channel = dev->wl->hw->conf.channel;
3577 enum nl80211_channel_type channel_type = dev->wl->hw->conf.channel_type;
Rafał Miłecki5e7ee092010-10-06 07:50:06 +0200[diff] [blame]3578
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3579 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
3580 if ((new_channel < 1) || (new_channel > 14))
3581 return -EINVAL;
3582 } else {
3583 if (new_channel > 200)
3584 return -EINVAL;
3585 }
3586
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3587 return b43_nphy_set_channel(dev, channel, channel_type);
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3588}
3589
3590static unsigned int b43_nphy_op_get_default_chan(struct b43_wldev *dev)
3591{
3592 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3593 return 1;
3594 return 36;
3595}
3596
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3597const struct b43_phy_operations b43_phyops_n = {
3598 .allocate = b43_nphy_op_allocate,
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3599 .free = b43_nphy_op_free,
3600 .prepare_structs = b43_nphy_op_prepare_structs,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3601 .init = b43_nphy_op_init,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3602 .phy_read = b43_nphy_op_read,
3603 .phy_write = b43_nphy_op_write,
3604 .radio_read = b43_nphy_op_radio_read,
3605 .radio_write = b43_nphy_op_radio_write,
3606 .software_rfkill = b43_nphy_op_software_rfkill,
Michael Bueschcb24f572008-09-03 12:12:20 +0200[diff] [blame]3607 .switch_analog = b43_nphy_op_switch_analog,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3608 .switch_channel = b43_nphy_op_switch_channel,
3609 .get_default_chan = b43_nphy_op_get_default_chan,
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]3610 .recalc_txpower = b43_nphy_op_recalc_txpower,
3611 .adjust_txpower = b43_nphy_op_adjust_txpower,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3612};