Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 1 | /* |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 2 | * |
| 3 | * Copyright (C) 2007 Google, Inc. |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 4 | * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved. |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 5 | * |
| 6 | * This software is licensed under the terms of the GNU General Public |
| 7 | * License version 2, as published by the Free Software Foundation, and |
| 8 | * may be copied, distributed, and modified under those terms. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | |
Stephen Boyd | 4a18407 | 2011-11-08 10:34:04 -0800 | [diff] [blame] | 17 | #include <linux/clocksource.h> |
| 18 | #include <linux/clockchips.h> |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 19 | #include <linux/init.h> |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 20 | #include <linux/interrupt.h> |
| 21 | #include <linux/irq.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 22 | #include <linux/io.h> |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 23 | |
| 24 | #include <asm/mach/time.h> |
Stephen Boyd | ebf30dc | 2011-05-31 16:10:00 -0700 | [diff] [blame] | 25 | #include <asm/hardware/gic.h> |
Stephen Boyd | 4a18407 | 2011-11-08 10:34:04 -0800 | [diff] [blame] | 26 | #include <asm/localtimer.h> |
Stephen Boyd | ebf30dc | 2011-05-31 16:10:00 -0700 | [diff] [blame] | 27 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 28 | #include <mach/msm_iomap.h> |
David Brown | 8c27e6f | 2011-01-07 10:20:49 -0800 | [diff] [blame] | 29 | #include <mach/cpu.h> |
Stephen Boyd | 4a18407 | 2011-11-08 10:34:04 -0800 | [diff] [blame] | 30 | #include <mach/board.h> |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 31 | |
| 32 | #define TIMER_MATCH_VAL 0x0000 |
| 33 | #define TIMER_COUNT_VAL 0x0004 |
| 34 | #define TIMER_ENABLE 0x0008 |
Stephen Boyd | 4a18407 | 2011-11-08 10:34:04 -0800 | [diff] [blame] | 35 | #define TIMER_ENABLE_CLR_ON_MATCH_EN BIT(1) |
| 36 | #define TIMER_ENABLE_EN BIT(0) |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 37 | #define TIMER_CLEAR 0x000C |
Jeff Ohlstein | 672039f | 2010-10-05 15:23:57 -0700 | [diff] [blame] | 38 | #define DGT_CLK_CTL 0x0034 |
Stephen Boyd | 4a18407 | 2011-11-08 10:34:04 -0800 | [diff] [blame] | 39 | #define DGT_CLK_CTL_DIV_4 0x3 |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 40 | |
| 41 | #define GPT_HZ 32768 |
Jeff Ohlstein | 672039f | 2010-10-05 15:23:57 -0700 | [diff] [blame] | 42 | |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame^] | 43 | #define MSM_DGT_SHIFT 5 |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 44 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 45 | static void __iomem *event_base; |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 46 | |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 47 | static irqreturn_t msm_timer_interrupt(int irq, void *dev_id) |
| 48 | { |
Marc Zyngier | 28af690 | 2011-07-22 12:52:37 +0100 | [diff] [blame] | 49 | struct clock_event_device *evt = *(struct clock_event_device **)dev_id; |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 50 | if (evt->event_handler == NULL) |
| 51 | return IRQ_HANDLED; |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 52 | /* Stop the timer tick */ |
| 53 | if (evt->mode == CLOCK_EVT_MODE_ONESHOT) { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 54 | u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 55 | ctrl &= ~TIMER_ENABLE_EN; |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 56 | writel_relaxed(ctrl, event_base + TIMER_ENABLE); |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 57 | } |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 58 | evt->event_handler(evt); |
| 59 | return IRQ_HANDLED; |
| 60 | } |
| 61 | |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 62 | static int msm_timer_set_next_event(unsigned long cycles, |
| 63 | struct clock_event_device *evt) |
| 64 | { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 65 | u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 66 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 67 | writel_relaxed(0, event_base + TIMER_CLEAR); |
| 68 | writel_relaxed(cycles, event_base + TIMER_MATCH_VAL); |
| 69 | writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 70 | return 0; |
| 71 | } |
| 72 | |
| 73 | static void msm_timer_set_mode(enum clock_event_mode mode, |
| 74 | struct clock_event_device *evt) |
| 75 | { |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 76 | u32 ctrl; |
| 77 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 78 | ctrl = readl_relaxed(event_base + TIMER_ENABLE); |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 79 | ctrl &= ~(TIMER_ENABLE_EN | TIMER_ENABLE_CLR_ON_MATCH_EN); |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 80 | |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 81 | switch (mode) { |
| 82 | case CLOCK_EVT_MODE_RESUME: |
| 83 | case CLOCK_EVT_MODE_PERIODIC: |
| 84 | break; |
| 85 | case CLOCK_EVT_MODE_ONESHOT: |
Stephen Boyd | a850c3f | 2011-11-08 10:34:06 -0800 | [diff] [blame] | 86 | /* Timer is enabled in set_next_event */ |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 87 | break; |
| 88 | case CLOCK_EVT_MODE_UNUSED: |
| 89 | case CLOCK_EVT_MODE_SHUTDOWN: |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 90 | break; |
| 91 | } |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 92 | writel_relaxed(ctrl, event_base + TIMER_ENABLE); |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 93 | } |
| 94 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 95 | static struct clock_event_device msm_clockevent = { |
| 96 | .name = "gp_timer", |
| 97 | .features = CLOCK_EVT_FEAT_ONESHOT, |
| 98 | .shift = 32, |
| 99 | .rating = 200, |
| 100 | .set_next_event = msm_timer_set_next_event, |
| 101 | .set_mode = msm_timer_set_mode, |
| 102 | }; |
| 103 | |
| 104 | static union { |
| 105 | struct clock_event_device *evt; |
| 106 | struct clock_event_device __percpu **percpu_evt; |
| 107 | } msm_evt; |
| 108 | |
| 109 | static void __iomem *source_base; |
| 110 | |
| 111 | static cycle_t msm_read_timer_count(struct clocksource *cs) |
| 112 | { |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame^] | 113 | return readl_relaxed(source_base + TIMER_COUNT_VAL); |
| 114 | } |
| 115 | |
| 116 | static cycle_t msm_read_timer_count_shift(struct clocksource *cs) |
| 117 | { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 118 | /* |
| 119 | * Shift timer count down by a constant due to unreliable lower bits |
| 120 | * on some targets. |
| 121 | */ |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame^] | 122 | return msm_read_timer_count(cs) >> MSM_DGT_SHIFT; |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 123 | } |
| 124 | |
| 125 | static struct clocksource msm_clocksource = { |
| 126 | .name = "dg_timer", |
| 127 | .rating = 300, |
| 128 | .read = msm_read_timer_count, |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame^] | 129 | .mask = CLOCKSOURCE_MASK(32), |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 130 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 131 | }; |
| 132 | |
| 133 | static void __init msm_timer_init(void) |
| 134 | { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 135 | struct clock_event_device *ce = &msm_clockevent; |
| 136 | struct clocksource *cs = &msm_clocksource; |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 137 | int res; |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame^] | 138 | u32 dgt_hz; |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 139 | |
David Brown | 8c27e6f | 2011-01-07 10:20:49 -0800 | [diff] [blame] | 140 | if (cpu_is_msm7x01()) { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 141 | event_base = MSM_CSR_BASE; |
| 142 | source_base = MSM_CSR_BASE + 0x10; |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame^] | 143 | dgt_hz = 19200000 >> MSM_DGT_SHIFT; /* 600 KHz */ |
| 144 | cs->read = msm_read_timer_count_shift; |
| 145 | cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)); |
David Brown | 8c27e6f | 2011-01-07 10:20:49 -0800 | [diff] [blame] | 146 | } else if (cpu_is_msm7x30()) { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 147 | event_base = MSM_CSR_BASE + 0x04; |
| 148 | source_base = MSM_CSR_BASE + 0x24; |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame^] | 149 | dgt_hz = 24576000 / 4; |
David Brown | 8c27e6f | 2011-01-07 10:20:49 -0800 | [diff] [blame] | 150 | } else if (cpu_is_qsd8x50()) { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 151 | event_base = MSM_CSR_BASE; |
| 152 | source_base = MSM_CSR_BASE + 0x10; |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame^] | 153 | dgt_hz = 19200000 / 4; |
Stepan Moskovchenko | a81c8c3 | 2010-12-01 19:25:14 -0800 | [diff] [blame] | 154 | } else if (cpu_is_msm8x60() || cpu_is_msm8960()) { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 155 | event_base = MSM_TMR_BASE + 0x04; |
| 156 | /* Use CPU0's timer as the global clock source. */ |
| 157 | source_base = MSM_TMR0_BASE + 0x24; |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame^] | 158 | dgt_hz = 27000000 / 4; |
| 159 | writel_relaxed(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL); |
David Brown | 8c27e6f | 2011-01-07 10:20:49 -0800 | [diff] [blame] | 160 | } else |
| 161 | BUG(); |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 162 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 163 | writel_relaxed(0, event_base + TIMER_ENABLE); |
| 164 | writel_relaxed(0, event_base + TIMER_CLEAR); |
| 165 | writel_relaxed(~0, event_base + TIMER_MATCH_VAL); |
| 166 | ce->mult = div_sc(GPT_HZ, NSEC_PER_SEC, ce->shift); |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 167 | /* |
| 168 | * allow at least 10 seconds to notice that the timer |
| 169 | * wrapped |
| 170 | */ |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 171 | ce->max_delta_ns = clockevent_delta2ns(0xf0000000, ce); |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 172 | /* 4 gets rounded down to 3 */ |
| 173 | ce->min_delta_ns = clockevent_delta2ns(4, ce); |
| 174 | ce->cpumask = cpumask_of(0); |
David Brown | 8c27e6f | 2011-01-07 10:20:49 -0800 | [diff] [blame] | 175 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 176 | ce->irq = INT_GP_TIMER_EXP; |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 177 | if (cpu_is_msm8x60() || cpu_is_msm8960()) { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 178 | msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *); |
| 179 | if (!msm_evt.percpu_evt) { |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 180 | pr_err("memory allocation failed for %s\n", ce->name); |
| 181 | goto err; |
Marc Zyngier | 28af690 | 2011-07-22 12:52:37 +0100 | [diff] [blame] | 182 | } |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 183 | *__this_cpu_ptr(msm_evt.percpu_evt) = ce; |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 184 | res = request_percpu_irq(ce->irq, msm_timer_interrupt, |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 185 | ce->name, msm_evt.percpu_evt); |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 186 | if (!res) |
| 187 | enable_percpu_irq(ce->irq, 0); |
| 188 | } else { |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 189 | msm_evt.evt = ce; |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 190 | res = request_irq(ce->irq, msm_timer_interrupt, |
| 191 | IRQF_TIMER | IRQF_NOBALANCING | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 192 | IRQF_TRIGGER_RISING, ce->name, &msm_evt.evt); |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 193 | } |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 194 | |
| 195 | if (res) |
| 196 | pr_err("request_irq failed for %s\n", ce->name); |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 197 | clockevents_register_device(ce); |
| 198 | err: |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 199 | writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE); |
Stephen Boyd | 2081a6b | 2011-11-08 10:34:08 -0800 | [diff] [blame^] | 200 | res = clocksource_register_hz(cs, dgt_hz); |
Stephen Boyd | dd15ab8 | 2011-11-08 10:34:05 -0800 | [diff] [blame] | 201 | if (res) |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 202 | pr_err("clocksource_register failed\n"); |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 203 | } |
| 204 | |
Stephen Boyd | 2852cca | 2011-11-08 10:34:03 -0800 | [diff] [blame] | 205 | #ifdef CONFIG_LOCAL_TIMERS |
Santosh Shilimkar | af90f10 | 2011-02-23 18:53:15 +0100 | [diff] [blame] | 206 | int __cpuinit local_timer_setup(struct clock_event_device *evt) |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 207 | { |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 208 | /* Use existing clock_event for cpu 0 */ |
| 209 | if (!smp_processor_id()) |
David Brown | 893b66c | 2011-03-30 11:26:57 -0700 | [diff] [blame] | 210 | return 0; |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 211 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 212 | writel_relaxed(0, event_base + TIMER_ENABLE); |
| 213 | writel_relaxed(0, event_base + TIMER_CLEAR); |
| 214 | writel_relaxed(~0, event_base + TIMER_MATCH_VAL); |
| 215 | evt->irq = msm_clockevent.irq; |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 216 | evt->name = "local_timer"; |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 217 | evt->features = msm_clockevent.features; |
| 218 | evt->rating = msm_clockevent.rating; |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 219 | evt->set_mode = msm_timer_set_mode; |
| 220 | evt->set_next_event = msm_timer_set_next_event; |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 221 | evt->shift = msm_clockevent.shift; |
| 222 | evt->mult = div_sc(GPT_HZ, NSEC_PER_SEC, evt->shift); |
| 223 | evt->max_delta_ns = clockevent_delta2ns(0xf0000000, evt); |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 224 | evt->min_delta_ns = clockevent_delta2ns(4, evt); |
| 225 | |
Stephen Boyd | 2a00c10 | 2011-11-08 10:34:07 -0800 | [diff] [blame] | 226 | *__this_cpu_ptr(msm_evt.percpu_evt) = evt; |
Marc Zyngier | 28af690 | 2011-07-22 12:52:37 +0100 | [diff] [blame] | 227 | enable_percpu_irq(evt->irq, 0); |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 228 | clockevents_register_device(evt); |
Santosh Shilimkar | af90f10 | 2011-02-23 18:53:15 +0100 | [diff] [blame] | 229 | return 0; |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 230 | } |
| 231 | |
Marc Zyngier | 28af690 | 2011-07-22 12:52:37 +0100 | [diff] [blame] | 232 | void local_timer_stop(struct clock_event_device *evt) |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 233 | { |
Marc Zyngier | 28af690 | 2011-07-22 12:52:37 +0100 | [diff] [blame] | 234 | evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); |
| 235 | disable_percpu_irq(evt->irq); |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 236 | } |
Stephen Boyd | 2852cca | 2011-11-08 10:34:03 -0800 | [diff] [blame] | 237 | #endif /* CONFIG_LOCAL_TIMERS */ |
Jeff Ohlstein | 94790ec | 2010-12-02 12:05:12 -0800 | [diff] [blame] | 238 | |
Arve Hjønnevåg | 3e4ea37 | 2007-11-26 04:11:58 -0800 | [diff] [blame] | 239 | struct sys_timer msm_timer = { |
| 240 | .init = msm_timer_init |
| 241 | }; |