blob: 8900ea784817a66d12300f844a162026580e42c0 [file] [log] [blame]
Deepak Saxena8ae6e162006-06-25 05:47:38 -07001/*
2 * drivers/rtc/rtc-pl031.c
3 *
4 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
5 *
6 * Author: Deepak Saxena <dsaxena@plexity.net>
7 *
8 * Copyright 2006 (c) MontaVista Software, Inc.
9 *
Linus Walleijc72881e2010-02-04 12:50:13 +010010 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
11 * Copyright 2010 (c) ST-Ericsson AB
12 *
Deepak Saxena8ae6e162006-06-25 05:47:38 -070013 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
17 */
Deepak Saxena8ae6e162006-06-25 05:47:38 -070018#include <linux/module.h>
19#include <linux/rtc.h>
20#include <linux/init.h>
Deepak Saxena8ae6e162006-06-25 05:47:38 -070021#include <linux/interrupt.h>
Deepak Saxena8ae6e162006-06-25 05:47:38 -070022#include <linux/amba/bus.h>
Russell King2dba8512008-04-20 12:08:04 +010023#include <linux/io.h>
Linus Walleijc72881e2010-02-04 12:50:13 +010024#include <linux/bcd.h>
25#include <linux/delay.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090026#include <linux/slab.h>
Deepak Saxena8ae6e162006-06-25 05:47:38 -070027
28/*
29 * Register definitions
30 */
31#define RTC_DR 0x00 /* Data read register */
32#define RTC_MR 0x04 /* Match register */
33#define RTC_LR 0x08 /* Data load register */
34#define RTC_CR 0x0c /* Control register */
35#define RTC_IMSC 0x10 /* Interrupt mask and set register */
36#define RTC_RIS 0x14 /* Raw interrupt status register */
37#define RTC_MIS 0x18 /* Masked interrupt status register */
38#define RTC_ICR 0x1c /* Interrupt clear register */
Linus Walleijc72881e2010-02-04 12:50:13 +010039/* ST variants have additional timer functionality */
40#define RTC_TDR 0x20 /* Timer data read register */
41#define RTC_TLR 0x24 /* Timer data load register */
42#define RTC_TCR 0x28 /* Timer control register */
43#define RTC_YDR 0x30 /* Year data read register */
44#define RTC_YMR 0x34 /* Year match register */
45#define RTC_YLR 0x38 /* Year data load register */
46
Haojian Zhuange7e034e12013-02-04 14:28:54 -080047#define RTC_CR_EN (1 << 0) /* counter enable bit */
Linus Walleijc72881e2010-02-04 12:50:13 +010048#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
49
50#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
51
52/* Common bit definitions for Interrupt status and control registers */
53#define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
54#define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
55
56/* Common bit definations for ST v2 for reading/writing time */
57#define RTC_SEC_SHIFT 0
58#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
59#define RTC_MIN_SHIFT 6
60#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
61#define RTC_HOUR_SHIFT 12
62#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
63#define RTC_WDAY_SHIFT 17
64#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
65#define RTC_MDAY_SHIFT 20
66#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
67#define RTC_MON_SHIFT 25
68#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
69
70#define RTC_TIMER_FREQ 32768
Deepak Saxena8ae6e162006-06-25 05:47:38 -070071
Linus Walleijaff05ed2012-07-30 14:41:34 -070072/**
73 * struct pl031_vendor_data - per-vendor variations
74 * @ops: the vendor-specific operations used on this silicon version
Linus Walleij1bb457f2012-07-30 14:41:36 -070075 * @clockwatch: if this is an ST Microelectronics silicon version with a
76 * clockwatch function
77 * @st_weekday: if this is an ST Microelectronics silicon version that need
78 * the weekday fix
Mattias Wallin559a6fc2012-07-30 14:41:39 -070079 * @irqflags: special IRQ flags per variant
Linus Walleijaff05ed2012-07-30 14:41:34 -070080 */
81struct pl031_vendor_data {
82 struct rtc_class_ops ops;
Linus Walleij1bb457f2012-07-30 14:41:36 -070083 bool clockwatch;
84 bool st_weekday;
Mattias Wallin559a6fc2012-07-30 14:41:39 -070085 unsigned long irqflags;
Linus Walleijaff05ed2012-07-30 14:41:34 -070086};
87
Deepak Saxena8ae6e162006-06-25 05:47:38 -070088struct pl031_local {
Linus Walleijaff05ed2012-07-30 14:41:34 -070089 struct pl031_vendor_data *vendor;
Deepak Saxena8ae6e162006-06-25 05:47:38 -070090 struct rtc_device *rtc;
91 void __iomem *base;
92};
93
Linus Walleijc72881e2010-02-04 12:50:13 +010094static int pl031_alarm_irq_enable(struct device *dev,
95 unsigned int enabled)
Deepak Saxena8ae6e162006-06-25 05:47:38 -070096{
Linus Walleijc72881e2010-02-04 12:50:13 +010097 struct pl031_local *ldata = dev_get_drvdata(dev);
98 unsigned long imsc;
Deepak Saxena8ae6e162006-06-25 05:47:38 -070099
Linus Walleijc72881e2010-02-04 12:50:13 +0100100 /* Clear any pending alarm interrupts. */
101 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700102
Linus Walleijc72881e2010-02-04 12:50:13 +0100103 imsc = readl(ldata->base + RTC_IMSC);
104
105 if (enabled == 1)
106 writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
107 else
108 writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
109
110 return 0;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700111}
112
Linus Walleijc72881e2010-02-04 12:50:13 +0100113/*
114 * Convert Gregorian date to ST v2 RTC format.
115 */
116static int pl031_stv2_tm_to_time(struct device *dev,
117 struct rtc_time *tm, unsigned long *st_time,
118 unsigned long *bcd_year)
119{
120 int year = tm->tm_year + 1900;
121 int wday = tm->tm_wday;
122
123 /* wday masking is not working in hardware so wday must be valid */
124 if (wday < -1 || wday > 6) {
125 dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
126 return -EINVAL;
127 } else if (wday == -1) {
128 /* wday is not provided, calculate it here */
129 unsigned long time;
130 struct rtc_time calc_tm;
131
132 rtc_tm_to_time(tm, &time);
133 rtc_time_to_tm(time, &calc_tm);
134 wday = calc_tm.tm_wday;
135 }
136
137 *bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
138
139 *st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
140 | (tm->tm_mday << RTC_MDAY_SHIFT)
141 | ((wday + 1) << RTC_WDAY_SHIFT)
142 | (tm->tm_hour << RTC_HOUR_SHIFT)
143 | (tm->tm_min << RTC_MIN_SHIFT)
144 | (tm->tm_sec << RTC_SEC_SHIFT);
145
146 return 0;
147}
148
149/*
150 * Convert ST v2 RTC format to Gregorian date.
151 */
152static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
153 struct rtc_time *tm)
154{
155 tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
156 tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
157 tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
158 tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
159 tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
160 tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
161 tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
162
163 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
164 tm->tm_year -= 1900;
165
166 return 0;
167}
168
169static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700170{
171 struct pl031_local *ldata = dev_get_drvdata(dev);
172
Linus Walleijc72881e2010-02-04 12:50:13 +0100173 pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
174 readl(ldata->base + RTC_YDR), tm);
175
176 return 0;
177}
178
179static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
180{
181 unsigned long time;
182 unsigned long bcd_year;
183 struct pl031_local *ldata = dev_get_drvdata(dev);
184 int ret;
185
186 ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
187 if (ret == 0) {
188 writel(bcd_year, ldata->base + RTC_YLR);
189 writel(time, ldata->base + RTC_LR);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700190 }
191
Linus Walleijc72881e2010-02-04 12:50:13 +0100192 return ret;
193}
194
195static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
196{
197 struct pl031_local *ldata = dev_get_drvdata(dev);
198 int ret;
199
200 ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
201 readl(ldata->base + RTC_YMR), &alarm->time);
202
203 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
204 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
205
206 return ret;
207}
208
209static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
210{
211 struct pl031_local *ldata = dev_get_drvdata(dev);
212 unsigned long time;
213 unsigned long bcd_year;
214 int ret;
215
216 /* At the moment, we can only deal with non-wildcarded alarm times. */
217 ret = rtc_valid_tm(&alarm->time);
218 if (ret == 0) {
219 ret = pl031_stv2_tm_to_time(dev, &alarm->time,
220 &time, &bcd_year);
221 if (ret == 0) {
222 writel(bcd_year, ldata->base + RTC_YMR);
223 writel(time, ldata->base + RTC_MR);
224
225 pl031_alarm_irq_enable(dev, alarm->enabled);
226 }
227 }
228
229 return ret;
230}
231
232static irqreturn_t pl031_interrupt(int irq, void *dev_id)
233{
234 struct pl031_local *ldata = dev_id;
235 unsigned long rtcmis;
236 unsigned long events = 0;
237
238 rtcmis = readl(ldata->base + RTC_MIS);
Rajkumar Kasirajanac2dee52012-05-29 15:07:40 -0700239 if (rtcmis & RTC_BIT_AI) {
240 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
241 events |= (RTC_AF | RTC_IRQF);
Linus Walleijc72881e2010-02-04 12:50:13 +0100242 rtc_update_irq(ldata->rtc, 1, events);
243
244 return IRQ_HANDLED;
245 }
246
247 return IRQ_NONE;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700248}
249
250static int pl031_read_time(struct device *dev, struct rtc_time *tm)
251{
252 struct pl031_local *ldata = dev_get_drvdata(dev);
253
Linus Walleij2934d6a2009-12-15 16:46:13 -0800254 rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700255
256 return 0;
257}
258
259static int pl031_set_time(struct device *dev, struct rtc_time *tm)
260{
261 unsigned long time;
262 struct pl031_local *ldata = dev_get_drvdata(dev);
Linus Walleijc72881e2010-02-04 12:50:13 +0100263 int ret;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700264
Linus Walleijc72881e2010-02-04 12:50:13 +0100265 ret = rtc_tm_to_time(tm, &time);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700266
Linus Walleijc72881e2010-02-04 12:50:13 +0100267 if (ret == 0)
268 writel(time, ldata->base + RTC_LR);
269
270 return ret;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700271}
272
273static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
274{
275 struct pl031_local *ldata = dev_get_drvdata(dev);
276
Linus Walleij2934d6a2009-12-15 16:46:13 -0800277 rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
Linus Walleijc72881e2010-02-04 12:50:13 +0100278
279 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
280 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700281
282 return 0;
283}
284
285static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
286{
287 struct pl031_local *ldata = dev_get_drvdata(dev);
288 unsigned long time;
Linus Walleijc72881e2010-02-04 12:50:13 +0100289 int ret;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700290
Linus Walleijc72881e2010-02-04 12:50:13 +0100291 /* At the moment, we can only deal with non-wildcarded alarm times. */
292 ret = rtc_valid_tm(&alarm->time);
293 if (ret == 0) {
294 ret = rtc_tm_to_time(&alarm->time, &time);
295 if (ret == 0) {
296 writel(time, ldata->base + RTC_MR);
297 pl031_alarm_irq_enable(dev, alarm->enabled);
298 }
299 }
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700300
Linus Walleijc72881e2010-02-04 12:50:13 +0100301 return ret;
302}
303
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700304static int pl031_remove(struct amba_device *adev)
305{
306 struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
307
Russell King2dba8512008-04-20 12:08:04 +0100308 amba_set_drvdata(adev, NULL);
309 free_irq(adev->irq[0], ldata->rtc);
310 rtc_device_unregister(ldata->rtc);
311 iounmap(ldata->base);
312 kfree(ldata);
313 amba_release_regions(adev);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700314
315 return 0;
316}
317
Russell Kingaa25afa2011-02-19 15:55:00 +0000318static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700319{
320 int ret;
321 struct pl031_local *ldata;
Linus Walleijaff05ed2012-07-30 14:41:34 -0700322 struct pl031_vendor_data *vendor = id->data;
323 struct rtc_class_ops *ops = &vendor->ops;
Haojian Zhuange7e034e12013-02-04 14:28:54 -0800324 unsigned long time, data;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700325
Russell King2dba8512008-04-20 12:08:04 +0100326 ret = amba_request_regions(adev, NULL);
327 if (ret)
328 goto err_req;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700329
Linus Walleijc72881e2010-02-04 12:50:13 +0100330 ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700331 if (!ldata) {
332 ret = -ENOMEM;
333 goto out;
334 }
Linus Walleijaff05ed2012-07-30 14:41:34 -0700335 ldata->vendor = vendor;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700336
Linus Walleijdc890c22009-06-07 23:27:31 +0100337 ldata->base = ioremap(adev->res.start, resource_size(&adev->res));
Linus Walleijc72881e2010-02-04 12:50:13 +0100338
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700339 if (!ldata->base) {
340 ret = -ENOMEM;
341 goto out_no_remap;
342 }
343
Russell King2dba8512008-04-20 12:08:04 +0100344 amba_set_drvdata(adev, ldata);
345
Linus Walleij1bb457f2012-07-30 14:41:36 -0700346 dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev));
347 dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev));
Linus Walleijc72881e2010-02-04 12:50:13 +0100348
Haojian Zhuange7e034e12013-02-04 14:28:54 -0800349 data = readl(ldata->base + RTC_CR);
Linus Walleijc72881e2010-02-04 12:50:13 +0100350 /* Enable the clockwatch on ST Variants */
Linus Walleij1bb457f2012-07-30 14:41:36 -0700351 if (vendor->clockwatch)
Haojian Zhuange7e034e12013-02-04 14:28:54 -0800352 data |= RTC_CR_CWEN;
Linus Walleij3399cfb2013-02-12 13:46:19 -0800353 else
354 data |= RTC_CR_EN;
355 writel(data, ldata->base + RTC_CR);
Linus Walleijc72881e2010-02-04 12:50:13 +0100356
Rajkumar Kasirajanc0a5f4a2012-05-17 17:03:24 -0700357 /*
358 * On ST PL031 variants, the RTC reset value does not provide correct
359 * weekday for 2000-01-01. Correct the erroneous sunday to saturday.
360 */
Linus Walleij1bb457f2012-07-30 14:41:36 -0700361 if (vendor->st_weekday) {
Rajkumar Kasirajanc0a5f4a2012-05-17 17:03:24 -0700362 if (readl(ldata->base + RTC_YDR) == 0x2000) {
363 time = readl(ldata->base + RTC_DR);
364 if ((time &
365 (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK))
366 == 0x02120000) {
367 time = time | (0x7 << RTC_WDAY_SHIFT);
368 writel(0x2000, ldata->base + RTC_YLR);
369 writel(time, ldata->base + RTC_LR);
370 }
371 }
372 }
373
Linus Walleijc72881e2010-02-04 12:50:13 +0100374 ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
375 THIS_MODULE);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700376 if (IS_ERR(ldata->rtc)) {
377 ret = PTR_ERR(ldata->rtc);
378 goto out_no_rtc;
379 }
380
Linus Walleijc72881e2010-02-04 12:50:13 +0100381 if (request_irq(adev->irq[0], pl031_interrupt,
Mattias Wallin559a6fc2012-07-30 14:41:39 -0700382 vendor->irqflags, "rtc-pl031", ldata)) {
Linus Walleijc72881e2010-02-04 12:50:13 +0100383 ret = -EIO;
384 goto out_no_irq;
385 }
386
Rob Herringb06eef42013-02-21 16:44:54 -0800387 device_init_wakeup(&adev->dev, 1);
388
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700389 return 0;
390
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700391out_no_irq:
Linus Walleijc72881e2010-02-04 12:50:13 +0100392 rtc_device_unregister(ldata->rtc);
393out_no_rtc:
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700394 iounmap(ldata->base);
Russell King2dba8512008-04-20 12:08:04 +0100395 amba_set_drvdata(adev, NULL);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700396out_no_remap:
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700397 kfree(ldata);
398out:
Russell King2dba8512008-04-20 12:08:04 +0100399 amba_release_regions(adev);
400err_req:
Linus Walleijc72881e2010-02-04 12:50:13 +0100401
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700402 return ret;
403}
404
Linus Walleijc72881e2010-02-04 12:50:13 +0100405/* Operations for the original ARM version */
Linus Walleijaff05ed2012-07-30 14:41:34 -0700406static struct pl031_vendor_data arm_pl031 = {
407 .ops = {
408 .read_time = pl031_read_time,
409 .set_time = pl031_set_time,
410 .read_alarm = pl031_read_alarm,
411 .set_alarm = pl031_set_alarm,
412 .alarm_irq_enable = pl031_alarm_irq_enable,
413 },
Mattias Wallin559a6fc2012-07-30 14:41:39 -0700414 .irqflags = IRQF_NO_SUSPEND,
Linus Walleijc72881e2010-02-04 12:50:13 +0100415};
416
417/* The First ST derivative */
Linus Walleijaff05ed2012-07-30 14:41:34 -0700418static struct pl031_vendor_data stv1_pl031 = {
419 .ops = {
420 .read_time = pl031_read_time,
421 .set_time = pl031_set_time,
422 .read_alarm = pl031_read_alarm,
423 .set_alarm = pl031_set_alarm,
424 .alarm_irq_enable = pl031_alarm_irq_enable,
425 },
Linus Walleij1bb457f2012-07-30 14:41:36 -0700426 .clockwatch = true,
427 .st_weekday = true,
Mattias Wallin559a6fc2012-07-30 14:41:39 -0700428 .irqflags = IRQF_NO_SUSPEND,
Linus Walleijc72881e2010-02-04 12:50:13 +0100429};
430
431/* And the second ST derivative */
Linus Walleijaff05ed2012-07-30 14:41:34 -0700432static struct pl031_vendor_data stv2_pl031 = {
433 .ops = {
434 .read_time = pl031_stv2_read_time,
435 .set_time = pl031_stv2_set_time,
436 .read_alarm = pl031_stv2_read_alarm,
437 .set_alarm = pl031_stv2_set_alarm,
438 .alarm_irq_enable = pl031_alarm_irq_enable,
439 },
Linus Walleij1bb457f2012-07-30 14:41:36 -0700440 .clockwatch = true,
441 .st_weekday = true,
Mattias Wallin559a6fc2012-07-30 14:41:39 -0700442 /*
443 * This variant shares the IRQ with another block and must not
444 * suspend that IRQ line.
445 */
446 .irqflags = IRQF_SHARED | IRQF_NO_SUSPEND,
Linus Walleijc72881e2010-02-04 12:50:13 +0100447};
448
Russell King2c39c9e2010-07-27 08:50:16 +0100449static struct amba_id pl031_ids[] = {
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700450 {
Linus Walleij2934d6a2009-12-15 16:46:13 -0800451 .id = 0x00041031,
452 .mask = 0x000fffff,
Linus Walleijaff05ed2012-07-30 14:41:34 -0700453 .data = &arm_pl031,
Linus Walleijc72881e2010-02-04 12:50:13 +0100454 },
455 /* ST Micro variants */
456 {
457 .id = 0x00180031,
458 .mask = 0x00ffffff,
Linus Walleijaff05ed2012-07-30 14:41:34 -0700459 .data = &stv1_pl031,
Linus Walleijc72881e2010-02-04 12:50:13 +0100460 },
461 {
462 .id = 0x00280031,
463 .mask = 0x00ffffff,
Linus Walleijaff05ed2012-07-30 14:41:34 -0700464 .data = &stv2_pl031,
Linus Walleij2934d6a2009-12-15 16:46:13 -0800465 },
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700466 {0, 0},
467};
468
Dave Martinf5feac22011-10-05 15:15:22 +0100469MODULE_DEVICE_TABLE(amba, pl031_ids);
470
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700471static struct amba_driver pl031_driver = {
472 .drv = {
473 .name = "rtc-pl031",
474 },
475 .id_table = pl031_ids,
476 .probe = pl031_probe,
477 .remove = pl031_remove,
478};
479
viresh kumar9e5ed092012-03-15 10:40:38 +0100480module_amba_driver(pl031_driver);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700481
482MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net");
483MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
484MODULE_LICENSE("GPL");