Robert P. J. Day | 96532ba | 2008-02-03 15:06:26 +0200 | [diff] [blame] | 1 | #ifndef _LINUX_DMA_MAPPING_H |
| 2 | #define _LINUX_DMA_MAPPING_H |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 4 | #include <linux/string.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | #include <linux/device.h> |
| 6 | #include <linux/err.h> |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 7 | #include <linux/dma-attrs.h> |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 8 | #include <linux/dma-direction.h> |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 9 | #include <linux/scatterlist.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 11 | struct dma_map_ops { |
Marek Szyprowski | 613c457 | 2012-03-28 16:36:27 +0200 | [diff] [blame] | 12 | void* (*alloc)(struct device *dev, size_t size, |
| 13 | dma_addr_t *dma_handle, gfp_t gfp, |
| 14 | struct dma_attrs *attrs); |
| 15 | void (*free)(struct device *dev, size_t size, |
| 16 | void *vaddr, dma_addr_t dma_handle, |
| 17 | struct dma_attrs *attrs); |
Marek Szyprowski | 9adc537 | 2011-12-21 16:55:33 +0100 | [diff] [blame] | 18 | int (*mmap)(struct device *, struct vm_area_struct *, |
| 19 | void *, dma_addr_t, size_t, struct dma_attrs *attrs); |
| 20 | |
Marek Szyprowski | d2b7428 | 2012-06-13 10:05:52 +0200 | [diff] [blame] | 21 | int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *, |
| 22 | dma_addr_t, size_t, struct dma_attrs *attrs); |
| 23 | |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 24 | dma_addr_t (*map_page)(struct device *dev, struct page *page, |
| 25 | unsigned long offset, size_t size, |
| 26 | enum dma_data_direction dir, |
| 27 | struct dma_attrs *attrs); |
| 28 | void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, |
| 29 | size_t size, enum dma_data_direction dir, |
| 30 | struct dma_attrs *attrs); |
| 31 | int (*map_sg)(struct device *dev, struct scatterlist *sg, |
| 32 | int nents, enum dma_data_direction dir, |
| 33 | struct dma_attrs *attrs); |
| 34 | void (*unmap_sg)(struct device *dev, |
| 35 | struct scatterlist *sg, int nents, |
| 36 | enum dma_data_direction dir, |
| 37 | struct dma_attrs *attrs); |
| 38 | void (*sync_single_for_cpu)(struct device *dev, |
| 39 | dma_addr_t dma_handle, size_t size, |
| 40 | enum dma_data_direction dir); |
| 41 | void (*sync_single_for_device)(struct device *dev, |
| 42 | dma_addr_t dma_handle, size_t size, |
| 43 | enum dma_data_direction dir); |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 44 | void (*sync_sg_for_cpu)(struct device *dev, |
| 45 | struct scatterlist *sg, int nents, |
| 46 | enum dma_data_direction dir); |
| 47 | void (*sync_sg_for_device)(struct device *dev, |
| 48 | struct scatterlist *sg, int nents, |
| 49 | enum dma_data_direction dir); |
| 50 | int (*mapping_error)(struct device *dev, dma_addr_t dma_addr); |
| 51 | int (*dma_supported)(struct device *dev, u64 mask); |
FUJITA Tomonori | f726f30e | 2009-08-04 19:08:24 +0000 | [diff] [blame] | 52 | int (*set_dma_mask)(struct device *dev, u64 mask); |
Milton Miller | 3a8f755 | 2011-06-24 09:05:23 +0000 | [diff] [blame] | 53 | #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK |
| 54 | u64 (*get_required_mask)(struct device *dev); |
| 55 | #endif |
FUJITA Tomonori | f0402a2 | 2009-01-05 23:59:01 +0900 | [diff] [blame] | 56 | int is_phys; |
| 57 | }; |
| 58 | |
Andrew Morton | 8f286c3 | 2007-10-18 03:05:07 -0700 | [diff] [blame] | 59 | #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) |
Borislav Petkov | 34c6538 | 2007-10-18 03:05:06 -0700 | [diff] [blame] | 60 | |
James Bottomley | 32e8f70 | 2007-10-16 01:23:55 -0700 | [diff] [blame] | 61 | #define DMA_MASK_NONE 0x0ULL |
| 62 | |
Rolf Eike Beer | d6bd3a3 | 2006-09-29 01:59:48 -0700 | [diff] [blame] | 63 | static inline int valid_dma_direction(int dma_direction) |
| 64 | { |
| 65 | return ((dma_direction == DMA_BIDIRECTIONAL) || |
| 66 | (dma_direction == DMA_TO_DEVICE) || |
| 67 | (dma_direction == DMA_FROM_DEVICE)); |
| 68 | } |
| 69 | |
James Bottomley | 32e8f70 | 2007-10-16 01:23:55 -0700 | [diff] [blame] | 70 | static inline int is_device_dma_capable(struct device *dev) |
| 71 | { |
| 72 | return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; |
| 73 | } |
| 74 | |
Dan Williams | 1b0fac4 | 2007-07-15 23:40:26 -0700 | [diff] [blame] | 75 | #ifdef CONFIG_HAS_DMA |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | #include <asm/dma-mapping.h> |
Dan Williams | 1b0fac4 | 2007-07-15 23:40:26 -0700 | [diff] [blame] | 77 | #else |
| 78 | #include <asm-generic/dma-mapping-broken.h> |
| 79 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 81 | static inline u64 dma_get_mask(struct device *dev) |
| 82 | { |
FUJITA Tomonori | 07a2c01 | 2008-09-19 02:02:05 +0900 | [diff] [blame] | 83 | if (dev && dev->dma_mask && *dev->dma_mask) |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 84 | return *dev->dma_mask; |
Yang Hongyang | 284901a | 2009-04-06 19:01:15 -0700 | [diff] [blame] | 85 | return DMA_BIT_MASK(32); |
FUJITA Tomonori | 589fc9a | 2008-09-12 19:42:34 +0900 | [diff] [blame] | 86 | } |
| 87 | |
Rob Herring | 58af4a2 | 2012-03-20 14:33:01 -0500 | [diff] [blame] | 88 | #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK |
FUJITA Tomonori | 710224f | 2010-09-22 13:04:55 -0700 | [diff] [blame] | 89 | int dma_set_coherent_mask(struct device *dev, u64 mask); |
| 90 | #else |
FUJITA Tomonori | 6a1961f | 2010-03-10 15:23:39 -0800 | [diff] [blame] | 91 | static inline int dma_set_coherent_mask(struct device *dev, u64 mask) |
| 92 | { |
| 93 | if (!dma_supported(dev, mask)) |
| 94 | return -EIO; |
| 95 | dev->coherent_dma_mask = mask; |
| 96 | return 0; |
| 97 | } |
FUJITA Tomonori | 710224f | 2010-09-22 13:04:55 -0700 | [diff] [blame] | 98 | #endif |
FUJITA Tomonori | 6a1961f | 2010-03-10 15:23:39 -0800 | [diff] [blame] | 99 | |
Russell King | 4aa806b | 2013-06-26 13:49:44 +0100 | [diff] [blame] | 100 | /* |
| 101 | * Set both the DMA mask and the coherent DMA mask to the same thing. |
| 102 | * Note that we don't check the return value from dma_set_coherent_mask() |
| 103 | * as the DMA API guarantees that the coherent DMA mask can be set to |
| 104 | * the same or smaller than the streaming DMA mask. |
| 105 | */ |
| 106 | static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) |
| 107 | { |
| 108 | int rc = dma_set_mask(dev, mask); |
| 109 | if (rc == 0) |
| 110 | dma_set_coherent_mask(dev, mask); |
| 111 | return rc; |
| 112 | } |
| 113 | |
Russell King | fa6a8d6 | 2013-06-27 12:21:45 +0100 | [diff] [blame] | 114 | /* |
| 115 | * Similar to the above, except it deals with the case where the device |
| 116 | * does not have dev->dma_mask appropriately setup. |
| 117 | */ |
| 118 | static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) |
| 119 | { |
| 120 | dev->dma_mask = &dev->coherent_dma_mask; |
| 121 | return dma_set_mask_and_coherent(dev, mask); |
| 122 | } |
| 123 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | extern u64 dma_get_required_mask(struct device *dev); |
| 125 | |
FUJITA Tomonori | 6b7b651 | 2008-02-04 22:27:55 -0800 | [diff] [blame] | 126 | static inline unsigned int dma_get_max_seg_size(struct device *dev) |
| 127 | { |
| 128 | return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536; |
| 129 | } |
| 130 | |
| 131 | static inline unsigned int dma_set_max_seg_size(struct device *dev, |
| 132 | unsigned int size) |
| 133 | { |
| 134 | if (dev->dma_parms) { |
| 135 | dev->dma_parms->max_segment_size = size; |
| 136 | return 0; |
| 137 | } else |
| 138 | return -EIO; |
| 139 | } |
| 140 | |
FUJITA Tomonori | d22a696 | 2008-02-04 22:28:13 -0800 | [diff] [blame] | 141 | static inline unsigned long dma_get_seg_boundary(struct device *dev) |
| 142 | { |
| 143 | return dev->dma_parms ? |
| 144 | dev->dma_parms->segment_boundary_mask : 0xffffffff; |
| 145 | } |
| 146 | |
| 147 | static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) |
| 148 | { |
| 149 | if (dev->dma_parms) { |
| 150 | dev->dma_parms->segment_boundary_mask = mask; |
| 151 | return 0; |
| 152 | } else |
| 153 | return -EIO; |
| 154 | } |
| 155 | |
Santosh Shilimkar | 00c8f16 | 2013-07-29 14:18:48 +0100 | [diff] [blame] | 156 | #ifndef dma_max_pfn |
| 157 | static inline unsigned long dma_max_pfn(struct device *dev) |
| 158 | { |
| 159 | return *dev->dma_mask >> PAGE_SHIFT; |
| 160 | } |
| 161 | #endif |
| 162 | |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 163 | static inline void *dma_zalloc_coherent(struct device *dev, size_t size, |
| 164 | dma_addr_t *dma_handle, gfp_t flag) |
| 165 | { |
Joe Perches | ede23fa | 2013-08-26 22:45:23 -0700 | [diff] [blame] | 166 | void *ret = dma_alloc_coherent(dev, size, dma_handle, |
| 167 | flag | __GFP_ZERO); |
Andrew Morton | 842fa69 | 2011-11-02 13:39:33 -0700 | [diff] [blame] | 168 | return ret; |
| 169 | } |
| 170 | |
Heiko Carstens | e259f19 | 2010-08-13 09:39:18 +0200 | [diff] [blame] | 171 | #ifdef CONFIG_HAS_DMA |
FUJITA Tomonori | 4565f01 | 2010-08-10 18:03:22 -0700 | [diff] [blame] | 172 | static inline int dma_get_cache_alignment(void) |
| 173 | { |
| 174 | #ifdef ARCH_DMA_MINALIGN |
| 175 | return ARCH_DMA_MINALIGN; |
| 176 | #endif |
| 177 | return 1; |
| 178 | } |
Heiko Carstens | e259f19 | 2010-08-13 09:39:18 +0200 | [diff] [blame] | 179 | #endif |
FUJITA Tomonori | 4565f01 | 2010-08-10 18:03:22 -0700 | [diff] [blame] | 180 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | /* flags for the coherent memory api */ |
| 182 | #define DMA_MEMORY_MAP 0x01 |
| 183 | #define DMA_MEMORY_IO 0x02 |
| 184 | #define DMA_MEMORY_INCLUDES_CHILDREN 0x04 |
| 185 | #define DMA_MEMORY_EXCLUSIVE 0x08 |
| 186 | |
| 187 | #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY |
| 188 | static inline int |
| 189 | dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, |
| 190 | dma_addr_t device_addr, size_t size, int flags) |
| 191 | { |
| 192 | return 0; |
| 193 | } |
| 194 | |
| 195 | static inline void |
| 196 | dma_release_declared_memory(struct device *dev) |
| 197 | { |
| 198 | } |
| 199 | |
| 200 | static inline void * |
| 201 | dma_mark_declared_memory_occupied(struct device *dev, |
| 202 | dma_addr_t device_addr, size_t size) |
| 203 | { |
| 204 | return ERR_PTR(-EBUSY); |
| 205 | } |
| 206 | #endif |
| 207 | |
Tejun Heo | 9ac7849 | 2007-01-20 16:00:26 +0900 | [diff] [blame] | 208 | /* |
| 209 | * Managed DMA API |
| 210 | */ |
| 211 | extern void *dmam_alloc_coherent(struct device *dev, size_t size, |
| 212 | dma_addr_t *dma_handle, gfp_t gfp); |
| 213 | extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, |
| 214 | dma_addr_t dma_handle); |
| 215 | extern void *dmam_alloc_noncoherent(struct device *dev, size_t size, |
| 216 | dma_addr_t *dma_handle, gfp_t gfp); |
| 217 | extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr, |
| 218 | dma_addr_t dma_handle); |
| 219 | #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY |
| 220 | extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, |
| 221 | dma_addr_t device_addr, size_t size, |
| 222 | int flags); |
| 223 | extern void dmam_release_declared_memory(struct device *dev); |
| 224 | #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */ |
| 225 | static inline int dmam_declare_coherent_memory(struct device *dev, |
| 226 | dma_addr_t bus_addr, dma_addr_t device_addr, |
| 227 | size_t size, gfp_t gfp) |
| 228 | { |
| 229 | return 0; |
| 230 | } |
| 231 | |
| 232 | static inline void dmam_release_declared_memory(struct device *dev) |
| 233 | { |
| 234 | } |
| 235 | #endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */ |
| 236 | |
Arthur Kepner | 74bc7ce | 2008-04-29 01:00:30 -0700 | [diff] [blame] | 237 | #ifndef CONFIG_HAVE_DMA_ATTRS |
| 238 | struct dma_attrs; |
| 239 | |
| 240 | #define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \ |
| 241 | dma_map_single(dev, cpu_addr, size, dir) |
| 242 | |
| 243 | #define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \ |
| 244 | dma_unmap_single(dev, dma_addr, size, dir) |
| 245 | |
| 246 | #define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \ |
| 247 | dma_map_sg(dev, sgl, nents, dir) |
| 248 | |
| 249 | #define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \ |
| 250 | dma_unmap_sg(dev, sgl, nents, dir) |
| 251 | |
| 252 | #endif /* CONFIG_HAVE_DMA_ATTRS */ |
| 253 | |
FUJITA Tomonori | 0acedc1 | 2010-03-10 15:23:31 -0800 | [diff] [blame] | 254 | #ifdef CONFIG_NEED_DMA_MAP_STATE |
| 255 | #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME |
| 256 | #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME |
| 257 | #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) |
| 258 | #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) |
| 259 | #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) |
| 260 | #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) |
| 261 | #else |
| 262 | #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) |
| 263 | #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) |
| 264 | #define dma_unmap_addr(PTR, ADDR_NAME) (0) |
| 265 | #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) |
| 266 | #define dma_unmap_len(PTR, LEN_NAME) (0) |
| 267 | #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) |
| 268 | #endif |
| 269 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | #endif |