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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Driver for Motorola IMX serial ports
3 *
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
5 *
6 * Author: Sascha Hauer <sascha@saschahauer.de>
7 * Copyright (C) 2004 Pengutronix
8 *
Fabian Godehardtb6e49132009-06-11 14:53:18 +01009 * Copyright (C) 2009 emlix GmbH
10 * Author: Fabian Godehardt (added IrDA support for iMX)
11 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 *
26 * [29-Mar-2005] Mike Lee
27 * Added hardware handshake
28 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30#if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31#define SUPPORT_SYSRQ
32#endif
33
34#include <linux/module.h>
35#include <linux/ioport.h>
36#include <linux/init.h>
37#include <linux/console.h>
38#include <linux/sysrq.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010039#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070040#include <linux/tty.h>
41#include <linux/tty_flip.h>
42#include <linux/serial_core.h>
43#include <linux/serial.h>
Sascha Hauer38a41fd2008-07-05 10:02:46 +020044#include <linux/clk.h>
Fabian Godehardtb6e49132009-06-11 14:53:18 +010045#include <linux/delay.h>
Oskar Schirmer534fca02009-06-11 14:52:23 +010046#include <linux/rational.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090047#include <linux/slab.h>
Shawn Guo22698aa2011-06-25 02:04:34 +080048#include <linux/of.h>
49#include <linux/of_device.h>
Shawn Guofed78ce2012-05-06 20:21:05 +080050#include <linux/pinctrl/consumer.h>
Sachin Kamate32a9f82013-01-07 10:25:03 +053051#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070052
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#include <asm/irq.h>
Arnd Bergmann82906b12012-08-24 15:14:29 +020054#include <linux/platform_data/serial-imx.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
Sascha Hauerff4bfb22007-04-26 08:26:13 +010056/* Register definitions */
57#define URXD0 0x0 /* Receiver Register */
58#define URTX0 0x40 /* Transmitter Register */
59#define UCR1 0x80 /* Control Register 1 */
60#define UCR2 0x84 /* Control Register 2 */
61#define UCR3 0x88 /* Control Register 3 */
62#define UCR4 0x8c /* Control Register 4 */
63#define UFCR 0x90 /* FIFO Control Register */
64#define USR1 0x94 /* Status Register 1 */
65#define USR2 0x98 /* Status Register 2 */
66#define UESC 0x9c /* Escape Character Register */
67#define UTIM 0xa0 /* Escape Timer Register */
68#define UBIR 0xa4 /* BRM Incremental Register */
69#define UBMR 0xa8 /* BRM Modulator Register */
70#define UBRC 0xac /* Baud Rate Count Register */
Shawn Guofe6b5402011-06-25 02:04:33 +080071#define IMX21_ONEMS 0xb0 /* One Millisecond register */
72#define IMX1_UTS 0xd0 /* UART Test Register on i.mx1 */
73#define IMX21_UTS 0xb4 /* UART Test Register on all other i.mx*/
Sascha Hauerff4bfb22007-04-26 08:26:13 +010074
75/* UART Control Register Bit Fields.*/
Sachin Kamat82313e62013-01-07 10:25:02 +053076#define URXD_CHARRDY (1<<15)
77#define URXD_ERR (1<<14)
78#define URXD_OVRRUN (1<<13)
79#define URXD_FRMERR (1<<12)
80#define URXD_BRK (1<<11)
81#define URXD_PRERR (1<<10)
82#define UCR1_ADEN (1<<15) /* Auto detect interrupt */
83#define UCR1_ADBR (1<<14) /* Auto detect baud rate */
84#define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */
85#define UCR1_IDEN (1<<12) /* Idle condition interrupt */
86#define UCR1_RRDYEN (1<<9) /* Recv ready interrupt enable */
87#define UCR1_RDMAEN (1<<8) /* Recv ready DMA enable */
88#define UCR1_IREN (1<<7) /* Infrared interface enable */
89#define UCR1_TXMPTYEN (1<<6) /* Transimitter empty interrupt enable */
90#define UCR1_RTSDEN (1<<5) /* RTS delta interrupt enable */
91#define UCR1_SNDBRK (1<<4) /* Send break */
92#define UCR1_TDMAEN (1<<3) /* Transmitter ready DMA enable */
93#define IMX1_UCR1_UARTCLKEN (1<<2) /* UART clock enabled, i.mx1 only */
94#define UCR1_DOZE (1<<1) /* Doze */
95#define UCR1_UARTEN (1<<0) /* UART enabled */
96#define UCR2_ESCI (1<<15) /* Escape seq interrupt enable */
97#define UCR2_IRTS (1<<14) /* Ignore RTS pin */
98#define UCR2_CTSC (1<<13) /* CTS pin control */
99#define UCR2_CTS (1<<12) /* Clear to send */
100#define UCR2_ESCEN (1<<11) /* Escape enable */
101#define UCR2_PREN (1<<8) /* Parity enable */
102#define UCR2_PROE (1<<7) /* Parity odd/even */
103#define UCR2_STPB (1<<6) /* Stop */
104#define UCR2_WS (1<<5) /* Word size */
105#define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */
106#define UCR2_ATEN (1<<3) /* Aging Timer Enable */
107#define UCR2_TXEN (1<<2) /* Transmitter enabled */
108#define UCR2_RXEN (1<<1) /* Receiver enabled */
109#define UCR2_SRST (1<<0) /* SW reset */
110#define UCR3_DTREN (1<<13) /* DTR interrupt enable */
111#define UCR3_PARERREN (1<<12) /* Parity enable */
112#define UCR3_FRAERREN (1<<11) /* Frame error interrupt enable */
113#define UCR3_DSR (1<<10) /* Data set ready */
114#define UCR3_DCD (1<<9) /* Data carrier detect */
115#define UCR3_RI (1<<8) /* Ring indicator */
116#define UCR3_TIMEOUTEN (1<<7) /* Timeout interrupt enable */
117#define UCR3_RXDSEN (1<<6) /* Receive status interrupt enable */
118#define UCR3_AIRINTEN (1<<5) /* Async IR wake interrupt enable */
119#define UCR3_AWAKEN (1<<4) /* Async wake interrupt enable */
120#define IMX21_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select */
121#define UCR3_INVT (1<<1) /* Inverted Infrared transmission */
122#define UCR3_BPEN (1<<0) /* Preset registers enable */
123#define UCR4_CTSTL_SHF 10 /* CTS trigger level shift */
124#define UCR4_CTSTL_MASK 0x3F /* CTS trigger is 6 bits wide */
125#define UCR4_INVR (1<<9) /* Inverted infrared reception */
126#define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */
127#define UCR4_WKEN (1<<7) /* Wake interrupt enable */
128#define UCR4_REF16 (1<<6) /* Ref freq 16 MHz */
129#define UCR4_IRSC (1<<5) /* IR special case */
130#define UCR4_TCEN (1<<3) /* Transmit complete interrupt enable */
131#define UCR4_BKEN (1<<2) /* Break condition interrupt enable */
132#define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */
133#define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */
134#define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */
135#define UFCR_DCEDTE (1<<6) /* DCE/DTE mode select */
136#define UFCR_RFDIV (7<<7) /* Reference freq divider mask */
137#define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7)
138#define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */
139#define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */
140#define USR1_RTSS (1<<14) /* RTS pin status */
141#define USR1_TRDY (1<<13) /* Transmitter ready interrupt/dma flag */
142#define USR1_RTSD (1<<12) /* RTS delta */
143#define USR1_ESCF (1<<11) /* Escape seq interrupt flag */
144#define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */
145#define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */
146#define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */
147#define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */
148#define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */
149#define USR1_AWAKE (1<<4) /* Aysnc wake interrupt flag */
150#define USR2_ADET (1<<15) /* Auto baud rate detect complete */
151#define USR2_TXFE (1<<14) /* Transmit buffer FIFO empty */
152#define USR2_DTRF (1<<13) /* DTR edge interrupt flag */
153#define USR2_IDLE (1<<12) /* Idle condition */
154#define USR2_IRINT (1<<8) /* Serial infrared interrupt flag */
155#define USR2_WAKE (1<<7) /* Wake */
156#define USR2_RTSF (1<<4) /* RTS edge interrupt flag */
157#define USR2_TXDC (1<<3) /* Transmitter complete */
158#define USR2_BRCD (1<<2) /* Break condition */
159#define USR2_ORE (1<<1) /* Overrun error */
160#define USR2_RDR (1<<0) /* Recv data ready */
161#define UTS_FRCPERR (1<<13) /* Force parity error */
162#define UTS_LOOP (1<<12) /* Loop tx and rx */
163#define UTS_TXEMPTY (1<<6) /* TxFIFO empty */
164#define UTS_RXEMPTY (1<<5) /* RxFIFO empty */
165#define UTS_TXFULL (1<<4) /* TxFIFO full */
166#define UTS_RXFULL (1<<3) /* RxFIFO full */
167#define UTS_SOFTRST (1<<0) /* Software reset */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100168
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169/* We've been assigned a range on the "Low-density serial ports" major */
Sachin Kamat82313e62013-01-07 10:25:02 +0530170#define SERIAL_IMX_MAJOR 207
171#define MINOR_START 16
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200172#define DEV_NAME "ttymxc"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175 * This determines how often we check the modem status signals
176 * for any change. They generally aren't connected to an IRQ
177 * so we have to poll them. We also check immediately before
178 * filling the TX fifo incase CTS has been dropped.
179 */
180#define MCTRL_TIMEOUT (250*HZ/1000)
181
182#define DRIVER_NAME "IMX-uart"
183
Sascha Hauerdbff4e92008-07-05 10:02:45 +0200184#define UART_NR 8
185
Shawn Guofe6b5402011-06-25 02:04:33 +0800186/* i.mx21 type uart runs on all i.mx except i.mx1 */
187enum imx_uart_type {
188 IMX1_UART,
189 IMX21_UART,
190};
191
192/* device type dependent stuff */
193struct imx_uart_data {
194 unsigned uts_reg;
195 enum imx_uart_type devtype;
196};
197
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198struct imx_port {
199 struct uart_port port;
200 struct timer_list timer;
201 unsigned int old_status;
Sachin Kamat82313e62013-01-07 10:25:02 +0530202 int txirq, rxirq, rtsirq;
Daniel Glöckner26bbb3f2009-06-11 14:36:29 +0100203 unsigned int have_rtscts:1;
Huang Shijie20ff2fe2013-05-30 14:07:12 +0800204 unsigned int dte_mode:1;
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100205 unsigned int use_irda:1;
206 unsigned int irda_inv_rx:1;
207 unsigned int irda_inv_tx:1;
208 unsigned short trcv_delay; /* transceiver delay */
Sascha Hauer3a9465f2012-03-07 09:31:43 +0100209 struct clk *clk_ipg;
210 struct clk *clk_per;
Uwe Kleine-König7d0b0662012-05-21 21:57:39 +0200211 const struct imx_uart_data *devdata;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212};
213
Dirk Behme0ad5a812011-12-22 09:57:52 +0100214struct imx_port_ucrs {
215 unsigned int ucr1;
216 unsigned int ucr2;
217 unsigned int ucr3;
218};
219
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100220#ifdef CONFIG_IRDA
221#define USE_IRDA(sport) ((sport)->use_irda)
222#else
223#define USE_IRDA(sport) (0)
224#endif
225
Shawn Guofe6b5402011-06-25 02:04:33 +0800226static struct imx_uart_data imx_uart_devdata[] = {
227 [IMX1_UART] = {
228 .uts_reg = IMX1_UTS,
229 .devtype = IMX1_UART,
230 },
231 [IMX21_UART] = {
232 .uts_reg = IMX21_UTS,
233 .devtype = IMX21_UART,
234 },
235};
236
237static struct platform_device_id imx_uart_devtype[] = {
238 {
239 .name = "imx1-uart",
240 .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX1_UART],
241 }, {
242 .name = "imx21-uart",
243 .driver_data = (kernel_ulong_t) &imx_uart_devdata[IMX21_UART],
244 }, {
245 /* sentinel */
246 }
247};
248MODULE_DEVICE_TABLE(platform, imx_uart_devtype);
249
Shawn Guo22698aa2011-06-25 02:04:34 +0800250static struct of_device_id imx_uart_dt_ids[] = {
251 { .compatible = "fsl,imx1-uart", .data = &imx_uart_devdata[IMX1_UART], },
252 { .compatible = "fsl,imx21-uart", .data = &imx_uart_devdata[IMX21_UART], },
253 { /* sentinel */ }
254};
255MODULE_DEVICE_TABLE(of, imx_uart_dt_ids);
256
Shawn Guofe6b5402011-06-25 02:04:33 +0800257static inline unsigned uts_reg(struct imx_port *sport)
258{
259 return sport->devdata->uts_reg;
260}
261
262static inline int is_imx1_uart(struct imx_port *sport)
263{
264 return sport->devdata->devtype == IMX1_UART;
265}
266
267static inline int is_imx21_uart(struct imx_port *sport)
268{
269 return sport->devdata->devtype == IMX21_UART;
270}
271
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272/*
fabio.estevam@freescale.com44a75412013-02-06 19:00:02 -0200273 * Save and restore functions for UCR1, UCR2 and UCR3 registers
274 */
275static void imx_port_ucrs_save(struct uart_port *port,
276 struct imx_port_ucrs *ucr)
277{
278 /* save control registers */
279 ucr->ucr1 = readl(port->membase + UCR1);
280 ucr->ucr2 = readl(port->membase + UCR2);
281 ucr->ucr3 = readl(port->membase + UCR3);
282}
283
284static void imx_port_ucrs_restore(struct uart_port *port,
285 struct imx_port_ucrs *ucr)
286{
287 /* restore control registers */
288 writel(ucr->ucr1, port->membase + UCR1);
289 writel(ucr->ucr2, port->membase + UCR2);
290 writel(ucr->ucr3, port->membase + UCR3);
291}
292
293/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700294 * Handle any change of modem status signal since we were last called.
295 */
296static void imx_mctrl_check(struct imx_port *sport)
297{
298 unsigned int status, changed;
299
300 status = sport->port.ops->get_mctrl(&sport->port);
301 changed = status ^ sport->old_status;
302
303 if (changed == 0)
304 return;
305
306 sport->old_status = status;
307
308 if (changed & TIOCM_RI)
309 sport->port.icount.rng++;
310 if (changed & TIOCM_DSR)
311 sport->port.icount.dsr++;
312 if (changed & TIOCM_CAR)
313 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
314 if (changed & TIOCM_CTS)
315 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
316
Alan Coxbdc04e32009-09-19 13:13:31 -0700317 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318}
319
320/*
321 * This is our per-port timeout handler, for checking the
322 * modem status signals.
323 */
324static void imx_timeout(unsigned long data)
325{
326 struct imx_port *sport = (struct imx_port *)data;
327 unsigned long flags;
328
Alan Coxebd2c8f2009-09-19 13:13:28 -0700329 if (sport->port.state) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330 spin_lock_irqsave(&sport->port.lock, flags);
331 imx_mctrl_check(sport);
332 spin_unlock_irqrestore(&sport->port.lock, flags);
333
334 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
335 }
336}
337
338/*
339 * interrupts disabled on entry
340 */
Russell Kingb129a8c2005-08-31 10:12:14 +0100341static void imx_stop_tx(struct uart_port *port)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342{
343 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100344 unsigned long temp;
345
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100346 if (USE_IRDA(sport)) {
347 /* half duplex - wait for end of transmission */
348 int n = 256;
349 while ((--n > 0) &&
350 !(readl(sport->port.membase + USR2) & USR2_TXDC)) {
351 udelay(5);
352 barrier();
353 }
354 /*
355 * irda transceiver - wait a bit more to avoid
356 * cutoff, hardware dependent
357 */
358 udelay(sport->trcv_delay);
359
360 /*
361 * half duplex - reactivate receive mode,
362 * flush receive pipe echo crap
363 */
364 if (readl(sport->port.membase + USR2) & USR2_TXDC) {
365 temp = readl(sport->port.membase + UCR1);
366 temp &= ~(UCR1_TXMPTYEN | UCR1_TRDYEN);
367 writel(temp, sport->port.membase + UCR1);
368
369 temp = readl(sport->port.membase + UCR4);
370 temp &= ~(UCR4_TCEN);
371 writel(temp, sport->port.membase + UCR4);
372
373 while (readl(sport->port.membase + URXD0) &
374 URXD_CHARRDY)
375 barrier();
376
377 temp = readl(sport->port.membase + UCR1);
378 temp |= UCR1_RRDYEN;
379 writel(temp, sport->port.membase + UCR1);
380
381 temp = readl(sport->port.membase + UCR4);
382 temp |= UCR4_DREN;
383 writel(temp, sport->port.membase + UCR4);
384 }
385 return;
386 }
387
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100388 temp = readl(sport->port.membase + UCR1);
389 writel(temp & ~UCR1_TXMPTYEN, sport->port.membase + UCR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390}
391
392/*
393 * interrupts disabled on entry
394 */
395static void imx_stop_rx(struct uart_port *port)
396{
397 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100398 unsigned long temp;
399
400 temp = readl(sport->port.membase + UCR2);
Sachin Kamat82313e62013-01-07 10:25:02 +0530401 writel(temp & ~UCR2_RXEN, sport->port.membase + UCR2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700402}
403
404/*
405 * Set the modem control timer to fire immediately.
406 */
407static void imx_enable_ms(struct uart_port *port)
408{
409 struct imx_port *sport = (struct imx_port *)port;
410
411 mod_timer(&sport->timer, jiffies);
412}
413
414static inline void imx_transmit_buffer(struct imx_port *sport)
415{
Alan Coxebd2c8f2009-09-19 13:13:28 -0700416 struct circ_buf *xmit = &sport->port.state->xmit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417
Volker Ernst4e4e6602010-10-13 11:03:57 +0200418 while (!uart_circ_empty(xmit) &&
Shawn Guofe6b5402011-06-25 02:04:33 +0800419 !(readl(sport->port.membase + uts_reg(sport))
420 & UTS_TXFULL)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421 /* send xmit->buf[xmit->tail]
422 * out the port here */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100423 writel(xmit->buf[xmit->tail], sport->port.membase + URTX0);
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100424 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425 sport->port.icount.tx++;
Sascha Hauer8c0b2542007-02-05 16:10:16 -0800426 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427
Fabian Godehardt977757312009-06-11 14:37:19 +0100428 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
429 uart_write_wakeup(&sport->port);
430
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431 if (uart_circ_empty(xmit))
Russell Kingb129a8c2005-08-31 10:12:14 +0100432 imx_stop_tx(&sport->port);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433}
434
435/*
436 * interrupts disabled on entry
437 */
Russell Kingb129a8c2005-08-31 10:12:14 +0100438static void imx_start_tx(struct uart_port *port)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439{
440 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100441 unsigned long temp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100443 if (USE_IRDA(sport)) {
444 /* half duplex in IrDA mode; have to disable receive mode */
445 temp = readl(sport->port.membase + UCR4);
446 temp &= ~(UCR4_DREN);
447 writel(temp, sport->port.membase + UCR4);
448
449 temp = readl(sport->port.membase + UCR1);
450 temp &= ~(UCR1_RRDYEN);
451 writel(temp, sport->port.membase + UCR1);
452 }
Alexander Steinf1f836e2013-05-14 17:06:07 +0200453 /* Clear any pending ORE flag before enabling interrupt */
454 temp = readl(sport->port.membase + USR2);
455 writel(temp | USR2_ORE, sport->port.membase + USR2);
456
457 temp = readl(sport->port.membase + UCR4);
458 temp |= UCR4_OREN;
459 writel(temp, sport->port.membase + UCR4);
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100460
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100461 temp = readl(sport->port.membase + UCR1);
462 writel(temp | UCR1_TXMPTYEN, sport->port.membase + UCR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100464 if (USE_IRDA(sport)) {
465 temp = readl(sport->port.membase + UCR1);
466 temp |= UCR1_TRDYEN;
467 writel(temp, sport->port.membase + UCR1);
468
469 temp = readl(sport->port.membase + UCR4);
470 temp |= UCR4_TCEN;
471 writel(temp, sport->port.membase + UCR4);
472 }
473
Shawn Guofe6b5402011-06-25 02:04:33 +0800474 if (readl(sport->port.membase + uts_reg(sport)) & UTS_TXEMPTY)
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100475 imx_transmit_buffer(sport);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476}
477
David Howells7d12e782006-10-05 14:55:46 +0100478static irqreturn_t imx_rtsint(int irq, void *dev_id)
Sascha Hauerceca6292005-10-12 19:58:08 +0100479{
Jeff Garzik15aafa22008-02-06 01:36:20 -0800480 struct imx_port *sport = dev_id;
Uwe Kleine-König5680e942011-04-11 10:59:09 +0200481 unsigned int val;
Sascha Hauerceca6292005-10-12 19:58:08 +0100482 unsigned long flags;
483
484 spin_lock_irqsave(&sport->port.lock, flags);
485
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100486 writel(USR1_RTSD, sport->port.membase + USR1);
Uwe Kleine-König5680e942011-04-11 10:59:09 +0200487 val = readl(sport->port.membase + USR1) & USR1_RTSS;
Sascha Hauerceca6292005-10-12 19:58:08 +0100488 uart_handle_cts_change(&sport->port, !!val);
Alan Coxbdc04e32009-09-19 13:13:31 -0700489 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
Sascha Hauerceca6292005-10-12 19:58:08 +0100490
491 spin_unlock_irqrestore(&sport->port.lock, flags);
492 return IRQ_HANDLED;
493}
494
David Howells7d12e782006-10-05 14:55:46 +0100495static irqreturn_t imx_txint(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700496{
Jeff Garzik15aafa22008-02-06 01:36:20 -0800497 struct imx_port *sport = dev_id;
Alan Coxebd2c8f2009-09-19 13:13:28 -0700498 struct circ_buf *xmit = &sport->port.state->xmit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700499 unsigned long flags;
500
Sachin Kamat82313e62013-01-07 10:25:02 +0530501 spin_lock_irqsave(&sport->port.lock, flags);
Sachin Kamat699cbd62013-01-07 10:25:04 +0530502 if (sport->port.x_char) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503 /* Send next char */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100504 writel(sport->port.x_char, sport->port.membase + URTX0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700505 goto out;
506 }
507
508 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
Russell Kingb129a8c2005-08-31 10:12:14 +0100509 imx_stop_tx(&sport->port);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510 goto out;
511 }
512
513 imx_transmit_buffer(sport);
514
515 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
516 uart_write_wakeup(&sport->port);
517
518out:
Sachin Kamat82313e62013-01-07 10:25:02 +0530519 spin_unlock_irqrestore(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700520 return IRQ_HANDLED;
521}
522
David Howells7d12e782006-10-05 14:55:46 +0100523static irqreturn_t imx_rxint(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524{
525 struct imx_port *sport = dev_id;
Sachin Kamat82313e62013-01-07 10:25:02 +0530526 unsigned int rx, flg, ignored = 0;
Jiri Slaby92a19f92013-01-03 15:53:03 +0100527 struct tty_port *port = &sport->port.state->port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100528 unsigned long flags, temp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529
Sachin Kamat82313e62013-01-07 10:25:02 +0530530 spin_lock_irqsave(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531
Sascha Hauer0d3c3932008-04-17 08:43:14 +0100532 while (readl(sport->port.membase + USR2) & USR2_RDR) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700533 flg = TTY_NORMAL;
534 sport->port.icount.rx++;
535
Sascha Hauer0d3c3932008-04-17 08:43:14 +0100536 rx = readl(sport->port.membase + URXD0);
537
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100538 temp = readl(sport->port.membase + USR2);
Sascha Hauer864eeed2008-04-17 08:39:22 +0100539 if (temp & USR2_BRCD) {
Andy Green94d32f92010-02-01 13:28:54 +0100540 writel(USR2_BRCD, sport->port.membase + USR2);
Sascha Hauer864eeed2008-04-17 08:39:22 +0100541 if (uart_handle_break(&sport->port))
542 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700543 }
544
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100545 if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx))
Sascha Hauer864eeed2008-04-17 08:39:22 +0100546 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547
Hui Wang019dc9e2011-08-24 17:41:47 +0800548 if (unlikely(rx & URXD_ERR)) {
549 if (rx & URXD_BRK)
550 sport->port.icount.brk++;
551 else if (rx & URXD_PRERR)
Sascha Hauer864eeed2008-04-17 08:39:22 +0100552 sport->port.icount.parity++;
553 else if (rx & URXD_FRMERR)
554 sport->port.icount.frame++;
555 if (rx & URXD_OVRRUN)
556 sport->port.icount.overrun++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700557
Sascha Hauer864eeed2008-04-17 08:39:22 +0100558 if (rx & sport->port.ignore_status_mask) {
559 if (++ignored > 100)
560 goto out;
561 continue;
562 }
563
564 rx &= sport->port.read_status_mask;
565
Hui Wang019dc9e2011-08-24 17:41:47 +0800566 if (rx & URXD_BRK)
567 flg = TTY_BREAK;
568 else if (rx & URXD_PRERR)
Sascha Hauer864eeed2008-04-17 08:39:22 +0100569 flg = TTY_PARITY;
570 else if (rx & URXD_FRMERR)
571 flg = TTY_FRAME;
572 if (rx & URXD_OVRRUN)
573 flg = TTY_OVERRUN;
574
575#ifdef SUPPORT_SYSRQ
576 sport->port.sysrq = 0;
577#endif
578 }
579
Jiri Slaby92a19f92013-01-03 15:53:03 +0100580 tty_insert_flip_char(port, rx, flg);
Sascha Hauer864eeed2008-04-17 08:39:22 +0100581 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582
583out:
Sachin Kamat82313e62013-01-07 10:25:02 +0530584 spin_unlock_irqrestore(&sport->port.lock, flags);
Jiri Slaby2e124b42013-01-03 15:53:06 +0100585 tty_flip_buffer_push(port);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586 return IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587}
588
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200589static irqreturn_t imx_int(int irq, void *dev_id)
590{
591 struct imx_port *sport = dev_id;
592 unsigned int sts;
Alexander Steinf1f836e2013-05-14 17:06:07 +0200593 unsigned int sts2;
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200594
595 sts = readl(sport->port.membase + USR1);
596
597 if (sts & USR1_RRDY)
598 imx_rxint(irq, dev_id);
599
600 if (sts & USR1_TRDY &&
601 readl(sport->port.membase + UCR1) & UCR1_TXMPTYEN)
602 imx_txint(irq, dev_id);
603
Marc Kleine-Budde9fbe6042008-07-28 21:26:01 +0200604 if (sts & USR1_RTSD)
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200605 imx_rtsint(irq, dev_id);
606
Fabio Estevamdb1a9b52011-12-13 01:23:48 -0200607 if (sts & USR1_AWAKE)
608 writel(USR1_AWAKE, sport->port.membase + USR1);
609
Alexander Steinf1f836e2013-05-14 17:06:07 +0200610 sts2 = readl(sport->port.membase + USR2);
611 if (sts2 & USR2_ORE) {
612 dev_err(sport->port.dev, "Rx FIFO overrun\n");
613 sport->port.icount.overrun++;
614 writel(sts2 | USR2_ORE, sport->port.membase + USR2);
615 }
616
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200617 return IRQ_HANDLED;
618}
619
Linus Torvalds1da177e2005-04-16 15:20:36 -0700620/*
621 * Return TIOCSER_TEMT when transmitter is not busy.
622 */
623static unsigned int imx_tx_empty(struct uart_port *port)
624{
625 struct imx_port *sport = (struct imx_port *)port;
626
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100627 return (readl(sport->port.membase + USR2) & USR2_TXDC) ? TIOCSER_TEMT : 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700628}
629
Sascha Hauer0f302dc2005-08-31 21:48:47 +0100630/*
631 * We have a modem side uart, so the meanings of RTS and CTS are inverted.
632 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633static unsigned int imx_get_mctrl(struct uart_port *port)
634{
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100635 struct imx_port *sport = (struct imx_port *)port;
636 unsigned int tmp = TIOCM_DSR | TIOCM_CAR;
Sascha Hauer0f302dc2005-08-31 21:48:47 +0100637
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100638 if (readl(sport->port.membase + USR1) & USR1_RTSS)
639 tmp |= TIOCM_CTS;
Sascha Hauer0f302dc2005-08-31 21:48:47 +0100640
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100641 if (readl(sport->port.membase + UCR2) & UCR2_CTS)
642 tmp |= TIOCM_RTS;
Sascha Hauer0f302dc2005-08-31 21:48:47 +0100643
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100644 return tmp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700645}
646
647static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
648{
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100649 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100650 unsigned long temp;
651
652 temp = readl(sport->port.membase + UCR2) & ~UCR2_CTS;
Sascha Hauer0f302dc2005-08-31 21:48:47 +0100653
Oskar Schirmerd3810cd2009-06-11 14:35:01 +0100654 if (mctrl & TIOCM_RTS)
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100655 temp |= UCR2_CTS;
656
657 writel(temp, sport->port.membase + UCR2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700658}
659
660/*
661 * Interrupts always disabled.
662 */
663static void imx_break_ctl(struct uart_port *port, int break_state)
664{
665 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100666 unsigned long flags, temp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667
668 spin_lock_irqsave(&sport->port.lock, flags);
669
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100670 temp = readl(sport->port.membase + UCR1) & ~UCR1_SNDBRK;
671
Sachin Kamat82313e62013-01-07 10:25:02 +0530672 if (break_state != 0)
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100673 temp |= UCR1_SNDBRK;
674
675 writel(temp, sport->port.membase + UCR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676
677 spin_unlock_irqrestore(&sport->port.lock, flags);
678}
679
680#define TXTL 2 /* reset default */
681#define RXTL 1 /* reset default */
682
Sascha Hauer587897f2005-04-29 22:46:40 +0100683static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
684{
685 unsigned int val;
Sascha Hauer587897f2005-04-29 22:46:40 +0100686
Dirk Behme7be06702012-08-31 10:02:47 +0200687 /* set receiver / transmitter trigger level */
688 val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE);
689 val |= TXTL << UFCR_TXTL_SHF | RXTL;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100690 writel(val, sport->port.membase + UFCR);
Sascha Hauer587897f2005-04-29 22:46:40 +0100691 return 0;
692}
693
Valentin Longchamp1c5250d2010-05-05 11:47:07 +0200694/* half the RX buffer size */
695#define CTSTL 16
696
Linus Torvalds1da177e2005-04-16 15:20:36 -0700697static int imx_startup(struct uart_port *port)
698{
699 struct imx_port *sport = (struct imx_port *)port;
700 int retval;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100701 unsigned long flags, temp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700702
Sascha Hauer587897f2005-04-29 22:46:40 +0100703 imx_setup_ufcr(sport, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704
705 /* disable the DREN bit (Data Ready interrupt enable) before
706 * requesting IRQs
707 */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100708 temp = readl(sport->port.membase + UCR4);
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100709
710 if (USE_IRDA(sport))
711 temp |= UCR4_IRSC;
712
Valentin Longchamp1c5250d2010-05-05 11:47:07 +0200713 /* set the trigger level for CTS */
Sachin Kamat82313e62013-01-07 10:25:02 +0530714 temp &= ~(UCR4_CTSTL_MASK << UCR4_CTSTL_SHF);
715 temp |= CTSTL << UCR4_CTSTL_SHF;
Valentin Longchamp1c5250d2010-05-05 11:47:07 +0200716
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100717 writel(temp & ~UCR4_DREN, sport->port.membase + UCR4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700718
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100719 if (USE_IRDA(sport)) {
720 /* reset fifo's and state machines */
721 int i = 100;
722 temp = readl(sport->port.membase + UCR2);
723 temp &= ~UCR2_SRST;
724 writel(temp, sport->port.membase + UCR2);
725 while (!(readl(sport->port.membase + UCR2) & UCR2_SRST) &&
726 (--i > 0)) {
727 udelay(1);
728 }
729 }
730
Linus Torvalds1da177e2005-04-16 15:20:36 -0700731 /*
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200732 * Allocate the IRQ(s) i.MX1 has three interrupts whereas later
733 * chips only have one interrupt.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700734 */
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200735 if (sport->txirq > 0) {
736 retval = request_irq(sport->rxirq, imx_rxint, 0,
737 DRIVER_NAME, sport);
738 if (retval)
739 goto error_out1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700740
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200741 retval = request_irq(sport->txirq, imx_txint, 0,
742 DRIVER_NAME, sport);
743 if (retval)
744 goto error_out2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700745
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100746 /* do not use RTS IRQ on IrDA */
747 if (!USE_IRDA(sport)) {
Shawn Guo1ee8f652012-06-14 10:58:54 +0800748 retval = request_irq(sport->rtsirq, imx_rtsint, 0,
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100749 DRIVER_NAME, sport);
750 if (retval)
751 goto error_out3;
752 }
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200753 } else {
754 retval = request_irq(sport->port.irq, imx_int, 0,
755 DRIVER_NAME, sport);
756 if (retval) {
757 free_irq(sport->port.irq, sport);
758 goto error_out1;
759 }
760 }
Sascha Hauerceca6292005-10-12 19:58:08 +0100761
Xinyu Chen9ec18822012-08-27 09:36:51 +0200762 spin_lock_irqsave(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700763 /*
764 * Finally, clear and enable interrupts
765 */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100766 writel(USR1_RTSD, sport->port.membase + USR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700767
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100768 temp = readl(sport->port.membase + UCR1);
Sascha Hauer789d5252008-04-17 08:44:47 +0100769 temp |= UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN;
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100770
771 if (USE_IRDA(sport)) {
772 temp |= UCR1_IREN;
773 temp &= ~(UCR1_RTSDEN);
774 }
775
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100776 writel(temp, sport->port.membase + UCR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700777
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100778 temp = readl(sport->port.membase + UCR2);
779 temp |= (UCR2_RXEN | UCR2_TXEN);
780 writel(temp, sport->port.membase + UCR2);
781
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100782 if (USE_IRDA(sport)) {
783 /* clear RX-FIFO */
784 int i = 64;
785 while ((--i > 0) &&
786 (readl(sport->port.membase + URXD0) & URXD_CHARRDY)) {
787 barrier();
788 }
789 }
790
Shawn Guofe6b5402011-06-25 02:04:33 +0800791 if (is_imx21_uart(sport)) {
Sascha Hauer37d6fb62009-05-27 18:23:48 +0200792 temp = readl(sport->port.membase + UCR3);
Shawn Guofe6b5402011-06-25 02:04:33 +0800793 temp |= IMX21_UCR3_RXDMUXSEL;
Sascha Hauer37d6fb62009-05-27 18:23:48 +0200794 writel(temp, sport->port.membase + UCR3);
795 }
Marc Kleine-Budde44118052008-07-28 12:10:34 +0200796
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100797 if (USE_IRDA(sport)) {
798 temp = readl(sport->port.membase + UCR4);
799 if (sport->irda_inv_rx)
800 temp |= UCR4_INVR;
801 else
802 temp &= ~(UCR4_INVR);
803 writel(temp | UCR4_DREN, sport->port.membase + UCR4);
804
805 temp = readl(sport->port.membase + UCR3);
806 if (sport->irda_inv_tx)
807 temp |= UCR3_INVT;
808 else
809 temp &= ~(UCR3_INVT);
810 writel(temp, sport->port.membase + UCR3);
811 }
812
Linus Torvalds1da177e2005-04-16 15:20:36 -0700813 /*
814 * Enable modem status interrupts
815 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700816 imx_enable_ms(&sport->port);
Sachin Kamat82313e62013-01-07 10:25:02 +0530817 spin_unlock_irqrestore(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700818
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100819 if (USE_IRDA(sport)) {
820 struct imxuart_platform_data *pdata;
821 pdata = sport->port.dev->platform_data;
822 sport->irda_inv_rx = pdata->irda_inv_rx;
823 sport->irda_inv_tx = pdata->irda_inv_tx;
824 sport->trcv_delay = pdata->transceiver_delay;
825 if (pdata->irda_enable)
826 pdata->irda_enable(1);
827 }
828
Linus Torvalds1da177e2005-04-16 15:20:36 -0700829 return 0;
830
Sascha Hauerceca6292005-10-12 19:58:08 +0100831error_out3:
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200832 if (sport->txirq)
833 free_irq(sport->txirq, sport);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834error_out2:
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200835 if (sport->rxirq)
836 free_irq(sport->rxirq, sport);
Sascha Hauer86371d02005-10-10 10:17:42 +0100837error_out1:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838 return retval;
839}
840
841static void imx_shutdown(struct uart_port *port)
842{
843 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100844 unsigned long temp;
Xinyu Chen9ec18822012-08-27 09:36:51 +0200845 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700846
Xinyu Chen9ec18822012-08-27 09:36:51 +0200847 spin_lock_irqsave(&sport->port.lock, flags);
Fabian Godehardt2e146392009-06-11 14:38:38 +0100848 temp = readl(sport->port.membase + UCR2);
849 temp &= ~(UCR2_TXEN);
850 writel(temp, sport->port.membase + UCR2);
Xinyu Chen9ec18822012-08-27 09:36:51 +0200851 spin_unlock_irqrestore(&sport->port.lock, flags);
Fabian Godehardt2e146392009-06-11 14:38:38 +0100852
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100853 if (USE_IRDA(sport)) {
854 struct imxuart_platform_data *pdata;
855 pdata = sport->port.dev->platform_data;
856 if (pdata->irda_enable)
857 pdata->irda_enable(0);
858 }
859
Linus Torvalds1da177e2005-04-16 15:20:36 -0700860 /*
861 * Stop our timer.
862 */
863 del_timer_sync(&sport->timer);
864
865 /*
866 * Free the interrupts
867 */
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200868 if (sport->txirq > 0) {
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100869 if (!USE_IRDA(sport))
870 free_irq(sport->rtsirq, sport);
Sascha Hauere3d13ff2008-07-05 10:02:48 +0200871 free_irq(sport->txirq, sport);
872 free_irq(sport->rxirq, sport);
873 } else
874 free_irq(sport->port.irq, sport);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700875
876 /*
877 * Disable all interrupts, port and break condition.
878 */
879
Xinyu Chen9ec18822012-08-27 09:36:51 +0200880 spin_lock_irqsave(&sport->port.lock, flags);
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100881 temp = readl(sport->port.membase + UCR1);
882 temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100883 if (USE_IRDA(sport))
884 temp &= ~(UCR1_IREN);
885
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100886 writel(temp, sport->port.membase + UCR1);
Xinyu Chen9ec18822012-08-27 09:36:51 +0200887 spin_unlock_irqrestore(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700888}
889
890static void
Alan Cox606d0992006-12-08 02:38:45 -0800891imx_set_termios(struct uart_port *port, struct ktermios *termios,
892 struct ktermios *old)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700893{
894 struct imx_port *sport = (struct imx_port *)port;
895 unsigned long flags;
896 unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
897 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
Oskar Schirmer534fca02009-06-11 14:52:23 +0100898 unsigned int div, ufcr;
899 unsigned long num, denom;
Oskar Schirmerd7f8d432009-06-11 14:55:22 +0100900 uint64_t tdiv64;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700901
902 /*
903 * If we don't support modem control lines, don't allow
904 * these to be set.
905 */
906 if (0) {
907 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
908 termios->c_cflag |= CLOCAL;
909 }
910
911 /*
912 * We only support CS7 and CS8.
913 */
914 while ((termios->c_cflag & CSIZE) != CS7 &&
915 (termios->c_cflag & CSIZE) != CS8) {
916 termios->c_cflag &= ~CSIZE;
917 termios->c_cflag |= old_csize;
918 old_csize = CS8;
919 }
920
921 if ((termios->c_cflag & CSIZE) == CS8)
922 ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
923 else
924 ucr2 = UCR2_SRST | UCR2_IRTS;
925
926 if (termios->c_cflag & CRTSCTS) {
Sachin Kamat82313e62013-01-07 10:25:02 +0530927 if (sport->have_rtscts) {
Sascha Hauer5b802342006-05-04 14:07:42 +0100928 ucr2 &= ~UCR2_IRTS;
929 ucr2 |= UCR2_CTSC;
930 } else {
931 termios->c_cflag &= ~CRTSCTS;
932 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700933 }
934
935 if (termios->c_cflag & CSTOPB)
936 ucr2 |= UCR2_STPB;
937 if (termios->c_cflag & PARENB) {
938 ucr2 |= UCR2_PREN;
Matt Reimer3261e362006-01-13 20:51:44 +0000939 if (termios->c_cflag & PARODD)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700940 ucr2 |= UCR2_PROE;
941 }
942
Eric Miao995234d2011-12-23 05:39:27 +0800943 del_timer_sync(&sport->timer);
944
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945 /*
946 * Ask the core to calculate the divisor for us.
947 */
Sascha Hauer036bb152008-07-05 10:02:44 +0200948 baud = uart_get_baud_rate(port, termios, old, 50, port->uartclk / 16);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700949 quot = uart_get_divisor(port, baud);
950
951 spin_lock_irqsave(&sport->port.lock, flags);
952
953 sport->port.read_status_mask = 0;
954 if (termios->c_iflag & INPCK)
955 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
956 if (termios->c_iflag & (BRKINT | PARMRK))
957 sport->port.read_status_mask |= URXD_BRK;
958
959 /*
960 * Characters to ignore
961 */
962 sport->port.ignore_status_mask = 0;
963 if (termios->c_iflag & IGNPAR)
964 sport->port.ignore_status_mask |= URXD_PRERR;
965 if (termios->c_iflag & IGNBRK) {
966 sport->port.ignore_status_mask |= URXD_BRK;
967 /*
968 * If we're ignoring parity and break indicators,
969 * ignore overruns too (for real raw support).
970 */
971 if (termios->c_iflag & IGNPAR)
972 sport->port.ignore_status_mask |= URXD_OVRRUN;
973 }
974
Linus Torvalds1da177e2005-04-16 15:20:36 -0700975 /*
976 * Update the per-port timeout.
977 */
978 uart_update_timeout(port, termios->c_cflag, baud);
979
980 /*
981 * disable interrupts and drain transmitter
982 */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100983 old_ucr1 = readl(sport->port.membase + UCR1);
984 writel(old_ucr1 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN),
985 sport->port.membase + UCR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700986
Sachin Kamat82313e62013-01-07 10:25:02 +0530987 while (!(readl(sport->port.membase + USR2) & USR2_TXDC))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700988 barrier();
989
990 /* then, disable everything */
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100991 old_txrxen = readl(sport->port.membase + UCR2);
Sachin Kamat82313e62013-01-07 10:25:02 +0530992 writel(old_txrxen & ~(UCR2_TXEN | UCR2_RXEN),
Sascha Hauerff4bfb22007-04-26 08:26:13 +0100993 sport->port.membase + UCR2);
994 old_txrxen &= (UCR2_TXEN | UCR2_RXEN);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700995
Fabian Godehardtb6e49132009-06-11 14:53:18 +0100996 if (USE_IRDA(sport)) {
997 /*
998 * use maximum available submodule frequency to
999 * avoid missing short pulses due to low sampling rate
1000 */
Sascha Hauer036bb152008-07-05 10:02:44 +02001001 div = 1;
Fabian Godehardtb6e49132009-06-11 14:53:18 +01001002 } else {
1003 div = sport->port.uartclk / (baud * 16);
1004 if (div > 7)
1005 div = 7;
1006 if (!div)
1007 div = 1;
1008 }
Sascha Hauer036bb152008-07-05 10:02:44 +02001009
Oskar Schirmer534fca02009-06-11 14:52:23 +01001010 rational_best_approximation(16 * div * baud, sport->port.uartclk,
1011 1 << 16, 1 << 16, &num, &denom);
Sascha Hauer036bb152008-07-05 10:02:44 +02001012
Alan Coxeab4f5a2010-06-01 22:52:52 +02001013 tdiv64 = sport->port.uartclk;
1014 tdiv64 *= num;
1015 do_div(tdiv64, denom * 16 * div);
1016 tty_termios_encode_baud_rate(termios,
Sascha Hauer1a2c4b32009-06-16 17:02:15 +01001017 (speed_t)tdiv64, (speed_t)tdiv64);
Oskar Schirmerd7f8d432009-06-11 14:55:22 +01001018
Oskar Schirmer534fca02009-06-11 14:52:23 +01001019 num -= 1;
1020 denom -= 1;
Sascha Hauer036bb152008-07-05 10:02:44 +02001021
1022 ufcr = readl(sport->port.membase + UFCR);
Fabian Godehardtb6e49132009-06-11 14:53:18 +01001023 ufcr = (ufcr & (~UFCR_RFDIV)) | UFCR_RFDIV_REG(div);
Huang Shijie20ff2fe2013-05-30 14:07:12 +08001024 if (sport->dte_mode)
1025 ufcr |= UFCR_DCEDTE;
Sascha Hauer036bb152008-07-05 10:02:44 +02001026 writel(ufcr, sport->port.membase + UFCR);
1027
Oskar Schirmer534fca02009-06-11 14:52:23 +01001028 writel(num, sport->port.membase + UBIR);
1029 writel(denom, sport->port.membase + UBMR);
1030
Shawn Guofe6b5402011-06-25 02:04:33 +08001031 if (is_imx21_uart(sport))
Sascha Hauer37d6fb62009-05-27 18:23:48 +02001032 writel(sport->port.uartclk / div / 1000,
Shawn Guofe6b5402011-06-25 02:04:33 +08001033 sport->port.membase + IMX21_ONEMS);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001034
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001035 writel(old_ucr1, sport->port.membase + UCR1);
1036
1037 /* set the parity, stop bits and data size */
1038 writel(ucr2 | old_txrxen, sport->port.membase + UCR2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001039
1040 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
1041 imx_enable_ms(&sport->port);
1042
1043 spin_unlock_irqrestore(&sport->port.lock, flags);
1044}
1045
1046static const char *imx_type(struct uart_port *port)
1047{
1048 struct imx_port *sport = (struct imx_port *)port;
1049
1050 return sport->port.type == PORT_IMX ? "IMX" : NULL;
1051}
1052
1053/*
1054 * Release the memory region(s) being used by 'port'.
1055 */
1056static void imx_release_port(struct uart_port *port)
1057{
Sascha Hauer3d454442008-04-17 08:47:32 +01001058 struct platform_device *pdev = to_platform_device(port->dev);
1059 struct resource *mmres;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001060
Sascha Hauer3d454442008-04-17 08:47:32 +01001061 mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Joe Perches28f65c112011-06-09 09:13:32 -07001062 release_mem_region(mmres->start, resource_size(mmres));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001063}
1064
1065/*
1066 * Request the memory region(s) being used by 'port'.
1067 */
1068static int imx_request_port(struct uart_port *port)
1069{
Sascha Hauer3d454442008-04-17 08:47:32 +01001070 struct platform_device *pdev = to_platform_device(port->dev);
1071 struct resource *mmres;
1072 void *ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001073
Sascha Hauer3d454442008-04-17 08:47:32 +01001074 mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1075 if (!mmres)
1076 return -ENODEV;
1077
Joe Perches28f65c112011-06-09 09:13:32 -07001078 ret = request_mem_region(mmres->start, resource_size(mmres), "imx-uart");
Sascha Hauer3d454442008-04-17 08:47:32 +01001079
1080 return ret ? 0 : -EBUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001081}
1082
1083/*
1084 * Configure/autoconfigure the port.
1085 */
1086static void imx_config_port(struct uart_port *port, int flags)
1087{
1088 struct imx_port *sport = (struct imx_port *)port;
1089
1090 if (flags & UART_CONFIG_TYPE &&
1091 imx_request_port(&sport->port) == 0)
1092 sport->port.type = PORT_IMX;
1093}
1094
1095/*
1096 * Verify the new serial_struct (for TIOCSSERIAL).
1097 * The only change we allow are to the flags and type, and
1098 * even then only between PORT_IMX and PORT_UNKNOWN
1099 */
1100static int
1101imx_verify_port(struct uart_port *port, struct serial_struct *ser)
1102{
1103 struct imx_port *sport = (struct imx_port *)port;
1104 int ret = 0;
1105
1106 if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
1107 ret = -EINVAL;
1108 if (sport->port.irq != ser->irq)
1109 ret = -EINVAL;
1110 if (ser->io_type != UPIO_MEM)
1111 ret = -EINVAL;
1112 if (sport->port.uartclk / 16 != ser->baud_base)
1113 ret = -EINVAL;
1114 if ((void *)sport->port.mapbase != ser->iomem_base)
1115 ret = -EINVAL;
1116 if (sport->port.iobase != ser->port)
1117 ret = -EINVAL;
1118 if (ser->hub6 != 0)
1119 ret = -EINVAL;
1120 return ret;
1121}
1122
Saleem Abdulrasool01f56ab2011-12-22 09:57:53 +01001123#if defined(CONFIG_CONSOLE_POLL)
1124static int imx_poll_get_char(struct uart_port *port)
1125{
1126 struct imx_port_ucrs old_ucr;
1127 unsigned int status;
1128 unsigned char c;
1129
1130 /* save control registers */
1131 imx_port_ucrs_save(port, &old_ucr);
1132
1133 /* disable interrupts */
1134 writel(UCR1_UARTEN, port->membase + UCR1);
1135 writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI),
1136 port->membase + UCR2);
1137 writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN),
1138 port->membase + UCR3);
1139
1140 /* poll */
1141 do {
1142 status = readl(port->membase + USR2);
1143 } while (~status & USR2_RDR);
1144
1145 /* read */
1146 c = readl(port->membase + URXD0);
1147
1148 /* restore control registers */
1149 imx_port_ucrs_restore(port, &old_ucr);
1150
1151 return c;
1152}
1153
1154static void imx_poll_put_char(struct uart_port *port, unsigned char c)
1155{
1156 struct imx_port_ucrs old_ucr;
1157 unsigned int status;
1158
1159 /* save control registers */
1160 imx_port_ucrs_save(port, &old_ucr);
1161
1162 /* disable interrupts */
1163 writel(UCR1_UARTEN, port->membase + UCR1);
1164 writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI),
1165 port->membase + UCR2);
1166 writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN),
1167 port->membase + UCR3);
1168
1169 /* drain */
1170 do {
1171 status = readl(port->membase + USR1);
1172 } while (~status & USR1_TRDY);
1173
1174 /* write */
1175 writel(c, port->membase + URTX0);
1176
1177 /* flush */
1178 do {
1179 status = readl(port->membase + USR2);
1180 } while (~status & USR2_TXDC);
1181
1182 /* restore control registers */
1183 imx_port_ucrs_restore(port, &old_ucr);
1184}
1185#endif
1186
Linus Torvalds1da177e2005-04-16 15:20:36 -07001187static struct uart_ops imx_pops = {
1188 .tx_empty = imx_tx_empty,
1189 .set_mctrl = imx_set_mctrl,
1190 .get_mctrl = imx_get_mctrl,
1191 .stop_tx = imx_stop_tx,
1192 .start_tx = imx_start_tx,
1193 .stop_rx = imx_stop_rx,
1194 .enable_ms = imx_enable_ms,
1195 .break_ctl = imx_break_ctl,
1196 .startup = imx_startup,
1197 .shutdown = imx_shutdown,
1198 .set_termios = imx_set_termios,
1199 .type = imx_type,
1200 .release_port = imx_release_port,
1201 .request_port = imx_request_port,
1202 .config_port = imx_config_port,
1203 .verify_port = imx_verify_port,
Saleem Abdulrasool01f56ab2011-12-22 09:57:53 +01001204#if defined(CONFIG_CONSOLE_POLL)
1205 .poll_get_char = imx_poll_get_char,
1206 .poll_put_char = imx_poll_put_char,
1207#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001208};
1209
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001210static struct imx_port *imx_ports[UART_NR];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001211
1212#ifdef CONFIG_SERIAL_IMX_CONSOLE
Russell Kingd3587882006-03-20 20:00:09 +00001213static void imx_console_putchar(struct uart_port *port, int ch)
1214{
1215 struct imx_port *sport = (struct imx_port *)port;
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001216
Shawn Guofe6b5402011-06-25 02:04:33 +08001217 while (readl(sport->port.membase + uts_reg(sport)) & UTS_TXFULL)
Russell Kingd3587882006-03-20 20:00:09 +00001218 barrier();
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001219
1220 writel(ch, sport->port.membase + URTX0);
Russell Kingd3587882006-03-20 20:00:09 +00001221}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001222
1223/*
1224 * Interrupts are disabled on entering
1225 */
1226static void
1227imx_console_write(struct console *co, const char *s, unsigned int count)
1228{
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001229 struct imx_port *sport = imx_ports[co->index];
Dirk Behme0ad5a812011-12-22 09:57:52 +01001230 struct imx_port_ucrs old_ucr;
1231 unsigned int ucr1;
Shawn Guof30e8262013-02-18 13:15:36 +08001232 unsigned long flags = 0;
Thomas Gleixner677fe552013-02-14 21:01:06 +01001233 int locked = 1;
Xinyu Chen9ec18822012-08-27 09:36:51 +02001234
Thomas Gleixner677fe552013-02-14 21:01:06 +01001235 if (sport->port.sysrq)
1236 locked = 0;
1237 else if (oops_in_progress)
1238 locked = spin_trylock_irqsave(&sport->port.lock, flags);
1239 else
1240 spin_lock_irqsave(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001241
1242 /*
Dirk Behme0ad5a812011-12-22 09:57:52 +01001243 * First, save UCR1/2/3 and then disable interrupts
Linus Torvalds1da177e2005-04-16 15:20:36 -07001244 */
Dirk Behme0ad5a812011-12-22 09:57:52 +01001245 imx_port_ucrs_save(&sport->port, &old_ucr);
1246 ucr1 = old_ucr.ucr1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001247
Shawn Guofe6b5402011-06-25 02:04:33 +08001248 if (is_imx1_uart(sport))
1249 ucr1 |= IMX1_UCR1_UARTCLKEN;
Sascha Hauer37d6fb62009-05-27 18:23:48 +02001250 ucr1 |= UCR1_UARTEN;
1251 ucr1 &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
1252
1253 writel(ucr1, sport->port.membase + UCR1);
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001254
Dirk Behme0ad5a812011-12-22 09:57:52 +01001255 writel(old_ucr.ucr2 | UCR2_TXEN, sport->port.membase + UCR2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001256
Russell Kingd3587882006-03-20 20:00:09 +00001257 uart_console_write(&sport->port, s, count, imx_console_putchar);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001258
1259 /*
1260 * Finally, wait for transmitter to become empty
Dirk Behme0ad5a812011-12-22 09:57:52 +01001261 * and restore UCR1/2/3
Linus Torvalds1da177e2005-04-16 15:20:36 -07001262 */
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001263 while (!(readl(sport->port.membase + USR2) & USR2_TXDC));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001264
Dirk Behme0ad5a812011-12-22 09:57:52 +01001265 imx_port_ucrs_restore(&sport->port, &old_ucr);
Xinyu Chen9ec18822012-08-27 09:36:51 +02001266
Thomas Gleixner677fe552013-02-14 21:01:06 +01001267 if (locked)
1268 spin_unlock_irqrestore(&sport->port.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001269}
1270
1271/*
1272 * If the port was already initialised (eg, by a boot loader),
1273 * try to determine the current setup.
1274 */
1275static void __init
1276imx_console_get_options(struct imx_port *sport, int *baud,
1277 int *parity, int *bits)
1278{
Sascha Hauer587897f2005-04-29 22:46:40 +01001279
Roel Kluin2e2eb502009-12-09 12:31:36 -08001280 if (readl(sport->port.membase + UCR1) & UCR1_UARTEN) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001281 /* ok, the port was enabled */
Sachin Kamat82313e62013-01-07 10:25:02 +05301282 unsigned int ucr2, ubir, ubmr, uartclk;
Sascha Hauer587897f2005-04-29 22:46:40 +01001283 unsigned int baud_raw;
1284 unsigned int ucfr_rfdiv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001285
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001286 ucr2 = readl(sport->port.membase + UCR2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001287
1288 *parity = 'n';
1289 if (ucr2 & UCR2_PREN) {
1290 if (ucr2 & UCR2_PROE)
1291 *parity = 'o';
1292 else
1293 *parity = 'e';
1294 }
1295
1296 if (ucr2 & UCR2_WS)
1297 *bits = 8;
1298 else
1299 *bits = 7;
1300
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001301 ubir = readl(sport->port.membase + UBIR) & 0xffff;
1302 ubmr = readl(sport->port.membase + UBMR) & 0xffff;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001303
Sascha Hauerff4bfb22007-04-26 08:26:13 +01001304 ucfr_rfdiv = (readl(sport->port.membase + UFCR) & UFCR_RFDIV) >> 7;
Sascha Hauer587897f2005-04-29 22:46:40 +01001305 if (ucfr_rfdiv == 6)
1306 ucfr_rfdiv = 7;
1307 else
1308 ucfr_rfdiv = 6 - ucfr_rfdiv;
1309
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001310 uartclk = clk_get_rate(sport->clk_per);
Sascha Hauer587897f2005-04-29 22:46:40 +01001311 uartclk /= ucfr_rfdiv;
1312
1313 { /*
1314 * The next code provides exact computation of
1315 * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1))
1316 * without need of float support or long long division,
1317 * which would be required to prevent 32bit arithmetic overflow
1318 */
1319 unsigned int mul = ubir + 1;
1320 unsigned int div = 16 * (ubmr + 1);
1321 unsigned int rem = uartclk % div;
1322
1323 baud_raw = (uartclk / div) * mul;
1324 baud_raw += (rem * mul + div / 2) / div;
1325 *baud = (baud_raw + 50) / 100 * 100;
1326 }
1327
Sachin Kamat82313e62013-01-07 10:25:02 +05301328 if (*baud != baud_raw)
Sachin Kamat50bbdba2013-01-07 10:25:05 +05301329 pr_info("Console IMX rounded baud rate from %d to %d\n",
Sascha Hauer587897f2005-04-29 22:46:40 +01001330 baud_raw, *baud);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001331 }
1332}
1333
1334static int __init
1335imx_console_setup(struct console *co, char *options)
1336{
1337 struct imx_port *sport;
1338 int baud = 9600;
1339 int bits = 8;
1340 int parity = 'n';
1341 int flow = 'n';
1342
1343 /*
1344 * Check whether an invalid uart number has been specified, and
1345 * if so, search for the first available port that does have
1346 * console support.
1347 */
1348 if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
1349 co->index = 0;
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001350 sport = imx_ports[co->index];
Sachin Kamat82313e62013-01-07 10:25:02 +05301351 if (sport == NULL)
Eric Lammertse76afc42009-05-19 20:53:20 -04001352 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001353
1354 if (options)
1355 uart_parse_options(options, &baud, &parity, &bits, &flow);
1356 else
1357 imx_console_get_options(sport, &baud, &parity, &bits);
1358
Sascha Hauer587897f2005-04-29 22:46:40 +01001359 imx_setup_ufcr(sport, 0);
1360
Linus Torvalds1da177e2005-04-16 15:20:36 -07001361 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
1362}
1363
Vincent Sanders9f4426d2005-10-01 22:56:34 +01001364static struct uart_driver imx_reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001365static struct console imx_console = {
Sascha Hauere3d13ff2008-07-05 10:02:48 +02001366 .name = DEV_NAME,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001367 .write = imx_console_write,
1368 .device = uart_console_device,
1369 .setup = imx_console_setup,
1370 .flags = CON_PRINTBUFFER,
1371 .index = -1,
1372 .data = &imx_reg,
1373};
1374
Linus Torvalds1da177e2005-04-16 15:20:36 -07001375#define IMX_CONSOLE &imx_console
1376#else
1377#define IMX_CONSOLE NULL
1378#endif
1379
1380static struct uart_driver imx_reg = {
1381 .owner = THIS_MODULE,
1382 .driver_name = DRIVER_NAME,
Sascha Hauere3d13ff2008-07-05 10:02:48 +02001383 .dev_name = DEV_NAME,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001384 .major = SERIAL_IMX_MAJOR,
1385 .minor = MINOR_START,
1386 .nr = ARRAY_SIZE(imx_ports),
1387 .cons = IMX_CONSOLE,
1388};
1389
Russell King3ae5eae2005-11-09 22:32:44 +00001390static int serial_imx_suspend(struct platform_device *dev, pm_message_t state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001391{
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001392 struct imx_port *sport = platform_get_drvdata(dev);
Fabio Estevamdb1a9b52011-12-13 01:23:48 -02001393 unsigned int val;
1394
1395 /* enable wakeup from i.MX UART */
1396 val = readl(sport->port.membase + UCR3);
1397 val |= UCR3_AWAKEN;
1398 writel(val, sport->port.membase + UCR3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001399
Richard Zhao034dc4d2012-09-18 16:14:59 +08001400 uart_suspend_port(&imx_reg, &sport->port);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001401
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001402 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001403}
1404
Russell King3ae5eae2005-11-09 22:32:44 +00001405static int serial_imx_resume(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001406{
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001407 struct imx_port *sport = platform_get_drvdata(dev);
Fabio Estevamdb1a9b52011-12-13 01:23:48 -02001408 unsigned int val;
1409
1410 /* disable wakeup from i.MX UART */
1411 val = readl(sport->port.membase + UCR3);
1412 val &= ~UCR3_AWAKEN;
1413 writel(val, sport->port.membase + UCR3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001414
Richard Zhao034dc4d2012-09-18 16:14:59 +08001415 uart_resume_port(&imx_reg, &sport->port);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001416
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001417 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001418}
1419
Shawn Guo22698aa2011-06-25 02:04:34 +08001420#ifdef CONFIG_OF
Uwe Kleine-König20bb8092011-12-15 09:16:34 +01001421/*
1422 * This function returns 1 iff pdev isn't a device instatiated by dt, 0 iff it
1423 * could successfully get all information from dt or a negative errno.
1424 */
Shawn Guo22698aa2011-06-25 02:04:34 +08001425static int serial_imx_probe_dt(struct imx_port *sport,
1426 struct platform_device *pdev)
1427{
1428 struct device_node *np = pdev->dev.of_node;
1429 const struct of_device_id *of_id =
1430 of_match_device(imx_uart_dt_ids, &pdev->dev);
Shawn Guoff059672011-09-22 14:48:13 +08001431 int ret;
Shawn Guo22698aa2011-06-25 02:04:34 +08001432
1433 if (!np)
Uwe Kleine-König20bb8092011-12-15 09:16:34 +01001434 /* no device tree device */
1435 return 1;
Shawn Guo22698aa2011-06-25 02:04:34 +08001436
Shawn Guoff059672011-09-22 14:48:13 +08001437 ret = of_alias_get_id(np, "serial");
1438 if (ret < 0) {
1439 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
Uwe Kleine-Königa197a192011-12-14 21:26:51 +01001440 return ret;
Shawn Guoff059672011-09-22 14:48:13 +08001441 }
1442 sport->port.line = ret;
Shawn Guo22698aa2011-06-25 02:04:34 +08001443
1444 if (of_get_property(np, "fsl,uart-has-rtscts", NULL))
1445 sport->have_rtscts = 1;
1446
1447 if (of_get_property(np, "fsl,irda-mode", NULL))
1448 sport->use_irda = 1;
1449
Huang Shijie20ff2fe2013-05-30 14:07:12 +08001450 if (of_get_property(np, "fsl,dte-mode", NULL))
1451 sport->dte_mode = 1;
1452
Shawn Guo22698aa2011-06-25 02:04:34 +08001453 sport->devdata = of_id->data;
1454
1455 return 0;
1456}
1457#else
1458static inline int serial_imx_probe_dt(struct imx_port *sport,
1459 struct platform_device *pdev)
1460{
Uwe Kleine-König20bb8092011-12-15 09:16:34 +01001461 return 1;
Shawn Guo22698aa2011-06-25 02:04:34 +08001462}
1463#endif
1464
1465static void serial_imx_probe_pdata(struct imx_port *sport,
1466 struct platform_device *pdev)
1467{
1468 struct imxuart_platform_data *pdata = pdev->dev.platform_data;
1469
1470 sport->port.line = pdev->id;
1471 sport->devdata = (struct imx_uart_data *) pdev->id_entry->driver_data;
1472
1473 if (!pdata)
1474 return;
1475
1476 if (pdata->flags & IMXUART_HAVE_RTSCTS)
1477 sport->have_rtscts = 1;
1478
1479 if (pdata->flags & IMXUART_IRDA)
1480 sport->use_irda = 1;
1481}
1482
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001483static int serial_imx_probe(struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001484{
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001485 struct imx_port *sport;
Sascha Hauer5b802342006-05-04 14:07:42 +01001486 struct imxuart_platform_data *pdata;
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001487 void __iomem *base;
1488 int ret = 0;
1489 struct resource *res;
Shawn Guofed78ce2012-05-06 20:21:05 +08001490 struct pinctrl *pinctrl;
Sascha Hauer5b802342006-05-04 14:07:42 +01001491
Sachin Kamat42d34192013-01-07 10:25:06 +05301492 sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL);
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001493 if (!sport)
1494 return -ENOMEM;
1495
Shawn Guo22698aa2011-06-25 02:04:34 +08001496 ret = serial_imx_probe_dt(sport, pdev);
Uwe Kleine-König20bb8092011-12-15 09:16:34 +01001497 if (ret > 0)
Shawn Guo22698aa2011-06-25 02:04:34 +08001498 serial_imx_probe_pdata(sport, pdev);
Uwe Kleine-König20bb8092011-12-15 09:16:34 +01001499 else if (ret < 0)
Sachin Kamat42d34192013-01-07 10:25:06 +05301500 return ret;
Shawn Guo22698aa2011-06-25 02:04:34 +08001501
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001502 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Sachin Kamat42d34192013-01-07 10:25:06 +05301503 if (!res)
1504 return -ENODEV;
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001505
Sachin Kamat42d34192013-01-07 10:25:06 +05301506 base = devm_ioremap(&pdev->dev, res->start, PAGE_SIZE);
1507 if (!base)
1508 return -ENOMEM;
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001509
1510 sport->port.dev = &pdev->dev;
1511 sport->port.mapbase = res->start;
1512 sport->port.membase = base;
1513 sport->port.type = PORT_IMX,
1514 sport->port.iotype = UPIO_MEM;
1515 sport->port.irq = platform_get_irq(pdev, 0);
1516 sport->rxirq = platform_get_irq(pdev, 0);
1517 sport->txirq = platform_get_irq(pdev, 1);
1518 sport->rtsirq = platform_get_irq(pdev, 2);
1519 sport->port.fifosize = 32;
1520 sport->port.ops = &imx_pops;
1521 sport->port.flags = UPF_BOOT_AUTOCONF;
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001522 init_timer(&sport->timer);
1523 sport->timer.function = imx_timeout;
1524 sport->timer.data = (unsigned long)sport;
Sascha Hauer38a41fd2008-07-05 10:02:46 +02001525
Shawn Guofed78ce2012-05-06 20:21:05 +08001526 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
1527 if (IS_ERR(pinctrl)) {
1528 ret = PTR_ERR(pinctrl);
Uwe Kleine-König833462e2012-08-20 09:57:04 +02001529 dev_err(&pdev->dev, "failed to get default pinctrl: %d\n", ret);
Sachin Kamat42d34192013-01-07 10:25:06 +05301530 return ret;
Shawn Guofed78ce2012-05-06 20:21:05 +08001531 }
1532
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001533 sport->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
1534 if (IS_ERR(sport->clk_ipg)) {
1535 ret = PTR_ERR(sport->clk_ipg);
Uwe Kleine-König833462e2012-08-20 09:57:04 +02001536 dev_err(&pdev->dev, "failed to get ipg clk: %d\n", ret);
Sachin Kamat42d34192013-01-07 10:25:06 +05301537 return ret;
Sascha Hauer38a41fd2008-07-05 10:02:46 +02001538 }
Sascha Hauer38a41fd2008-07-05 10:02:46 +02001539
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001540 sport->clk_per = devm_clk_get(&pdev->dev, "per");
1541 if (IS_ERR(sport->clk_per)) {
1542 ret = PTR_ERR(sport->clk_per);
Uwe Kleine-König833462e2012-08-20 09:57:04 +02001543 dev_err(&pdev->dev, "failed to get per clk: %d\n", ret);
Sachin Kamat42d34192013-01-07 10:25:06 +05301544 return ret;
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001545 }
1546
1547 clk_prepare_enable(sport->clk_per);
1548 clk_prepare_enable(sport->clk_ipg);
1549
1550 sport->port.uartclk = clk_get_rate(sport->clk_per);
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001551
Shawn Guo22698aa2011-06-25 02:04:34 +08001552 imx_ports[sport->port.line] = sport;
Sascha Hauer5b802342006-05-04 14:07:42 +01001553
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001554 pdata = pdev->dev.platform_data;
Baruch Siachbbcd18d2009-12-21 16:26:46 -08001555 if (pdata && pdata->init) {
Darius Augulisc45e7d72008-09-02 10:19:29 +02001556 ret = pdata->init(pdev);
1557 if (ret)
1558 goto clkput;
1559 }
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001560
Daniel Glöckner9f322ad2009-06-11 14:39:21 +01001561 ret = uart_add_one_port(&imx_reg, &sport->port);
1562 if (ret)
1563 goto deinit;
Richard Zhao0a86a862012-09-18 16:14:58 +08001564 platform_set_drvdata(pdev, sport);
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001565
Linus Torvalds1da177e2005-04-16 15:20:36 -07001566 return 0;
Daniel Glöckner9f322ad2009-06-11 14:39:21 +01001567deinit:
Baruch Siachbbcd18d2009-12-21 16:26:46 -08001568 if (pdata && pdata->exit)
Daniel Glöckner9f322ad2009-06-11 14:39:21 +01001569 pdata->exit(pdev);
Darius Augulisc45e7d72008-09-02 10:19:29 +02001570clkput:
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001571 clk_disable_unprepare(sport->clk_per);
1572 clk_disable_unprepare(sport->clk_ipg);
Sascha Hauerdbff4e92008-07-05 10:02:45 +02001573 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001574}
1575
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001576static int serial_imx_remove(struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001577{
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001578 struct imxuart_platform_data *pdata;
1579 struct imx_port *sport = platform_get_drvdata(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001580
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001581 pdata = pdev->dev.platform_data;
1582
1583 platform_set_drvdata(pdev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001584
Sascha Hauer3a9465f2012-03-07 09:31:43 +01001585 uart_remove_one_port(&imx_reg, &sport->port);
1586
1587 clk_disable_unprepare(sport->clk_per);
1588 clk_disable_unprepare(sport->clk_ipg);
Sascha Hauer38a41fd2008-07-05 10:02:46 +02001589
Baruch Siachbbcd18d2009-12-21 16:26:46 -08001590 if (pdata && pdata->exit)
Sascha Hauer2582d8c2008-07-05 10:02:45 +02001591 pdata->exit(pdev);
1592
Linus Torvalds1da177e2005-04-16 15:20:36 -07001593 return 0;
1594}
1595
Russell King3ae5eae2005-11-09 22:32:44 +00001596static struct platform_driver serial_imx_driver = {
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001597 .probe = serial_imx_probe,
1598 .remove = serial_imx_remove,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001599
1600 .suspend = serial_imx_suspend,
1601 .resume = serial_imx_resume,
Shawn Guofe6b5402011-06-25 02:04:33 +08001602 .id_table = imx_uart_devtype,
Russell King3ae5eae2005-11-09 22:32:44 +00001603 .driver = {
Oskar Schirmerd3810cd2009-06-11 14:35:01 +01001604 .name = "imx-uart",
Kay Sieverse169c132008-04-15 14:34:35 -07001605 .owner = THIS_MODULE,
Shawn Guo22698aa2011-06-25 02:04:34 +08001606 .of_match_table = imx_uart_dt_ids,
Russell King3ae5eae2005-11-09 22:32:44 +00001607 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001608};
1609
1610static int __init imx_serial_init(void)
1611{
1612 int ret;
1613
Sachin Kamat50bbdba2013-01-07 10:25:05 +05301614 pr_info("Serial: IMX driver\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001615
Linus Torvalds1da177e2005-04-16 15:20:36 -07001616 ret = uart_register_driver(&imx_reg);
1617 if (ret)
1618 return ret;
1619
Russell King3ae5eae2005-11-09 22:32:44 +00001620 ret = platform_driver_register(&serial_imx_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001621 if (ret != 0)
1622 uart_unregister_driver(&imx_reg);
1623
Uwe Kleine-Königf2278242011-11-22 14:22:55 +01001624 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001625}
1626
1627static void __exit imx_serial_exit(void)
1628{
Russell Kingc889b892005-11-21 17:05:21 +00001629 platform_driver_unregister(&serial_imx_driver);
Sascha Hauer4b300c32007-07-17 13:35:46 +01001630 uart_unregister_driver(&imx_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001631}
1632
1633module_init(imx_serial_init);
1634module_exit(imx_serial_exit);
1635
1636MODULE_AUTHOR("Sascha Hauer");
1637MODULE_DESCRIPTION("IMX generic serial port driver");
1638MODULE_LICENSE("GPL");
Kay Sieverse169c132008-04-15 14:34:35 -07001639MODULE_ALIAS("platform:imx-uart");