Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
| 6 | * Copyright (C) 2009 Wind River Systems, |
| 7 | * written by Ralf Baechle <ralf@linux-mips.org> |
Daniel Walker | 1bc021e | 2013-09-20 15:46:41 -0700 | [diff] [blame] | 8 | * |
| 9 | * Copyright (c) 2013 by Cisco Systems, Inc. |
| 10 | * All rights reserved. |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 11 | */ |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/slab.h> |
| 15 | #include <linux/io.h> |
| 16 | #include <linux/edac.h> |
Daniel Walker | 1bc021e | 2013-09-20 15:46:41 -0700 | [diff] [blame] | 17 | #include <linux/ctype.h> |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 18 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 19 | #include <asm/octeon/octeon.h> |
| 20 | #include <asm/octeon/cvmx-lmcx-defs.h> |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 21 | |
| 22 | #include "edac_core.h" |
| 23 | #include "edac_module.h" |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 24 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 25 | #define OCTEON_MAX_MC 4 |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 26 | |
Daniel Walker | 1bc021e | 2013-09-20 15:46:41 -0700 | [diff] [blame] | 27 | #define to_mci(k) container_of(k, struct mem_ctl_info, dev) |
| 28 | |
| 29 | struct octeon_lmc_pvt { |
| 30 | unsigned long inject; |
| 31 | unsigned long error_type; |
| 32 | unsigned long dimm; |
| 33 | unsigned long rank; |
| 34 | unsigned long bank; |
| 35 | unsigned long row; |
| 36 | unsigned long col; |
| 37 | }; |
| 38 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 39 | static void octeon_lmc_edac_poll(struct mem_ctl_info *mci) |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 40 | { |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 41 | union cvmx_lmcx_mem_cfg0 cfg0; |
| 42 | bool do_clear = false; |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 43 | char msg[64]; |
| 44 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 45 | cfg0.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mci->mc_idx)); |
| 46 | if (cfg0.s.sec_err || cfg0.s.ded_err) { |
| 47 | union cvmx_lmcx_fadr fadr; |
| 48 | fadr.u64 = cvmx_read_csr(CVMX_LMCX_FADR(mci->mc_idx)); |
| 49 | snprintf(msg, sizeof(msg), |
| 50 | "DIMM %d rank %d bank %d row %d col %d", |
| 51 | fadr.cn30xx.fdimm, fadr.cn30xx.fbunk, |
| 52 | fadr.cn30xx.fbank, fadr.cn30xx.frow, fadr.cn30xx.fcol); |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 53 | } |
| 54 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 55 | if (cfg0.s.sec_err) { |
| 56 | edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1, 0, 0, 0, |
| 57 | -1, -1, -1, msg, ""); |
| 58 | cfg0.s.sec_err = -1; /* Done, re-arm */ |
| 59 | do_clear = true; |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 60 | } |
| 61 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 62 | if (cfg0.s.ded_err) { |
| 63 | edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0, |
| 64 | -1, -1, -1, msg, ""); |
| 65 | cfg0.s.ded_err = -1; /* Done, re-arm */ |
| 66 | do_clear = true; |
| 67 | } |
| 68 | if (do_clear) |
| 69 | cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mci->mc_idx), cfg0.u64); |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 70 | } |
| 71 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 72 | static void octeon_lmc_edac_poll_o2(struct mem_ctl_info *mci) |
| 73 | { |
Daniel Walker | 1bc021e | 2013-09-20 15:46:41 -0700 | [diff] [blame] | 74 | struct octeon_lmc_pvt *pvt = mci->pvt_info; |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 75 | union cvmx_lmcx_int int_reg; |
| 76 | bool do_clear = false; |
| 77 | char msg[64]; |
| 78 | |
Daniel Walker | 1bc021e | 2013-09-20 15:46:41 -0700 | [diff] [blame] | 79 | if (!pvt->inject) |
| 80 | int_reg.u64 = cvmx_read_csr(CVMX_LMCX_INT(mci->mc_idx)); |
| 81 | else { |
James Hogan | 10ddc77 | 2017-11-13 16:12:06 +0000 | [diff] [blame] | 82 | int_reg.u64 = 0; |
Daniel Walker | 1bc021e | 2013-09-20 15:46:41 -0700 | [diff] [blame] | 83 | if (pvt->error_type == 1) |
| 84 | int_reg.s.sec_err = 1; |
| 85 | if (pvt->error_type == 2) |
| 86 | int_reg.s.ded_err = 1; |
| 87 | } |
| 88 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 89 | if (int_reg.s.sec_err || int_reg.s.ded_err) { |
| 90 | union cvmx_lmcx_fadr fadr; |
Daniel Walker | 1bc021e | 2013-09-20 15:46:41 -0700 | [diff] [blame] | 91 | if (likely(!pvt->inject)) |
| 92 | fadr.u64 = cvmx_read_csr(CVMX_LMCX_FADR(mci->mc_idx)); |
| 93 | else { |
| 94 | fadr.cn61xx.fdimm = pvt->dimm; |
| 95 | fadr.cn61xx.fbunk = pvt->rank; |
| 96 | fadr.cn61xx.fbank = pvt->bank; |
| 97 | fadr.cn61xx.frow = pvt->row; |
| 98 | fadr.cn61xx.fcol = pvt->col; |
| 99 | } |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 100 | snprintf(msg, sizeof(msg), |
| 101 | "DIMM %d rank %d bank %d row %d col %d", |
| 102 | fadr.cn61xx.fdimm, fadr.cn61xx.fbunk, |
| 103 | fadr.cn61xx.fbank, fadr.cn61xx.frow, fadr.cn61xx.fcol); |
| 104 | } |
| 105 | |
| 106 | if (int_reg.s.sec_err) { |
| 107 | edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1, 0, 0, 0, |
| 108 | -1, -1, -1, msg, ""); |
| 109 | int_reg.s.sec_err = -1; /* Done, re-arm */ |
| 110 | do_clear = true; |
| 111 | } |
| 112 | |
| 113 | if (int_reg.s.ded_err) { |
| 114 | edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0, |
| 115 | -1, -1, -1, msg, ""); |
| 116 | int_reg.s.ded_err = -1; /* Done, re-arm */ |
| 117 | do_clear = true; |
| 118 | } |
Daniel Walker | 1bc021e | 2013-09-20 15:46:41 -0700 | [diff] [blame] | 119 | |
| 120 | if (do_clear) { |
| 121 | if (likely(!pvt->inject)) |
| 122 | cvmx_write_csr(CVMX_LMCX_INT(mci->mc_idx), int_reg.u64); |
| 123 | else |
| 124 | pvt->inject = 0; |
| 125 | } |
| 126 | } |
| 127 | |
| 128 | /************************ MC SYSFS parts ***********************************/ |
| 129 | |
| 130 | /* Only a couple naming differences per template, so very similar */ |
| 131 | #define TEMPLATE_SHOW(reg) \ |
| 132 | static ssize_t octeon_mc_inject_##reg##_show(struct device *dev, \ |
| 133 | struct device_attribute *attr, \ |
| 134 | char *data) \ |
| 135 | { \ |
| 136 | struct mem_ctl_info *mci = to_mci(dev); \ |
| 137 | struct octeon_lmc_pvt *pvt = mci->pvt_info; \ |
| 138 | return sprintf(data, "%016llu\n", (u64)pvt->reg); \ |
| 139 | } |
| 140 | |
| 141 | #define TEMPLATE_STORE(reg) \ |
| 142 | static ssize_t octeon_mc_inject_##reg##_store(struct device *dev, \ |
| 143 | struct device_attribute *attr, \ |
| 144 | const char *data, size_t count) \ |
| 145 | { \ |
| 146 | struct mem_ctl_info *mci = to_mci(dev); \ |
| 147 | struct octeon_lmc_pvt *pvt = mci->pvt_info; \ |
| 148 | if (isdigit(*data)) { \ |
| 149 | if (!kstrtoul(data, 0, &pvt->reg)) \ |
| 150 | return count; \ |
| 151 | } \ |
| 152 | return 0; \ |
| 153 | } |
| 154 | |
| 155 | TEMPLATE_SHOW(inject); |
| 156 | TEMPLATE_STORE(inject); |
| 157 | TEMPLATE_SHOW(dimm); |
| 158 | TEMPLATE_STORE(dimm); |
| 159 | TEMPLATE_SHOW(bank); |
| 160 | TEMPLATE_STORE(bank); |
| 161 | TEMPLATE_SHOW(rank); |
| 162 | TEMPLATE_STORE(rank); |
| 163 | TEMPLATE_SHOW(row); |
| 164 | TEMPLATE_STORE(row); |
| 165 | TEMPLATE_SHOW(col); |
| 166 | TEMPLATE_STORE(col); |
| 167 | |
| 168 | static ssize_t octeon_mc_inject_error_type_store(struct device *dev, |
| 169 | struct device_attribute *attr, |
| 170 | const char *data, |
| 171 | size_t count) |
| 172 | { |
| 173 | struct mem_ctl_info *mci = to_mci(dev); |
| 174 | struct octeon_lmc_pvt *pvt = mci->pvt_info; |
| 175 | |
| 176 | if (!strncmp(data, "single", 6)) |
| 177 | pvt->error_type = 1; |
| 178 | else if (!strncmp(data, "double", 6)) |
| 179 | pvt->error_type = 2; |
| 180 | |
| 181 | return count; |
| 182 | } |
| 183 | |
| 184 | static ssize_t octeon_mc_inject_error_type_show(struct device *dev, |
| 185 | struct device_attribute *attr, |
| 186 | char *data) |
| 187 | { |
| 188 | struct mem_ctl_info *mci = to_mci(dev); |
| 189 | struct octeon_lmc_pvt *pvt = mci->pvt_info; |
| 190 | if (pvt->error_type == 1) |
| 191 | return sprintf(data, "single"); |
| 192 | else if (pvt->error_type == 2) |
| 193 | return sprintf(data, "double"); |
| 194 | |
| 195 | return 0; |
| 196 | } |
| 197 | |
| 198 | static DEVICE_ATTR(inject, S_IRUGO | S_IWUSR, |
| 199 | octeon_mc_inject_inject_show, octeon_mc_inject_inject_store); |
| 200 | static DEVICE_ATTR(error_type, S_IRUGO | S_IWUSR, |
| 201 | octeon_mc_inject_error_type_show, octeon_mc_inject_error_type_store); |
| 202 | static DEVICE_ATTR(dimm, S_IRUGO | S_IWUSR, |
| 203 | octeon_mc_inject_dimm_show, octeon_mc_inject_dimm_store); |
| 204 | static DEVICE_ATTR(rank, S_IRUGO | S_IWUSR, |
| 205 | octeon_mc_inject_rank_show, octeon_mc_inject_rank_store); |
| 206 | static DEVICE_ATTR(bank, S_IRUGO | S_IWUSR, |
| 207 | octeon_mc_inject_bank_show, octeon_mc_inject_bank_store); |
| 208 | static DEVICE_ATTR(row, S_IRUGO | S_IWUSR, |
| 209 | octeon_mc_inject_row_show, octeon_mc_inject_row_store); |
| 210 | static DEVICE_ATTR(col, S_IRUGO | S_IWUSR, |
| 211 | octeon_mc_inject_col_show, octeon_mc_inject_col_store); |
| 212 | |
Takashi Iwai | 1bf06a0 | 2015-02-04 11:48:57 +0100 | [diff] [blame] | 213 | static struct attribute *octeon_dev_attrs[] = { |
| 214 | &dev_attr_inject.attr, |
| 215 | &dev_attr_error_type.attr, |
| 216 | &dev_attr_dimm.attr, |
| 217 | &dev_attr_rank.attr, |
| 218 | &dev_attr_bank.attr, |
| 219 | &dev_attr_row.attr, |
| 220 | &dev_attr_col.attr, |
| 221 | NULL |
| 222 | }; |
Daniel Walker | 1bc021e | 2013-09-20 15:46:41 -0700 | [diff] [blame] | 223 | |
Takashi Iwai | 1bf06a0 | 2015-02-04 11:48:57 +0100 | [diff] [blame] | 224 | ATTRIBUTE_GROUPS(octeon_dev); |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 225 | |
Greg Kroah-Hartman | 9b3c6e8 | 2012-12-21 13:23:51 -0800 | [diff] [blame] | 226 | static int octeon_lmc_edac_probe(struct platform_device *pdev) |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 227 | { |
| 228 | struct mem_ctl_info *mci; |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 229 | struct edac_mc_layer layers[1]; |
| 230 | int mc = pdev->id; |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 231 | |
Daniel Walker | 5331de0 | 2013-09-20 15:46:40 -0700 | [diff] [blame] | 232 | opstate_init(); |
| 233 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 234 | layers[0].type = EDAC_MC_LAYER_CHANNEL; |
| 235 | layers[0].size = 1; |
| 236 | layers[0].is_virt_csrow = false; |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 237 | |
Aaro Koskinen | 75a15a7 | 2015-07-01 13:38:52 +0300 | [diff] [blame] | 238 | if (OCTEON_IS_OCTEON1PLUS()) { |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 239 | union cvmx_lmcx_mem_cfg0 cfg0; |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 240 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 241 | cfg0.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(0)); |
| 242 | if (!cfg0.s.ecc_ena) { |
| 243 | dev_info(&pdev->dev, "Disabled (ECC not enabled)\n"); |
| 244 | return 0; |
| 245 | } |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 246 | |
Daniel Walker | 1bc021e | 2013-09-20 15:46:41 -0700 | [diff] [blame] | 247 | mci = edac_mc_alloc(mc, ARRAY_SIZE(layers), layers, sizeof(struct octeon_lmc_pvt)); |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 248 | if (!mci) |
| 249 | return -ENXIO; |
| 250 | |
| 251 | mci->pdev = &pdev->dev; |
| 252 | mci->dev_name = dev_name(&pdev->dev); |
| 253 | |
| 254 | mci->mod_name = "octeon-lmc"; |
| 255 | mci->ctl_name = "octeon-lmc-err"; |
| 256 | mci->edac_check = octeon_lmc_edac_poll; |
| 257 | |
Takashi Iwai | 1bf06a0 | 2015-02-04 11:48:57 +0100 | [diff] [blame] | 258 | if (edac_mc_add_mc_with_groups(mci, octeon_dev_groups)) { |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 259 | dev_err(&pdev->dev, "edac_mc_add_mc() failed\n"); |
| 260 | edac_mc_free(mci); |
| 261 | return -ENXIO; |
| 262 | } |
| 263 | |
| 264 | cfg0.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mc)); |
| 265 | cfg0.s.intr_ded_ena = 0; /* We poll */ |
| 266 | cfg0.s.intr_sec_ena = 0; |
| 267 | cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mc), cfg0.u64); |
| 268 | } else { |
| 269 | /* OCTEON II */ |
| 270 | union cvmx_lmcx_int_en en; |
| 271 | union cvmx_lmcx_config config; |
| 272 | |
| 273 | config.u64 = cvmx_read_csr(CVMX_LMCX_CONFIG(0)); |
| 274 | if (!config.s.ecc_ena) { |
| 275 | dev_info(&pdev->dev, "Disabled (ECC not enabled)\n"); |
| 276 | return 0; |
| 277 | } |
| 278 | |
Daniel Walker | 1bc021e | 2013-09-20 15:46:41 -0700 | [diff] [blame] | 279 | mci = edac_mc_alloc(mc, ARRAY_SIZE(layers), layers, sizeof(struct octeon_lmc_pvt)); |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 280 | if (!mci) |
| 281 | return -ENXIO; |
| 282 | |
| 283 | mci->pdev = &pdev->dev; |
| 284 | mci->dev_name = dev_name(&pdev->dev); |
| 285 | |
| 286 | mci->mod_name = "octeon-lmc"; |
| 287 | mci->ctl_name = "co_lmc_err"; |
| 288 | mci->edac_check = octeon_lmc_edac_poll_o2; |
| 289 | |
Takashi Iwai | 1bf06a0 | 2015-02-04 11:48:57 +0100 | [diff] [blame] | 290 | if (edac_mc_add_mc_with_groups(mci, octeon_dev_groups)) { |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 291 | dev_err(&pdev->dev, "edac_mc_add_mc() failed\n"); |
| 292 | edac_mc_free(mci); |
| 293 | return -ENXIO; |
| 294 | } |
| 295 | |
| 296 | en.u64 = cvmx_read_csr(CVMX_LMCX_MEM_CFG0(mc)); |
| 297 | en.s.intr_ded_ena = 0; /* We poll */ |
| 298 | en.s.intr_sec_ena = 0; |
| 299 | cvmx_write_csr(CVMX_LMCX_MEM_CFG0(mc), en.u64); |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 300 | } |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 301 | platform_set_drvdata(pdev, mci); |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 302 | |
| 303 | return 0; |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 304 | } |
| 305 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 306 | static int octeon_lmc_edac_remove(struct platform_device *pdev) |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 307 | { |
| 308 | struct mem_ctl_info *mci = platform_get_drvdata(pdev); |
| 309 | |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 310 | edac_mc_del_mc(&pdev->dev); |
| 311 | edac_mc_free(mci); |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 312 | return 0; |
| 313 | } |
| 314 | |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 315 | static struct platform_driver octeon_lmc_edac_driver = { |
| 316 | .probe = octeon_lmc_edac_probe, |
| 317 | .remove = octeon_lmc_edac_remove, |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 318 | .driver = { |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 319 | .name = "octeon_lmc_edac", |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 320 | } |
| 321 | }; |
David Daney | e1ced09 | 2012-11-15 13:58:59 -0800 | [diff] [blame] | 322 | module_platform_driver(octeon_lmc_edac_driver); |
Ralf Baechle | f65aad4 | 2012-10-17 00:39:09 +0200 | [diff] [blame] | 323 | |
| 324 | MODULE_LICENSE("GPL"); |
| 325 | MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>"); |