| Naveen Krishna Ch | 8a73cd4 | 2013-10-16 11:00:42 +0530 | [diff] [blame] | 1 | * Samsung's High Speed I2C controller |
| 2 | |
| 3 | The Samsung's High Speed I2C controller is used to interface with I2C devices |
| 4 | at various speeds ranging from 100khz to 3.4Mhz. |
| 5 | |
| 6 | Required properties: |
| 7 | - compatible: value should be. |
| 8 | -> "samsung,exynos5-hsi2c", for i2c compatible with exynos5 hsi2c. |
| 9 | - reg: physical base address of the controller and length of memory mapped |
| 10 | region. |
| 11 | - interrupts: interrupt number to the cpu. |
| 12 | - #address-cells: always 1 (for i2c addresses) |
| 13 | - #size-cells: always 0 |
| 14 | |
| 15 | - Pinctrl: |
| 16 | - pinctrl-0: Pin control group to be used for this controller. |
| 17 | - pinctrl-names: Should contain only one value - "default". |
| 18 | |
| 19 | Optional properties: |
| 20 | - clock-frequency: Desired operating frequency in Hz of the bus. |
| 21 | -> If not specified, the bus operates in fast-speed mode at |
| 22 | at 100khz. |
| 23 | -> If specified, the bus operates in high-speed mode only if the |
| 24 | clock-frequency is >= 1Mhz. |
| 25 | |
| 26 | Example: |
| 27 | |
| 28 | hsi2c@12ca0000 { |
| 29 | compatible = "samsung,exynos5-hsi2c"; |
| 30 | reg = <0x12ca0000 0x100>; |
| 31 | interrupts = <56>; |
| 32 | clock-frequency = <100000>; |
| 33 | |
| 34 | pinctrl-0 = <&i2c4_bus>; |
| 35 | pinctrl-names = "default"; |
| 36 | |
| 37 | #address-cells = <1>; |
| 38 | #size-cells = <0>; |
| 39 | |
| 40 | s2mps11_pmic@66 { |
| 41 | compatible = "samsung,s2mps11-pmic"; |
| 42 | reg = <0x66>; |
| 43 | }; |
| 44 | }; |