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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
4 *
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10005 * Right now, I am very wasteful with the buffers. I allocate memory
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * pages and then divide them into 2K frame buffers. This way I know I
7 * have buffers large enough to hold one frame within one buffer descriptor.
8 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
9 * will be much more memory efficient and will easily handle lots of
10 * small packets.
11 *
12 * Much better multiple PHY support by Magnus Damm.
13 * Copyright (c) 2000 Ericsson Radio Systems AB.
14 *
Greg Ungerer562d2f82005-11-07 14:09:50 +100015 * Support for FEC controller of ColdFire processors.
16 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +100017 *
18 * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
Philippe De Muyter677177c2006-06-27 13:05:33 +100019 * Copyright (c) 2004-2006 Macq Electronique SA.
Linus Torvalds1da177e2005-04-16 15:20:36 -070020 */
21
Linus Torvalds1da177e2005-04-16 15:20:36 -070022#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/string.h>
25#include <linux/ptrace.h>
26#include <linux/errno.h>
27#include <linux/ioport.h>
28#include <linux/slab.h>
29#include <linux/interrupt.h>
30#include <linux/pci.h>
31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/netdevice.h>
34#include <linux/etherdevice.h>
35#include <linux/skbuff.h>
36#include <linux/spinlock.h>
37#include <linux/workqueue.h>
38#include <linux/bitops.h>
Sascha Hauer6f501b12009-01-28 23:03:05 +000039#include <linux/io.h>
40#include <linux/irq.h>
Sascha Hauer196719e2009-01-28 23:03:10 +000041#include <linux/clk.h>
Sascha Haueread73182009-01-28 23:03:11 +000042#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043
Greg Ungerer080853a2007-07-30 16:28:46 +100044#include <asm/cacheflush.h>
Sascha Hauer196719e2009-01-28 23:03:10 +000045
46#ifndef CONFIG_ARCH_MXC
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <asm/coldfire.h>
48#include <asm/mcfsim.h>
Sascha Hauer196719e2009-01-28 23:03:10 +000049#endif
Sascha Hauer6f501b12009-01-28 23:03:05 +000050
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include "fec.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070052
Sascha Hauer196719e2009-01-28 23:03:10 +000053#ifdef CONFIG_ARCH_MXC
54#include <mach/hardware.h>
55#define FEC_ALIGNMENT 0xf
56#else
57#define FEC_ALIGNMENT 0x3
58#endif
59
Sascha Haueread73182009-01-28 23:03:11 +000060/*
61 * Define the fixed address of the FEC hardware.
62 */
Greg Ungerer87f4abb2008-06-06 15:55:36 +100063#if defined(CONFIG_M5272)
Sebastian Siewiorc1d96152008-05-01 14:04:02 +100064#define HAVE_mii_link_interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
66static unsigned char fec_mac_default[] = {
67 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
68};
69
70/*
71 * Some hardware gets it MAC address out of local flash memory.
72 * if this is non-zero then assume it is the address to get MAC from.
73 */
74#if defined(CONFIG_NETtel)
75#define FEC_FLASHMAC 0xf0006006
76#elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES)
77#define FEC_FLASHMAC 0xf0006000
Linus Torvalds1da177e2005-04-16 15:20:36 -070078#elif defined(CONFIG_CANCam)
79#define FEC_FLASHMAC 0xf0020000
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +100080#elif defined (CONFIG_M5272C3)
81#define FEC_FLASHMAC (0xffe04000 + 4)
82#elif defined(CONFIG_MOD5272)
83#define FEC_FLASHMAC 0xffc0406b
Linus Torvalds1da177e2005-04-16 15:20:36 -070084#else
85#define FEC_FLASHMAC 0
86#endif
Greg Ungerer43be6362009-02-26 22:42:51 -080087#endif /* CONFIG_M5272 */
Sascha Haueread73182009-01-28 23:03:11 +000088
Sascha Hauer22f6b862009-04-15 01:32:18 +000089/* Forward declarations of some structures to support different PHYs */
Linus Torvalds1da177e2005-04-16 15:20:36 -070090
91typedef struct {
92 uint mii_data;
93 void (*funct)(uint mii_reg, struct net_device *dev);
94} phy_cmd_t;
95
96typedef struct {
97 uint id;
98 char *name;
99
100 const phy_cmd_t *config;
101 const phy_cmd_t *startup;
102 const phy_cmd_t *ack_int;
103 const phy_cmd_t *shutdown;
104} phy_info_t;
105
106/* The number of Tx and Rx buffers. These are allocated from the page
107 * pool. The code may assume these are power of two, so it it best
108 * to keep them that size.
109 * We don't need to allocate pages for the transmitter. We just use
110 * the skbuffer directly.
111 */
112#define FEC_ENET_RX_PAGES 8
113#define FEC_ENET_RX_FRSIZE 2048
114#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE)
115#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES)
116#define FEC_ENET_TX_FRSIZE 2048
117#define FEC_ENET_TX_FRPPG (PAGE_SIZE / FEC_ENET_TX_FRSIZE)
118#define TX_RING_SIZE 16 /* Must be power of two */
119#define TX_RING_MOD_MASK 15 /* for this to work */
120
Greg Ungerer562d2f82005-11-07 14:09:50 +1000121#if (((RX_RING_SIZE + TX_RING_SIZE) * 8) > PAGE_SIZE)
Matt Waddel6b265292006-06-27 13:10:56 +1000122#error "FEC: descriptor ring size constants too large"
Greg Ungerer562d2f82005-11-07 14:09:50 +1000123#endif
124
Sascha Hauer22f6b862009-04-15 01:32:18 +0000125/* Interrupt events/masks. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126#define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
127#define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
128#define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
129#define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */
130#define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */
131#define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */
132#define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */
133#define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */
134#define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */
135#define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */
136
137/* The FEC stores dest/src/type, data, and checksum for receive packets.
138 */
139#define PKT_MAXBUF_SIZE 1518
140#define PKT_MINBUF_SIZE 64
141#define PKT_MAXBLR_SIZE 1520
142
143
144/*
Matt Waddel6b265292006-06-27 13:10:56 +1000145 * The 5270/5271/5280/5282/532x RX control register also contains maximum frame
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146 * size bits. Other FEC hardware does not, so we need to take that into
147 * account when setting it.
148 */
Greg Ungerer562d2f82005-11-07 14:09:50 +1000149#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
Sascha Hauer196719e2009-01-28 23:03:10 +0000150 defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARCH_MXC)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151#define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
152#else
153#define OPT_FRAME_SIZE 0
154#endif
155
156/* The FEC buffer descriptors track the ring buffers. The rx_bd_base and
157 * tx_bd_base always point to the base of the buffer descriptors. The
158 * cur_rx and cur_tx point to the currently available buffer.
159 * The dirty_tx tracks the current buffer that is being sent by the
160 * controller. The cur_tx and dirty_tx are equal under both completely
161 * empty and completely full conditions. The empty/ready indicator in
162 * the buffer descriptor determines the actual condition.
163 */
164struct fec_enet_private {
165 /* Hardware registers of the FEC device */
Sascha Hauerf44d6302009-04-15 03:11:30 +0000166 void __iomem *hwp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167
Greg Ungerercb84d6e2007-07-30 16:29:09 +1000168 struct net_device *netdev;
169
Sascha Haueread73182009-01-28 23:03:11 +0000170 struct clk *clk;
171
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
173 unsigned char *tx_bounce[TX_RING_SIZE];
174 struct sk_buff* tx_skbuff[TX_RING_SIZE];
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +0000175 struct sk_buff* rx_skbuff[RX_RING_SIZE];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 ushort skb_cur;
177 ushort skb_dirty;
178
Sascha Hauer22f6b862009-04-15 01:32:18 +0000179 /* CPM dual port RAM relative addresses */
Sascha Hauer4661e752009-01-28 23:03:07 +0000180 dma_addr_t bd_dma;
Sascha Hauer22f6b862009-04-15 01:32:18 +0000181 /* Address of Rx and Tx buffers */
Sascha Hauer2e285322009-04-15 01:32:16 +0000182 struct bufdesc *rx_bd_base;
183 struct bufdesc *tx_bd_base;
184 /* The next free ring entry */
185 struct bufdesc *cur_rx, *cur_tx;
Sascha Hauer22f6b862009-04-15 01:32:18 +0000186 /* The ring entries to be free()ed */
Sascha Hauer2e285322009-04-15 01:32:16 +0000187 struct bufdesc *dirty_tx;
188
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189 uint tx_full;
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000190 /* hold while accessing the HW like ringbuffer for tx/rx but not MAC */
191 spinlock_t hw_lock;
192 /* hold while accessing the mii_list_t() elements */
193 spinlock_t mii_lock;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194
195 uint phy_id;
196 uint phy_id_done;
197 uint phy_status;
198 uint phy_speed;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000199 phy_info_t const *phy;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200 struct work_struct phy_task;
201
202 uint sequence_done;
203 uint mii_phy_task_queued;
204
205 uint phy_addr;
206
207 int index;
208 int opened;
209 int link;
210 int old_link;
211 int full_duplex;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212};
213
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214static void fec_enet_mii(struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +0100215static irqreturn_t fec_enet_interrupt(int irq, void * dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216static void fec_enet_tx(struct net_device *dev);
217static void fec_enet_rx(struct net_device *dev);
218static int fec_enet_close(struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219static void fec_restart(struct net_device *dev, int duplex);
220static void fec_stop(struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221
222
223/* MII processing. We keep this as simple as possible. Requests are
224 * placed on the list (if there is room). When the request is finished
225 * by the MII, an optional function may be called.
226 */
227typedef struct mii_list {
228 uint mii_regval;
229 void (*mii_func)(uint val, struct net_device *dev);
230 struct mii_list *mii_next;
231} mii_list_t;
232
233#define NMII 20
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000234static mii_list_t mii_cmds[NMII];
235static mii_list_t *mii_free;
236static mii_list_t *mii_head;
237static mii_list_t *mii_tail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400239static int mii_queue(struct net_device *dev, int request,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240 void (*func)(uint, struct net_device *));
241
Sascha Hauer22f6b862009-04-15 01:32:18 +0000242/* Make MII read/write commands for the FEC */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
244#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \
245 (VAL & 0xffff))
246#define mk_mii_end 0
247
Sascha Hauer22f6b862009-04-15 01:32:18 +0000248/* Transmitter timeout */
249#define TX_TIMEOUT (2 * HZ)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250
Sascha Hauer22f6b862009-04-15 01:32:18 +0000251/* Register definitions for the PHY */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700252
253#define MII_REG_CR 0 /* Control Register */
254#define MII_REG_SR 1 /* Status Register */
255#define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */
256#define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400257#define MII_REG_ANAR 4 /* A-N Advertisement Register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258#define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */
259#define MII_REG_ANER 6 /* A-N Expansion Register */
260#define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */
261#define MII_REG_ANLPRNPR 8 /* A-N Link Partner Received Next Page Reg. */
262
263/* values for phy_status */
264
265#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */
266#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */
267#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */
268#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400269#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700270#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400271#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272
273#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */
274#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */
275#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */
276#define PHY_STAT_SPMASK 0xf000 /* mask for speed */
277#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400278#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700279#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400280#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281
282
283static int
284fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
285{
Sascha Hauerf44d6302009-04-15 03:11:30 +0000286 struct fec_enet_private *fep = netdev_priv(dev);
Sascha Hauer2e285322009-04-15 01:32:16 +0000287 struct bufdesc *bdp;
Greg Ungerer9555b312009-08-06 17:58:18 +0000288 void *bufaddr;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000289 unsigned short status;
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000290 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292 if (!fep->link) {
293 /* Link is down or autonegotiation is in progress. */
Patrick McHardy5b548142009-06-12 06:22:29 +0000294 return NETDEV_TX_BUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295 }
296
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000297 spin_lock_irqsave(&fep->hw_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700298 /* Fill in a Tx ring entry */
299 bdp = fep->cur_tx;
300
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000301 status = bdp->cbd_sc;
Sascha Hauer22f6b862009-04-15 01:32:18 +0000302
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000303 if (status & BD_ENET_TX_READY) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700304 /* Ooops. All transmit buffers are full. Bail out.
305 * This should not happen, since dev->tbusy should be set.
306 */
307 printk("%s: tx queue full!.\n", dev->name);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000308 spin_unlock_irqrestore(&fep->hw_lock, flags);
Patrick McHardy5b548142009-06-12 06:22:29 +0000309 return NETDEV_TX_BUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311
Sascha Hauer22f6b862009-04-15 01:32:18 +0000312 /* Clear all of the status flags */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000313 status &= ~BD_ENET_TX_STATS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700314
Sascha Hauer22f6b862009-04-15 01:32:18 +0000315 /* Set buffer length and buffer pointer */
Greg Ungerer9555b312009-08-06 17:58:18 +0000316 bufaddr = skb->data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317 bdp->cbd_datlen = skb->len;
318
319 /*
Sascha Hauer22f6b862009-04-15 01:32:18 +0000320 * On some FEC implementations data must be aligned on
321 * 4-byte boundaries. Use bounce buffers to copy data
322 * and get it aligned. Ugh.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323 */
Greg Ungerer9555b312009-08-06 17:58:18 +0000324 if (((unsigned long) bufaddr) & FEC_ALIGNMENT) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700325 unsigned int index;
326 index = bdp - fep->tx_bd_base;
Sascha Hauer6989f512009-01-28 23:03:06 +0000327 memcpy(fep->tx_bounce[index], (void *)skb->data, skb->len);
Greg Ungerer9555b312009-08-06 17:58:18 +0000328 bufaddr = fep->tx_bounce[index];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329 }
330
Sascha Hauer22f6b862009-04-15 01:32:18 +0000331 /* Save skb pointer */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332 fep->tx_skbuff[fep->skb_cur] = skb;
333
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700334 dev->stats.tx_bytes += skb->len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335 fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400336
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337 /* Push the data cache so the CPM does not get stale memory
338 * data.
339 */
Greg Ungerer9555b312009-08-06 17:58:18 +0000340 bdp->cbd_bufaddr = dma_map_single(&dev->dev, bufaddr,
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +0000341 FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000343 /* Send it on its way. Tell FEC it's ready, interrupt when done,
344 * it's the last BD of the frame, and to put the CRC on the end.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000346 status |= (BD_ENET_TX_READY | BD_ENET_TX_INTR
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347 | BD_ENET_TX_LAST | BD_ENET_TX_TC);
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000348 bdp->cbd_sc = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349
350 dev->trans_start = jiffies;
351
352 /* Trigger transmission start */
Sascha Hauerf44d6302009-04-15 03:11:30 +0000353 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354
Sascha Hauer22f6b862009-04-15 01:32:18 +0000355 /* If this was the last BD in the ring, start at the beginning again. */
356 if (status & BD_ENET_TX_WRAP)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357 bdp = fep->tx_bd_base;
Sascha Hauer22f6b862009-04-15 01:32:18 +0000358 else
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359 bdp++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700360
361 if (bdp == fep->dirty_tx) {
362 fep->tx_full = 1;
363 netif_stop_queue(dev);
364 }
365
Sascha Hauer2e285322009-04-15 01:32:16 +0000366 fep->cur_tx = bdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000368 spin_unlock_irqrestore(&fep->hw_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369
Patrick McHardy6ed10652009-06-23 06:03:08 +0000370 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371}
372
373static void
374fec_timeout(struct net_device *dev)
375{
376 struct fec_enet_private *fep = netdev_priv(dev);
377
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700378 dev->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700379
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000380 fec_restart(dev, fep->full_duplex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700381 netif_wake_queue(dev);
382}
383
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384static irqreturn_t
David Howells7d12e782006-10-05 14:55:46 +0100385fec_enet_interrupt(int irq, void * dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700386{
387 struct net_device *dev = dev_id;
Sascha Hauerf44d6302009-04-15 03:11:30 +0000388 struct fec_enet_private *fep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389 uint int_events;
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000390 irqreturn_t ret = IRQ_NONE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700391
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000392 do {
Sascha Hauerf44d6302009-04-15 03:11:30 +0000393 int_events = readl(fep->hwp + FEC_IEVENT);
394 writel(int_events, fep->hwp + FEC_IEVENT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396 if (int_events & FEC_ENET_RXF) {
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000397 ret = IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700398 fec_enet_rx(dev);
399 }
400
401 /* Transmit OK, or non-fatal error. Update the buffer
Sascha Hauerf44d6302009-04-15 03:11:30 +0000402 * descriptors. FEC handles all errors, we just discover
403 * them as part of the transmit process.
404 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405 if (int_events & FEC_ENET_TXF) {
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000406 ret = IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407 fec_enet_tx(dev);
408 }
409
410 if (int_events & FEC_ENET_MII) {
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000411 ret = IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700412 fec_enet_mii(dev);
413 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400414
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000415 } while (int_events);
416
417 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418}
419
420
421static void
422fec_enet_tx(struct net_device *dev)
423{
424 struct fec_enet_private *fep;
Sascha Hauer2e285322009-04-15 01:32:16 +0000425 struct bufdesc *bdp;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000426 unsigned short status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427 struct sk_buff *skb;
428
429 fep = netdev_priv(dev);
Uwe Kleine-König81538e72009-09-01 23:14:16 +0000430 spin_lock(&fep->hw_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431 bdp = fep->dirty_tx;
432
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000433 while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +0000434 if (bdp == fep->cur_tx && fep->tx_full == 0)
435 break;
436
437 dma_unmap_single(&dev->dev, bdp->cbd_bufaddr, FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
438 bdp->cbd_bufaddr = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439
440 skb = fep->tx_skbuff[fep->skb_dirty];
441 /* Check for errors. */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000442 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443 BD_ENET_TX_RL | BD_ENET_TX_UN |
444 BD_ENET_TX_CSL)) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700445 dev->stats.tx_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000446 if (status & BD_ENET_TX_HB) /* No heartbeat */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700447 dev->stats.tx_heartbeat_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000448 if (status & BD_ENET_TX_LC) /* Late collision */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700449 dev->stats.tx_window_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000450 if (status & BD_ENET_TX_RL) /* Retrans limit */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700451 dev->stats.tx_aborted_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000452 if (status & BD_ENET_TX_UN) /* Underrun */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700453 dev->stats.tx_fifo_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000454 if (status & BD_ENET_TX_CSL) /* Carrier lost */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700455 dev->stats.tx_carrier_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456 } else {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700457 dev->stats.tx_packets++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700458 }
459
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000460 if (status & BD_ENET_TX_READY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461 printk("HEY! Enet xmit interrupt and TX_READY.\n");
Sascha Hauer22f6b862009-04-15 01:32:18 +0000462
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463 /* Deferred means some collisions occurred during transmit,
464 * but we eventually sent the packet OK.
465 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000466 if (status & BD_ENET_TX_DEF)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700467 dev->stats.collisions++;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400468
Sascha Hauer22f6b862009-04-15 01:32:18 +0000469 /* Free the sk buffer associated with this last transmit */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470 dev_kfree_skb_any(skb);
471 fep->tx_skbuff[fep->skb_dirty] = NULL;
472 fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400473
Sascha Hauer22f6b862009-04-15 01:32:18 +0000474 /* Update pointer to next buffer descriptor to be transmitted */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000475 if (status & BD_ENET_TX_WRAP)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476 bdp = fep->tx_bd_base;
477 else
478 bdp++;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400479
Sascha Hauer22f6b862009-04-15 01:32:18 +0000480 /* Since we have freed up a buffer, the ring is no longer full
Linus Torvalds1da177e2005-04-16 15:20:36 -0700481 */
482 if (fep->tx_full) {
483 fep->tx_full = 0;
484 if (netif_queue_stopped(dev))
485 netif_wake_queue(dev);
486 }
487 }
Sascha Hauer2e285322009-04-15 01:32:16 +0000488 fep->dirty_tx = bdp;
Uwe Kleine-König81538e72009-09-01 23:14:16 +0000489 spin_unlock(&fep->hw_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490}
491
492
493/* During a receive, the cur_rx points to the current incoming buffer.
494 * When we update through the ring, if the next incoming buffer has
495 * not been given to the system, we just set the empty indicator,
496 * effectively tossing the packet.
497 */
498static void
499fec_enet_rx(struct net_device *dev)
500{
Sascha Hauerf44d6302009-04-15 03:11:30 +0000501 struct fec_enet_private *fep = netdev_priv(dev);
Sascha Hauer2e285322009-04-15 01:32:16 +0000502 struct bufdesc *bdp;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000503 unsigned short status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700504 struct sk_buff *skb;
505 ushort pkt_len;
506 __u8 *data;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400507
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000508#ifdef CONFIG_M532x
509 flush_cache_all();
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400510#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700511
Uwe Kleine-König81538e72009-09-01 23:14:16 +0000512 spin_lock(&fep->hw_lock);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000513
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514 /* First, grab all of the stats for the incoming packet.
515 * These get messed up if we get called due to a busy condition.
516 */
517 bdp = fep->cur_rx;
518
Sascha Hauer22f6b862009-04-15 01:32:18 +0000519 while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700520
Sascha Hauer22f6b862009-04-15 01:32:18 +0000521 /* Since we have allocated space to hold a complete frame,
522 * the last indicator should be set.
523 */
524 if ((status & BD_ENET_RX_LAST) == 0)
525 printk("FEC ENET: rcv is not +last\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700526
Sascha Hauer22f6b862009-04-15 01:32:18 +0000527 if (!fep->opened)
528 goto rx_processing_done;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529
Sascha Hauer22f6b862009-04-15 01:32:18 +0000530 /* Check for errors. */
531 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532 BD_ENET_RX_CR | BD_ENET_RX_OV)) {
Sascha Hauer22f6b862009-04-15 01:32:18 +0000533 dev->stats.rx_errors++;
534 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
535 /* Frame too long or too short. */
536 dev->stats.rx_length_errors++;
537 }
538 if (status & BD_ENET_RX_NO) /* Frame alignment */
539 dev->stats.rx_frame_errors++;
540 if (status & BD_ENET_RX_CR) /* CRC Error */
541 dev->stats.rx_crc_errors++;
542 if (status & BD_ENET_RX_OV) /* FIFO overrun */
543 dev->stats.rx_fifo_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700544 }
Sascha Hauer22f6b862009-04-15 01:32:18 +0000545
546 /* Report late collisions as a frame error.
547 * On this error, the BD is closed, but we don't know what we
548 * have in the buffer. So, just drop this frame on the floor.
549 */
550 if (status & BD_ENET_RX_CL) {
551 dev->stats.rx_errors++;
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700552 dev->stats.rx_frame_errors++;
Sascha Hauer22f6b862009-04-15 01:32:18 +0000553 goto rx_processing_done;
554 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700555
Sascha Hauer22f6b862009-04-15 01:32:18 +0000556 /* Process the incoming frame. */
557 dev->stats.rx_packets++;
558 pkt_len = bdp->cbd_datlen;
559 dev->stats.rx_bytes += pkt_len;
560 data = (__u8*)__va(bdp->cbd_bufaddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +0000562 dma_unmap_single(NULL, bdp->cbd_bufaddr, bdp->cbd_datlen,
563 DMA_FROM_DEVICE);
Sascha Hauerccdc4f12009-01-28 23:03:09 +0000564
Sascha Hauer22f6b862009-04-15 01:32:18 +0000565 /* This does 16 byte alignment, exactly what we need.
566 * The packet length includes FCS, but we don't want to
567 * include that when passing upstream as it messes up
568 * bridging applications.
569 */
Sascha Hauer85498892009-04-15 01:32:21 +0000570 skb = dev_alloc_skb(pkt_len - 4 + NET_IP_ALIGN);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571
Sascha Hauer85498892009-04-15 01:32:21 +0000572 if (unlikely(!skb)) {
Sascha Hauer22f6b862009-04-15 01:32:18 +0000573 printk("%s: Memory squeeze, dropping packet.\n",
574 dev->name);
575 dev->stats.rx_dropped++;
576 } else {
Sascha Hauer85498892009-04-15 01:32:21 +0000577 skb_reserve(skb, NET_IP_ALIGN);
Sascha Hauer22f6b862009-04-15 01:32:18 +0000578 skb_put(skb, pkt_len - 4); /* Make room */
579 skb_copy_to_linear_data(skb, data, pkt_len - 4);
580 skb->protocol = eth_type_trans(skb, dev);
581 netif_rx(skb);
582 }
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +0000583
584 bdp->cbd_bufaddr = dma_map_single(NULL, data, bdp->cbd_datlen,
585 DMA_FROM_DEVICE);
Sascha Hauer22f6b862009-04-15 01:32:18 +0000586rx_processing_done:
587 /* Clear the status flags for this buffer */
588 status &= ~BD_ENET_RX_STATS;
589
590 /* Mark the buffer empty */
591 status |= BD_ENET_RX_EMPTY;
592 bdp->cbd_sc = status;
593
594 /* Update BD pointer to next entry */
595 if (status & BD_ENET_RX_WRAP)
596 bdp = fep->rx_bd_base;
597 else
598 bdp++;
599 /* Doing this here will keep the FEC running while we process
600 * incoming frames. On a heavily loaded network, we should be
601 * able to keep up at the expense of system resources.
602 */
603 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604 }
Sascha Hauer2e285322009-04-15 01:32:16 +0000605 fep->cur_rx = bdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700606
Uwe Kleine-König81538e72009-09-01 23:14:16 +0000607 spin_unlock(&fep->hw_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700608}
609
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000610/* called from interrupt context */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700611static void
612fec_enet_mii(struct net_device *dev)
613{
614 struct fec_enet_private *fep;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615 mii_list_t *mip;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616
617 fep = netdev_priv(dev);
Uwe Kleine-König81538e72009-09-01 23:14:16 +0000618 spin_lock(&fep->mii_lock);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000619
Linus Torvalds1da177e2005-04-16 15:20:36 -0700620 if ((mip = mii_head) == NULL) {
621 printk("MII and no head!\n");
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000622 goto unlock;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623 }
624
625 if (mip->mii_func != NULL)
Sascha Hauerf44d6302009-04-15 03:11:30 +0000626 (*(mip->mii_func))(readl(fep->hwp + FEC_MII_DATA), dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700627
628 mii_head = mip->mii_next;
629 mip->mii_next = mii_free;
630 mii_free = mip;
631
632 if ((mip = mii_head) != NULL)
Sascha Hauerf44d6302009-04-15 03:11:30 +0000633 writel(mip->mii_regval, fep->hwp + FEC_MII_DATA);
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000634
635unlock:
Uwe Kleine-König81538e72009-09-01 23:14:16 +0000636 spin_unlock(&fep->mii_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637}
638
639static int
Uwe Kleine-König84177a202009-09-01 23:14:15 +0000640mii_queue_unlocked(struct net_device *dev, int regval,
641 void (*func)(uint, struct net_device *))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700642{
643 struct fec_enet_private *fep;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700644 mii_list_t *mip;
645 int retval;
646
Sascha Hauer22f6b862009-04-15 01:32:18 +0000647 /* Add PHY address to register command */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648 fep = netdev_priv(dev);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000649
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650 regval |= fep->phy_addr << 23;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700651 retval = 0;
652
Linus Torvalds1da177e2005-04-16 15:20:36 -0700653 if ((mip = mii_free) != NULL) {
654 mii_free = mip->mii_next;
655 mip->mii_regval = regval;
656 mip->mii_func = func;
657 mip->mii_next = NULL;
658 if (mii_head) {
659 mii_tail->mii_next = mip;
660 mii_tail = mip;
Philippe De Muyterf909b1e2007-10-23 14:37:54 +1000661 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662 mii_head = mii_tail = mip;
Sascha Hauerf44d6302009-04-15 03:11:30 +0000663 writel(regval, fep->hwp + FEC_MII_DATA);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664 }
Philippe De Muyterf909b1e2007-10-23 14:37:54 +1000665 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700666 retval = 1;
667 }
668
Uwe Kleine-König84177a202009-09-01 23:14:15 +0000669 return retval;
670}
671
672static int
673mii_queue(struct net_device *dev, int regval,
674 void (*func)(uint, struct net_device *))
675{
676 struct fec_enet_private *fep;
677 unsigned long flags;
678 int retval;
679 fep = netdev_priv(dev);
680 spin_lock_irqsave(&fep->mii_lock, flags);
681 retval = mii_queue_unlocked(dev, regval, func);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000682 spin_unlock_irqrestore(&fep->mii_lock, flags);
683 return retval;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700684}
685
686static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c)
687{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700688 if(!c)
689 return;
690
Philippe De Muyterbe6cb662007-10-23 14:37:54 +1000691 for (; c->mii_data != mk_mii_end; c++)
692 mii_queue(dev, c->mii_data, c->funct);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700693}
694
695static void mii_parse_sr(uint mii_reg, struct net_device *dev)
696{
697 struct fec_enet_private *fep = netdev_priv(dev);
698 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000699 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000701 status = *s & ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700702
703 if (mii_reg & 0x0004)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000704 status |= PHY_STAT_LINK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700705 if (mii_reg & 0x0010)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000706 status |= PHY_STAT_FAULT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700707 if (mii_reg & 0x0020)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000708 status |= PHY_STAT_ANC;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000709 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700710}
711
712static void mii_parse_cr(uint mii_reg, struct net_device *dev)
713{
714 struct fec_enet_private *fep = netdev_priv(dev);
715 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000716 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700717
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000718 status = *s & ~(PHY_CONF_ANE | PHY_CONF_LOOP);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719
720 if (mii_reg & 0x1000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000721 status |= PHY_CONF_ANE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700722 if (mii_reg & 0x4000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000723 status |= PHY_CONF_LOOP;
724 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700725}
726
727static void mii_parse_anar(uint mii_reg, struct net_device *dev)
728{
729 struct fec_enet_private *fep = netdev_priv(dev);
730 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000731 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700732
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000733 status = *s & ~(PHY_CONF_SPMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700734
735 if (mii_reg & 0x0020)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000736 status |= PHY_CONF_10HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700737 if (mii_reg & 0x0040)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000738 status |= PHY_CONF_10FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700739 if (mii_reg & 0x0080)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000740 status |= PHY_CONF_100HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700741 if (mii_reg & 0x00100)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000742 status |= PHY_CONF_100FDX;
743 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700744}
745
746/* ------------------------------------------------------------------------- */
747/* The Level one LXT970 is used by many boards */
748
749#define MII_LXT970_MIRROR 16 /* Mirror register */
750#define MII_LXT970_IER 17 /* Interrupt Enable Register */
751#define MII_LXT970_ISR 18 /* Interrupt Status Register */
752#define MII_LXT970_CONFIG 19 /* Configuration Register */
753#define MII_LXT970_CSR 20 /* Chip Status Register */
754
755static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev)
756{
757 struct fec_enet_private *fep = netdev_priv(dev);
758 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000759 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700760
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000761 status = *s & ~(PHY_STAT_SPMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700762 if (mii_reg & 0x0800) {
763 if (mii_reg & 0x1000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000764 status |= PHY_STAT_100FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700765 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000766 status |= PHY_STAT_100HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700767 } else {
768 if (mii_reg & 0x1000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000769 status |= PHY_STAT_10FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700770 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000771 status |= PHY_STAT_10HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700772 }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000773 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774}
775
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000776static phy_cmd_t const phy_cmd_lxt970_config[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700777 { mk_mii_read(MII_REG_CR), mii_parse_cr },
778 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
779 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000780 };
781static phy_cmd_t const phy_cmd_lxt970_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700782 { mk_mii_write(MII_LXT970_IER, 0x0002), NULL },
783 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
784 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000785 };
786static phy_cmd_t const phy_cmd_lxt970_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700787 /* read SR and ISR to acknowledge */
788 { mk_mii_read(MII_REG_SR), mii_parse_sr },
789 { mk_mii_read(MII_LXT970_ISR), NULL },
790
791 /* find out the current status */
792 { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr },
793 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000794 };
795static phy_cmd_t const phy_cmd_lxt970_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700796 { mk_mii_write(MII_LXT970_IER, 0x0000), NULL },
797 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000798 };
799static phy_info_t const phy_info_lxt970 = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400800 .id = 0x07810000,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000801 .name = "LXT970",
802 .config = phy_cmd_lxt970_config,
803 .startup = phy_cmd_lxt970_startup,
804 .ack_int = phy_cmd_lxt970_ack_int,
805 .shutdown = phy_cmd_lxt970_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -0700806};
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400807
Linus Torvalds1da177e2005-04-16 15:20:36 -0700808/* ------------------------------------------------------------------------- */
809/* The Level one LXT971 is used on some of my custom boards */
810
811/* register definitions for the 971 */
812
813#define MII_LXT971_PCR 16 /* Port Control Register */
814#define MII_LXT971_SR2 17 /* Status Register 2 */
815#define MII_LXT971_IER 18 /* Interrupt Enable Register */
816#define MII_LXT971_ISR 19 /* Interrupt Status Register */
817#define MII_LXT971_LCR 20 /* LED Control Register */
818#define MII_LXT971_TCR 30 /* Transmit Control Register */
819
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400820/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700821 * I had some nice ideas of running the MDIO faster...
822 * The 971 should support 8MHz and I tried it, but things acted really
823 * weird, so 2.5 MHz ought to be enough for anyone...
824 */
825
826static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev)
827{
828 struct fec_enet_private *fep = netdev_priv(dev);
829 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000830 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700831
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000832 status = *s & ~(PHY_STAT_SPMASK | PHY_STAT_LINK | PHY_STAT_ANC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833
834 if (mii_reg & 0x0400) {
835 fep->link = 1;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000836 status |= PHY_STAT_LINK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837 } else {
838 fep->link = 0;
839 }
840 if (mii_reg & 0x0080)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000841 status |= PHY_STAT_ANC;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700842 if (mii_reg & 0x4000) {
843 if (mii_reg & 0x0200)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000844 status |= PHY_STAT_100FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700845 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000846 status |= PHY_STAT_100HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700847 } else {
848 if (mii_reg & 0x0200)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000849 status |= PHY_STAT_10FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700850 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000851 status |= PHY_STAT_10HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700852 }
853 if (mii_reg & 0x0008)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000854 status |= PHY_STAT_FAULT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700855
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000856 *s = status;
857}
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400858
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000859static phy_cmd_t const phy_cmd_lxt971_config[] = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400860 /* limit to 10MBit because my prototype board
Linus Torvalds1da177e2005-04-16 15:20:36 -0700861 * doesn't work with 100. */
862 { mk_mii_read(MII_REG_CR), mii_parse_cr },
863 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
864 { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },
865 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000866 };
867static phy_cmd_t const phy_cmd_lxt971_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868 { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL },
869 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
870 { mk_mii_write(MII_LXT971_LCR, 0xd422), NULL }, /* LED config */
871 /* Somehow does the 971 tell me that the link is down
872 * the first read after power-up.
873 * read here to get a valid value in ack_int */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400874 { mk_mii_read(MII_REG_SR), mii_parse_sr },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700875 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000876 };
877static phy_cmd_t const phy_cmd_lxt971_ack_int[] = {
878 /* acknowledge the int before reading status ! */
879 { mk_mii_read(MII_LXT971_ISR), NULL },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700880 /* find out the current status */
881 { mk_mii_read(MII_REG_SR), mii_parse_sr },
882 { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700883 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000884 };
885static phy_cmd_t const phy_cmd_lxt971_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700886 { mk_mii_write(MII_LXT971_IER, 0x0000), NULL },
887 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000888 };
889static phy_info_t const phy_info_lxt971 = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400890 .id = 0x0001378e,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000891 .name = "LXT971",
892 .config = phy_cmd_lxt971_config,
893 .startup = phy_cmd_lxt971_startup,
894 .ack_int = phy_cmd_lxt971_ack_int,
895 .shutdown = phy_cmd_lxt971_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -0700896};
897
898/* ------------------------------------------------------------------------- */
899/* The Quality Semiconductor QS6612 is used on the RPX CLLF */
900
901/* register definitions */
902
903#define MII_QS6612_MCR 17 /* Mode Control Register */
904#define MII_QS6612_FTR 27 /* Factory Test Register */
905#define MII_QS6612_MCO 28 /* Misc. Control Register */
906#define MII_QS6612_ISR 29 /* Interrupt Source Register */
907#define MII_QS6612_IMR 30 /* Interrupt Mask Register */
908#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */
909
910static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev)
911{
912 struct fec_enet_private *fep = netdev_priv(dev);
913 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000914 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700915
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000916 status = *s & ~(PHY_STAT_SPMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700917
918 switch((mii_reg >> 2) & 7) {
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000919 case 1: status |= PHY_STAT_10HDX; break;
920 case 2: status |= PHY_STAT_100HDX; break;
921 case 5: status |= PHY_STAT_10FDX; break;
922 case 6: status |= PHY_STAT_100FDX; break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700923}
924
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000925 *s = status;
926}
927
928static phy_cmd_t const phy_cmd_qs6612_config[] = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400929 /* The PHY powers up isolated on the RPX,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700930 * so send a command to allow operation.
931 */
932 { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL },
933
934 /* parse cr and anar to get some info */
935 { mk_mii_read(MII_REG_CR), mii_parse_cr },
936 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
937 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000938 };
939static phy_cmd_t const phy_cmd_qs6612_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700940 { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL },
941 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
942 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000943 };
944static phy_cmd_t const phy_cmd_qs6612_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945 /* we need to read ISR, SR and ANER to acknowledge */
946 { mk_mii_read(MII_QS6612_ISR), NULL },
947 { mk_mii_read(MII_REG_SR), mii_parse_sr },
948 { mk_mii_read(MII_REG_ANER), NULL },
949
950 /* read pcr to get info */
951 { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr },
952 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000953 };
954static phy_cmd_t const phy_cmd_qs6612_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700955 { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL },
956 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000957 };
958static phy_info_t const phy_info_qs6612 = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400959 .id = 0x00181440,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000960 .name = "QS6612",
961 .config = phy_cmd_qs6612_config,
962 .startup = phy_cmd_qs6612_startup,
963 .ack_int = phy_cmd_qs6612_ack_int,
964 .shutdown = phy_cmd_qs6612_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -0700965};
966
967/* ------------------------------------------------------------------------- */
968/* AMD AM79C874 phy */
969
970/* register definitions for the 874 */
971
972#define MII_AM79C874_MFR 16 /* Miscellaneous Feature Register */
973#define MII_AM79C874_ICSR 17 /* Interrupt/Status Register */
974#define MII_AM79C874_DR 18 /* Diagnostic Register */
975#define MII_AM79C874_PMLR 19 /* Power and Loopback Register */
976#define MII_AM79C874_MCR 21 /* ModeControl Register */
977#define MII_AM79C874_DC 23 /* Disconnect Counter */
978#define MII_AM79C874_REC 24 /* Recieve Error Counter */
979
980static void mii_parse_am79c874_dr(uint mii_reg, struct net_device *dev)
981{
982 struct fec_enet_private *fep = netdev_priv(dev);
983 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000984 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700985
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000986 status = *s & ~(PHY_STAT_SPMASK | PHY_STAT_ANC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700987
988 if (mii_reg & 0x0080)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000989 status |= PHY_STAT_ANC;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700990 if (mii_reg & 0x0400)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000991 status |= ((mii_reg & 0x0800) ? PHY_STAT_100FDX : PHY_STAT_100HDX);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700992 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000993 status |= ((mii_reg & 0x0800) ? PHY_STAT_10FDX : PHY_STAT_10HDX);
994
995 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700996}
997
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000998static phy_cmd_t const phy_cmd_am79c874_config[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700999 { mk_mii_read(MII_REG_CR), mii_parse_cr },
1000 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
1001 { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr },
1002 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001003 };
1004static phy_cmd_t const phy_cmd_am79c874_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001005 { mk_mii_write(MII_AM79C874_ICSR, 0xff00), NULL },
1006 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001007 { mk_mii_read(MII_REG_SR), mii_parse_sr },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001008 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001009 };
1010static phy_cmd_t const phy_cmd_am79c874_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001011 /* find out the current status */
1012 { mk_mii_read(MII_REG_SR), mii_parse_sr },
1013 { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr },
1014 /* we only need to read ISR to acknowledge */
1015 { mk_mii_read(MII_AM79C874_ICSR), NULL },
1016 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001017 };
1018static phy_cmd_t const phy_cmd_am79c874_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001019 { mk_mii_write(MII_AM79C874_ICSR, 0x0000), NULL },
1020 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001021 };
1022static phy_info_t const phy_info_am79c874 = {
1023 .id = 0x00022561,
1024 .name = "AM79C874",
1025 .config = phy_cmd_am79c874_config,
1026 .startup = phy_cmd_am79c874_startup,
1027 .ack_int = phy_cmd_am79c874_ack_int,
1028 .shutdown = phy_cmd_am79c874_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -07001029};
1030
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001031
Linus Torvalds1da177e2005-04-16 15:20:36 -07001032/* ------------------------------------------------------------------------- */
1033/* Kendin KS8721BL phy */
1034
1035/* register definitions for the 8721 */
1036
1037#define MII_KS8721BL_RXERCR 21
Sascha Hauer43268dc2009-01-28 23:03:08 +00001038#define MII_KS8721BL_ICSR 27
Linus Torvalds1da177e2005-04-16 15:20:36 -07001039#define MII_KS8721BL_PHYCR 31
1040
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001041static phy_cmd_t const phy_cmd_ks8721bl_config[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001042 { mk_mii_read(MII_REG_CR), mii_parse_cr },
1043 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
1044 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001045 };
1046static phy_cmd_t const phy_cmd_ks8721bl_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001047 { mk_mii_write(MII_KS8721BL_ICSR, 0xff00), NULL },
1048 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001049 { mk_mii_read(MII_REG_SR), mii_parse_sr },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001050 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001051 };
1052static phy_cmd_t const phy_cmd_ks8721bl_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001053 /* find out the current status */
1054 { mk_mii_read(MII_REG_SR), mii_parse_sr },
1055 /* we only need to read ISR to acknowledge */
1056 { mk_mii_read(MII_KS8721BL_ICSR), NULL },
1057 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001058 };
1059static phy_cmd_t const phy_cmd_ks8721bl_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001060 { mk_mii_write(MII_KS8721BL_ICSR, 0x0000), NULL },
1061 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001062 };
1063static phy_info_t const phy_info_ks8721bl = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001064 .id = 0x00022161,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001065 .name = "KS8721BL",
1066 .config = phy_cmd_ks8721bl_config,
1067 .startup = phy_cmd_ks8721bl_startup,
1068 .ack_int = phy_cmd_ks8721bl_ack_int,
1069 .shutdown = phy_cmd_ks8721bl_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -07001070};
1071
1072/* ------------------------------------------------------------------------- */
Greg Ungerer562d2f82005-11-07 14:09:50 +10001073/* register definitions for the DP83848 */
1074
1075#define MII_DP8384X_PHYSTST 16 /* PHY Status Register */
1076
1077static void mii_parse_dp8384x_sr2(uint mii_reg, struct net_device *dev)
1078{
Wang Chen4cf16532008-11-12 23:38:14 -08001079 struct fec_enet_private *fep = netdev_priv(dev);
Greg Ungerer562d2f82005-11-07 14:09:50 +10001080 volatile uint *s = &(fep->phy_status);
1081
1082 *s &= ~(PHY_STAT_SPMASK | PHY_STAT_LINK | PHY_STAT_ANC);
1083
1084 /* Link up */
1085 if (mii_reg & 0x0001) {
1086 fep->link = 1;
1087 *s |= PHY_STAT_LINK;
1088 } else
1089 fep->link = 0;
1090 /* Status of link */
1091 if (mii_reg & 0x0010) /* Autonegotioation complete */
1092 *s |= PHY_STAT_ANC;
1093 if (mii_reg & 0x0002) { /* 10MBps? */
1094 if (mii_reg & 0x0004) /* Full Duplex? */
1095 *s |= PHY_STAT_10FDX;
1096 else
1097 *s |= PHY_STAT_10HDX;
1098 } else { /* 100 Mbps? */
1099 if (mii_reg & 0x0004) /* Full Duplex? */
1100 *s |= PHY_STAT_100FDX;
1101 else
1102 *s |= PHY_STAT_100HDX;
1103 }
1104 if (mii_reg & 0x0008)
1105 *s |= PHY_STAT_FAULT;
1106}
1107
1108static phy_info_t phy_info_dp83848= {
1109 0x020005c9,
1110 "DP83848",
1111
1112 (const phy_cmd_t []) { /* config */
1113 { mk_mii_read(MII_REG_CR), mii_parse_cr },
1114 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
1115 { mk_mii_read(MII_DP8384X_PHYSTST), mii_parse_dp8384x_sr2 },
1116 { mk_mii_end, }
1117 },
1118 (const phy_cmd_t []) { /* startup - enable interrupts */
1119 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
1120 { mk_mii_read(MII_REG_SR), mii_parse_sr },
1121 { mk_mii_end, }
1122 },
1123 (const phy_cmd_t []) { /* ack_int - never happens, no interrupt */
1124 { mk_mii_end, }
1125 },
1126 (const phy_cmd_t []) { /* shutdown */
1127 { mk_mii_end, }
1128 },
1129};
1130
Amit Kucheriafceb2912010-02-05 08:56:21 +00001131static phy_info_t phy_info_lan8700 = {
1132 0x0007C0C,
1133 "LAN8700",
1134 (const phy_cmd_t []) { /* config */
1135 { mk_mii_read(MII_REG_CR), mii_parse_cr },
1136 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
1137 { mk_mii_end, }
1138 },
1139 (const phy_cmd_t []) { /* startup */
1140 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
1141 { mk_mii_read(MII_REG_SR), mii_parse_sr },
1142 { mk_mii_end, }
1143 },
1144 (const phy_cmd_t []) { /* act_int */
1145 { mk_mii_end, }
1146 },
1147 (const phy_cmd_t []) { /* shutdown */
1148 { mk_mii_end, }
1149 },
1150};
Greg Ungerer562d2f82005-11-07 14:09:50 +10001151/* ------------------------------------------------------------------------- */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001152
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001153static phy_info_t const * const phy_info[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001154 &phy_info_lxt970,
1155 &phy_info_lxt971,
1156 &phy_info_qs6612,
1157 &phy_info_am79c874,
1158 &phy_info_ks8721bl,
Greg Ungerer562d2f82005-11-07 14:09:50 +10001159 &phy_info_dp83848,
Amit Kucheriafceb2912010-02-05 08:56:21 +00001160 &phy_info_lan8700,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001161 NULL
1162};
1163
1164/* ------------------------------------------------------------------------- */
Sebastian Siewiorc1d96152008-05-01 14:04:02 +10001165#ifdef HAVE_mii_link_interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001166static irqreturn_t
David Howells7d12e782006-10-05 14:55:46 +01001167mii_link_interrupt(int irq, void * dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001168
Linus Torvalds1da177e2005-04-16 15:20:36 -07001169/*
Greg Ungerer43be6362009-02-26 22:42:51 -08001170 * This is specific to the MII interrupt setup of the M5272EVB.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001171 */
Greg Ungerer43be6362009-02-26 22:42:51 -08001172static void __inline__ fec_request_mii_intr(struct net_device *dev)
1173{
1174 if (request_irq(66, mii_link_interrupt, IRQF_DISABLED, "fec(MII)", dev) != 0)
1175 printk("FEC: Could not allocate fec(MII) IRQ(66)!\n");
1176}
1177
Greg Ungerer49802962009-07-07 12:13:23 +10001178static void __inline__ fec_disable_phy_intr(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001179{
Greg Ungerer49802962009-07-07 12:13:23 +10001180 free_irq(66, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001181}
Sascha Hauerfb922b02009-04-08 15:44:45 -07001182#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001183
Greg Ungerer43be6362009-02-26 22:42:51 -08001184#ifdef CONFIG_M5272
Linus Torvalds1da177e2005-04-16 15:20:36 -07001185static void __inline__ fec_get_mac(struct net_device *dev)
1186{
1187 struct fec_enet_private *fep = netdev_priv(dev);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001188 unsigned char *iap, tmpaddr[ETH_ALEN];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001189
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001190 if (FEC_FLASHMAC) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001191 /*
1192 * Get MAC address from FLASH.
1193 * If it is all 1's or 0's, use the default.
1194 */
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001195 iap = (unsigned char *)FEC_FLASHMAC;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001196 if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) &&
1197 (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0))
1198 iap = fec_mac_default;
1199 if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) &&
1200 (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff))
1201 iap = fec_mac_default;
1202 } else {
Sascha Hauerf44d6302009-04-15 03:11:30 +00001203 *((unsigned long *) &tmpaddr[0]) = readl(fep->hwp + FEC_ADDR_LOW);
1204 *((unsigned short *) &tmpaddr[4]) = (readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001205 iap = &tmpaddr[0];
1206 }
1207
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001208 memcpy(dev->dev_addr, iap, ETH_ALEN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001209
1210 /* Adjust MAC if using default MAC address */
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001211 if (iap == fec_mac_default)
1212 dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] + fep->index;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001213}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001214#endif
1215
1216/* ------------------------------------------------------------------------- */
1217
1218static void mii_display_status(struct net_device *dev)
1219{
1220 struct fec_enet_private *fep = netdev_priv(dev);
1221 volatile uint *s = &(fep->phy_status);
1222
1223 if (!fep->link && !fep->old_link) {
1224 /* Link is still down - don't print anything */
1225 return;
1226 }
1227
1228 printk("%s: status: ", dev->name);
1229
1230 if (!fep->link) {
1231 printk("link down");
1232 } else {
1233 printk("link up");
1234
1235 switch(*s & PHY_STAT_SPMASK) {
1236 case PHY_STAT_100FDX: printk(", 100MBit Full Duplex"); break;
1237 case PHY_STAT_100HDX: printk(", 100MBit Half Duplex"); break;
1238 case PHY_STAT_10FDX: printk(", 10MBit Full Duplex"); break;
1239 case PHY_STAT_10HDX: printk(", 10MBit Half Duplex"); break;
1240 default:
1241 printk(", Unknown speed/duplex");
1242 }
1243
1244 if (*s & PHY_STAT_ANC)
1245 printk(", auto-negotiation complete");
1246 }
1247
1248 if (*s & PHY_STAT_FAULT)
1249 printk(", remote fault");
1250
1251 printk(".\n");
1252}
1253
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001254static void mii_display_config(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001255{
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001256 struct fec_enet_private *fep = container_of(work, struct fec_enet_private, phy_task);
1257 struct net_device *dev = fep->netdev;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001258 uint status = fep->phy_status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001259
1260 /*
1261 ** When we get here, phy_task is already removed from
1262 ** the workqueue. It is thus safe to allow to reuse it.
1263 */
1264 fep->mii_phy_task_queued = 0;
1265 printk("%s: config: auto-negotiation ", dev->name);
1266
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001267 if (status & PHY_CONF_ANE)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001268 printk("on");
1269 else
1270 printk("off");
1271
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001272 if (status & PHY_CONF_100FDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001273 printk(", 100FDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001274 if (status & PHY_CONF_100HDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001275 printk(", 100HDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001276 if (status & PHY_CONF_10FDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001277 printk(", 10FDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001278 if (status & PHY_CONF_10HDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001279 printk(", 10HDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001280 if (!(status & PHY_CONF_SPMASK))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001281 printk(", No speed/duplex selected?");
1282
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001283 if (status & PHY_CONF_LOOP)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001284 printk(", loopback enabled");
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001285
Linus Torvalds1da177e2005-04-16 15:20:36 -07001286 printk(".\n");
1287
1288 fep->sequence_done = 1;
1289}
1290
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001291static void mii_relink(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001292{
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001293 struct fec_enet_private *fep = container_of(work, struct fec_enet_private, phy_task);
1294 struct net_device *dev = fep->netdev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001295 int duplex;
1296
1297 /*
1298 ** When we get here, phy_task is already removed from
1299 ** the workqueue. It is thus safe to allow to reuse it.
1300 */
1301 fep->mii_phy_task_queued = 0;
1302 fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0;
1303 mii_display_status(dev);
1304 fep->old_link = fep->link;
1305
1306 if (fep->link) {
1307 duplex = 0;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001308 if (fep->phy_status
Linus Torvalds1da177e2005-04-16 15:20:36 -07001309 & (PHY_STAT_100FDX | PHY_STAT_10FDX))
1310 duplex = 1;
1311 fec_restart(dev, duplex);
Philippe De Muyterf909b1e2007-10-23 14:37:54 +10001312 } else
Linus Torvalds1da177e2005-04-16 15:20:36 -07001313 fec_stop(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001314}
1315
1316/* mii_queue_relink is called in interrupt context from mii_link_interrupt */
1317static void mii_queue_relink(uint mii_reg, struct net_device *dev)
1318{
1319 struct fec_enet_private *fep = netdev_priv(dev);
1320
1321 /*
Sascha Hauer22f6b862009-04-15 01:32:18 +00001322 * We cannot queue phy_task twice in the workqueue. It
1323 * would cause an endless loop in the workqueue.
1324 * Fortunately, if the last mii_relink entry has not yet been
1325 * executed now, it will do the job for the current interrupt,
1326 * which is just what we want.
1327 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001328 if (fep->mii_phy_task_queued)
1329 return;
1330
1331 fep->mii_phy_task_queued = 1;
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001332 INIT_WORK(&fep->phy_task, mii_relink);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001333 schedule_work(&fep->phy_task);
1334}
1335
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001336/* mii_queue_config is called in interrupt context from fec_enet_mii */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001337static void mii_queue_config(uint mii_reg, struct net_device *dev)
1338{
1339 struct fec_enet_private *fep = netdev_priv(dev);
1340
1341 if (fep->mii_phy_task_queued)
1342 return;
1343
1344 fep->mii_phy_task_queued = 1;
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001345 INIT_WORK(&fep->phy_task, mii_display_config);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001346 schedule_work(&fep->phy_task);
1347}
1348
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001349phy_cmd_t const phy_cmd_relink[] = {
1350 { mk_mii_read(MII_REG_CR), mii_queue_relink },
1351 { mk_mii_end, }
1352 };
1353phy_cmd_t const phy_cmd_config[] = {
1354 { mk_mii_read(MII_REG_CR), mii_queue_config },
1355 { mk_mii_end, }
1356 };
Linus Torvalds1da177e2005-04-16 15:20:36 -07001357
Sascha Hauer22f6b862009-04-15 01:32:18 +00001358/* Read remainder of PHY ID. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001359static void
1360mii_discover_phy3(uint mii_reg, struct net_device *dev)
1361{
1362 struct fec_enet_private *fep;
1363 int i;
1364
1365 fep = netdev_priv(dev);
1366 fep->phy_id |= (mii_reg & 0xffff);
1367 printk("fec: PHY @ 0x%x, ID 0x%08x", fep->phy_addr, fep->phy_id);
1368
1369 for(i = 0; phy_info[i]; i++) {
1370 if(phy_info[i]->id == (fep->phy_id >> 4))
1371 break;
1372 }
1373
1374 if (phy_info[i])
1375 printk(" -- %s\n", phy_info[i]->name);
1376 else
1377 printk(" -- unknown PHY!\n");
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001378
Linus Torvalds1da177e2005-04-16 15:20:36 -07001379 fep->phy = phy_info[i];
1380 fep->phy_id_done = 1;
1381}
1382
1383/* Scan all of the MII PHY addresses looking for someone to respond
1384 * with a valid ID. This usually happens quickly.
1385 */
1386static void
1387mii_discover_phy(uint mii_reg, struct net_device *dev)
1388{
1389 struct fec_enet_private *fep;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001390 uint phytype;
1391
1392 fep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001393
1394 if (fep->phy_addr < 32) {
1395 if ((phytype = (mii_reg & 0xffff)) != 0xffff && phytype != 0) {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001396
Sascha Hauer22f6b862009-04-15 01:32:18 +00001397 /* Got first part of ID, now get remainder */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001398 fep->phy_id = phytype << 16;
Uwe Kleine-König84177a202009-09-01 23:14:15 +00001399 mii_queue_unlocked(dev, mk_mii_read(MII_REG_PHYIR2),
Linus Torvalds1da177e2005-04-16 15:20:36 -07001400 mii_discover_phy3);
Philippe De Muyterf909b1e2007-10-23 14:37:54 +10001401 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001402 fep->phy_addr++;
Uwe Kleine-König84177a202009-09-01 23:14:15 +00001403 mii_queue_unlocked(dev, mk_mii_read(MII_REG_PHYIR1),
Linus Torvalds1da177e2005-04-16 15:20:36 -07001404 mii_discover_phy);
1405 }
1406 } else {
1407 printk("FEC: No PHY device found.\n");
1408 /* Disable external MII interface */
Sascha Hauerf44d6302009-04-15 03:11:30 +00001409 writel(0, fep->hwp + FEC_MII_SPEED);
1410 fep->phy_speed = 0;
Greg Ungerer43be6362009-02-26 22:42:51 -08001411#ifdef HAVE_mii_link_interrupt
Greg Ungerer49802962009-07-07 12:13:23 +10001412 fec_disable_phy_intr(dev);
Sascha Haueread73182009-01-28 23:03:11 +00001413#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001414 }
1415}
1416
Sascha Hauer22f6b862009-04-15 01:32:18 +00001417/* This interrupt occurs when the PHY detects a link change */
Sebastian Siewiorc1d96152008-05-01 14:04:02 +10001418#ifdef HAVE_mii_link_interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001419static irqreturn_t
David Howells7d12e782006-10-05 14:55:46 +01001420mii_link_interrupt(int irq, void * dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001421{
1422 struct net_device *dev = dev_id;
1423 struct fec_enet_private *fep = netdev_priv(dev);
1424
Linus Torvalds1da177e2005-04-16 15:20:36 -07001425 mii_do_cmd(dev, fep->phy->ack_int);
1426 mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */
1427
1428 return IRQ_HANDLED;
1429}
Sebastian Siewiorc1d96152008-05-01 14:04:02 +10001430#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001431
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +00001432static void fec_enet_free_buffers(struct net_device *dev)
1433{
1434 struct fec_enet_private *fep = netdev_priv(dev);
1435 int i;
1436 struct sk_buff *skb;
1437 struct bufdesc *bdp;
1438
1439 bdp = fep->rx_bd_base;
1440 for (i = 0; i < RX_RING_SIZE; i++) {
1441 skb = fep->rx_skbuff[i];
1442
1443 if (bdp->cbd_bufaddr)
1444 dma_unmap_single(&dev->dev, bdp->cbd_bufaddr,
1445 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1446 if (skb)
1447 dev_kfree_skb(skb);
1448 bdp++;
1449 }
1450
1451 bdp = fep->tx_bd_base;
1452 for (i = 0; i < TX_RING_SIZE; i++)
1453 kfree(fep->tx_bounce[i]);
1454}
1455
1456static int fec_enet_alloc_buffers(struct net_device *dev)
1457{
1458 struct fec_enet_private *fep = netdev_priv(dev);
1459 int i;
1460 struct sk_buff *skb;
1461 struct bufdesc *bdp;
1462
1463 bdp = fep->rx_bd_base;
1464 for (i = 0; i < RX_RING_SIZE; i++) {
1465 skb = dev_alloc_skb(FEC_ENET_RX_FRSIZE);
1466 if (!skb) {
1467 fec_enet_free_buffers(dev);
1468 return -ENOMEM;
1469 }
1470 fep->rx_skbuff[i] = skb;
1471
1472 bdp->cbd_bufaddr = dma_map_single(&dev->dev, skb->data,
1473 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1474 bdp->cbd_sc = BD_ENET_RX_EMPTY;
1475 bdp++;
1476 }
1477
1478 /* Set the last buffer to wrap. */
1479 bdp--;
1480 bdp->cbd_sc |= BD_SC_WRAP;
1481
1482 bdp = fep->tx_bd_base;
1483 for (i = 0; i < TX_RING_SIZE; i++) {
1484 fep->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL);
1485
1486 bdp->cbd_sc = 0;
1487 bdp->cbd_bufaddr = 0;
1488 bdp++;
1489 }
1490
1491 /* Set the last buffer to wrap. */
1492 bdp--;
1493 bdp->cbd_sc |= BD_SC_WRAP;
1494
1495 return 0;
1496}
1497
Linus Torvalds1da177e2005-04-16 15:20:36 -07001498static int
1499fec_enet_open(struct net_device *dev)
1500{
1501 struct fec_enet_private *fep = netdev_priv(dev);
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +00001502 int ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001503
1504 /* I should reset the ring buffers here, but I don't yet know
1505 * a simple way to do that.
1506 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001507
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +00001508 ret = fec_enet_alloc_buffers(dev);
1509 if (ret)
1510 return ret;
1511
Linus Torvalds1da177e2005-04-16 15:20:36 -07001512 fep->sequence_done = 0;
1513 fep->link = 0;
1514
Sascha Hauerfe957c42009-04-15 01:32:25 +00001515 fec_restart(dev, 1);
1516
Linus Torvalds1da177e2005-04-16 15:20:36 -07001517 if (fep->phy) {
1518 mii_do_cmd(dev, fep->phy->ack_int);
1519 mii_do_cmd(dev, fep->phy->config);
1520 mii_do_cmd(dev, phy_cmd_config); /* display configuration */
1521
Matt Waddel6b265292006-06-27 13:10:56 +10001522 /* Poll until the PHY tells us its configuration
1523 * (not link state).
1524 * Request is initiated by mii_do_cmd above, but answer
1525 * comes by interrupt.
1526 * This should take about 25 usec per register at 2.5 MHz,
1527 * and we read approximately 5 registers.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001528 */
1529 while(!fep->sequence_done)
1530 schedule();
1531
1532 mii_do_cmd(dev, fep->phy->startup);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001533 }
1534
Sascha Hauerfe957c42009-04-15 01:32:25 +00001535 /* Set the initial link state to true. A lot of hardware
1536 * based on this device does not implement a PHY interrupt,
1537 * so we are never notified of link change.
1538 */
1539 fep->link = 1;
1540
Linus Torvalds1da177e2005-04-16 15:20:36 -07001541 netif_start_queue(dev);
1542 fep->opened = 1;
Sascha Hauer22f6b862009-04-15 01:32:18 +00001543 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001544}
1545
1546static int
1547fec_enet_close(struct net_device *dev)
1548{
1549 struct fec_enet_private *fep = netdev_priv(dev);
1550
Sascha Hauer22f6b862009-04-15 01:32:18 +00001551 /* Don't know what to do yet. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001552 fep->opened = 0;
1553 netif_stop_queue(dev);
1554 fec_stop(dev);
1555
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +00001556 fec_enet_free_buffers(dev);
1557
Linus Torvalds1da177e2005-04-16 15:20:36 -07001558 return 0;
1559}
1560
Linus Torvalds1da177e2005-04-16 15:20:36 -07001561/* Set or clear the multicast filter for this adaptor.
1562 * Skeleton taken from sunlance driver.
1563 * The CPM Ethernet implementation allows Multicast as well as individual
1564 * MAC address filtering. Some of the drivers check to make sure it is
1565 * a group multicast address, and discard those that are not. I guess I
1566 * will do the same for now, but just remove the test if you want
1567 * individual filtering as well (do the upper net layers want or support
1568 * this kind of feature?).
1569 */
1570
1571#define HASH_BITS 6 /* #bits in hash */
1572#define CRC32_POLY 0xEDB88320
1573
1574static void set_multicast_list(struct net_device *dev)
1575{
Sascha Hauerf44d6302009-04-15 03:11:30 +00001576 struct fec_enet_private *fep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001577 struct dev_mc_list *dmi;
Jiri Pirko48e2f182010-02-22 09:22:26 +00001578 unsigned int i, bit, data, crc, tmp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001579 unsigned char hash;
1580
Sascha Hauer22f6b862009-04-15 01:32:18 +00001581 if (dev->flags & IFF_PROMISC) {
Sascha Hauerf44d6302009-04-15 03:11:30 +00001582 tmp = readl(fep->hwp + FEC_R_CNTRL);
1583 tmp |= 0x8;
1584 writel(tmp, fep->hwp + FEC_R_CNTRL);
Sascha Hauer4e831832009-04-15 01:32:19 +00001585 return;
1586 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001587
Sascha Hauer4e831832009-04-15 01:32:19 +00001588 tmp = readl(fep->hwp + FEC_R_CNTRL);
1589 tmp &= ~0x8;
1590 writel(tmp, fep->hwp + FEC_R_CNTRL);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001591
Sascha Hauer4e831832009-04-15 01:32:19 +00001592 if (dev->flags & IFF_ALLMULTI) {
1593 /* Catch all multicast addresses, so set the
1594 * filter to all 1's
1595 */
1596 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1597 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001598
Sascha Hauer4e831832009-04-15 01:32:19 +00001599 return;
1600 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001601
Sascha Hauer4e831832009-04-15 01:32:19 +00001602 /* Clear filter and add the addresses in hash register
1603 */
1604 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1605 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001606
Jiri Pirko48e2f182010-02-22 09:22:26 +00001607 netdev_for_each_mc_addr(dmi, dev) {
Sascha Hauer4e831832009-04-15 01:32:19 +00001608 /* Only support group multicast for now */
1609 if (!(dmi->dmi_addr[0] & 1))
1610 continue;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001611
Sascha Hauer4e831832009-04-15 01:32:19 +00001612 /* calculate crc32 value of mac address */
1613 crc = 0xffffffff;
1614
1615 for (i = 0; i < dmi->dmi_addrlen; i++) {
1616 data = dmi->dmi_addr[i];
1617 for (bit = 0; bit < 8; bit++, data >>= 1) {
1618 crc = (crc >> 1) ^
1619 (((crc ^ data) & 1) ? CRC32_POLY : 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001620 }
1621 }
Sascha Hauer4e831832009-04-15 01:32:19 +00001622
1623 /* only upper 6 bits (HASH_BITS) are used
1624 * which point to specific bit in he hash registers
1625 */
1626 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
1627
1628 if (hash > 31) {
1629 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1630 tmp |= 1 << (hash - 32);
1631 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1632 } else {
1633 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1634 tmp |= 1 << hash;
1635 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1636 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001637 }
1638}
1639
Sascha Hauer22f6b862009-04-15 01:32:18 +00001640/* Set a MAC change in hardware. */
Sascha Hauer009fda82009-04-15 01:32:23 +00001641static int
1642fec_set_mac_address(struct net_device *dev, void *p)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001643{
Sascha Hauerf44d6302009-04-15 03:11:30 +00001644 struct fec_enet_private *fep = netdev_priv(dev);
Sascha Hauer009fda82009-04-15 01:32:23 +00001645 struct sockaddr *addr = p;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001646
Sascha Hauer009fda82009-04-15 01:32:23 +00001647 if (!is_valid_ether_addr(addr->sa_data))
1648 return -EADDRNOTAVAIL;
1649
1650 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1651
Sascha Hauerf44d6302009-04-15 03:11:30 +00001652 writel(dev->dev_addr[3] | (dev->dev_addr[2] << 8) |
1653 (dev->dev_addr[1] << 16) | (dev->dev_addr[0] << 24),
1654 fep->hwp + FEC_ADDR_LOW);
1655 writel((dev->dev_addr[5] << 16) | (dev->dev_addr[4] << 24),
Mattias Walström7cff0942010-05-05 00:55:48 -07001656 fep->hwp + FEC_ADDR_HIGH);
Sascha Hauer009fda82009-04-15 01:32:23 +00001657 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001658}
1659
Sascha Hauer009fda82009-04-15 01:32:23 +00001660static const struct net_device_ops fec_netdev_ops = {
1661 .ndo_open = fec_enet_open,
1662 .ndo_stop = fec_enet_close,
1663 .ndo_start_xmit = fec_enet_start_xmit,
1664 .ndo_set_multicast_list = set_multicast_list,
Ben Hutchings635ecaa2009-07-09 17:59:01 +00001665 .ndo_change_mtu = eth_change_mtu,
Sascha Hauer009fda82009-04-15 01:32:23 +00001666 .ndo_validate_addr = eth_validate_addr,
1667 .ndo_tx_timeout = fec_timeout,
1668 .ndo_set_mac_address = fec_set_mac_address,
1669};
1670
Linus Torvalds1da177e2005-04-16 15:20:36 -07001671 /*
1672 * XXX: We need to clean up on failure exits here.
Sascha Haueread73182009-01-28 23:03:11 +00001673 *
1674 * index is only used in legacy code
Linus Torvalds1da177e2005-04-16 15:20:36 -07001675 */
Steven King78abcb12009-10-20 18:51:37 -07001676static int fec_enet_init(struct net_device *dev, int index)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001677{
1678 struct fec_enet_private *fep = netdev_priv(dev);
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +00001679 struct bufdesc *cbd_base;
Rob Herring633e7532010-02-05 08:56:20 +00001680 struct bufdesc *bdp;
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +00001681 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001682
Sascha Hauer8d4dd5c2009-04-15 01:32:17 +00001683 /* Allocate memory for buffer descriptors. */
1684 cbd_base = dma_alloc_coherent(NULL, PAGE_SIZE, &fep->bd_dma,
1685 GFP_KERNEL);
1686 if (!cbd_base) {
Greg Ungerer562d2f82005-11-07 14:09:50 +10001687 printk("FEC: allocate descriptor memory failed?\n");
1688 return -ENOMEM;
1689 }
1690
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +10001691 spin_lock_init(&fep->hw_lock);
1692 spin_lock_init(&fep->mii_lock);
1693
Linus Torvalds1da177e2005-04-16 15:20:36 -07001694 fep->index = index;
Sascha Hauerf44d6302009-04-15 03:11:30 +00001695 fep->hwp = (void __iomem *)dev->base_addr;
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001696 fep->netdev = dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001697
Sascha Haueread73182009-01-28 23:03:11 +00001698 /* Set the Ethernet address */
Greg Ungerer43be6362009-02-26 22:42:51 -08001699#ifdef CONFIG_M5272
Linus Torvalds1da177e2005-04-16 15:20:36 -07001700 fec_get_mac(dev);
Sascha Haueread73182009-01-28 23:03:11 +00001701#else
1702 {
1703 unsigned long l;
Sascha Hauerf44d6302009-04-15 03:11:30 +00001704 l = readl(fep->hwp + FEC_ADDR_LOW);
Sascha Haueread73182009-01-28 23:03:11 +00001705 dev->dev_addr[0] = (unsigned char)((l & 0xFF000000) >> 24);
1706 dev->dev_addr[1] = (unsigned char)((l & 0x00FF0000) >> 16);
1707 dev->dev_addr[2] = (unsigned char)((l & 0x0000FF00) >> 8);
1708 dev->dev_addr[3] = (unsigned char)((l & 0x000000FF) >> 0);
Sascha Hauerf44d6302009-04-15 03:11:30 +00001709 l = readl(fep->hwp + FEC_ADDR_HIGH);
Sascha Haueread73182009-01-28 23:03:11 +00001710 dev->dev_addr[4] = (unsigned char)((l & 0xFF000000) >> 24);
1711 dev->dev_addr[5] = (unsigned char)((l & 0x00FF0000) >> 16);
1712 }
1713#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001714
Sascha Hauer8d4dd5c2009-04-15 01:32:17 +00001715 /* Set receive and transmit descriptor base. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001716 fep->rx_bd_base = cbd_base;
1717 fep->tx_bd_base = cbd_base + RX_RING_SIZE;
1718
Greg Ungerer43be6362009-02-26 22:42:51 -08001719#ifdef HAVE_mii_link_interrupt
1720 fec_request_mii_intr(dev);
Sascha Haueread73182009-01-28 23:03:11 +00001721#endif
Sascha Hauer22f6b862009-04-15 01:32:18 +00001722 /* The FEC Ethernet specific entries in the device structure */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001723 dev->watchdog_timeo = TX_TIMEOUT;
Sascha Hauer009fda82009-04-15 01:32:23 +00001724 dev->netdev_ops = &fec_netdev_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001725
1726 for (i=0; i<NMII-1; i++)
1727 mii_cmds[i].mii_next = &mii_cmds[i+1];
1728 mii_free = mii_cmds;
1729
Sascha Hauer22f6b862009-04-15 01:32:18 +00001730 /* Set MII speed to 2.5 MHz */
Sascha Haueread73182009-01-28 23:03:11 +00001731 fep->phy_speed = ((((clk_get_rate(fep->clk) / 2 + 4999999)
1732 / 2500000) / 2) & 0x3F) << 1;
Rob Herring633e7532010-02-05 08:56:20 +00001733
1734 /* Initialize the receive buffer descriptors. */
1735 bdp = fep->rx_bd_base;
1736 for (i = 0; i < RX_RING_SIZE; i++) {
1737
1738 /* Initialize the BD for every fragment in the page. */
1739 bdp->cbd_sc = 0;
1740 bdp++;
1741 }
1742
1743 /* Set the last buffer to wrap */
1744 bdp--;
1745 bdp->cbd_sc |= BD_SC_WRAP;
1746
1747 /* ...and the same for transmit */
1748 bdp = fep->tx_bd_base;
1749 for (i = 0; i < TX_RING_SIZE; i++) {
1750
1751 /* Initialize the BD for every fragment in the page. */
1752 bdp->cbd_sc = 0;
1753 bdp->cbd_bufaddr = 0;
1754 bdp++;
1755 }
1756
1757 /* Set the last buffer to wrap */
1758 bdp--;
1759 bdp->cbd_sc |= BD_SC_WRAP;
1760
Sascha Haueread73182009-01-28 23:03:11 +00001761 fec_restart(dev, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001762
Linus Torvalds1da177e2005-04-16 15:20:36 -07001763 /* Queue up command to detect the PHY and initialize the
1764 * remainder of the interface.
1765 */
1766 fep->phy_id_done = 0;
1767 fep->phy_addr = 0;
1768 mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy);
1769
Linus Torvalds1da177e2005-04-16 15:20:36 -07001770 return 0;
1771}
1772
1773/* This function is called to start or restart the FEC during a link
1774 * change. This only happens when switching between half and full
1775 * duplex.
1776 */
1777static void
1778fec_restart(struct net_device *dev, int duplex)
1779{
Sascha Hauerf44d6302009-04-15 03:11:30 +00001780 struct fec_enet_private *fep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001781 int i;
1782
Sascha Hauerf44d6302009-04-15 03:11:30 +00001783 /* Whack a reset. We should wait for this. */
1784 writel(1, fep->hwp + FEC_ECNTRL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001785 udelay(10);
1786
Sascha Hauerf44d6302009-04-15 03:11:30 +00001787 /* Clear any outstanding interrupt. */
1788 writel(0xffc00000, fep->hwp + FEC_IEVENT);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001789
Sascha Hauerf44d6302009-04-15 03:11:30 +00001790 /* Reset all multicast. */
1791 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1792 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
Sascha Hauer4f1ceb42009-04-15 01:32:20 +00001793#ifndef CONFIG_M5272
1794 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
1795 writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
1796#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001797
Sascha Hauerf44d6302009-04-15 03:11:30 +00001798 /* Set maximum receive buffer size. */
1799 writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001800
Sascha Hauerf44d6302009-04-15 03:11:30 +00001801 /* Set receive and transmit descriptor base. */
1802 writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
Sascha Hauer2e285322009-04-15 01:32:16 +00001803 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc) * RX_RING_SIZE,
Sascha Hauerf44d6302009-04-15 03:11:30 +00001804 fep->hwp + FEC_X_DES_START);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001805
1806 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
1807 fep->cur_rx = fep->rx_bd_base;
1808
Sascha Hauerf44d6302009-04-15 03:11:30 +00001809 /* Reset SKB transmit buffers. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001810 fep->skb_cur = fep->skb_dirty = 0;
Sascha Hauer22f6b862009-04-15 01:32:18 +00001811 for (i = 0; i <= TX_RING_MOD_MASK; i++) {
1812 if (fep->tx_skbuff[i]) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001813 dev_kfree_skb_any(fep->tx_skbuff[i]);
1814 fep->tx_skbuff[i] = NULL;
1815 }
1816 }
1817
Sascha Hauer22f6b862009-04-15 01:32:18 +00001818 /* Enable MII mode */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001819 if (duplex) {
Sascha Hauerf44d6302009-04-15 03:11:30 +00001820 /* MII enable / FD enable */
1821 writel(OPT_FRAME_SIZE | 0x04, fep->hwp + FEC_R_CNTRL);
1822 writel(0x04, fep->hwp + FEC_X_CNTRL);
Philippe De Muyterf909b1e2007-10-23 14:37:54 +10001823 } else {
Sascha Hauerf44d6302009-04-15 03:11:30 +00001824 /* MII enable / No Rcv on Xmit */
1825 writel(OPT_FRAME_SIZE | 0x06, fep->hwp + FEC_R_CNTRL);
1826 writel(0x0, fep->hwp + FEC_X_CNTRL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001827 }
1828 fep->full_duplex = duplex;
1829
Sascha Hauer22f6b862009-04-15 01:32:18 +00001830 /* Set MII speed */
Sascha Hauerf44d6302009-04-15 03:11:30 +00001831 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001832
Sascha Hauer22f6b862009-04-15 01:32:18 +00001833 /* And last, enable the transmit and receive processing */
Sascha Hauerf44d6302009-04-15 03:11:30 +00001834 writel(2, fep->hwp + FEC_ECNTRL);
1835 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
Matt Waddel6b265292006-06-27 13:10:56 +10001836
Sascha Hauer22f6b862009-04-15 01:32:18 +00001837 /* Enable interrupts we wish to service */
Sascha Hauerf44d6302009-04-15 03:11:30 +00001838 writel(FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII,
1839 fep->hwp + FEC_IMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001840}
1841
1842static void
1843fec_stop(struct net_device *dev)
1844{
Sascha Hauerf44d6302009-04-15 03:11:30 +00001845 struct fec_enet_private *fep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001846
Sascha Hauer22f6b862009-04-15 01:32:18 +00001847 /* We cannot expect a graceful transmit stop without link !!! */
Sascha Hauerf44d6302009-04-15 03:11:30 +00001848 if (fep->link) {
1849 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
Philippe De Muyter677177c2006-06-27 13:05:33 +10001850 udelay(10);
Sascha Hauerf44d6302009-04-15 03:11:30 +00001851 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
Philippe De Muyter677177c2006-06-27 13:05:33 +10001852 printk("fec_stop : Graceful transmit stop did not complete !\n");
Sascha Hauerf44d6302009-04-15 03:11:30 +00001853 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001854
Sascha Hauerf44d6302009-04-15 03:11:30 +00001855 /* Whack a reset. We should wait for this. */
1856 writel(1, fep->hwp + FEC_ECNTRL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001857 udelay(10);
1858
Sascha Hauerf44d6302009-04-15 03:11:30 +00001859 /* Clear outstanding MII command interrupts. */
1860 writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001861
Sascha Hauerf44d6302009-04-15 03:11:30 +00001862 writel(FEC_ENET_MII, fep->hwp + FEC_IMASK);
1863 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001864}
1865
Sascha Haueread73182009-01-28 23:03:11 +00001866static int __devinit
1867fec_probe(struct platform_device *pdev)
1868{
1869 struct fec_enet_private *fep;
1870 struct net_device *ndev;
1871 int i, irq, ret = 0;
1872 struct resource *r;
1873
1874 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1875 if (!r)
1876 return -ENXIO;
1877
1878 r = request_mem_region(r->start, resource_size(r), pdev->name);
1879 if (!r)
1880 return -EBUSY;
1881
1882 /* Init network device */
1883 ndev = alloc_etherdev(sizeof(struct fec_enet_private));
1884 if (!ndev)
1885 return -ENOMEM;
1886
1887 SET_NETDEV_DEV(ndev, &pdev->dev);
1888
1889 /* setup board info structure */
1890 fep = netdev_priv(ndev);
1891 memset(fep, 0, sizeof(*fep));
1892
1893 ndev->base_addr = (unsigned long)ioremap(r->start, resource_size(r));
1894
1895 if (!ndev->base_addr) {
1896 ret = -ENOMEM;
1897 goto failed_ioremap;
1898 }
1899
1900 platform_set_drvdata(pdev, ndev);
1901
1902 /* This device has up to three irqs on some platforms */
1903 for (i = 0; i < 3; i++) {
1904 irq = platform_get_irq(pdev, i);
1905 if (i && irq < 0)
1906 break;
1907 ret = request_irq(irq, fec_enet_interrupt, IRQF_DISABLED, pdev->name, ndev);
1908 if (ret) {
1909 while (i >= 0) {
1910 irq = platform_get_irq(pdev, i);
1911 free_irq(irq, ndev);
1912 i--;
1913 }
1914 goto failed_irq;
1915 }
1916 }
1917
1918 fep->clk = clk_get(&pdev->dev, "fec_clk");
1919 if (IS_ERR(fep->clk)) {
1920 ret = PTR_ERR(fep->clk);
1921 goto failed_clk;
1922 }
1923 clk_enable(fep->clk);
1924
1925 ret = fec_enet_init(ndev, 0);
1926 if (ret)
1927 goto failed_init;
1928
1929 ret = register_netdev(ndev);
1930 if (ret)
1931 goto failed_register;
1932
1933 return 0;
1934
1935failed_register:
1936failed_init:
1937 clk_disable(fep->clk);
1938 clk_put(fep->clk);
1939failed_clk:
1940 for (i = 0; i < 3; i++) {
1941 irq = platform_get_irq(pdev, i);
1942 if (irq > 0)
1943 free_irq(irq, ndev);
1944 }
1945failed_irq:
1946 iounmap((void __iomem *)ndev->base_addr);
1947failed_ioremap:
1948 free_netdev(ndev);
1949
1950 return ret;
1951}
1952
1953static int __devexit
1954fec_drv_remove(struct platform_device *pdev)
1955{
1956 struct net_device *ndev = platform_get_drvdata(pdev);
1957 struct fec_enet_private *fep = netdev_priv(ndev);
1958
1959 platform_set_drvdata(pdev, NULL);
1960
1961 fec_stop(ndev);
1962 clk_disable(fep->clk);
1963 clk_put(fep->clk);
1964 iounmap((void __iomem *)ndev->base_addr);
1965 unregister_netdev(ndev);
1966 free_netdev(ndev);
1967 return 0;
1968}
1969
1970static int
1971fec_suspend(struct platform_device *dev, pm_message_t state)
1972{
1973 struct net_device *ndev = platform_get_drvdata(dev);
1974 struct fec_enet_private *fep;
1975
1976 if (ndev) {
1977 fep = netdev_priv(ndev);
1978 if (netif_running(ndev)) {
1979 netif_device_detach(ndev);
1980 fec_stop(ndev);
1981 }
1982 }
1983 return 0;
1984}
1985
1986static int
1987fec_resume(struct platform_device *dev)
1988{
1989 struct net_device *ndev = platform_get_drvdata(dev);
1990
1991 if (ndev) {
1992 if (netif_running(ndev)) {
1993 fec_enet_init(ndev, 0);
1994 netif_device_attach(ndev);
1995 }
1996 }
1997 return 0;
1998}
1999
2000static struct platform_driver fec_driver = {
2001 .driver = {
2002 .name = "fec",
2003 .owner = THIS_MODULE,
2004 },
2005 .probe = fec_probe,
2006 .remove = __devexit_p(fec_drv_remove),
2007 .suspend = fec_suspend,
2008 .resume = fec_resume,
2009};
2010
2011static int __init
2012fec_enet_module_init(void)
2013{
2014 printk(KERN_INFO "FEC Ethernet Driver\n");
2015
2016 return platform_driver_register(&fec_driver);
2017}
2018
2019static void __exit
2020fec_enet_cleanup(void)
2021{
2022 platform_driver_unregister(&fec_driver);
2023}
2024
2025module_exit(fec_enet_cleanup);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002026module_init(fec_enet_module_init);
2027
2028MODULE_LICENSE("GPL");