blob: c24127dd6ef2d22051244429a8eeeec2679acd34 [file] [log] [blame]
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/gfp.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050037#include <linux/pci.h>
38#include <linux/libata.h>
Tejun Heo624d5c52008-03-25 22:16:41 +090039#include <linux/highmem.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050040
41#include "libata.h"
42
Tejun Heoc4291372010-05-10 21:41:38 +020043static struct workqueue_struct *ata_sff_wq;
44
Tejun Heo624d5c52008-03-25 22:16:41 +090045const struct ata_port_operations ata_sff_port_ops = {
46 .inherits = &ata_base_port_ops,
47
Tejun Heof47451c2010-05-10 21:41:40 +020048 .qc_prep = ata_noop_qc_prep,
Tejun Heo9363c382008-04-07 22:47:16 +090049 .qc_issue = ata_sff_qc_issue,
Tejun Heo4c9bf4e2008-04-07 22:47:20 +090050 .qc_fill_rtf = ata_sff_qc_fill_rtf,
Tejun Heo624d5c52008-03-25 22:16:41 +090051
Tejun Heo9363c382008-04-07 22:47:16 +090052 .freeze = ata_sff_freeze,
53 .thaw = ata_sff_thaw,
Tejun Heo0aa11132008-04-07 22:47:18 +090054 .prereset = ata_sff_prereset,
Tejun Heo9363c382008-04-07 22:47:16 +090055 .softreset = ata_sff_softreset,
Tejun Heo57c9efd2008-04-07 22:47:19 +090056 .hardreset = sata_sff_hardreset,
Tejun Heo203c75b2008-04-07 22:47:18 +090057 .postreset = ata_sff_postreset,
Tejun Heo9363c382008-04-07 22:47:16 +090058 .error_handler = ata_sff_error_handler,
Tejun Heo624d5c52008-03-25 22:16:41 +090059
Tejun Heo5682ed32008-04-07 22:47:16 +090060 .sff_dev_select = ata_sff_dev_select,
61 .sff_check_status = ata_sff_check_status,
62 .sff_tf_load = ata_sff_tf_load,
63 .sff_tf_read = ata_sff_tf_read,
64 .sff_exec_command = ata_sff_exec_command,
65 .sff_data_xfer = ata_sff_data_xfer,
Tejun Heo8244cd02010-05-10 21:41:36 +020066 .sff_drain_fifo = ata_sff_drain_fifo,
Tejun Heo624d5c52008-03-25 22:16:41 +090067
Alan Coxc96f1732009-03-24 10:23:46 +000068 .lost_interrupt = ata_sff_lost_interrupt,
Tejun Heo624d5c52008-03-25 22:16:41 +090069};
Alan Cox0fe40ff2009-01-05 14:16:13 +000070EXPORT_SYMBOL_GPL(ata_sff_port_ops);
Tejun Heo624d5c52008-03-25 22:16:41 +090071
Tejun Heo624d5c52008-03-25 22:16:41 +090072/**
Tejun Heo9363c382008-04-07 22:47:16 +090073 * ata_sff_check_status - Read device status reg & clear interrupt
Tejun Heo272f7882008-03-25 22:16:40 +090074 * @ap: port where the device is
75 *
76 * Reads ATA taskfile status register for currently-selected device
77 * and return its value. This also clears pending interrupts
78 * from this device
79 *
80 * LOCKING:
81 * Inherited from caller.
82 */
Tejun Heo9363c382008-04-07 22:47:16 +090083u8 ata_sff_check_status(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +090084{
85 return ioread8(ap->ioaddr.status_addr);
86}
Alan Cox0fe40ff2009-01-05 14:16:13 +000087EXPORT_SYMBOL_GPL(ata_sff_check_status);
Tejun Heo272f7882008-03-25 22:16:40 +090088
89/**
Tejun Heo9363c382008-04-07 22:47:16 +090090 * ata_sff_altstatus - Read device alternate status reg
Tejun Heo272f7882008-03-25 22:16:40 +090091 * @ap: port where the device is
92 *
93 * Reads ATA taskfile alternate status register for
94 * currently-selected device and return its value.
95 *
96 * Note: may NOT be used as the check_altstatus() entry in
97 * ata_port_operations.
98 *
99 * LOCKING:
100 * Inherited from caller.
101 */
Alan Coxa57c1ba2008-05-29 22:10:58 +0100102static u8 ata_sff_altstatus(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900103{
Tejun Heo5682ed32008-04-07 22:47:16 +0900104 if (ap->ops->sff_check_altstatus)
105 return ap->ops->sff_check_altstatus(ap);
Tejun Heo272f7882008-03-25 22:16:40 +0900106
107 return ioread8(ap->ioaddr.altstatus_addr);
108}
109
110/**
Alan Coxa57c1ba2008-05-29 22:10:58 +0100111 * ata_sff_irq_status - Check if the device is busy
112 * @ap: port where the device is
113 *
114 * Determine if the port is currently busy. Uses altstatus
115 * if available in order to avoid clearing shared IRQ status
116 * when finding an IRQ source. Non ctl capable devices don't
117 * share interrupt lines fortunately for us.
118 *
119 * LOCKING:
120 * Inherited from caller.
121 */
122static u8 ata_sff_irq_status(struct ata_port *ap)
123{
124 u8 status;
125
126 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
127 status = ata_sff_altstatus(ap);
128 /* Not us: We are busy */
129 if (status & ATA_BUSY)
Alan Cox0fe40ff2009-01-05 14:16:13 +0000130 return status;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100131 }
132 /* Clear INTRQ latch */
Hugh Dickins6311c902008-06-05 14:44:39 +0100133 status = ap->ops->sff_check_status(ap);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100134 return status;
135}
136
137/**
138 * ata_sff_sync - Flush writes
139 * @ap: Port to wait for.
140 *
141 * CAUTION:
142 * If we have an mmio device with no ctl and no altstatus
143 * method this will fail. No such devices are known to exist.
144 *
145 * LOCKING:
146 * Inherited from caller.
147 */
148
149static void ata_sff_sync(struct ata_port *ap)
150{
151 if (ap->ops->sff_check_altstatus)
152 ap->ops->sff_check_altstatus(ap);
153 else if (ap->ioaddr.altstatus_addr)
154 ioread8(ap->ioaddr.altstatus_addr);
155}
156
157/**
158 * ata_sff_pause - Flush writes and wait 400nS
159 * @ap: Port to pause for.
160 *
161 * CAUTION:
162 * If we have an mmio device with no ctl and no altstatus
163 * method this will fail. No such devices are known to exist.
164 *
165 * LOCKING:
166 * Inherited from caller.
167 */
168
169void ata_sff_pause(struct ata_port *ap)
170{
171 ata_sff_sync(ap);
172 ndelay(400);
173}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000174EXPORT_SYMBOL_GPL(ata_sff_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100175
176/**
177 * ata_sff_dma_pause - Pause before commencing DMA
178 * @ap: Port to pause for.
179 *
180 * Perform I/O fencing and ensure sufficient cycle delays occur
181 * for the HDMA1:0 transition
182 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000183
Alan Coxa57c1ba2008-05-29 22:10:58 +0100184void ata_sff_dma_pause(struct ata_port *ap)
185{
186 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
187 /* An altstatus read will cause the needed delay without
188 messing up the IRQ status */
189 ata_sff_altstatus(ap);
190 return;
191 }
192 /* There are no DMA controllers without ctl. BUG here to ensure
193 we never violate the HDMA1:0 transition timing and risk
194 corruption. */
195 BUG();
196}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000197EXPORT_SYMBOL_GPL(ata_sff_dma_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100198
199/**
Tejun Heo9363c382008-04-07 22:47:16 +0900200 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
Tejun Heo624d5c52008-03-25 22:16:41 +0900201 * @ap: port containing status register to be polled
Tejun Heo341c2c92008-05-20 02:17:51 +0900202 * @tmout_pat: impatience timeout in msecs
203 * @tmout: overall timeout in msecs
Tejun Heo624d5c52008-03-25 22:16:41 +0900204 *
205 * Sleep until ATA Status register bit BSY clears,
206 * or a timeout occurs.
207 *
208 * LOCKING:
209 * Kernel thread context (may sleep).
210 *
211 * RETURNS:
212 * 0 on success, -errno otherwise.
213 */
Tejun Heo9363c382008-04-07 22:47:16 +0900214int ata_sff_busy_sleep(struct ata_port *ap,
215 unsigned long tmout_pat, unsigned long tmout)
Tejun Heo624d5c52008-03-25 22:16:41 +0900216{
217 unsigned long timer_start, timeout;
218 u8 status;
219
Tejun Heo9363c382008-04-07 22:47:16 +0900220 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
Tejun Heo624d5c52008-03-25 22:16:41 +0900221 timer_start = jiffies;
Tejun Heo341c2c92008-05-20 02:17:51 +0900222 timeout = ata_deadline(timer_start, tmout_pat);
Tejun Heo624d5c52008-03-25 22:16:41 +0900223 while (status != 0xff && (status & ATA_BUSY) &&
224 time_before(jiffies, timeout)) {
Tejun Heo97750ce2010-09-06 17:56:29 +0200225 ata_msleep(ap, 50);
Tejun Heo9363c382008-04-07 22:47:16 +0900226 status = ata_sff_busy_wait(ap, ATA_BUSY, 3);
Tejun Heo624d5c52008-03-25 22:16:41 +0900227 }
228
229 if (status != 0xff && (status & ATA_BUSY))
Joe Perchesa9a79df2011-04-15 15:51:59 -0700230 ata_port_warn(ap,
231 "port is slow to respond, please be patient (Status 0x%x)\n",
232 status);
Tejun Heo624d5c52008-03-25 22:16:41 +0900233
Tejun Heo341c2c92008-05-20 02:17:51 +0900234 timeout = ata_deadline(timer_start, tmout);
Tejun Heo624d5c52008-03-25 22:16:41 +0900235 while (status != 0xff && (status & ATA_BUSY) &&
236 time_before(jiffies, timeout)) {
Tejun Heo97750ce2010-09-06 17:56:29 +0200237 ata_msleep(ap, 50);
Tejun Heo5682ed32008-04-07 22:47:16 +0900238 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900239 }
240
241 if (status == 0xff)
242 return -ENODEV;
243
244 if (status & ATA_BUSY) {
Joe Perchesa9a79df2011-04-15 15:51:59 -0700245 ata_port_err(ap,
246 "port failed to respond (%lu secs, Status 0x%x)\n",
247 DIV_ROUND_UP(tmout, 1000), status);
Tejun Heo624d5c52008-03-25 22:16:41 +0900248 return -EBUSY;
249 }
250
251 return 0;
252}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000253EXPORT_SYMBOL_GPL(ata_sff_busy_sleep);
Tejun Heo624d5c52008-03-25 22:16:41 +0900254
Tejun Heoaa2731a2008-04-07 22:47:19 +0900255static int ata_sff_check_ready(struct ata_link *link)
256{
257 u8 status = link->ap->ops->sff_check_status(link->ap);
258
Tejun Heo78ab88f2008-05-01 23:41:41 +0900259 return ata_check_ready(status);
Tejun Heoaa2731a2008-04-07 22:47:19 +0900260}
261
Tejun Heo624d5c52008-03-25 22:16:41 +0900262/**
Tejun Heo9363c382008-04-07 22:47:16 +0900263 * ata_sff_wait_ready - sleep until BSY clears, or timeout
Tejun Heo705e76b2008-04-07 22:47:19 +0900264 * @link: SFF link to wait ready status for
Tejun Heo624d5c52008-03-25 22:16:41 +0900265 * @deadline: deadline jiffies for the operation
266 *
267 * Sleep until ATA Status register bit BSY clears, or timeout
268 * occurs.
269 *
270 * LOCKING:
271 * Kernel thread context (may sleep).
272 *
273 * RETURNS:
274 * 0 on success, -errno otherwise.
275 */
Tejun Heo705e76b2008-04-07 22:47:19 +0900276int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +0900277{
Tejun Heoaa2731a2008-04-07 22:47:19 +0900278 return ata_wait_ready(link, deadline, ata_sff_check_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900279}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000280EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900281
282/**
Sergei Shtylyov41dec292010-05-07 22:47:50 +0400283 * ata_sff_set_devctl - Write device control reg
284 * @ap: port where the device is
285 * @ctl: value to write
286 *
287 * Writes ATA taskfile device control register.
288 *
289 * Note: may NOT be used as the sff_set_devctl() entry in
290 * ata_port_operations.
291 *
292 * LOCKING:
293 * Inherited from caller.
294 */
295static void ata_sff_set_devctl(struct ata_port *ap, u8 ctl)
296{
297 if (ap->ops->sff_set_devctl)
298 ap->ops->sff_set_devctl(ap, ctl);
299 else
300 iowrite8(ctl, ap->ioaddr.ctl_addr);
301}
302
303/**
Tejun Heo9363c382008-04-07 22:47:16 +0900304 * ata_sff_dev_select - Select device 0/1 on ATA bus
Tejun Heo624d5c52008-03-25 22:16:41 +0900305 * @ap: ATA channel to manipulate
306 * @device: ATA device (numbered from zero) to select
307 *
308 * Use the method defined in the ATA specification to
309 * make either device 0, or device 1, active on the
310 * ATA channel. Works with both PIO and MMIO.
311 *
312 * May be used as the dev_select() entry in ata_port_operations.
313 *
314 * LOCKING:
315 * caller.
316 */
Tejun Heo9363c382008-04-07 22:47:16 +0900317void ata_sff_dev_select(struct ata_port *ap, unsigned int device)
Tejun Heo624d5c52008-03-25 22:16:41 +0900318{
319 u8 tmp;
320
321 if (device == 0)
322 tmp = ATA_DEVICE_OBS;
323 else
324 tmp = ATA_DEVICE_OBS | ATA_DEV1;
325
326 iowrite8(tmp, ap->ioaddr.device_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900327 ata_sff_pause(ap); /* needed; also flushes, for mmio */
Tejun Heo624d5c52008-03-25 22:16:41 +0900328}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000329EXPORT_SYMBOL_GPL(ata_sff_dev_select);
Tejun Heo624d5c52008-03-25 22:16:41 +0900330
331/**
332 * ata_dev_select - Select device 0/1 on ATA bus
333 * @ap: ATA channel to manipulate
334 * @device: ATA device (numbered from zero) to select
335 * @wait: non-zero to wait for Status register BSY bit to clear
336 * @can_sleep: non-zero if context allows sleeping
337 *
338 * Use the method defined in the ATA specification to
339 * make either device 0, or device 1, active on the
340 * ATA channel.
341 *
Tejun Heo9363c382008-04-07 22:47:16 +0900342 * This is a high-level version of ata_sff_dev_select(), which
343 * additionally provides the services of inserting the proper
344 * pauses and status polling, where needed.
Tejun Heo624d5c52008-03-25 22:16:41 +0900345 *
346 * LOCKING:
347 * caller.
348 */
Tejun Heoc7a82092010-05-10 21:41:29 +0200349static void ata_dev_select(struct ata_port *ap, unsigned int device,
Tejun Heo624d5c52008-03-25 22:16:41 +0900350 unsigned int wait, unsigned int can_sleep)
351{
352 if (ata_msg_probe(ap))
Joe Perchesa9a79df2011-04-15 15:51:59 -0700353 ata_port_info(ap, "ata_dev_select: ENTER, device %u, wait %u\n",
354 device, wait);
Tejun Heo624d5c52008-03-25 22:16:41 +0900355
356 if (wait)
357 ata_wait_idle(ap);
358
Tejun Heo5682ed32008-04-07 22:47:16 +0900359 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +0900360
361 if (wait) {
362 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
Tejun Heo97750ce2010-09-06 17:56:29 +0200363 ata_msleep(ap, 150);
Tejun Heo624d5c52008-03-25 22:16:41 +0900364 ata_wait_idle(ap);
365 }
366}
367
368/**
Tejun Heo9363c382008-04-07 22:47:16 +0900369 * ata_sff_irq_on - Enable interrupts on a port.
Tejun Heo90088bb2006-10-09 11:10:26 +0900370 * @ap: Port on which interrupts are enabled.
371 *
372 * Enable interrupts on a legacy IDE device using MMIO or PIO,
373 * wait for idle, clear any pending interrupts.
374 *
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400375 * Note: may NOT be used as the sff_irq_on() entry in
376 * ata_port_operations.
377 *
Tejun Heo90088bb2006-10-09 11:10:26 +0900378 * LOCKING:
379 * Inherited from caller.
380 */
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400381void ata_sff_irq_on(struct ata_port *ap)
Tejun Heo90088bb2006-10-09 11:10:26 +0900382{
383 struct ata_ioports *ioaddr = &ap->ioaddr;
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400384
385 if (ap->ops->sff_irq_on) {
386 ap->ops->sff_irq_on(ap);
387 return;
388 }
Tejun Heo90088bb2006-10-09 11:10:26 +0900389
390 ap->ctl &= ~ATA_NIEN;
391 ap->last_ctl = ap->ctl;
392
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400393 if (ap->ops->sff_set_devctl || ioaddr->ctl_addr)
394 ata_sff_set_devctl(ap, ap->ctl);
395 ata_wait_idle(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900396
Tejun Heo37f65b82010-05-19 22:10:20 +0200397 if (ap->ops->sff_irq_clear)
398 ap->ops->sff_irq_clear(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900399}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000400EXPORT_SYMBOL_GPL(ata_sff_irq_on);
Tejun Heo90088bb2006-10-09 11:10:26 +0900401
402/**
Tejun Heo9363c382008-04-07 22:47:16 +0900403 * ata_sff_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500404 * @ap: Port to which output is sent
405 * @tf: ATA taskfile register set
406 *
407 * Outputs ATA taskfile to standard ATA host controller.
408 *
409 * LOCKING:
410 * Inherited from caller.
411 */
Tejun Heo9363c382008-04-07 22:47:16 +0900412void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500413{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900414 struct ata_ioports *ioaddr = &ap->ioaddr;
415 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
416
417 if (tf->ctl != ap->last_ctl) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900418 if (ioaddr->ctl_addr)
419 iowrite8(tf->ctl, ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900420 ap->last_ctl = tf->ctl;
Tejun Heo40c60232010-09-09 17:13:31 +0200421 ata_wait_idle(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900422 }
423
424 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900425 WARN_ON_ONCE(!ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900426 iowrite8(tf->hob_feature, ioaddr->feature_addr);
427 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
428 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
429 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
430 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
431 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
432 tf->hob_feature,
433 tf->hob_nsect,
434 tf->hob_lbal,
435 tf->hob_lbam,
436 tf->hob_lbah);
437 }
438
439 if (is_addr) {
440 iowrite8(tf->feature, ioaddr->feature_addr);
441 iowrite8(tf->nsect, ioaddr->nsect_addr);
442 iowrite8(tf->lbal, ioaddr->lbal_addr);
443 iowrite8(tf->lbam, ioaddr->lbam_addr);
444 iowrite8(tf->lbah, ioaddr->lbah_addr);
445 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
446 tf->feature,
447 tf->nsect,
448 tf->lbal,
449 tf->lbam,
450 tf->lbah);
451 }
452
453 if (tf->flags & ATA_TFLAG_DEVICE) {
454 iowrite8(tf->device, ioaddr->device_addr);
455 VPRINTK("device 0x%X\n", tf->device);
456 }
Tejun Heo40c60232010-09-09 17:13:31 +0200457
458 ata_wait_idle(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500459}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000460EXPORT_SYMBOL_GPL(ata_sff_tf_load);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500461
462/**
Tejun Heo9363c382008-04-07 22:47:16 +0900463 * ata_sff_tf_read - input device's ATA taskfile shadow registers
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500464 * @ap: Port from which input is read
465 * @tf: ATA taskfile register set for storing input
466 *
467 * Reads ATA taskfile registers for currently-selected device
Alan Cox76548ed2007-11-19 14:34:56 +0000468 * into @tf. Assumes the device has a fully SFF compliant task file
469 * layout and behaviour. If you device does not (eg has a different
470 * status method) then you will need to provide a replacement tf_read
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500471 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500472 * LOCKING:
473 * Inherited from caller.
474 */
Tejun Heo9363c382008-04-07 22:47:16 +0900475void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500476{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900477 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500478
Tejun Heo9363c382008-04-07 22:47:16 +0900479 tf->command = ata_sff_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900480 tf->feature = ioread8(ioaddr->error_addr);
481 tf->nsect = ioread8(ioaddr->nsect_addr);
482 tf->lbal = ioread8(ioaddr->lbal_addr);
483 tf->lbam = ioread8(ioaddr->lbam_addr);
484 tf->lbah = ioread8(ioaddr->lbah_addr);
485 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500486
Tejun Heo0d5ff562007-02-01 15:06:36 +0900487 if (tf->flags & ATA_TFLAG_LBA48) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900488 if (likely(ioaddr->ctl_addr)) {
489 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
490 tf->hob_feature = ioread8(ioaddr->error_addr);
491 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
492 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
493 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
494 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
495 iowrite8(tf->ctl, ioaddr->ctl_addr);
496 ap->last_ctl = tf->ctl;
497 } else
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900498 WARN_ON_ONCE(1);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900499 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500500}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000501EXPORT_SYMBOL_GPL(ata_sff_tf_read);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500502
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500503/**
Tejun Heo9363c382008-04-07 22:47:16 +0900504 * ata_sff_exec_command - issue ATA command to host controller
Tejun Heo272f7882008-03-25 22:16:40 +0900505 * @ap: port to which command is being issued
506 * @tf: ATA taskfile register set
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500507 *
Tejun Heo272f7882008-03-25 22:16:40 +0900508 * Issues ATA command, with proper synchronization with interrupt
509 * handler / other threads.
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500510 *
511 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400512 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500513 */
Tejun Heo9363c382008-04-07 22:47:16 +0900514void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500515{
Tejun Heo272f7882008-03-25 22:16:40 +0900516 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500517
Tejun Heo272f7882008-03-25 22:16:40 +0900518 iowrite8(tf->command, ap->ioaddr.command_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900519 ata_sff_pause(ap);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500520}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000521EXPORT_SYMBOL_GPL(ata_sff_exec_command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500522
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900523/**
Tejun Heo624d5c52008-03-25 22:16:41 +0900524 * ata_tf_to_host - issue ATA taskfile to host controller
525 * @ap: port to which command is being issued
526 * @tf: ATA taskfile register set
527 *
528 * Issues ATA taskfile register set to ATA host controller,
529 * with proper synchronization with interrupt handler and
530 * other threads.
531 *
532 * LOCKING:
533 * spin_lock_irqsave(host lock)
534 */
535static inline void ata_tf_to_host(struct ata_port *ap,
536 const struct ata_taskfile *tf)
537{
Tejun Heo5682ed32008-04-07 22:47:16 +0900538 ap->ops->sff_tf_load(ap, tf);
539 ap->ops->sff_exec_command(ap, tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900540}
541
542/**
Tejun Heo9363c382008-04-07 22:47:16 +0900543 * ata_sff_data_xfer - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900544 * @dev: device to target
545 * @buf: data buffer
546 * @buflen: buffer length
547 * @rw: read/write
548 *
549 * Transfer data from/to the device data register by PIO.
550 *
551 * LOCKING:
552 * Inherited from caller.
553 *
554 * RETURNS:
555 * Bytes consumed.
556 */
Tejun Heo9363c382008-04-07 22:47:16 +0900557unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
558 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900559{
560 struct ata_port *ap = dev->link->ap;
561 void __iomem *data_addr = ap->ioaddr.data_addr;
562 unsigned int words = buflen >> 1;
563
564 /* Transfer multiple of 2 bytes */
565 if (rw == READ)
566 ioread16_rep(data_addr, buf, words);
567 else
568 iowrite16_rep(data_addr, buf, words);
569
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400570 /* Transfer trailing byte, if any. */
Tejun Heo624d5c52008-03-25 22:16:41 +0900571 if (unlikely(buflen & 0x01)) {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400572 unsigned char pad[2];
Tejun Heo624d5c52008-03-25 22:16:41 +0900573
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400574 /* Point buf to the tail of buffer */
575 buf += buflen - 1;
576
577 /*
578 * Use io*16_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100579 * swapping bytes to and from on the big endian machines...
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400580 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900581 if (rw == READ) {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400582 ioread16_rep(data_addr, pad, 1);
583 *buf = pad[0];
Tejun Heo624d5c52008-03-25 22:16:41 +0900584 } else {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400585 pad[0] = *buf;
586 iowrite16_rep(data_addr, pad, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +0900587 }
588 words++;
589 }
590
591 return words << 1;
592}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000593EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
Tejun Heo624d5c52008-03-25 22:16:41 +0900594
595/**
Alan Cox871af122009-01-05 14:16:39 +0000596 * ata_sff_data_xfer32 - Transfer data by PIO
597 * @dev: device to target
598 * @buf: data buffer
599 * @buflen: buffer length
600 * @rw: read/write
601 *
602 * Transfer data from/to the device data register by PIO using 32bit
603 * I/O operations.
604 *
605 * LOCKING:
606 * Inherited from caller.
607 *
608 * RETURNS:
609 * Bytes consumed.
610 */
611
612unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf,
613 unsigned int buflen, int rw)
614{
615 struct ata_port *ap = dev->link->ap;
616 void __iomem *data_addr = ap->ioaddr.data_addr;
617 unsigned int words = buflen >> 2;
618 int slop = buflen & 3;
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100619
Alan Coxe3cf95d2009-04-09 17:31:17 +0100620 if (!(ap->pflags & ATA_PFLAG_PIO32))
621 return ata_sff_data_xfer(dev, buf, buflen, rw);
Alan Cox871af122009-01-05 14:16:39 +0000622
623 /* Transfer multiple of 4 bytes */
624 if (rw == READ)
625 ioread32_rep(data_addr, buf, words);
626 else
627 iowrite32_rep(data_addr, buf, words);
628
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400629 /* Transfer trailing bytes, if any */
Alan Cox871af122009-01-05 14:16:39 +0000630 if (unlikely(slop)) {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400631 unsigned char pad[4];
632
633 /* Point buf to the tail of buffer */
634 buf += buflen - slop;
635
636 /*
637 * Use io*_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100638 * swapping bytes to and from on the big endian machines...
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400639 */
Alan Cox871af122009-01-05 14:16:39 +0000640 if (rw == READ) {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400641 if (slop < 3)
642 ioread16_rep(data_addr, pad, 1);
643 else
644 ioread32_rep(data_addr, pad, 1);
645 memcpy(buf, pad, slop);
Alan Cox871af122009-01-05 14:16:39 +0000646 } else {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400647 memcpy(pad, buf, slop);
648 if (slop < 3)
649 iowrite16_rep(data_addr, pad, 1);
650 else
651 iowrite32_rep(data_addr, pad, 1);
Alan Cox871af122009-01-05 14:16:39 +0000652 }
Alan Cox871af122009-01-05 14:16:39 +0000653 }
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400654 return (buflen + 1) & ~1;
Alan Cox871af122009-01-05 14:16:39 +0000655}
656EXPORT_SYMBOL_GPL(ata_sff_data_xfer32);
657
658/**
Tejun Heo9363c382008-04-07 22:47:16 +0900659 * ata_sff_data_xfer_noirq - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900660 * @dev: device to target
661 * @buf: data buffer
662 * @buflen: buffer length
663 * @rw: read/write
664 *
665 * Transfer data from/to the device data register by PIO. Do the
666 * transfer with interrupts disabled.
667 *
668 * LOCKING:
669 * Inherited from caller.
670 *
671 * RETURNS:
672 * Bytes consumed.
673 */
Tejun Heo9363c382008-04-07 22:47:16 +0900674unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
675 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900676{
677 unsigned long flags;
678 unsigned int consumed;
679
680 local_irq_save(flags);
Tejun Heo9363c382008-04-07 22:47:16 +0900681 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900682 local_irq_restore(flags);
683
684 return consumed;
685}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000686EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq);
Tejun Heo624d5c52008-03-25 22:16:41 +0900687
688/**
689 * ata_pio_sector - Transfer a sector of data.
690 * @qc: Command on going
691 *
692 * Transfer qc->sect_size bytes of data from/to the ATA device.
693 *
694 * LOCKING:
695 * Inherited from caller.
696 */
697static void ata_pio_sector(struct ata_queued_cmd *qc)
698{
699 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
700 struct ata_port *ap = qc->ap;
701 struct page *page;
702 unsigned int offset;
703 unsigned char *buf;
704
705 if (qc->curbytes == qc->nbytes - qc->sect_size)
706 ap->hsm_task_state = HSM_ST_LAST;
707
708 page = sg_page(qc->cursg);
709 offset = qc->cursg->offset + qc->cursg_ofs;
710
711 /* get the current page and offset */
712 page = nth_page(page, (offset >> PAGE_SHIFT));
713 offset %= PAGE_SIZE;
714
715 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
716
717 if (PageHighMem(page)) {
718 unsigned long flags;
719
720 /* FIXME: use a bounce buffer */
721 local_irq_save(flags);
722 buf = kmap_atomic(page, KM_IRQ0);
723
724 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900725 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
726 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900727
728 kunmap_atomic(buf, KM_IRQ0);
729 local_irq_restore(flags);
730 } else {
731 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900732 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
733 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900734 }
735
Sebastian Andrzej Siewior3842e832010-03-21 22:52:23 +0100736 if (!do_write && !PageSlab(page))
Catalin Marinas2d68b7f2010-02-04 01:04:50 -0500737 flush_dcache_page(page);
738
Tejun Heo624d5c52008-03-25 22:16:41 +0900739 qc->curbytes += qc->sect_size;
740 qc->cursg_ofs += qc->sect_size;
741
742 if (qc->cursg_ofs == qc->cursg->length) {
743 qc->cursg = sg_next(qc->cursg);
744 qc->cursg_ofs = 0;
745 }
746}
747
748/**
749 * ata_pio_sectors - Transfer one or many sectors.
750 * @qc: Command on going
751 *
752 * Transfer one or many sectors of data from/to the
753 * ATA device for the DRQ request.
754 *
755 * LOCKING:
756 * Inherited from caller.
757 */
758static void ata_pio_sectors(struct ata_queued_cmd *qc)
759{
760 if (is_multi_taskfile(&qc->tf)) {
761 /* READ/WRITE MULTIPLE */
762 unsigned int nsect;
763
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900764 WARN_ON_ONCE(qc->dev->multi_count == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +0900765
766 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
767 qc->dev->multi_count);
768 while (nsect--)
769 ata_pio_sector(qc);
770 } else
771 ata_pio_sector(qc);
772
Alan Coxa57c1ba2008-05-29 22:10:58 +0100773 ata_sff_sync(qc->ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900774}
775
776/**
777 * atapi_send_cdb - Write CDB bytes to hardware
778 * @ap: Port to which ATAPI device is attached.
779 * @qc: Taskfile currently active
780 *
781 * When device has indicated its readiness to accept
782 * a CDB, this function is called. Send the CDB.
783 *
784 * LOCKING:
785 * caller.
786 */
787static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
788{
789 /* send SCSI cdb */
790 DPRINTK("send cdb\n");
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900791 WARN_ON_ONCE(qc->dev->cdb_len < 12);
Tejun Heo624d5c52008-03-25 22:16:41 +0900792
Tejun Heo5682ed32008-04-07 22:47:16 +0900793 ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100794 ata_sff_sync(ap);
795 /* FIXME: If the CDB is for DMA do we need to do the transition delay
796 or is bmdma_start guaranteed to do it ? */
Tejun Heo624d5c52008-03-25 22:16:41 +0900797 switch (qc->tf.protocol) {
798 case ATAPI_PROT_PIO:
799 ap->hsm_task_state = HSM_ST;
800 break;
801 case ATAPI_PROT_NODATA:
802 ap->hsm_task_state = HSM_ST_LAST;
803 break;
Tejun Heo9a7780c2010-05-19 22:10:24 +0200804#ifdef CONFIG_ATA_BMDMA
Tejun Heo624d5c52008-03-25 22:16:41 +0900805 case ATAPI_PROT_DMA:
806 ap->hsm_task_state = HSM_ST_LAST;
807 /* initiate bmdma */
808 ap->ops->bmdma_start(qc);
809 break;
Tejun Heo9a7780c2010-05-19 22:10:24 +0200810#endif /* CONFIG_ATA_BMDMA */
811 default:
812 BUG();
Tejun Heo624d5c52008-03-25 22:16:41 +0900813 }
814}
815
816/**
817 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
818 * @qc: Command on going
819 * @bytes: number of bytes
820 *
821 * Transfer Transfer data from/to the ATAPI device.
822 *
823 * LOCKING:
824 * Inherited from caller.
825 *
826 */
827static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
828{
829 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
830 struct ata_port *ap = qc->ap;
831 struct ata_device *dev = qc->dev;
832 struct ata_eh_info *ehi = &dev->link->eh_info;
833 struct scatterlist *sg;
834 struct page *page;
835 unsigned char *buf;
836 unsigned int offset, count, consumed;
837
838next_sg:
839 sg = qc->cursg;
840 if (unlikely(!sg)) {
841 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
842 "buf=%u cur=%u bytes=%u",
843 qc->nbytes, qc->curbytes, bytes);
844 return -1;
845 }
846
847 page = sg_page(sg);
848 offset = sg->offset + qc->cursg_ofs;
849
850 /* get the current page and offset */
851 page = nth_page(page, (offset >> PAGE_SHIFT));
852 offset %= PAGE_SIZE;
853
854 /* don't overrun current sg */
855 count = min(sg->length - qc->cursg_ofs, bytes);
856
857 /* don't cross page boundaries */
858 count = min(count, (unsigned int)PAGE_SIZE - offset);
859
860 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
861
862 if (PageHighMem(page)) {
863 unsigned long flags;
864
865 /* FIXME: use bounce buffer */
866 local_irq_save(flags);
867 buf = kmap_atomic(page, KM_IRQ0);
868
869 /* do the actual data transfer */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000870 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
871 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900872
873 kunmap_atomic(buf, KM_IRQ0);
874 local_irq_restore(flags);
875 } else {
876 buf = page_address(page);
Alan Cox0fe40ff2009-01-05 14:16:13 +0000877 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
878 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900879 }
880
881 bytes -= min(bytes, consumed);
882 qc->curbytes += count;
883 qc->cursg_ofs += count;
884
885 if (qc->cursg_ofs == sg->length) {
886 qc->cursg = sg_next(qc->cursg);
887 qc->cursg_ofs = 0;
888 }
889
Christian Borntraegera0f79f72009-01-13 10:38:36 +0100890 /*
891 * There used to be a WARN_ON_ONCE(qc->cursg && count != consumed);
892 * Unfortunately __atapi_pio_bytes doesn't know enough to do the WARN
893 * check correctly as it doesn't know if it is the last request being
894 * made. Somebody should implement a proper sanity check.
895 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900896 if (bytes)
897 goto next_sg;
898 return 0;
899}
900
901/**
902 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
903 * @qc: Command on going
904 *
905 * Transfer Transfer data from/to the ATAPI device.
906 *
907 * LOCKING:
908 * Inherited from caller.
909 */
910static void atapi_pio_bytes(struct ata_queued_cmd *qc)
911{
912 struct ata_port *ap = qc->ap;
913 struct ata_device *dev = qc->dev;
914 struct ata_eh_info *ehi = &dev->link->eh_info;
915 unsigned int ireason, bc_lo, bc_hi, bytes;
916 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
917
918 /* Abuse qc->result_tf for temp storage of intermediate TF
919 * here to save some kernel stack usage.
920 * For normal completion, qc->result_tf is not relevant. For
921 * error, qc->result_tf is later overwritten by ata_qc_complete().
922 * So, the correctness of qc->result_tf is not affected.
923 */
Tejun Heo5682ed32008-04-07 22:47:16 +0900924 ap->ops->sff_tf_read(ap, &qc->result_tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900925 ireason = qc->result_tf.nsect;
926 bc_lo = qc->result_tf.lbam;
927 bc_hi = qc->result_tf.lbah;
928 bytes = (bc_hi << 8) | bc_lo;
929
930 /* shall be cleared to zero, indicating xfer of data */
931 if (unlikely(ireason & (1 << 0)))
932 goto atapi_check;
933
934 /* make sure transfer direction matches expected */
935 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
936 if (unlikely(do_write != i_write))
937 goto atapi_check;
938
939 if (unlikely(!bytes))
940 goto atapi_check;
941
942 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
943
944 if (unlikely(__atapi_pio_bytes(qc, bytes)))
945 goto err_out;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100946 ata_sff_sync(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900947
948 return;
949
950 atapi_check:
951 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
952 ireason, bytes);
953 err_out:
954 qc->err_mask |= AC_ERR_HSM;
955 ap->hsm_task_state = HSM_ST_ERR;
956}
957
958/**
959 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
960 * @ap: the target ata_port
961 * @qc: qc on going
962 *
963 * RETURNS:
964 * 1 if ok in workqueue, 0 otherwise.
965 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000966static inline int ata_hsm_ok_in_wq(struct ata_port *ap,
967 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900968{
969 if (qc->tf.flags & ATA_TFLAG_POLLING)
970 return 1;
971
972 if (ap->hsm_task_state == HSM_ST_FIRST) {
973 if (qc->tf.protocol == ATA_PROT_PIO &&
Alan Cox0fe40ff2009-01-05 14:16:13 +0000974 (qc->tf.flags & ATA_TFLAG_WRITE))
Tejun Heo624d5c52008-03-25 22:16:41 +0900975 return 1;
976
977 if (ata_is_atapi(qc->tf.protocol) &&
Alan Cox0fe40ff2009-01-05 14:16:13 +0000978 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Tejun Heo624d5c52008-03-25 22:16:41 +0900979 return 1;
980 }
981
982 return 0;
983}
984
985/**
986 * ata_hsm_qc_complete - finish a qc running on standard HSM
987 * @qc: Command to complete
988 * @in_wq: 1 if called from workqueue, 0 otherwise
989 *
990 * Finish @qc which is running on standard HSM.
991 *
992 * LOCKING:
993 * If @in_wq is zero, spin_lock_irqsave(host lock).
994 * Otherwise, none on entry and grabs host lock.
995 */
996static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
997{
998 struct ata_port *ap = qc->ap;
999 unsigned long flags;
1000
1001 if (ap->ops->error_handler) {
1002 if (in_wq) {
1003 spin_lock_irqsave(ap->lock, flags);
1004
1005 /* EH might have kicked in while host lock is
1006 * released.
1007 */
1008 qc = ata_qc_from_tag(ap, qc->tag);
1009 if (qc) {
1010 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001011 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001012 ata_qc_complete(qc);
1013 } else
1014 ata_port_freeze(ap);
1015 }
1016
1017 spin_unlock_irqrestore(ap->lock, flags);
1018 } else {
1019 if (likely(!(qc->err_mask & AC_ERR_HSM)))
1020 ata_qc_complete(qc);
1021 else
1022 ata_port_freeze(ap);
1023 }
1024 } else {
1025 if (in_wq) {
1026 spin_lock_irqsave(ap->lock, flags);
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001027 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001028 ata_qc_complete(qc);
1029 spin_unlock_irqrestore(ap->lock, flags);
1030 } else
1031 ata_qc_complete(qc);
1032 }
1033}
1034
1035/**
Tejun Heo9363c382008-04-07 22:47:16 +09001036 * ata_sff_hsm_move - move the HSM to the next state.
Tejun Heo624d5c52008-03-25 22:16:41 +09001037 * @ap: the target ata_port
1038 * @qc: qc on going
1039 * @status: current device status
1040 * @in_wq: 1 if called from workqueue, 0 otherwise
1041 *
1042 * RETURNS:
1043 * 1 when poll next status needed, 0 otherwise.
1044 */
Tejun Heo9363c382008-04-07 22:47:16 +09001045int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
1046 u8 status, int in_wq)
Tejun Heo624d5c52008-03-25 22:16:41 +09001047{
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001048 struct ata_link *link = qc->dev->link;
1049 struct ata_eh_info *ehi = &link->eh_info;
Tejun Heo624d5c52008-03-25 22:16:41 +09001050 unsigned long flags = 0;
1051 int poll_next;
1052
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001053 WARN_ON_ONCE((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001054
Tejun Heo9363c382008-04-07 22:47:16 +09001055 /* Make sure ata_sff_qc_issue() does not throw things
Tejun Heo624d5c52008-03-25 22:16:41 +09001056 * like DMA polling into the workqueue. Notice that
1057 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1058 */
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001059 WARN_ON_ONCE(in_wq != ata_hsm_ok_in_wq(ap, qc));
Tejun Heo624d5c52008-03-25 22:16:41 +09001060
1061fsm_start:
1062 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1063 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
1064
1065 switch (ap->hsm_task_state) {
1066 case HSM_ST_FIRST:
1067 /* Send first data block or PACKET CDB */
1068
1069 /* If polling, we will stay in the work queue after
1070 * sending the data. Otherwise, interrupt handler
1071 * takes over after sending the data.
1072 */
1073 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
1074
1075 /* check device status */
1076 if (unlikely((status & ATA_DRQ) == 0)) {
1077 /* handle BSY=0, DRQ=0 as error */
1078 if (likely(status & (ATA_ERR | ATA_DF)))
1079 /* device stops HSM for abort/error */
1080 qc->err_mask |= AC_ERR_DEV;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001081 else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001082 /* HSM violation. Let EH handle this */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001083 ata_ehi_push_desc(ehi,
1084 "ST_FIRST: !(DRQ|ERR|DF)");
Tejun Heo624d5c52008-03-25 22:16:41 +09001085 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001086 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001087
1088 ap->hsm_task_state = HSM_ST_ERR;
1089 goto fsm_start;
1090 }
1091
1092 /* Device should not ask for data transfer (DRQ=1)
1093 * when it finds something wrong.
1094 * We ignore DRQ here and stop the HSM by
1095 * changing hsm_task_state to HSM_ST_ERR and
1096 * let the EH abort the command or reset the device.
1097 */
1098 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1099 /* Some ATAPI tape drives forget to clear the ERR bit
1100 * when doing the next command (mostly request sense).
1101 * We ignore ERR here to workaround and proceed sending
1102 * the CDB.
1103 */
1104 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001105 ata_ehi_push_desc(ehi, "ST_FIRST: "
1106 "DRQ=1 with device error, "
1107 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001108 qc->err_mask |= AC_ERR_HSM;
1109 ap->hsm_task_state = HSM_ST_ERR;
1110 goto fsm_start;
1111 }
1112 }
1113
1114 /* Send the CDB (atapi) or the first data block (ata pio out).
1115 * During the state transition, interrupt handler shouldn't
1116 * be invoked before the data transfer is complete and
1117 * hsm_task_state is changed. Hence, the following locking.
1118 */
1119 if (in_wq)
1120 spin_lock_irqsave(ap->lock, flags);
1121
1122 if (qc->tf.protocol == ATA_PROT_PIO) {
1123 /* PIO data out protocol.
1124 * send first data block.
1125 */
1126
1127 /* ata_pio_sectors() might change the state
1128 * to HSM_ST_LAST. so, the state is changed here
1129 * before ata_pio_sectors().
1130 */
1131 ap->hsm_task_state = HSM_ST;
1132 ata_pio_sectors(qc);
1133 } else
1134 /* send CDB */
1135 atapi_send_cdb(ap, qc);
1136
1137 if (in_wq)
1138 spin_unlock_irqrestore(ap->lock, flags);
1139
Tejun Heoc4291372010-05-10 21:41:38 +02001140 /* if polling, ata_sff_pio_task() handles the rest.
Tejun Heo624d5c52008-03-25 22:16:41 +09001141 * otherwise, interrupt handler takes over from here.
1142 */
1143 break;
1144
1145 case HSM_ST:
1146 /* complete command or read/write the data register */
1147 if (qc->tf.protocol == ATAPI_PROT_PIO) {
1148 /* ATAPI PIO protocol */
1149 if ((status & ATA_DRQ) == 0) {
1150 /* No more data to transfer or device error.
1151 * Device error will be tagged in HSM_ST_LAST.
1152 */
1153 ap->hsm_task_state = HSM_ST_LAST;
1154 goto fsm_start;
1155 }
1156
1157 /* Device should not ask for data transfer (DRQ=1)
1158 * when it finds something wrong.
1159 * We ignore DRQ here and stop the HSM by
1160 * changing hsm_task_state to HSM_ST_ERR and
1161 * let the EH abort the command or reset the device.
1162 */
1163 if (unlikely(status & (ATA_ERR | ATA_DF))) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001164 ata_ehi_push_desc(ehi, "ST-ATAPI: "
1165 "DRQ=1 with device error, "
1166 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001167 qc->err_mask |= AC_ERR_HSM;
1168 ap->hsm_task_state = HSM_ST_ERR;
1169 goto fsm_start;
1170 }
1171
1172 atapi_pio_bytes(qc);
1173
1174 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
1175 /* bad ireason reported by device */
1176 goto fsm_start;
1177
1178 } else {
1179 /* ATA PIO protocol */
1180 if (unlikely((status & ATA_DRQ) == 0)) {
1181 /* handle BSY=0, DRQ=0 as error */
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001182 if (likely(status & (ATA_ERR | ATA_DF))) {
Tejun Heo624d5c52008-03-25 22:16:41 +09001183 /* device stops HSM for abort/error */
1184 qc->err_mask |= AC_ERR_DEV;
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001185
1186 /* If diagnostic failed and this is
1187 * IDENTIFY, it's likely a phantom
1188 * device. Mark hint.
1189 */
1190 if (qc->dev->horkage &
1191 ATA_HORKAGE_DIAGNOSTIC)
1192 qc->err_mask |=
1193 AC_ERR_NODEV_HINT;
1194 } else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001195 /* HSM violation. Let EH handle this.
1196 * Phantom devices also trigger this
1197 * condition. Mark hint.
1198 */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001199 ata_ehi_push_desc(ehi, "ST-ATA: "
Tejun Heo80ee6f52009-01-23 14:12:59 +09001200 "DRQ=0 without device error, "
Tejun Heoa836d3e2008-06-28 01:39:43 +09001201 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001202 qc->err_mask |= AC_ERR_HSM |
1203 AC_ERR_NODEV_HINT;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001204 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001205
1206 ap->hsm_task_state = HSM_ST_ERR;
1207 goto fsm_start;
1208 }
1209
1210 /* For PIO reads, some devices may ask for
1211 * data transfer (DRQ=1) alone with ERR=1.
1212 * We respect DRQ here and transfer one
1213 * block of junk data before changing the
1214 * hsm_task_state to HSM_ST_ERR.
1215 *
1216 * For PIO writes, ERR=1 DRQ=1 doesn't make
1217 * sense since the data block has been
1218 * transferred to the device.
1219 */
1220 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1221 /* data might be corrputed */
1222 qc->err_mask |= AC_ERR_DEV;
1223
1224 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1225 ata_pio_sectors(qc);
1226 status = ata_wait_idle(ap);
1227 }
1228
Tejun Heoa836d3e2008-06-28 01:39:43 +09001229 if (status & (ATA_BUSY | ATA_DRQ)) {
1230 ata_ehi_push_desc(ehi, "ST-ATA: "
1231 "BUSY|DRQ persists on ERR|DF, "
1232 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001233 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001234 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001235
Tejun Heob9199302009-01-25 10:26:00 +09001236 /* There are oddball controllers with
1237 * status register stuck at 0x7f and
1238 * lbal/m/h at zero which makes it
1239 * pass all other presence detection
1240 * mechanisms we have. Set NODEV_HINT
1241 * for it. Kernel bz#7241.
1242 */
1243 if (status == 0x7f)
1244 qc->err_mask |= AC_ERR_NODEV_HINT;
1245
Tejun Heo624d5c52008-03-25 22:16:41 +09001246 /* ata_pio_sectors() might change the
1247 * state to HSM_ST_LAST. so, the state
1248 * is changed after ata_pio_sectors().
1249 */
1250 ap->hsm_task_state = HSM_ST_ERR;
1251 goto fsm_start;
1252 }
1253
1254 ata_pio_sectors(qc);
1255
1256 if (ap->hsm_task_state == HSM_ST_LAST &&
1257 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1258 /* all data read */
1259 status = ata_wait_idle(ap);
1260 goto fsm_start;
1261 }
1262 }
1263
1264 poll_next = 1;
1265 break;
1266
1267 case HSM_ST_LAST:
1268 if (unlikely(!ata_ok(status))) {
1269 qc->err_mask |= __ac_err_mask(status);
1270 ap->hsm_task_state = HSM_ST_ERR;
1271 goto fsm_start;
1272 }
1273
1274 /* no more data to transfer */
1275 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1276 ap->print_id, qc->dev->devno, status);
1277
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001278 WARN_ON_ONCE(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM));
Tejun Heo624d5c52008-03-25 22:16:41 +09001279
1280 ap->hsm_task_state = HSM_ST_IDLE;
1281
1282 /* complete taskfile transaction */
1283 ata_hsm_qc_complete(qc, in_wq);
1284
1285 poll_next = 0;
1286 break;
1287
1288 case HSM_ST_ERR:
Tejun Heo624d5c52008-03-25 22:16:41 +09001289 ap->hsm_task_state = HSM_ST_IDLE;
1290
1291 /* complete taskfile transaction */
1292 ata_hsm_qc_complete(qc, in_wq);
1293
1294 poll_next = 0;
1295 break;
1296 default:
1297 poll_next = 0;
1298 BUG();
1299 }
1300
1301 return poll_next;
1302}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001303EXPORT_SYMBOL_GPL(ata_sff_hsm_move);
Tejun Heo624d5c52008-03-25 22:16:41 +09001304
Viresh Kumar64b97592011-02-22 14:32:38 +05301305void ata_sff_queue_work(struct work_struct *work)
1306{
1307 queue_work(ata_sff_wq, work);
1308}
1309EXPORT_SYMBOL_GPL(ata_sff_queue_work);
1310
1311void ata_sff_queue_delayed_work(struct delayed_work *dwork, unsigned long delay)
1312{
1313 queue_delayed_work(ata_sff_wq, dwork, delay);
1314}
1315EXPORT_SYMBOL_GPL(ata_sff_queue_delayed_work);
1316
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001317void ata_sff_queue_pio_task(struct ata_link *link, unsigned long delay)
Tejun Heoc4291372010-05-10 21:41:38 +02001318{
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001319 struct ata_port *ap = link->ap;
1320
1321 WARN_ON((ap->sff_pio_task_link != NULL) &&
1322 (ap->sff_pio_task_link != link));
1323 ap->sff_pio_task_link = link;
1324
Tejun Heoc4291372010-05-10 21:41:38 +02001325 /* may fail if ata_sff_flush_pio_task() in progress */
Viresh Kumar64b97592011-02-22 14:32:38 +05301326 ata_sff_queue_delayed_work(&ap->sff_pio_task, msecs_to_jiffies(delay));
Tejun Heoc4291372010-05-10 21:41:38 +02001327}
1328EXPORT_SYMBOL_GPL(ata_sff_queue_pio_task);
1329
1330void ata_sff_flush_pio_task(struct ata_port *ap)
1331{
1332 DPRINTK("ENTER\n");
1333
Tejun Heoafe2c512010-12-14 16:21:17 +01001334 cancel_delayed_work_sync(&ap->sff_pio_task);
Tejun Heoc4291372010-05-10 21:41:38 +02001335 ap->hsm_task_state = HSM_ST_IDLE;
Gwendal Grignoud4d8eaf2011-07-22 13:48:32 -07001336 ap->sff_pio_task_link = NULL;
Tejun Heoc4291372010-05-10 21:41:38 +02001337
1338 if (ata_msg_ctl(ap))
Joe Perchesa9a79df2011-04-15 15:51:59 -07001339 ata_port_dbg(ap, "%s: EXIT\n", __func__);
Tejun Heoc4291372010-05-10 21:41:38 +02001340}
1341
1342static void ata_sff_pio_task(struct work_struct *work)
Tejun Heo624d5c52008-03-25 22:16:41 +09001343{
1344 struct ata_port *ap =
Tejun Heoc4291372010-05-10 21:41:38 +02001345 container_of(work, struct ata_port, sff_pio_task.work);
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001346 struct ata_link *link = ap->sff_pio_task_link;
Tejun Heoc4291372010-05-10 21:41:38 +02001347 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001348 u8 status;
1349 int poll_next;
1350
Jeff Garzik4fca3772011-02-15 01:13:24 -05001351 BUG_ON(ap->sff_pio_task_link == NULL);
Tejun Heoc4291372010-05-10 21:41:38 +02001352 /* qc can be NULL if timeout occurred */
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001353 qc = ata_qc_from_tag(ap, link->active_tag);
1354 if (!qc) {
1355 ap->sff_pio_task_link = NULL;
Tejun Heoc4291372010-05-10 21:41:38 +02001356 return;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001357 }
Tejun Heoc4291372010-05-10 21:41:38 +02001358
Tejun Heo624d5c52008-03-25 22:16:41 +09001359fsm_start:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001360 WARN_ON_ONCE(ap->hsm_task_state == HSM_ST_IDLE);
Tejun Heo624d5c52008-03-25 22:16:41 +09001361
1362 /*
1363 * This is purely heuristic. This is a fast path.
1364 * Sometimes when we enter, BSY will be cleared in
1365 * a chk-status or two. If not, the drive is probably seeking
1366 * or something. Snooze for a couple msecs, then
1367 * chk-status again. If still busy, queue delayed work.
1368 */
Tejun Heo9363c382008-04-07 22:47:16 +09001369 status = ata_sff_busy_wait(ap, ATA_BUSY, 5);
Tejun Heo624d5c52008-03-25 22:16:41 +09001370 if (status & ATA_BUSY) {
Tejun Heo97750ce2010-09-06 17:56:29 +02001371 ata_msleep(ap, 2);
Tejun Heo9363c382008-04-07 22:47:16 +09001372 status = ata_sff_busy_wait(ap, ATA_BUSY, 10);
Tejun Heo624d5c52008-03-25 22:16:41 +09001373 if (status & ATA_BUSY) {
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001374 ata_sff_queue_pio_task(link, ATA_SHORT_PAUSE);
Tejun Heo624d5c52008-03-25 22:16:41 +09001375 return;
1376 }
1377 }
1378
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001379 /*
1380 * hsm_move() may trigger another command to be processed.
1381 * clean the link beforehand.
1382 */
1383 ap->sff_pio_task_link = NULL;
Tejun Heo624d5c52008-03-25 22:16:41 +09001384 /* move the HSM */
Tejun Heo9363c382008-04-07 22:47:16 +09001385 poll_next = ata_sff_hsm_move(ap, qc, status, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001386
1387 /* another command or interrupt handler
1388 * may be running at this point.
1389 */
1390 if (poll_next)
1391 goto fsm_start;
1392}
1393
1394/**
Tejun Heo360ff782010-05-10 21:41:42 +02001395 * ata_sff_qc_issue - issue taskfile to a SFF controller
Tejun Heo624d5c52008-03-25 22:16:41 +09001396 * @qc: command to issue to device
1397 *
Tejun Heo360ff782010-05-10 21:41:42 +02001398 * This function issues a PIO or NODATA command to a SFF
1399 * controller.
Tejun Heo624d5c52008-03-25 22:16:41 +09001400 *
1401 * LOCKING:
1402 * spin_lock_irqsave(host lock)
1403 *
1404 * RETURNS:
1405 * Zero on success, AC_ERR_* mask on failure
1406 */
Tejun Heo9363c382008-04-07 22:47:16 +09001407unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001408{
1409 struct ata_port *ap = qc->ap;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001410 struct ata_link *link = qc->dev->link;
Tejun Heo624d5c52008-03-25 22:16:41 +09001411
1412 /* Use polling pio if the LLD doesn't handle
1413 * interrupt driven pio and atapi CDB interrupt.
1414 */
Tejun Heo360ff782010-05-10 21:41:42 +02001415 if (ap->flags & ATA_FLAG_PIO_POLLING)
1416 qc->tf.flags |= ATA_TFLAG_POLLING;
Tejun Heo624d5c52008-03-25 22:16:41 +09001417
1418 /* select the device */
1419 ata_dev_select(ap, qc->dev->devno, 1, 0);
1420
1421 /* start the command */
1422 switch (qc->tf.protocol) {
1423 case ATA_PROT_NODATA:
1424 if (qc->tf.flags & ATA_TFLAG_POLLING)
1425 ata_qc_set_polling(qc);
1426
1427 ata_tf_to_host(ap, &qc->tf);
1428 ap->hsm_task_state = HSM_ST_LAST;
1429
1430 if (qc->tf.flags & ATA_TFLAG_POLLING)
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001431 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001432
1433 break;
1434
Tejun Heo624d5c52008-03-25 22:16:41 +09001435 case ATA_PROT_PIO:
1436 if (qc->tf.flags & ATA_TFLAG_POLLING)
1437 ata_qc_set_polling(qc);
1438
1439 ata_tf_to_host(ap, &qc->tf);
1440
1441 if (qc->tf.flags & ATA_TFLAG_WRITE) {
1442 /* PIO data out protocol */
1443 ap->hsm_task_state = HSM_ST_FIRST;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001444 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001445
Tejun Heoc4291372010-05-10 21:41:38 +02001446 /* always send first data block using the
1447 * ata_sff_pio_task() codepath.
Tejun Heo624d5c52008-03-25 22:16:41 +09001448 */
1449 } else {
1450 /* PIO data in protocol */
1451 ap->hsm_task_state = HSM_ST;
1452
1453 if (qc->tf.flags & ATA_TFLAG_POLLING)
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001454 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001455
Tejun Heoc4291372010-05-10 21:41:38 +02001456 /* if polling, ata_sff_pio_task() handles the
1457 * rest. otherwise, interrupt handler takes
1458 * over from here.
Tejun Heo624d5c52008-03-25 22:16:41 +09001459 */
1460 }
1461
1462 break;
1463
1464 case ATAPI_PROT_PIO:
1465 case ATAPI_PROT_NODATA:
1466 if (qc->tf.flags & ATA_TFLAG_POLLING)
1467 ata_qc_set_polling(qc);
1468
1469 ata_tf_to_host(ap, &qc->tf);
1470
1471 ap->hsm_task_state = HSM_ST_FIRST;
1472
1473 /* send cdb by polling if no cdb interrupt */
1474 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
1475 (qc->tf.flags & ATA_TFLAG_POLLING))
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001476 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001477 break;
1478
Tejun Heo624d5c52008-03-25 22:16:41 +09001479 default:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001480 WARN_ON_ONCE(1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001481 return AC_ERR_SYSTEM;
1482 }
1483
1484 return 0;
1485}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001486EXPORT_SYMBOL_GPL(ata_sff_qc_issue);
Tejun Heo624d5c52008-03-25 22:16:41 +09001487
1488/**
Tejun Heo22183bf2008-04-07 22:47:20 +09001489 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1490 * @qc: qc to fill result TF for
1491 *
1492 * @qc is finished and result TF needs to be filled. Fill it
1493 * using ->sff_tf_read.
1494 *
1495 * LOCKING:
1496 * spin_lock_irqsave(host lock)
1497 *
1498 * RETURNS:
1499 * true indicating that result TF is successfully filled.
1500 */
1501bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc)
1502{
1503 qc->ap->ops->sff_tf_read(qc->ap, &qc->result_tf);
1504 return true;
1505}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001506EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf);
Tejun Heo22183bf2008-04-07 22:47:20 +09001507
Tejun Heoc3b28892010-05-19 22:10:21 +02001508static unsigned int ata_sff_idle_irq(struct ata_port *ap)
Tejun Heo624d5c52008-03-25 22:16:41 +09001509{
Tejun Heoc3b28892010-05-19 22:10:21 +02001510 ap->stats.idle_irq++;
1511
1512#ifdef ATA_IRQ_TRAP
1513 if ((ap->stats.idle_irq % 1000) == 0) {
1514 ap->ops->sff_check_status(ap);
1515 if (ap->ops->sff_irq_clear)
1516 ap->ops->sff_irq_clear(ap);
Joe Perchesa9a79df2011-04-15 15:51:59 -07001517 ata_port_warn(ap, "irq trap\n");
Tejun Heoc3b28892010-05-19 22:10:21 +02001518 return 1;
1519 }
1520#endif
1521 return 0; /* irq not handled */
1522}
1523
1524static unsigned int __ata_sff_port_intr(struct ata_port *ap,
1525 struct ata_queued_cmd *qc,
1526 bool hsmv_on_idle)
1527{
1528 u8 status;
Tejun Heo624d5c52008-03-25 22:16:41 +09001529
1530 VPRINTK("ata%u: protocol %d task_state %d\n",
1531 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
1532
1533 /* Check whether we are expecting interrupt in this state */
1534 switch (ap->hsm_task_state) {
1535 case HSM_ST_FIRST:
1536 /* Some pre-ATAPI-4 devices assert INTRQ
1537 * at this state when ready to receive CDB.
1538 */
1539
1540 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1541 * The flag was turned on only for atapi devices. No
1542 * need to check ata_is_atapi(qc->tf.protocol) again.
1543 */
1544 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Tejun Heoc3b28892010-05-19 22:10:21 +02001545 return ata_sff_idle_irq(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001546 break;
Tejun Heo687a9932010-12-03 15:19:13 +01001547 case HSM_ST_IDLE:
Tejun Heoc3b28892010-05-19 22:10:21 +02001548 return ata_sff_idle_irq(ap);
Tejun Heo687a9932010-12-03 15:19:13 +01001549 default:
1550 break;
Tejun Heo624d5c52008-03-25 22:16:41 +09001551 }
1552
Alan Coxa57c1ba2008-05-29 22:10:58 +01001553 /* check main status, clearing INTRQ if needed */
1554 status = ata_sff_irq_status(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001555 if (status & ATA_BUSY) {
Tejun Heoc3b28892010-05-19 22:10:21 +02001556 if (hsmv_on_idle) {
Tejun Heo332ac7f2010-03-23 12:24:08 +09001557 /* BMDMA engine is already stopped, we're screwed */
1558 qc->err_mask |= AC_ERR_HSM;
1559 ap->hsm_task_state = HSM_ST_ERR;
1560 } else
Tejun Heoc3b28892010-05-19 22:10:21 +02001561 return ata_sff_idle_irq(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001562 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001563
Tejun Heo9f2f7212010-05-10 21:41:32 +02001564 /* clear irq events */
Tejun Heo37f65b82010-05-19 22:10:20 +02001565 if (ap->ops->sff_irq_clear)
1566 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001567
Tejun Heo9363c382008-04-07 22:47:16 +09001568 ata_sff_hsm_move(ap, qc, status, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001569
Tejun Heo624d5c52008-03-25 22:16:41 +09001570 return 1; /* irq handled */
Tejun Heo624d5c52008-03-25 22:16:41 +09001571}
1572
1573/**
Tejun Heoc3b28892010-05-19 22:10:21 +02001574 * ata_sff_port_intr - Handle SFF port interrupt
1575 * @ap: Port on which interrupt arrived (possibly...)
1576 * @qc: Taskfile currently active in engine
Tejun Heo624d5c52008-03-25 22:16:41 +09001577 *
Tejun Heoc3b28892010-05-19 22:10:21 +02001578 * Handle port interrupt for given queued command.
Tejun Heo624d5c52008-03-25 22:16:41 +09001579 *
1580 * LOCKING:
Tejun Heoc3b28892010-05-19 22:10:21 +02001581 * spin_lock_irqsave(host lock)
Tejun Heo624d5c52008-03-25 22:16:41 +09001582 *
1583 * RETURNS:
Tejun Heoc3b28892010-05-19 22:10:21 +02001584 * One if interrupt was handled, zero if not (shared irq).
Tejun Heo624d5c52008-03-25 22:16:41 +09001585 */
Tejun Heoc3b28892010-05-19 22:10:21 +02001586unsigned int ata_sff_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1587{
1588 return __ata_sff_port_intr(ap, qc, false);
1589}
1590EXPORT_SYMBOL_GPL(ata_sff_port_intr);
1591
1592static inline irqreturn_t __ata_sff_interrupt(int irq, void *dev_instance,
1593 unsigned int (*port_intr)(struct ata_port *, struct ata_queued_cmd *))
Tejun Heo624d5c52008-03-25 22:16:41 +09001594{
1595 struct ata_host *host = dev_instance;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001596 bool retried = false;
Tejun Heo624d5c52008-03-25 22:16:41 +09001597 unsigned int i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001598 unsigned int handled, idle, polling;
Tejun Heo624d5c52008-03-25 22:16:41 +09001599 unsigned long flags;
1600
1601 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1602 spin_lock_irqsave(&host->lock, flags);
1603
Tejun Heo332ac7f2010-03-23 12:24:08 +09001604retry:
1605 handled = idle = polling = 0;
Tejun Heo624d5c52008-03-25 22:16:41 +09001606 for (i = 0; i < host->n_ports; i++) {
Tejun Heod88ec2e2010-01-19 10:46:32 +09001607 struct ata_port *ap = host->ports[i];
1608 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001609
Tejun Heod88ec2e2010-01-19 10:46:32 +09001610 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo27943622010-01-19 10:49:19 +09001611 if (qc) {
1612 if (!(qc->tf.flags & ATA_TFLAG_POLLING))
Tejun Heoc3b28892010-05-19 22:10:21 +02001613 handled |= port_intr(ap, qc);
Tejun Heo27943622010-01-19 10:49:19 +09001614 else
1615 polling |= 1 << i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001616 } else
1617 idle |= 1 << i;
Tejun Heo27943622010-01-19 10:49:19 +09001618 }
1619
1620 /*
1621 * If no port was expecting IRQ but the controller is actually
1622 * asserting IRQ line, nobody cared will ensue. Check IRQ
1623 * pending status if available and clear spurious IRQ.
1624 */
Tejun Heo332ac7f2010-03-23 12:24:08 +09001625 if (!handled && !retried) {
1626 bool retry = false;
1627
Tejun Heo27943622010-01-19 10:49:19 +09001628 for (i = 0; i < host->n_ports; i++) {
1629 struct ata_port *ap = host->ports[i];
1630
1631 if (polling & (1 << i))
1632 continue;
1633
1634 if (!ap->ops->sff_irq_check ||
1635 !ap->ops->sff_irq_check(ap))
1636 continue;
1637
Tejun Heo332ac7f2010-03-23 12:24:08 +09001638 if (idle & (1 << i)) {
1639 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02001640 if (ap->ops->sff_irq_clear)
1641 ap->ops->sff_irq_clear(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001642 } else {
1643 /* clear INTRQ and check if BUSY cleared */
1644 if (!(ap->ops->sff_check_status(ap) & ATA_BUSY))
1645 retry |= true;
1646 /*
1647 * With command in flight, we can't do
1648 * sff_irq_clear() w/o racing with completion.
1649 */
1650 }
1651 }
1652
1653 if (retry) {
1654 retried = true;
1655 goto retry;
Tejun Heo27943622010-01-19 10:49:19 +09001656 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001657 }
1658
1659 spin_unlock_irqrestore(&host->lock, flags);
1660
1661 return IRQ_RETVAL(handled);
1662}
Tejun Heoc3b28892010-05-19 22:10:21 +02001663
1664/**
1665 * ata_sff_interrupt - Default SFF ATA host interrupt handler
1666 * @irq: irq line (unused)
1667 * @dev_instance: pointer to our ata_host information structure
1668 *
1669 * Default interrupt handler for PCI IDE devices. Calls
1670 * ata_sff_port_intr() for each port that is not disabled.
1671 *
1672 * LOCKING:
1673 * Obtains host lock during operation.
1674 *
1675 * RETURNS:
1676 * IRQ_NONE or IRQ_HANDLED.
1677 */
1678irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
1679{
1680 return __ata_sff_interrupt(irq, dev_instance, ata_sff_port_intr);
1681}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001682EXPORT_SYMBOL_GPL(ata_sff_interrupt);
Tejun Heo624d5c52008-03-25 22:16:41 +09001683
1684/**
Alan Coxc96f1732009-03-24 10:23:46 +00001685 * ata_sff_lost_interrupt - Check for an apparent lost interrupt
1686 * @ap: port that appears to have timed out
1687 *
1688 * Called from the libata error handlers when the core code suspects
1689 * an interrupt has been lost. If it has complete anything we can and
1690 * then return. Interface must support altstatus for this faster
1691 * recovery to occur.
1692 *
1693 * Locking:
1694 * Caller holds host lock
1695 */
1696
1697void ata_sff_lost_interrupt(struct ata_port *ap)
1698{
1699 u8 status;
1700 struct ata_queued_cmd *qc;
1701
1702 /* Only one outstanding command per SFF channel */
1703 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo3e4ec342010-05-10 21:41:30 +02001704 /* We cannot lose an interrupt on a non-existent or polled command */
1705 if (!qc || qc->tf.flags & ATA_TFLAG_POLLING)
Alan Coxc96f1732009-03-24 10:23:46 +00001706 return;
1707 /* See if the controller thinks it is still busy - if so the command
1708 isn't a lost IRQ but is still in progress */
1709 status = ata_sff_altstatus(ap);
1710 if (status & ATA_BUSY)
1711 return;
1712
1713 /* There was a command running, we are no longer busy and we have
1714 no interrupt. */
Joe Perchesa9a79df2011-04-15 15:51:59 -07001715 ata_port_warn(ap, "lost interrupt (Status 0x%x)\n",
Alan Coxc96f1732009-03-24 10:23:46 +00001716 status);
1717 /* Run the host interrupt logic as if the interrupt had not been
1718 lost */
Tejun Heoc3b28892010-05-19 22:10:21 +02001719 ata_sff_port_intr(ap, qc);
Alan Coxc96f1732009-03-24 10:23:46 +00001720}
1721EXPORT_SYMBOL_GPL(ata_sff_lost_interrupt);
1722
1723/**
Tejun Heo9363c382008-04-07 22:47:16 +09001724 * ata_sff_freeze - Freeze SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001725 * @ap: port to freeze
1726 *
Tejun Heo9f2f7212010-05-10 21:41:32 +02001727 * Freeze SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001728 *
1729 * LOCKING:
1730 * Inherited from caller.
1731 */
Tejun Heo9363c382008-04-07 22:47:16 +09001732void ata_sff_freeze(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001733{
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001734 ap->ctl |= ATA_NIEN;
1735 ap->last_ctl = ap->ctl;
1736
Sergei Shtylyov41dec292010-05-07 22:47:50 +04001737 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr)
1738 ata_sff_set_devctl(ap, ap->ctl);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001739
1740 /* Under certain circumstances, some controllers raise IRQ on
1741 * ATA_NIEN manipulation. Also, many controllers fail to mask
1742 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1743 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001744 ap->ops->sff_check_status(ap);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001745
Tejun Heo37f65b82010-05-19 22:10:20 +02001746 if (ap->ops->sff_irq_clear)
1747 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001748}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001749EXPORT_SYMBOL_GPL(ata_sff_freeze);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001750
1751/**
Tejun Heo9363c382008-04-07 22:47:16 +09001752 * ata_sff_thaw - Thaw SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001753 * @ap: port to thaw
1754 *
Tejun Heo9363c382008-04-07 22:47:16 +09001755 * Thaw SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001756 *
1757 * LOCKING:
1758 * Inherited from caller.
1759 */
Tejun Heo9363c382008-04-07 22:47:16 +09001760void ata_sff_thaw(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001761{
1762 /* clear & re-enable interrupts */
Tejun Heo5682ed32008-04-07 22:47:16 +09001763 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02001764 if (ap->ops->sff_irq_clear)
1765 ap->ops->sff_irq_clear(ap);
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001766 ata_sff_irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001767}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001768EXPORT_SYMBOL_GPL(ata_sff_thaw);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001769
1770/**
Tejun Heo0aa11132008-04-07 22:47:18 +09001771 * ata_sff_prereset - prepare SFF link for reset
1772 * @link: SFF link to be reset
1773 * @deadline: deadline jiffies for the operation
1774 *
1775 * SFF link @link is about to be reset. Initialize it. It first
1776 * calls ata_std_prereset() and wait for !BSY if the port is
1777 * being softreset.
1778 *
1779 * LOCKING:
1780 * Kernel thread context (may sleep)
1781 *
1782 * RETURNS:
1783 * 0 on success, -errno otherwise.
1784 */
1785int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1786{
Tejun Heo0aa11132008-04-07 22:47:18 +09001787 struct ata_eh_context *ehc = &link->eh_context;
1788 int rc;
1789
1790 rc = ata_std_prereset(link, deadline);
1791 if (rc)
1792 return rc;
1793
1794 /* if we're about to do hardreset, nothing more to do */
1795 if (ehc->i.action & ATA_EH_HARDRESET)
1796 return 0;
1797
1798 /* wait for !BSY if we don't know that no device is attached */
1799 if (!ata_link_offline(link)) {
Tejun Heo705e76b2008-04-07 22:47:19 +09001800 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo0aa11132008-04-07 22:47:18 +09001801 if (rc && rc != -ENODEV) {
Joe Perchesa9a79df2011-04-15 15:51:59 -07001802 ata_link_warn(link,
1803 "device not ready (errno=%d), forcing hardreset\n",
1804 rc);
Tejun Heo0aa11132008-04-07 22:47:18 +09001805 ehc->i.action |= ATA_EH_HARDRESET;
1806 }
1807 }
1808
1809 return 0;
1810}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001811EXPORT_SYMBOL_GPL(ata_sff_prereset);
Tejun Heo0aa11132008-04-07 22:47:18 +09001812
1813/**
Tejun Heo624d5c52008-03-25 22:16:41 +09001814 * ata_devchk - PATA device presence detection
1815 * @ap: ATA channel to examine
1816 * @device: Device to examine (starting at zero)
1817 *
1818 * This technique was originally described in
1819 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1820 * later found its way into the ATA/ATAPI spec.
1821 *
1822 * Write a pattern to the ATA shadow registers,
1823 * and if a device is present, it will respond by
1824 * correctly storing and echoing back the
1825 * ATA shadow register contents.
1826 *
1827 * LOCKING:
1828 * caller.
1829 */
1830static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
1831{
1832 struct ata_ioports *ioaddr = &ap->ioaddr;
1833 u8 nsect, lbal;
1834
Tejun Heo5682ed32008-04-07 22:47:16 +09001835 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +09001836
1837 iowrite8(0x55, ioaddr->nsect_addr);
1838 iowrite8(0xaa, ioaddr->lbal_addr);
1839
1840 iowrite8(0xaa, ioaddr->nsect_addr);
1841 iowrite8(0x55, ioaddr->lbal_addr);
1842
1843 iowrite8(0x55, ioaddr->nsect_addr);
1844 iowrite8(0xaa, ioaddr->lbal_addr);
1845
1846 nsect = ioread8(ioaddr->nsect_addr);
1847 lbal = ioread8(ioaddr->lbal_addr);
1848
1849 if ((nsect == 0x55) && (lbal == 0xaa))
1850 return 1; /* we found a device */
1851
1852 return 0; /* nothing found */
1853}
1854
1855/**
Tejun Heo9363c382008-04-07 22:47:16 +09001856 * ata_sff_dev_classify - Parse returned ATA device signature
Tejun Heo624d5c52008-03-25 22:16:41 +09001857 * @dev: ATA device to classify (starting at zero)
1858 * @present: device seems present
1859 * @r_err: Value of error register on completion
1860 *
1861 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1862 * an ATA/ATAPI-defined set of values is placed in the ATA
1863 * shadow registers, indicating the results of device detection
1864 * and diagnostics.
1865 *
1866 * Select the ATA device, and read the values from the ATA shadow
1867 * registers. Then parse according to the Error register value,
1868 * and the spec-defined values examined by ata_dev_classify().
1869 *
1870 * LOCKING:
1871 * caller.
1872 *
1873 * RETURNS:
1874 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1875 */
Tejun Heo9363c382008-04-07 22:47:16 +09001876unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
Tejun Heo624d5c52008-03-25 22:16:41 +09001877 u8 *r_err)
1878{
1879 struct ata_port *ap = dev->link->ap;
1880 struct ata_taskfile tf;
1881 unsigned int class;
1882 u8 err;
1883
Tejun Heo5682ed32008-04-07 22:47:16 +09001884 ap->ops->sff_dev_select(ap, dev->devno);
Tejun Heo624d5c52008-03-25 22:16:41 +09001885
1886 memset(&tf, 0, sizeof(tf));
1887
Tejun Heo5682ed32008-04-07 22:47:16 +09001888 ap->ops->sff_tf_read(ap, &tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09001889 err = tf.feature;
1890 if (r_err)
1891 *r_err = err;
1892
1893 /* see if device passed diags: continue and warn later */
1894 if (err == 0)
1895 /* diagnostic fail : do nothing _YET_ */
1896 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
1897 else if (err == 1)
1898 /* do nothing */ ;
1899 else if ((dev->devno == 0) && (err == 0x81))
1900 /* do nothing */ ;
1901 else
1902 return ATA_DEV_NONE;
1903
1904 /* determine if device is ATA or ATAPI */
1905 class = ata_dev_classify(&tf);
1906
1907 if (class == ATA_DEV_UNKNOWN) {
1908 /* If the device failed diagnostic, it's likely to
1909 * have reported incorrect device signature too.
1910 * Assume ATA device if the device seems present but
1911 * device signature is invalid with diagnostic
1912 * failure.
1913 */
1914 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
1915 class = ATA_DEV_ATA;
1916 else
1917 class = ATA_DEV_NONE;
Tejun Heo5682ed32008-04-07 22:47:16 +09001918 } else if ((class == ATA_DEV_ATA) &&
1919 (ap->ops->sff_check_status(ap) == 0))
Tejun Heo624d5c52008-03-25 22:16:41 +09001920 class = ATA_DEV_NONE;
1921
1922 return class;
1923}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001924EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
Tejun Heo624d5c52008-03-25 22:16:41 +09001925
Tejun Heo705e76b2008-04-07 22:47:19 +09001926/**
1927 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1928 * @link: SFF link which is just reset
1929 * @devmask: mask of present devices
1930 * @deadline: deadline jiffies for the operation
1931 *
1932 * Wait devices attached to SFF @link to become ready after
1933 * reset. It contains preceding 150ms wait to avoid accessing TF
1934 * status register too early.
1935 *
1936 * LOCKING:
1937 * Kernel thread context (may sleep).
1938 *
1939 * RETURNS:
1940 * 0 on success, -ENODEV if some or all of devices in @devmask
1941 * don't seem to exist. -errno on other errors.
1942 */
1943int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
1944 unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +09001945{
Tejun Heo705e76b2008-04-07 22:47:19 +09001946 struct ata_port *ap = link->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +09001947 struct ata_ioports *ioaddr = &ap->ioaddr;
1948 unsigned int dev0 = devmask & (1 << 0);
1949 unsigned int dev1 = devmask & (1 << 1);
1950 int rc, ret = 0;
1951
Tejun Heo97750ce2010-09-06 17:56:29 +02001952 ata_msleep(ap, ATA_WAIT_AFTER_RESET);
Tejun Heo705e76b2008-04-07 22:47:19 +09001953
1954 /* always check readiness of the master device */
1955 rc = ata_sff_wait_ready(link, deadline);
1956 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1957 * and TF status is 0xff, bail out on it too.
Tejun Heo624d5c52008-03-25 22:16:41 +09001958 */
Tejun Heo705e76b2008-04-07 22:47:19 +09001959 if (rc)
1960 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001961
1962 /* if device 1 was found in ata_devchk, wait for register
1963 * access briefly, then wait for BSY to clear.
1964 */
1965 if (dev1) {
1966 int i;
1967
Tejun Heo5682ed32008-04-07 22:47:16 +09001968 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001969
1970 /* Wait for register access. Some ATAPI devices fail
1971 * to set nsect/lbal after reset, so don't waste too
1972 * much time on it. We're gonna wait for !BSY anyway.
1973 */
1974 for (i = 0; i < 2; i++) {
1975 u8 nsect, lbal;
1976
1977 nsect = ioread8(ioaddr->nsect_addr);
1978 lbal = ioread8(ioaddr->lbal_addr);
1979 if ((nsect == 1) && (lbal == 1))
1980 break;
Tejun Heo97750ce2010-09-06 17:56:29 +02001981 ata_msleep(ap, 50); /* give drive a breather */
Tejun Heo624d5c52008-03-25 22:16:41 +09001982 }
1983
Tejun Heo705e76b2008-04-07 22:47:19 +09001984 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001985 if (rc) {
1986 if (rc != -ENODEV)
1987 return rc;
1988 ret = rc;
1989 }
1990 }
1991
1992 /* is all this really necessary? */
Tejun Heo5682ed32008-04-07 22:47:16 +09001993 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001994 if (dev1)
Tejun Heo5682ed32008-04-07 22:47:16 +09001995 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001996 if (dev0)
Tejun Heo5682ed32008-04-07 22:47:16 +09001997 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001998
1999 return ret;
2000}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002001EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002002
Tejun Heo624d5c52008-03-25 22:16:41 +09002003static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
2004 unsigned long deadline)
2005{
2006 struct ata_ioports *ioaddr = &ap->ioaddr;
2007
2008 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
2009
2010 /* software reset. causes dev0 to be selected */
2011 iowrite8(ap->ctl, ioaddr->ctl_addr);
2012 udelay(20); /* FIXME: flush */
2013 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2014 udelay(20); /* FIXME: flush */
2015 iowrite8(ap->ctl, ioaddr->ctl_addr);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002016 ap->last_ctl = ap->ctl;
Tejun Heo624d5c52008-03-25 22:16:41 +09002017
Tejun Heo705e76b2008-04-07 22:47:19 +09002018 /* wait the port to become ready */
2019 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09002020}
2021
2022/**
Tejun Heo9363c382008-04-07 22:47:16 +09002023 * ata_sff_softreset - reset host port via ATA SRST
Tejun Heo624d5c52008-03-25 22:16:41 +09002024 * @link: ATA link to reset
2025 * @classes: resulting classes of attached devices
2026 * @deadline: deadline jiffies for the operation
2027 *
2028 * Reset host port using ATA SRST.
2029 *
2030 * LOCKING:
2031 * Kernel thread context (may sleep)
2032 *
2033 * RETURNS:
2034 * 0 on success, -errno otherwise.
2035 */
Tejun Heo9363c382008-04-07 22:47:16 +09002036int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
Tejun Heo624d5c52008-03-25 22:16:41 +09002037 unsigned long deadline)
2038{
2039 struct ata_port *ap = link->ap;
2040 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2041 unsigned int devmask = 0;
2042 int rc;
2043 u8 err;
2044
2045 DPRINTK("ENTER\n");
2046
Tejun Heo624d5c52008-03-25 22:16:41 +09002047 /* determine if device 0/1 are present */
2048 if (ata_devchk(ap, 0))
2049 devmask |= (1 << 0);
2050 if (slave_possible && ata_devchk(ap, 1))
2051 devmask |= (1 << 1);
2052
2053 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09002054 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002055
2056 /* issue bus reset */
2057 DPRINTK("about to softreset, devmask=%x\n", devmask);
2058 rc = ata_bus_softreset(ap, devmask, deadline);
2059 /* if link is occupied, -ENODEV too is an error */
2060 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
Joe Perchesa9a79df2011-04-15 15:51:59 -07002061 ata_link_err(link, "SRST failed (errno=%d)\n", rc);
Tejun Heo624d5c52008-03-25 22:16:41 +09002062 return rc;
2063 }
2064
2065 /* determine by signature whether we have ATA or ATAPI devices */
Tejun Heo9363c382008-04-07 22:47:16 +09002066 classes[0] = ata_sff_dev_classify(&link->device[0],
Tejun Heo624d5c52008-03-25 22:16:41 +09002067 devmask & (1 << 0), &err);
2068 if (slave_possible && err != 0x81)
Tejun Heo9363c382008-04-07 22:47:16 +09002069 classes[1] = ata_sff_dev_classify(&link->device[1],
Tejun Heo624d5c52008-03-25 22:16:41 +09002070 devmask & (1 << 1), &err);
2071
Tejun Heo624d5c52008-03-25 22:16:41 +09002072 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2073 return 0;
2074}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002075EXPORT_SYMBOL_GPL(ata_sff_softreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002076
2077/**
Tejun Heo9363c382008-04-07 22:47:16 +09002078 * sata_sff_hardreset - reset host port via SATA phy reset
Tejun Heo624d5c52008-03-25 22:16:41 +09002079 * @link: link to reset
2080 * @class: resulting class of attached device
2081 * @deadline: deadline jiffies for the operation
2082 *
2083 * SATA phy-reset host port using DET bits of SControl register,
2084 * wait for !BSY and classify the attached device.
2085 *
2086 * LOCKING:
2087 * Kernel thread context (may sleep)
2088 *
2089 * RETURNS:
2090 * 0 on success, -errno otherwise.
2091 */
Tejun Heo9363c382008-04-07 22:47:16 +09002092int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
Tejun Heo624d5c52008-03-25 22:16:41 +09002093 unsigned long deadline)
2094{
Tejun Heo9dadd452008-04-07 22:47:19 +09002095 struct ata_eh_context *ehc = &link->eh_context;
2096 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2097 bool online;
Tejun Heo624d5c52008-03-25 22:16:41 +09002098 int rc;
2099
Tejun Heo9dadd452008-04-07 22:47:19 +09002100 rc = sata_link_hardreset(link, timing, deadline, &online,
2101 ata_sff_check_ready);
Tejun Heo9dadd452008-04-07 22:47:19 +09002102 if (online)
2103 *class = ata_sff_dev_classify(link->device, 1, NULL);
Tejun Heo624d5c52008-03-25 22:16:41 +09002104
2105 DPRINTK("EXIT, class=%u\n", *class);
Tejun Heo9dadd452008-04-07 22:47:19 +09002106 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09002107}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002108EXPORT_SYMBOL_GPL(sata_sff_hardreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002109
2110/**
Tejun Heo203c75b2008-04-07 22:47:18 +09002111 * ata_sff_postreset - SFF postreset callback
2112 * @link: the target SFF ata_link
2113 * @classes: classes of attached devices
2114 *
2115 * This function is invoked after a successful reset. It first
2116 * calls ata_std_postreset() and performs SFF specific postreset
2117 * processing.
2118 *
2119 * LOCKING:
2120 * Kernel thread context (may sleep)
2121 */
2122void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
2123{
2124 struct ata_port *ap = link->ap;
2125
2126 ata_std_postreset(link, classes);
2127
2128 /* is double-select really necessary? */
2129 if (classes[0] != ATA_DEV_NONE)
2130 ap->ops->sff_dev_select(ap, 1);
2131 if (classes[1] != ATA_DEV_NONE)
2132 ap->ops->sff_dev_select(ap, 0);
2133
2134 /* bail out if no device is present */
2135 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2136 DPRINTK("EXIT, no device\n");
2137 return;
2138 }
2139
2140 /* set up device control */
Sergei Shtylyov41dec292010-05-07 22:47:50 +04002141 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr) {
2142 ata_sff_set_devctl(ap, ap->ctl);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002143 ap->last_ctl = ap->ctl;
2144 }
Tejun Heo203c75b2008-04-07 22:47:18 +09002145}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002146EXPORT_SYMBOL_GPL(ata_sff_postreset);
Tejun Heo203c75b2008-04-07 22:47:18 +09002147
2148/**
Alan Cox3d47aa82009-03-24 10:23:19 +00002149 * ata_sff_drain_fifo - Stock FIFO drain logic for SFF controllers
2150 * @qc: command
2151 *
2152 * Drain the FIFO and device of any stuck data following a command
Daniel Mack3ad2f3f2010-02-03 08:01:28 +08002153 * failing to complete. In some cases this is necessary before a
Alan Cox3d47aa82009-03-24 10:23:19 +00002154 * reset will recover the device.
2155 *
2156 */
2157
2158void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
2159{
2160 int count;
2161 struct ata_port *ap;
2162
2163 /* We only need to flush incoming data when a command was running */
2164 if (qc == NULL || qc->dma_dir == DMA_TO_DEVICE)
2165 return;
2166
2167 ap = qc->ap;
2168 /* Drain up to 64K of data before we give up this recovery method */
2169 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
Robert Hancock9a8fd682009-12-08 20:48:10 -06002170 && count < 65536; count += 2)
Alan Cox3d47aa82009-03-24 10:23:19 +00002171 ioread16(ap->ioaddr.data_addr);
2172
2173 /* Can become DEBUG later */
2174 if (count)
Joe Perchesa9a79df2011-04-15 15:51:59 -07002175 ata_port_dbg(ap, "drained %d bytes to clear DRQ\n", count);
Alan Cox3d47aa82009-03-24 10:23:19 +00002176
2177}
2178EXPORT_SYMBOL_GPL(ata_sff_drain_fifo);
2179
2180/**
Tejun Heofe06e5f2010-05-10 21:41:39 +02002181 * ata_sff_error_handler - Stock error handler for SFF controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002182 * @ap: port to handle error for
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002183 *
Tejun Heo9363c382008-04-07 22:47:16 +09002184 * Stock error handler for SFF controller. It can handle both
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002185 * PATA and SATA controllers. Many controllers should be able to
2186 * use this EH as-is or with some added handling before and
2187 * after.
2188 *
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002189 * LOCKING:
2190 * Kernel thread context (may sleep)
2191 */
Tejun Heo9363c382008-04-07 22:47:16 +09002192void ata_sff_error_handler(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002193{
Tejun Heoa1efdab2008-03-25 12:22:50 +09002194 ata_reset_fn_t softreset = ap->ops->softreset;
2195 ata_reset_fn_t hardreset = ap->ops->hardreset;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002196 struct ata_queued_cmd *qc;
2197 unsigned long flags;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002198
Tejun Heo9af5c9c2007-08-06 18:36:22 +09002199 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002200 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2201 qc = NULL;
2202
Jeff Garzikba6a1302006-06-22 23:46:10 -04002203 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002204
Tejun Heofe06e5f2010-05-10 21:41:39 +02002205 /*
2206 * We *MUST* do FIFO draining before we issue a reset as
2207 * several devices helpfully clear their internal state and
2208 * will lock solid if we touch the data port post reset. Pass
2209 * qc in case anyone wants to do different PIO/DMA recovery or
2210 * has per command fixups
Alan Cox3d47aa82009-03-24 10:23:19 +00002211 */
Tejun Heo8244cd02010-05-10 21:41:36 +02002212 if (ap->ops->sff_drain_fifo)
2213 ap->ops->sff_drain_fifo(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002214
Jeff Garzikba6a1302006-06-22 23:46:10 -04002215 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002216
Tejun Heofe06e5f2010-05-10 21:41:39 +02002217 /* ignore ata_sff_softreset if ctl isn't accessible */
Tejun Heo9363c382008-04-07 22:47:16 +09002218 if (softreset == ata_sff_softreset && !ap->ioaddr.ctl_addr)
Tejun Heoa1efdab2008-03-25 12:22:50 +09002219 softreset = NULL;
Tejun Heofe06e5f2010-05-10 21:41:39 +02002220
2221 /* ignore built-in hardresets if SCR access is not available */
2222 if ((hardreset == sata_std_hardreset ||
2223 hardreset == sata_sff_hardreset) && !sata_scr_valid(&ap->link))
Tejun Heoa1efdab2008-03-25 12:22:50 +09002224 hardreset = NULL;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002225
Tejun Heoa1efdab2008-03-25 12:22:50 +09002226 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
2227 ap->ops->postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002228}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002229EXPORT_SYMBOL_GPL(ata_sff_error_handler);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002230
2231/**
Tejun Heo9363c382008-04-07 22:47:16 +09002232 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
Tejun Heo624d5c52008-03-25 22:16:41 +09002233 * @ioaddr: IO address structure to be initialized
2234 *
2235 * Utility function which initializes data_addr, error_addr,
2236 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2237 * device_addr, status_addr, and command_addr to standard offsets
2238 * relative to cmd_addr.
2239 *
2240 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2241 */
Tejun Heo9363c382008-04-07 22:47:16 +09002242void ata_sff_std_ports(struct ata_ioports *ioaddr)
Tejun Heo624d5c52008-03-25 22:16:41 +09002243{
2244 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
2245 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
2246 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
2247 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
2248 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
2249 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
2250 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
2251 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
2252 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
2253 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
2254}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002255EXPORT_SYMBOL_GPL(ata_sff_std_ports);
Tejun Heo624d5c52008-03-25 22:16:41 +09002256
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002257#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +00002258
Tejun Heo272f7882008-03-25 22:16:40 +09002259static int ata_resources_present(struct pci_dev *pdev, int port)
2260{
2261 int i;
2262
2263 /* Check the PCI resources for this channel are enabled */
2264 port = port * 2;
Alan Cox0fe40ff2009-01-05 14:16:13 +00002265 for (i = 0; i < 2; i++) {
Tejun Heo272f7882008-03-25 22:16:40 +09002266 if (pci_resource_start(pdev, port + i) == 0 ||
2267 pci_resource_len(pdev, port + i) == 0)
2268 return 0;
2269 }
2270 return 1;
2271}
2272
Tejun Heod491b272007-04-17 23:44:07 +09002273/**
Tejun Heo9363c382008-04-07 22:47:16 +09002274 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +09002275 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +09002276 *
Tejun Heo1626aeb2007-05-04 12:43:58 +02002277 * Acquire native PCI ATA resources for @host and initialize the
2278 * first two ports of @host accordingly. Ports marked dummy are
2279 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +09002280 *
Tejun Heod583bc12007-07-04 18:02:07 +09002281 * Note that native PCI resources are valid even for legacy hosts
2282 * as we fix up pdev resources array early in boot, so this
2283 * function can be used for both native and legacy SFF hosts.
2284 *
Tejun Heod491b272007-04-17 23:44:07 +09002285 * LOCKING:
2286 * Inherited from calling layer (may sleep).
2287 *
2288 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +02002289 * 0 if at least one port is initialized, -ENODEV if no port is
2290 * available.
Tejun Heod491b272007-04-17 23:44:07 +09002291 */
Tejun Heo9363c382008-04-07 22:47:16 +09002292int ata_pci_sff_init_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +09002293{
2294 struct device *gdev = host->dev;
2295 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002296 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +09002297 int i, rc;
2298
Tejun Heod491b272007-04-17 23:44:07 +09002299 /* request, iomap BARs and init port addresses accordingly */
2300 for (i = 0; i < 2; i++) {
2301 struct ata_port *ap = host->ports[i];
2302 int base = i * 2;
2303 void __iomem * const *iomap;
2304
Tejun Heo1626aeb2007-05-04 12:43:58 +02002305 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +09002306 continue;
2307
Tejun Heo1626aeb2007-05-04 12:43:58 +02002308 /* Discard disabled ports. Some controllers show
2309 * their unused channels this way. Disabled ports are
2310 * made dummy.
2311 */
2312 if (!ata_resources_present(pdev, i)) {
2313 ap->ops = &ata_dummy_port_ops;
2314 continue;
2315 }
2316
Tejun Heo35a10a82008-01-04 18:42:21 +09002317 rc = pcim_iomap_regions(pdev, 0x3 << base,
2318 dev_driver_string(gdev));
Tejun Heod491b272007-04-17 23:44:07 +09002319 if (rc) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002320 dev_warn(gdev,
2321 "failed to request/iomap BARs for port %d (errno=%d)\n",
2322 i, rc);
Tejun Heod491b272007-04-17 23:44:07 +09002323 if (rc == -EBUSY)
2324 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002325 ap->ops = &ata_dummy_port_ops;
2326 continue;
Tejun Heod491b272007-04-17 23:44:07 +09002327 }
2328 host->iomap = iomap = pcim_iomap_table(pdev);
2329
2330 ap->ioaddr.cmd_addr = iomap[base];
2331 ap->ioaddr.altstatus_addr =
2332 ap->ioaddr.ctl_addr = (void __iomem *)
2333 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
Tejun Heo9363c382008-04-07 22:47:16 +09002334 ata_sff_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002335
Tejun Heocbcdd872007-08-18 13:14:55 +09002336 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
2337 (unsigned long long)pci_resource_start(pdev, base),
2338 (unsigned long long)pci_resource_start(pdev, base + 1));
2339
Tejun Heo1626aeb2007-05-04 12:43:58 +02002340 mask |= 1 << i;
2341 }
2342
2343 if (!mask) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002344 dev_err(gdev, "no available native port\n");
Tejun Heo1626aeb2007-05-04 12:43:58 +02002345 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +09002346 }
2347
2348 return 0;
2349}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002350EXPORT_SYMBOL_GPL(ata_pci_sff_init_host);
Tejun Heod491b272007-04-17 23:44:07 +09002351
Tejun Heo21b0ad42007-04-17 23:44:07 +09002352/**
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002353 * ata_pci_sff_prepare_host - helper to prepare PCI PIO-only SFF ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +09002354 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +02002355 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +09002356 * @r_host: out argument for the initialized ATA host
2357 *
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002358 * Helper to allocate PIO-only SFF ATA host for @pdev, acquire
2359 * all PCI resources and initialize it accordingly in one go.
Tejun Heo21b0ad42007-04-17 23:44:07 +09002360 *
2361 * LOCKING:
2362 * Inherited from calling layer (may sleep).
2363 *
2364 * RETURNS:
2365 * 0 on success, -errno otherwise.
2366 */
Tejun Heo9363c382008-04-07 22:47:16 +09002367int ata_pci_sff_prepare_host(struct pci_dev *pdev,
Alan Cox0fe40ff2009-01-05 14:16:13 +00002368 const struct ata_port_info * const *ppi,
Tejun Heod583bc12007-07-04 18:02:07 +09002369 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +09002370{
2371 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +09002372 int rc;
2373
2374 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
2375 return -ENOMEM;
2376
2377 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
2378 if (!host) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002379 dev_err(&pdev->dev, "failed to allocate ATA host\n");
Tejun Heo21b0ad42007-04-17 23:44:07 +09002380 rc = -ENOMEM;
2381 goto err_out;
2382 }
2383
Tejun Heo9363c382008-04-07 22:47:16 +09002384 rc = ata_pci_sff_init_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002385 if (rc)
2386 goto err_out;
2387
Tejun Heo21b0ad42007-04-17 23:44:07 +09002388 devres_remove_group(&pdev->dev, NULL);
2389 *r_host = host;
2390 return 0;
2391
Alan Cox0fe40ff2009-01-05 14:16:13 +00002392err_out:
Tejun Heo21b0ad42007-04-17 23:44:07 +09002393 devres_release_group(&pdev->dev, NULL);
2394 return rc;
2395}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002396EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002397
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002398/**
Tejun Heo9363c382008-04-07 22:47:16 +09002399 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002400 * @host: target SFF ATA host
2401 * @irq_handler: irq_handler used when requesting IRQ(s)
2402 * @sht: scsi_host_template to use when registering the host
2403 *
2404 * This is the counterpart of ata_host_activate() for SFF ATA
2405 * hosts. This separate helper is necessary because SFF hosts
2406 * use two separate interrupts in legacy mode.
2407 *
2408 * LOCKING:
2409 * Inherited from calling layer (may sleep).
2410 *
2411 * RETURNS:
2412 * 0 on success, -errno otherwise.
2413 */
Tejun Heo9363c382008-04-07 22:47:16 +09002414int ata_pci_sff_activate_host(struct ata_host *host,
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002415 irq_handler_t irq_handler,
2416 struct scsi_host_template *sht)
2417{
2418 struct device *dev = host->dev;
2419 struct pci_dev *pdev = to_pci_dev(dev);
2420 const char *drv_name = dev_driver_string(host->dev);
2421 int legacy_mode = 0, rc;
2422
2423 rc = ata_host_start(host);
2424 if (rc)
2425 return rc;
2426
2427 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
2428 u8 tmp8, mask;
2429
2430 /* TODO: What if one channel is in native mode ... */
2431 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
2432 mask = (1 << 2) | (1 << 0);
2433 if ((tmp8 & mask) != mask)
2434 legacy_mode = 1;
2435#if defined(CONFIG_NO_ATA_LEGACY)
2436 /* Some platforms with PCI limits cannot address compat
2437 port space. In that case we punt if their firmware has
2438 left a device in compatibility mode */
2439 if (legacy_mode) {
2440 printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2441 return -EOPNOTSUPP;
2442 }
2443#endif
2444 }
2445
2446 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2447 return -ENOMEM;
2448
2449 if (!legacy_mode && pdev->irq) {
James Bottomleyaf649a12011-04-24 14:31:33 -05002450 int i;
2451
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002452 rc = devm_request_irq(dev, pdev->irq, irq_handler,
2453 IRQF_SHARED, drv_name, host);
2454 if (rc)
2455 goto out;
2456
James Bottomleyaf649a12011-04-24 14:31:33 -05002457 for (i = 0; i < 2; i++) {
2458 if (ata_port_is_dummy(host->ports[i]))
2459 continue;
2460 ata_port_desc(host->ports[i], "irq %d", pdev->irq);
2461 }
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002462 } else if (legacy_mode) {
2463 if (!ata_port_is_dummy(host->ports[0])) {
2464 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
2465 irq_handler, IRQF_SHARED,
2466 drv_name, host);
2467 if (rc)
2468 goto out;
2469
2470 ata_port_desc(host->ports[0], "irq %d",
2471 ATA_PRIMARY_IRQ(pdev));
2472 }
2473
2474 if (!ata_port_is_dummy(host->ports[1])) {
2475 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
2476 irq_handler, IRQF_SHARED,
2477 drv_name, host);
2478 if (rc)
2479 goto out;
2480
2481 ata_port_desc(host->ports[1], "irq %d",
2482 ATA_SECONDARY_IRQ(pdev));
2483 }
2484 }
2485
2486 rc = ata_host_register(host, sht);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002487out:
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002488 if (rc == 0)
2489 devres_remove_group(dev, NULL);
2490 else
2491 devres_release_group(dev, NULL);
2492
2493 return rc;
2494}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002495EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002496
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002497static const struct ata_port_info *ata_sff_find_valid_pi(
2498 const struct ata_port_info * const *ppi)
2499{
2500 int i;
2501
2502 /* look up the first valid port_info */
2503 for (i = 0; i < 2 && ppi[i]; i++)
2504 if (ppi[i]->port_ops != &ata_dummy_port_ops)
2505 return ppi[i];
2506
2507 return NULL;
2508}
2509
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002510/**
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002511 * ata_pci_sff_init_one - Initialize/register PIO-only PCI IDE controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002512 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +02002513 * @ppi: array of port_info, must be enough for two ports
Tejun Heo1bd5b712008-03-25 12:22:49 +09002514 * @sht: scsi_host_template to use when registering the host
Tejun Heo887125e2008-03-25 12:22:49 +09002515 * @host_priv: host private_data
Alan Cox16ea0fc2010-02-23 02:26:06 -05002516 * @hflag: host flags
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002517 *
2518 * This is a helper function which can be called from a driver's
2519 * xxx_init_one() probe function if the hardware uses traditional
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002520 * IDE taskfile registers and is PIO only.
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002521 *
Alan Cox2ec7df02006-08-10 16:59:10 +09002522 * ASSUMPTION:
2523 * Nobody makes a single channel controller that appears solely as
2524 * the secondary legacy port on PCI.
2525 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002526 * LOCKING:
2527 * Inherited from PCI layer (may sleep).
2528 *
2529 * RETURNS:
2530 * Zero on success, negative on errno-based value on error.
2531 */
Tejun Heo9363c382008-04-07 22:47:16 +09002532int ata_pci_sff_init_one(struct pci_dev *pdev,
Alan Cox16ea0fc2010-02-23 02:26:06 -05002533 const struct ata_port_info * const *ppi,
2534 struct scsi_host_template *sht, void *host_priv, int hflag)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002535{
Tejun Heof0d36ef2007-01-20 16:00:28 +09002536 struct device *dev = &pdev->dev;
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002537 const struct ata_port_info *pi;
Tejun Heo0f834de2007-04-17 23:44:07 +09002538 struct ata_host *host = NULL;
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002539 int rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002540
2541 DPRINTK("ENTER\n");
2542
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002543 pi = ata_sff_find_valid_pi(ppi);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002544 if (!pi) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002545 dev_err(&pdev->dev, "no valid port_info specified\n");
Tejun Heo1626aeb2007-05-04 12:43:58 +02002546 return -EINVAL;
2547 }
2548
Tejun Heof0d36ef2007-01-20 16:00:28 +09002549 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2550 return -ENOMEM;
2551
Tejun Heof0d36ef2007-01-20 16:00:28 +09002552 rc = pcim_enable_device(pdev);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002553 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002554 goto out;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002555
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002556 /* prepare and activate SFF host */
Tejun Heo9363c382008-04-07 22:47:16 +09002557 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
Tejun Heod583bc12007-07-04 18:02:07 +09002558 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002559 goto out;
Tejun Heo887125e2008-03-25 12:22:49 +09002560 host->private_data = host_priv;
Alan Cox16ea0fc2010-02-23 02:26:06 -05002561 host->flags |= hflag;
Tejun Heod491b272007-04-17 23:44:07 +09002562
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002563 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002564out:
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002565 if (rc == 0)
2566 devres_remove_group(&pdev->dev, NULL);
2567 else
2568 devres_release_group(&pdev->dev, NULL);
Tejun Heod491b272007-04-17 23:44:07 +09002569
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002570 return rc;
2571}
Tejun Heo9363c382008-04-07 22:47:16 +09002572EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002573
Tejun Heo624d5c52008-03-25 22:16:41 +09002574#endif /* CONFIG_PCI */
Tejun Heo9f2f7212010-05-10 21:41:32 +02002575
Tejun Heo9a7780c2010-05-19 22:10:24 +02002576/*
2577 * BMDMA support
2578 */
2579
2580#ifdef CONFIG_ATA_BMDMA
2581
Tejun Heo9f2f7212010-05-10 21:41:32 +02002582const struct ata_port_operations ata_bmdma_port_ops = {
2583 .inherits = &ata_sff_port_ops,
2584
Tejun Heofe06e5f2010-05-10 21:41:39 +02002585 .error_handler = ata_bmdma_error_handler,
2586 .post_internal_cmd = ata_bmdma_post_internal_cmd,
2587
Tejun Heof47451c2010-05-10 21:41:40 +02002588 .qc_prep = ata_bmdma_qc_prep,
Tejun Heo360ff782010-05-10 21:41:42 +02002589 .qc_issue = ata_bmdma_qc_issue,
Tejun Heof47451c2010-05-10 21:41:40 +02002590
Tejun Heo37f65b82010-05-19 22:10:20 +02002591 .sff_irq_clear = ata_bmdma_irq_clear,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002592 .bmdma_setup = ata_bmdma_setup,
2593 .bmdma_start = ata_bmdma_start,
2594 .bmdma_stop = ata_bmdma_stop,
2595 .bmdma_status = ata_bmdma_status,
Tejun Heoc7087652010-05-10 21:41:34 +02002596
2597 .port_start = ata_bmdma_port_start,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002598};
2599EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
2600
2601const struct ata_port_operations ata_bmdma32_port_ops = {
2602 .inherits = &ata_bmdma_port_ops,
2603
2604 .sff_data_xfer = ata_sff_data_xfer32,
Tejun Heoc7087652010-05-10 21:41:34 +02002605 .port_start = ata_bmdma_port_start32,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002606};
2607EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops);
2608
Tejun Heo9f2f7212010-05-10 21:41:32 +02002609/**
Tejun Heof47451c2010-05-10 21:41:40 +02002610 * ata_bmdma_fill_sg - Fill PCI IDE PRD table
2611 * @qc: Metadata associated with taskfile to be transferred
2612 *
2613 * Fill PCI IDE PRD (scatter-gather) table with segments
2614 * associated with the current disk command.
2615 *
2616 * LOCKING:
2617 * spin_lock_irqsave(host lock)
2618 *
2619 */
2620static void ata_bmdma_fill_sg(struct ata_queued_cmd *qc)
2621{
2622 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +02002623 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Tejun Heof47451c2010-05-10 21:41:40 +02002624 struct scatterlist *sg;
2625 unsigned int si, pi;
2626
2627 pi = 0;
2628 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2629 u32 addr, offset;
2630 u32 sg_len, len;
2631
2632 /* determine if physical DMA addr spans 64K boundary.
2633 * Note h/w doesn't support 64-bit, so we unconditionally
2634 * truncate dma_addr_t to u32.
2635 */
2636 addr = (u32) sg_dma_address(sg);
2637 sg_len = sg_dma_len(sg);
2638
2639 while (sg_len) {
2640 offset = addr & 0xffff;
2641 len = sg_len;
2642 if ((offset + sg_len) > 0x10000)
2643 len = 0x10000 - offset;
2644
Tejun Heof60d7012010-05-10 21:41:41 +02002645 prd[pi].addr = cpu_to_le32(addr);
2646 prd[pi].flags_len = cpu_to_le32(len & 0xffff);
Tejun Heof47451c2010-05-10 21:41:40 +02002647 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2648
2649 pi++;
2650 sg_len -= len;
2651 addr += len;
2652 }
2653 }
2654
Tejun Heof60d7012010-05-10 21:41:41 +02002655 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Tejun Heof47451c2010-05-10 21:41:40 +02002656}
2657
2658/**
2659 * ata_bmdma_fill_sg_dumb - Fill PCI IDE PRD table
2660 * @qc: Metadata associated with taskfile to be transferred
2661 *
2662 * Fill PCI IDE PRD (scatter-gather) table with segments
2663 * associated with the current disk command. Perform the fill
2664 * so that we avoid writing any length 64K records for
2665 * controllers that don't follow the spec.
2666 *
2667 * LOCKING:
2668 * spin_lock_irqsave(host lock)
2669 *
2670 */
2671static void ata_bmdma_fill_sg_dumb(struct ata_queued_cmd *qc)
2672{
2673 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +02002674 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Tejun Heof47451c2010-05-10 21:41:40 +02002675 struct scatterlist *sg;
2676 unsigned int si, pi;
2677
2678 pi = 0;
2679 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2680 u32 addr, offset;
2681 u32 sg_len, len, blen;
2682
2683 /* determine if physical DMA addr spans 64K boundary.
2684 * Note h/w doesn't support 64-bit, so we unconditionally
2685 * truncate dma_addr_t to u32.
2686 */
2687 addr = (u32) sg_dma_address(sg);
2688 sg_len = sg_dma_len(sg);
2689
2690 while (sg_len) {
2691 offset = addr & 0xffff;
2692 len = sg_len;
2693 if ((offset + sg_len) > 0x10000)
2694 len = 0x10000 - offset;
2695
2696 blen = len & 0xffff;
Tejun Heof60d7012010-05-10 21:41:41 +02002697 prd[pi].addr = cpu_to_le32(addr);
Tejun Heof47451c2010-05-10 21:41:40 +02002698 if (blen == 0) {
2699 /* Some PATA chipsets like the CS5530 can't
2700 cope with 0x0000 meaning 64K as the spec
2701 says */
Tejun Heof60d7012010-05-10 21:41:41 +02002702 prd[pi].flags_len = cpu_to_le32(0x8000);
Tejun Heof47451c2010-05-10 21:41:40 +02002703 blen = 0x8000;
Tejun Heof60d7012010-05-10 21:41:41 +02002704 prd[++pi].addr = cpu_to_le32(addr + 0x8000);
Tejun Heof47451c2010-05-10 21:41:40 +02002705 }
Tejun Heof60d7012010-05-10 21:41:41 +02002706 prd[pi].flags_len = cpu_to_le32(blen);
Tejun Heof47451c2010-05-10 21:41:40 +02002707 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2708
2709 pi++;
2710 sg_len -= len;
2711 addr += len;
2712 }
2713 }
2714
Tejun Heof60d7012010-05-10 21:41:41 +02002715 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Tejun Heof47451c2010-05-10 21:41:40 +02002716}
2717
2718/**
2719 * ata_bmdma_qc_prep - Prepare taskfile for submission
2720 * @qc: Metadata associated with taskfile to be prepared
2721 *
2722 * Prepare ATA taskfile for submission.
2723 *
2724 * LOCKING:
2725 * spin_lock_irqsave(host lock)
2726 */
2727void ata_bmdma_qc_prep(struct ata_queued_cmd *qc)
2728{
2729 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2730 return;
2731
2732 ata_bmdma_fill_sg(qc);
2733}
2734EXPORT_SYMBOL_GPL(ata_bmdma_qc_prep);
2735
2736/**
2737 * ata_bmdma_dumb_qc_prep - Prepare taskfile for submission
2738 * @qc: Metadata associated with taskfile to be prepared
2739 *
2740 * Prepare ATA taskfile for submission.
2741 *
2742 * LOCKING:
2743 * spin_lock_irqsave(host lock)
2744 */
2745void ata_bmdma_dumb_qc_prep(struct ata_queued_cmd *qc)
2746{
2747 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2748 return;
2749
2750 ata_bmdma_fill_sg_dumb(qc);
2751}
2752EXPORT_SYMBOL_GPL(ata_bmdma_dumb_qc_prep);
2753
2754/**
Tejun Heo360ff782010-05-10 21:41:42 +02002755 * ata_bmdma_qc_issue - issue taskfile to a BMDMA controller
2756 * @qc: command to issue to device
2757 *
2758 * This function issues a PIO, NODATA or DMA command to a
2759 * SFF/BMDMA controller. PIO and NODATA are handled by
2760 * ata_sff_qc_issue().
2761 *
2762 * LOCKING:
2763 * spin_lock_irqsave(host lock)
2764 *
2765 * RETURNS:
2766 * Zero on success, AC_ERR_* mask on failure
2767 */
2768unsigned int ata_bmdma_qc_issue(struct ata_queued_cmd *qc)
2769{
2770 struct ata_port *ap = qc->ap;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07002771 struct ata_link *link = qc->dev->link;
Tejun Heo360ff782010-05-10 21:41:42 +02002772
Tejun Heo360ff782010-05-10 21:41:42 +02002773 /* defer PIO handling to sff_qc_issue */
2774 if (!ata_is_dma(qc->tf.protocol))
2775 return ata_sff_qc_issue(qc);
2776
2777 /* select the device */
2778 ata_dev_select(ap, qc->dev->devno, 1, 0);
2779
2780 /* start the command */
2781 switch (qc->tf.protocol) {
2782 case ATA_PROT_DMA:
2783 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2784
2785 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
2786 ap->ops->bmdma_setup(qc); /* set up bmdma */
2787 ap->ops->bmdma_start(qc); /* initiate bmdma */
2788 ap->hsm_task_state = HSM_ST_LAST;
2789 break;
2790
2791 case ATAPI_PROT_DMA:
2792 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2793
2794 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
2795 ap->ops->bmdma_setup(qc); /* set up bmdma */
2796 ap->hsm_task_state = HSM_ST_FIRST;
2797
2798 /* send cdb by polling if no cdb interrupt */
2799 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Gwendal Grignouea3c6452010-08-31 16:20:36 -07002800 ata_sff_queue_pio_task(link, 0);
Tejun Heo360ff782010-05-10 21:41:42 +02002801 break;
2802
2803 default:
2804 WARN_ON(1);
2805 return AC_ERR_SYSTEM;
2806 }
2807
2808 return 0;
2809}
2810EXPORT_SYMBOL_GPL(ata_bmdma_qc_issue);
2811
2812/**
Tejun Heoc3b28892010-05-19 22:10:21 +02002813 * ata_bmdma_port_intr - Handle BMDMA port interrupt
2814 * @ap: Port on which interrupt arrived (possibly...)
2815 * @qc: Taskfile currently active in engine
2816 *
2817 * Handle port interrupt for given queued command.
2818 *
2819 * LOCKING:
2820 * spin_lock_irqsave(host lock)
2821 *
2822 * RETURNS:
2823 * One if interrupt was handled, zero if not (shared irq).
2824 */
2825unsigned int ata_bmdma_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
2826{
2827 struct ata_eh_info *ehi = &ap->link.eh_info;
2828 u8 host_stat = 0;
2829 bool bmdma_stopped = false;
2830 unsigned int handled;
2831
2832 if (ap->hsm_task_state == HSM_ST_LAST && ata_is_dma(qc->tf.protocol)) {
2833 /* check status of DMA engine */
2834 host_stat = ap->ops->bmdma_status(ap);
2835 VPRINTK("ata%u: host_stat 0x%X\n", ap->print_id, host_stat);
2836
2837 /* if it's not our irq... */
2838 if (!(host_stat & ATA_DMA_INTR))
2839 return ata_sff_idle_irq(ap);
2840
2841 /* before we do anything else, clear DMA-Start bit */
2842 ap->ops->bmdma_stop(qc);
2843 bmdma_stopped = true;
2844
2845 if (unlikely(host_stat & ATA_DMA_ERR)) {
Lucas De Marchi25985ed2011-03-30 22:57:33 -03002846 /* error when transferring data to/from memory */
Tejun Heoc3b28892010-05-19 22:10:21 +02002847 qc->err_mask |= AC_ERR_HOST_BUS;
2848 ap->hsm_task_state = HSM_ST_ERR;
2849 }
2850 }
2851
2852 handled = __ata_sff_port_intr(ap, qc, bmdma_stopped);
2853
2854 if (unlikely(qc->err_mask) && ata_is_dma(qc->tf.protocol))
2855 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
2856
2857 return handled;
2858}
2859EXPORT_SYMBOL_GPL(ata_bmdma_port_intr);
2860
2861/**
2862 * ata_bmdma_interrupt - Default BMDMA ATA host interrupt handler
2863 * @irq: irq line (unused)
2864 * @dev_instance: pointer to our ata_host information structure
2865 *
2866 * Default interrupt handler for PCI IDE devices. Calls
2867 * ata_bmdma_port_intr() for each port that is not disabled.
2868 *
2869 * LOCKING:
2870 * Obtains host lock during operation.
2871 *
2872 * RETURNS:
2873 * IRQ_NONE or IRQ_HANDLED.
2874 */
2875irqreturn_t ata_bmdma_interrupt(int irq, void *dev_instance)
2876{
2877 return __ata_sff_interrupt(irq, dev_instance, ata_bmdma_port_intr);
2878}
2879EXPORT_SYMBOL_GPL(ata_bmdma_interrupt);
2880
2881/**
Tejun Heofe06e5f2010-05-10 21:41:39 +02002882 * ata_bmdma_error_handler - Stock error handler for BMDMA controller
2883 * @ap: port to handle error for
2884 *
2885 * Stock error handler for BMDMA controller. It can handle both
2886 * PATA and SATA controllers. Most BMDMA controllers should be
2887 * able to use this EH as-is or with some added handling before
2888 * and after.
2889 *
2890 * LOCKING:
2891 * Kernel thread context (may sleep)
2892 */
2893void ata_bmdma_error_handler(struct ata_port *ap)
2894{
2895 struct ata_queued_cmd *qc;
2896 unsigned long flags;
2897 bool thaw = false;
2898
2899 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
2900 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2901 qc = NULL;
2902
2903 /* reset PIO HSM and stop DMA engine */
2904 spin_lock_irqsave(ap->lock, flags);
2905
2906 if (qc && ata_is_dma(qc->tf.protocol)) {
2907 u8 host_stat;
2908
2909 host_stat = ap->ops->bmdma_status(ap);
2910
2911 /* BMDMA controllers indicate host bus error by
2912 * setting DMA_ERR bit and timing out. As it wasn't
2913 * really a timeout event, adjust error mask and
2914 * cancel frozen state.
2915 */
2916 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
2917 qc->err_mask = AC_ERR_HOST_BUS;
2918 thaw = true;
2919 }
2920
2921 ap->ops->bmdma_stop(qc);
2922
2923 /* if we're gonna thaw, make sure IRQ is clear */
2924 if (thaw) {
2925 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02002926 if (ap->ops->sff_irq_clear)
2927 ap->ops->sff_irq_clear(ap);
Tejun Heofe06e5f2010-05-10 21:41:39 +02002928 }
2929 }
2930
2931 spin_unlock_irqrestore(ap->lock, flags);
2932
2933 if (thaw)
2934 ata_eh_thaw_port(ap);
2935
2936 ata_sff_error_handler(ap);
2937}
2938EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
2939
2940/**
2941 * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for BMDMA
2942 * @qc: internal command to clean up
2943 *
2944 * LOCKING:
2945 * Kernel thread context (may sleep)
2946 */
2947void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc)
2948{
2949 struct ata_port *ap = qc->ap;
2950 unsigned long flags;
2951
2952 if (ata_is_dma(qc->tf.protocol)) {
2953 spin_lock_irqsave(ap->lock, flags);
2954 ap->ops->bmdma_stop(qc);
2955 spin_unlock_irqrestore(ap->lock, flags);
2956 }
2957}
2958EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
2959
2960/**
Tejun Heo37f65b82010-05-19 22:10:20 +02002961 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
2962 * @ap: Port associated with this ATA transaction.
2963 *
2964 * Clear interrupt and error flags in DMA status register.
2965 *
2966 * May be used as the irq_clear() entry in ata_port_operations.
2967 *
2968 * LOCKING:
2969 * spin_lock_irqsave(host lock)
2970 */
2971void ata_bmdma_irq_clear(struct ata_port *ap)
2972{
2973 void __iomem *mmio = ap->ioaddr.bmdma_addr;
2974
2975 if (!mmio)
2976 return;
2977
2978 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
2979}
2980EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
2981
2982/**
Tejun Heo9f2f7212010-05-10 21:41:32 +02002983 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2984 * @qc: Info associated with this ATA transaction.
2985 *
2986 * LOCKING:
2987 * spin_lock_irqsave(host lock)
2988 */
2989void ata_bmdma_setup(struct ata_queued_cmd *qc)
2990{
2991 struct ata_port *ap = qc->ap;
2992 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
2993 u8 dmactl;
2994
2995 /* load PRD table addr. */
2996 mb(); /* make sure PRD table writes are visible to controller */
Tejun Heof60d7012010-05-10 21:41:41 +02002997 iowrite32(ap->bmdma_prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
Tejun Heo9f2f7212010-05-10 21:41:32 +02002998
2999 /* specify data direction, triple-check start bit is clear */
3000 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3001 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3002 if (!rw)
3003 dmactl |= ATA_DMA_WR;
3004 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3005
3006 /* issue r/w command */
3007 ap->ops->sff_exec_command(ap, &qc->tf);
3008}
3009EXPORT_SYMBOL_GPL(ata_bmdma_setup);
3010
3011/**
3012 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3013 * @qc: Info associated with this ATA transaction.
3014 *
3015 * LOCKING:
3016 * spin_lock_irqsave(host lock)
3017 */
3018void ata_bmdma_start(struct ata_queued_cmd *qc)
3019{
3020 struct ata_port *ap = qc->ap;
3021 u8 dmactl;
3022
3023 /* start host DMA transaction */
3024 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3025 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3026
3027 /* Strictly, one may wish to issue an ioread8() here, to
3028 * flush the mmio write. However, control also passes
3029 * to the hardware at this point, and it will interrupt
3030 * us when we are to resume control. So, in effect,
3031 * we don't care when the mmio write flushes.
3032 * Further, a read of the DMA status register _immediately_
3033 * following the write may not be what certain flaky hardware
3034 * is expected, so I think it is best to not add a readb()
3035 * without first all the MMIO ATA cards/mobos.
3036 * Or maybe I'm just being paranoid.
3037 *
3038 * FIXME: The posting of this write means I/O starts are
Lucas De Marchi25985ed2011-03-30 22:57:33 -03003039 * unnecessarily delayed for MMIO
Tejun Heo9f2f7212010-05-10 21:41:32 +02003040 */
3041}
3042EXPORT_SYMBOL_GPL(ata_bmdma_start);
3043
3044/**
3045 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3046 * @qc: Command we are ending DMA for
3047 *
3048 * Clears the ATA_DMA_START flag in the dma control register
3049 *
3050 * May be used as the bmdma_stop() entry in ata_port_operations.
3051 *
3052 * LOCKING:
3053 * spin_lock_irqsave(host lock)
3054 */
3055void ata_bmdma_stop(struct ata_queued_cmd *qc)
3056{
3057 struct ata_port *ap = qc->ap;
3058 void __iomem *mmio = ap->ioaddr.bmdma_addr;
3059
3060 /* clear start/stop bit */
3061 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3062 mmio + ATA_DMA_CMD);
3063
3064 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3065 ata_sff_dma_pause(ap);
3066}
3067EXPORT_SYMBOL_GPL(ata_bmdma_stop);
3068
3069/**
3070 * ata_bmdma_status - Read PCI IDE BMDMA status
3071 * @ap: Port associated with this ATA transaction.
3072 *
3073 * Read and return BMDMA status register.
3074 *
3075 * May be used as the bmdma_status() entry in ata_port_operations.
3076 *
3077 * LOCKING:
3078 * spin_lock_irqsave(host lock)
3079 */
3080u8 ata_bmdma_status(struct ata_port *ap)
3081{
3082 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3083}
3084EXPORT_SYMBOL_GPL(ata_bmdma_status);
3085
Tejun Heoc7087652010-05-10 21:41:34 +02003086
3087/**
3088 * ata_bmdma_port_start - Set port up for bmdma.
3089 * @ap: Port to initialize
3090 *
3091 * Called just after data structures for each port are
3092 * initialized. Allocates space for PRD table.
3093 *
3094 * May be used as the port_start() entry in ata_port_operations.
3095 *
3096 * LOCKING:
3097 * Inherited from caller.
3098 */
3099int ata_bmdma_port_start(struct ata_port *ap)
3100{
3101 if (ap->mwdma_mask || ap->udma_mask) {
Tejun Heof60d7012010-05-10 21:41:41 +02003102 ap->bmdma_prd =
3103 dmam_alloc_coherent(ap->host->dev, ATA_PRD_TBL_SZ,
3104 &ap->bmdma_prd_dma, GFP_KERNEL);
3105 if (!ap->bmdma_prd)
Tejun Heoc7087652010-05-10 21:41:34 +02003106 return -ENOMEM;
3107 }
3108
3109 return 0;
3110}
3111EXPORT_SYMBOL_GPL(ata_bmdma_port_start);
3112
3113/**
3114 * ata_bmdma_port_start32 - Set port up for dma.
3115 * @ap: Port to initialize
3116 *
3117 * Called just after data structures for each port are
3118 * initialized. Enables 32bit PIO and allocates space for PRD
3119 * table.
3120 *
3121 * May be used as the port_start() entry in ata_port_operations for
3122 * devices that are capable of 32bit PIO.
3123 *
3124 * LOCKING:
3125 * Inherited from caller.
3126 */
3127int ata_bmdma_port_start32(struct ata_port *ap)
3128{
3129 ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE;
3130 return ata_bmdma_port_start(ap);
3131}
3132EXPORT_SYMBOL_GPL(ata_bmdma_port_start32);
3133
Tejun Heo9f2f7212010-05-10 21:41:32 +02003134#ifdef CONFIG_PCI
3135
3136/**
3137 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
3138 * @pdev: PCI device
3139 *
3140 * Some PCI ATA devices report simplex mode but in fact can be told to
3141 * enter non simplex mode. This implements the necessary logic to
3142 * perform the task on such devices. Calling it on other devices will
3143 * have -undefined- behaviour.
3144 */
3145int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)
3146{
3147 unsigned long bmdma = pci_resource_start(pdev, 4);
3148 u8 simplex;
3149
3150 if (bmdma == 0)
3151 return -ENOENT;
3152
3153 simplex = inb(bmdma + 0x02);
3154 outb(simplex & 0x60, bmdma + 0x02);
3155 simplex = inb(bmdma + 0x02);
3156 if (simplex & 0x80)
3157 return -EOPNOTSUPP;
3158 return 0;
3159}
3160EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);
3161
Tejun Heoc7087652010-05-10 21:41:34 +02003162static void ata_bmdma_nodma(struct ata_host *host, const char *reason)
3163{
3164 int i;
3165
Joe Perchesa44fec12011-04-15 15:51:58 -07003166 dev_err(host->dev, "BMDMA: %s, falling back to PIO\n", reason);
Tejun Heoc7087652010-05-10 21:41:34 +02003167
3168 for (i = 0; i < 2; i++) {
3169 host->ports[i]->mwdma_mask = 0;
3170 host->ports[i]->udma_mask = 0;
3171 }
3172}
3173
Tejun Heo9f2f7212010-05-10 21:41:32 +02003174/**
3175 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
3176 * @host: target ATA host
3177 *
3178 * Acquire PCI BMDMA resources and initialize @host accordingly.
3179 *
3180 * LOCKING:
3181 * Inherited from calling layer (may sleep).
Tejun Heo9f2f7212010-05-10 21:41:32 +02003182 */
Tejun Heoc7087652010-05-10 21:41:34 +02003183void ata_pci_bmdma_init(struct ata_host *host)
Tejun Heo9f2f7212010-05-10 21:41:32 +02003184{
3185 struct device *gdev = host->dev;
3186 struct pci_dev *pdev = to_pci_dev(gdev);
3187 int i, rc;
3188
3189 /* No BAR4 allocation: No DMA */
Tejun Heoc7087652010-05-10 21:41:34 +02003190 if (pci_resource_start(pdev, 4) == 0) {
3191 ata_bmdma_nodma(host, "BAR4 is zero");
3192 return;
3193 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003194
Tejun Heoc7087652010-05-10 21:41:34 +02003195 /*
3196 * Some controllers require BMDMA region to be initialized
3197 * even if DMA is not in use to clear IRQ status via
3198 * ->sff_irq_clear method. Try to initialize bmdma_addr
3199 * regardless of dma masks.
3200 */
Tejun Heo9f2f7212010-05-10 21:41:32 +02003201 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
3202 if (rc)
Tejun Heoc7087652010-05-10 21:41:34 +02003203 ata_bmdma_nodma(host, "failed to set dma mask");
3204 if (!rc) {
3205 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
3206 if (rc)
3207 ata_bmdma_nodma(host,
3208 "failed to set consistent dma mask");
3209 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003210
3211 /* request and iomap DMA region */
3212 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
3213 if (rc) {
Tejun Heoc7087652010-05-10 21:41:34 +02003214 ata_bmdma_nodma(host, "failed to request/iomap BAR4");
3215 return;
Tejun Heo9f2f7212010-05-10 21:41:32 +02003216 }
3217 host->iomap = pcim_iomap_table(pdev);
3218
3219 for (i = 0; i < 2; i++) {
3220 struct ata_port *ap = host->ports[i];
3221 void __iomem *bmdma = host->iomap[4] + 8 * i;
3222
3223 if (ata_port_is_dummy(ap))
3224 continue;
3225
3226 ap->ioaddr.bmdma_addr = bmdma;
3227 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
3228 (ioread8(bmdma + 2) & 0x80))
3229 host->flags |= ATA_HOST_SIMPLEX;
3230
3231 ata_port_desc(ap, "bmdma 0x%llx",
3232 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
3233 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003234}
3235EXPORT_SYMBOL_GPL(ata_pci_bmdma_init);
3236
Tejun Heo1c5afdf2010-05-19 22:10:22 +02003237/**
3238 * ata_pci_bmdma_prepare_host - helper to prepare PCI BMDMA ATA host
3239 * @pdev: target PCI device
3240 * @ppi: array of port_info, must be enough for two ports
3241 * @r_host: out argument for the initialized ATA host
3242 *
3243 * Helper to allocate BMDMA ATA host for @pdev, acquire all PCI
3244 * resources and initialize it accordingly in one go.
3245 *
3246 * LOCKING:
3247 * Inherited from calling layer (may sleep).
3248 *
3249 * RETURNS:
3250 * 0 on success, -errno otherwise.
3251 */
3252int ata_pci_bmdma_prepare_host(struct pci_dev *pdev,
3253 const struct ata_port_info * const * ppi,
3254 struct ata_host **r_host)
3255{
3256 int rc;
3257
3258 rc = ata_pci_sff_prepare_host(pdev, ppi, r_host);
3259 if (rc)
3260 return rc;
3261
3262 ata_pci_bmdma_init(*r_host);
3263 return 0;
3264}
3265EXPORT_SYMBOL_GPL(ata_pci_bmdma_prepare_host);
3266
3267/**
3268 * ata_pci_bmdma_init_one - Initialize/register BMDMA PCI IDE controller
3269 * @pdev: Controller to be initialized
3270 * @ppi: array of port_info, must be enough for two ports
3271 * @sht: scsi_host_template to use when registering the host
3272 * @host_priv: host private_data
3273 * @hflags: host flags
3274 *
3275 * This function is similar to ata_pci_sff_init_one() but also
3276 * takes care of BMDMA initialization.
3277 *
3278 * LOCKING:
3279 * Inherited from PCI layer (may sleep).
3280 *
3281 * RETURNS:
3282 * Zero on success, negative on errno-based value on error.
3283 */
3284int ata_pci_bmdma_init_one(struct pci_dev *pdev,
3285 const struct ata_port_info * const * ppi,
3286 struct scsi_host_template *sht, void *host_priv,
3287 int hflags)
3288{
3289 struct device *dev = &pdev->dev;
3290 const struct ata_port_info *pi;
3291 struct ata_host *host = NULL;
3292 int rc;
3293
3294 DPRINTK("ENTER\n");
3295
3296 pi = ata_sff_find_valid_pi(ppi);
3297 if (!pi) {
Joe Perchesa44fec12011-04-15 15:51:58 -07003298 dev_err(&pdev->dev, "no valid port_info specified\n");
Tejun Heo1c5afdf2010-05-19 22:10:22 +02003299 return -EINVAL;
3300 }
3301
3302 if (!devres_open_group(dev, NULL, GFP_KERNEL))
3303 return -ENOMEM;
3304
3305 rc = pcim_enable_device(pdev);
3306 if (rc)
3307 goto out;
3308
3309 /* prepare and activate BMDMA host */
3310 rc = ata_pci_bmdma_prepare_host(pdev, ppi, &host);
3311 if (rc)
3312 goto out;
3313 host->private_data = host_priv;
3314 host->flags |= hflags;
3315
3316 pci_set_master(pdev);
3317 rc = ata_pci_sff_activate_host(host, ata_bmdma_interrupt, sht);
3318 out:
3319 if (rc == 0)
3320 devres_remove_group(&pdev->dev, NULL);
3321 else
3322 devres_release_group(&pdev->dev, NULL);
3323
3324 return rc;
3325}
3326EXPORT_SYMBOL_GPL(ata_pci_bmdma_init_one);
3327
Tejun Heo9f2f7212010-05-10 21:41:32 +02003328#endif /* CONFIG_PCI */
Tejun Heo9a7780c2010-05-19 22:10:24 +02003329#endif /* CONFIG_ATA_BMDMA */
Tejun Heo270390e2010-05-10 21:41:35 +02003330
3331/**
3332 * ata_sff_port_init - Initialize SFF/BMDMA ATA port
3333 * @ap: Port to initialize
3334 *
3335 * Called on port allocation to initialize SFF/BMDMA specific
3336 * fields.
3337 *
3338 * LOCKING:
3339 * None.
3340 */
3341void ata_sff_port_init(struct ata_port *ap)
3342{
Tejun Heoc4291372010-05-10 21:41:38 +02003343 INIT_DELAYED_WORK(&ap->sff_pio_task, ata_sff_pio_task);
Tejun Heo5fe74542010-05-10 21:41:37 +02003344 ap->ctl = ATA_DEVCTL_OBS;
3345 ap->last_ctl = 0xFF;
Tejun Heo270390e2010-05-10 21:41:35 +02003346}
3347
3348int __init ata_sff_init(void)
3349{
Tejun Heo6370a6a2010-10-11 15:12:27 +02003350 ata_sff_wq = alloc_workqueue("ata_sff", WQ_MEM_RECLAIM, WQ_MAX_ACTIVE);
Tejun Heoc4291372010-05-10 21:41:38 +02003351 if (!ata_sff_wq)
3352 return -ENOMEM;
3353
Tejun Heo270390e2010-05-10 21:41:35 +02003354 return 0;
3355}
3356
Luck, Tonyc43d5592010-08-23 13:18:02 -07003357void ata_sff_exit(void)
Tejun Heo270390e2010-05-10 21:41:35 +02003358{
Tejun Heoc4291372010-05-10 21:41:38 +02003359 destroy_workqueue(ata_sff_wq);
Tejun Heo270390e2010-05-10 21:41:35 +02003360}