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Anatolij Gustschin230f7ed2010-09-28 20:55:21 +02001/* Copyright (C) 2005-2010 Freescale Semiconductor, Inc.
Randy Vinson80cb9ae2006-01-20 13:53:38 -08002 * Copyright (c) 2005 MontaVista Software
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18#ifndef _EHCI_FSL_H
19#define _EHCI_FSL_H
20
21/* offsets for the non-ehci registers in the FSL SOC USB controller */
Anatolij Gustschin230f7ed2010-09-28 20:55:21 +020022#define FSL_SOC_USB_ID 0x0
23#define ID_MSK 0x3f
24#define NID_MSK 0x3f00
Randy Vinson80cb9ae2006-01-20 13:53:38 -080025#define FSL_SOC_USB_ULPIVP 0x170
26#define FSL_SOC_USB_PORTSC1 0x184
27#define PORT_PTS_MSK (3<<30)
28#define PORT_PTS_UTMI (0<<30)
29#define PORT_PTS_ULPI (2<<30)
30#define PORT_PTS_SERIAL (3<<30)
31#define PORT_PTS_PTW (1<<28)
32#define FSL_SOC_USB_PORTSC2 0x188
Anatolij Gustschin230f7ed2010-09-28 20:55:21 +020033
34#define FSL_SOC_USB_USBGENCTRL 0x200
35#define USBGENCTRL_PPP (1 << 3)
36#define USBGENCTRL_PFP (1 << 2)
37#define FSL_SOC_USB_ISIPHYCTRL 0x204
38#define ISIPHYCTRL_PXE (1)
39#define ISIPHYCTRL_PHYE (1 << 4)
40
Randy Vinson80cb9ae2006-01-20 13:53:38 -080041#define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */
42#define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */
43#define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */
Christian Engelmayer7378c572007-03-12 09:08:36 +010044#define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */
45#define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */
Randy Vinson80cb9ae2006-01-20 13:53:38 -080046#define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */
Li Yang40acc092007-05-23 13:58:17 -070047#define SNOOP_SIZE_2GB 0x1e
Randy Vinson80cb9ae2006-01-20 13:53:38 -080048#endif /* _EHCI_FSL_H */