Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * File: msi.c |
| 3 | * Purpose: PCI Message Signaled Interrupt (MSI) |
| 4 | * |
| 5 | * Copyright (C) 2003-2004 Intel |
| 6 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) |
| 7 | */ |
| 8 | |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 9 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | #include <linux/mm.h> |
| 11 | #include <linux/irq.h> |
| 12 | #include <linux/interrupt.h> |
| 13 | #include <linux/init.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #include <linux/ioport.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | #include <linux/pci.h> |
| 16 | #include <linux/proc_fs.h> |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 17 | #include <linux/msi.h> |
Dan Williams | 4fdadeb | 2007-04-26 18:21:38 -0700 | [diff] [blame] | 18 | #include <linux/smp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | |
| 20 | #include <asm/errno.h> |
| 21 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
| 23 | #include "pci.h" |
| 24 | #include "msi.h" |
| 25 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | static int pci_msi_enable = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 28 | /* Arch hooks */ |
| 29 | |
| 30 | int __attribute__ ((weak)) |
| 31 | arch_msi_check_device(struct pci_dev *dev, int nvec, int type) |
| 32 | { |
| 33 | return 0; |
| 34 | } |
| 35 | |
| 36 | int __attribute__ ((weak)) |
| 37 | arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *entry) |
| 38 | { |
| 39 | return 0; |
| 40 | } |
| 41 | |
| 42 | int __attribute__ ((weak)) |
| 43 | arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
| 44 | { |
| 45 | struct msi_desc *entry; |
| 46 | int ret; |
| 47 | |
| 48 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 49 | ret = arch_setup_msi_irq(dev, entry); |
| 50 | if (ret) |
| 51 | return ret; |
| 52 | } |
| 53 | |
| 54 | return 0; |
| 55 | } |
| 56 | |
| 57 | void __attribute__ ((weak)) arch_teardown_msi_irq(unsigned int irq) |
| 58 | { |
| 59 | return; |
| 60 | } |
| 61 | |
| 62 | void __attribute__ ((weak)) |
| 63 | arch_teardown_msi_irqs(struct pci_dev *dev) |
| 64 | { |
| 65 | struct msi_desc *entry; |
| 66 | |
| 67 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 68 | if (entry->irq != 0) |
| 69 | arch_teardown_msi_irq(entry->irq); |
| 70 | } |
| 71 | } |
| 72 | |
Hidetoshi Seto | 5ca5c02 | 2008-05-19 13:48:17 +0900 | [diff] [blame] | 73 | static void __msi_set_enable(struct pci_dev *dev, int pos, int enable) |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 74 | { |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 75 | u16 control; |
| 76 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 77 | if (pos) { |
| 78 | pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); |
| 79 | control &= ~PCI_MSI_FLAGS_ENABLE; |
| 80 | if (enable) |
| 81 | control |= PCI_MSI_FLAGS_ENABLE; |
| 82 | pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); |
| 83 | } |
| 84 | } |
| 85 | |
Hidetoshi Seto | 5ca5c02 | 2008-05-19 13:48:17 +0900 | [diff] [blame] | 86 | static void msi_set_enable(struct pci_dev *dev, int enable) |
| 87 | { |
| 88 | __msi_set_enable(dev, pci_find_capability(dev, PCI_CAP_ID_MSI), enable); |
| 89 | } |
| 90 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 91 | static void msix_set_enable(struct pci_dev *dev, int enable) |
| 92 | { |
| 93 | int pos; |
| 94 | u16 control; |
| 95 | |
| 96 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 97 | if (pos) { |
| 98 | pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); |
| 99 | control &= ~PCI_MSIX_FLAGS_ENABLE; |
| 100 | if (enable) |
| 101 | control |= PCI_MSIX_FLAGS_ENABLE; |
| 102 | pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); |
| 103 | } |
| 104 | } |
| 105 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 106 | static void msix_flush_writes(struct irq_desc *desc) |
Mitch Williams | 988cbb1 | 2007-03-30 11:54:08 -0700 | [diff] [blame] | 107 | { |
| 108 | struct msi_desc *entry; |
| 109 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 110 | entry = get_irq_desc_msi(desc); |
Mitch Williams | 988cbb1 | 2007-03-30 11:54:08 -0700 | [diff] [blame] | 111 | BUG_ON(!entry || !entry->dev); |
| 112 | switch (entry->msi_attrib.type) { |
| 113 | case PCI_CAP_ID_MSI: |
| 114 | /* nothing to do */ |
| 115 | break; |
| 116 | case PCI_CAP_ID_MSIX: |
| 117 | { |
| 118 | int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
| 119 | PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET; |
| 120 | readl(entry->mask_base + offset); |
| 121 | break; |
| 122 | } |
| 123 | default: |
| 124 | BUG(); |
| 125 | break; |
| 126 | } |
| 127 | } |
| 128 | |
Matthew Wilcox | ce6fce4 | 2008-07-25 15:42:58 -0600 | [diff] [blame] | 129 | /* |
| 130 | * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to |
| 131 | * mask all MSI interrupts by clearing the MSI enable bit does not work |
| 132 | * reliably as devices without an INTx disable bit will then generate a |
| 133 | * level IRQ which will never be cleared. |
| 134 | * |
| 135 | * Returns 1 if it succeeded in masking the interrupt and 0 if the device |
| 136 | * doesn't support MSI masking. |
| 137 | */ |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 138 | static int msi_set_mask_bits(struct irq_desc *desc, u32 mask, u32 flag) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | { |
| 140 | struct msi_desc *entry; |
| 141 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 142 | entry = get_irq_desc_msi(desc); |
Eric W. Biederman | 277bc33 | 2006-10-04 02:16:57 -0700 | [diff] [blame] | 143 | BUG_ON(!entry || !entry->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | switch (entry->msi_attrib.type) { |
| 145 | case PCI_CAP_ID_MSI: |
Eric W. Biederman | 277bc33 | 2006-10-04 02:16:57 -0700 | [diff] [blame] | 146 | if (entry->msi_attrib.maskbit) { |
Satoru Takeuchi | c54c187 | 2007-01-18 13:50:05 +0900 | [diff] [blame] | 147 | int pos; |
| 148 | u32 mask_bits; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | |
Eric W. Biederman | 277bc33 | 2006-10-04 02:16:57 -0700 | [diff] [blame] | 150 | pos = (long)entry->mask_base; |
| 151 | pci_read_config_dword(entry->dev, pos, &mask_bits); |
Yinghai Lu | 8e149e0 | 2008-04-23 14:56:30 -0700 | [diff] [blame] | 152 | mask_bits &= ~(mask); |
| 153 | mask_bits |= flag & mask; |
Eric W. Biederman | 277bc33 | 2006-10-04 02:16:57 -0700 | [diff] [blame] | 154 | pci_write_config_dword(entry->dev, pos, mask_bits); |
Eric W. Biederman | 58e0543 | 2007-03-05 00:30:11 -0800 | [diff] [blame] | 155 | } else { |
Matthew Wilcox | ce6fce4 | 2008-07-25 15:42:58 -0600 | [diff] [blame] | 156 | return 0; |
Eric W. Biederman | 277bc33 | 2006-10-04 02:16:57 -0700 | [diff] [blame] | 157 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | case PCI_CAP_ID_MSIX: |
| 160 | { |
| 161 | int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
| 162 | PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET; |
| 163 | writel(flag, entry->mask_base + offset); |
Eric W. Biederman | 348e3fd | 2007-04-03 01:41:49 -0600 | [diff] [blame] | 164 | readl(entry->mask_base + offset); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | break; |
| 166 | } |
| 167 | default: |
Eric W. Biederman | 277bc33 | 2006-10-04 02:16:57 -0700 | [diff] [blame] | 168 | BUG(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | break; |
| 170 | } |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 171 | entry->msi_attrib.masked = !!flag; |
Matthew Wilcox | ce6fce4 | 2008-07-25 15:42:58 -0600 | [diff] [blame] | 172 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | } |
| 174 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 175 | void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 176 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 177 | struct msi_desc *entry = get_irq_desc_msi(desc); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 178 | switch(entry->msi_attrib.type) { |
| 179 | case PCI_CAP_ID_MSI: |
| 180 | { |
| 181 | struct pci_dev *dev = entry->dev; |
| 182 | int pos = entry->msi_attrib.pos; |
| 183 | u16 data; |
| 184 | |
| 185 | pci_read_config_dword(dev, msi_lower_address_reg(pos), |
| 186 | &msg->address_lo); |
| 187 | if (entry->msi_attrib.is_64) { |
| 188 | pci_read_config_dword(dev, msi_upper_address_reg(pos), |
| 189 | &msg->address_hi); |
| 190 | pci_read_config_word(dev, msi_data_reg(pos, 1), &data); |
| 191 | } else { |
| 192 | msg->address_hi = 0; |
Roland Dreier | cbf5d9e | 2007-10-03 11:15:11 -0700 | [diff] [blame] | 193 | pci_read_config_word(dev, msi_data_reg(pos, 0), &data); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 194 | } |
| 195 | msg->data = data; |
| 196 | break; |
| 197 | } |
| 198 | case PCI_CAP_ID_MSIX: |
| 199 | { |
| 200 | void __iomem *base; |
| 201 | base = entry->mask_base + |
| 202 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; |
| 203 | |
| 204 | msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); |
| 205 | msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); |
| 206 | msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET); |
| 207 | break; |
| 208 | } |
| 209 | default: |
| 210 | BUG(); |
| 211 | } |
| 212 | } |
| 213 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 214 | void read_msi_msg(unsigned int irq, struct msi_msg *msg) |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 215 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 216 | struct irq_desc *desc = irq_to_desc(irq); |
| 217 | |
| 218 | read_msi_msg_desc(desc, msg); |
| 219 | } |
| 220 | |
| 221 | void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) |
| 222 | { |
| 223 | struct msi_desc *entry = get_irq_desc_msi(desc); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 224 | switch (entry->msi_attrib.type) { |
| 225 | case PCI_CAP_ID_MSI: |
| 226 | { |
| 227 | struct pci_dev *dev = entry->dev; |
| 228 | int pos = entry->msi_attrib.pos; |
| 229 | |
| 230 | pci_write_config_dword(dev, msi_lower_address_reg(pos), |
| 231 | msg->address_lo); |
| 232 | if (entry->msi_attrib.is_64) { |
| 233 | pci_write_config_dword(dev, msi_upper_address_reg(pos), |
| 234 | msg->address_hi); |
| 235 | pci_write_config_word(dev, msi_data_reg(pos, 1), |
| 236 | msg->data); |
| 237 | } else { |
| 238 | pci_write_config_word(dev, msi_data_reg(pos, 0), |
| 239 | msg->data); |
| 240 | } |
| 241 | break; |
| 242 | } |
| 243 | case PCI_CAP_ID_MSIX: |
| 244 | { |
| 245 | void __iomem *base; |
| 246 | base = entry->mask_base + |
| 247 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; |
| 248 | |
| 249 | writel(msg->address_lo, |
| 250 | base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); |
| 251 | writel(msg->address_hi, |
| 252 | base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); |
| 253 | writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET); |
| 254 | break; |
| 255 | } |
| 256 | default: |
| 257 | BUG(); |
| 258 | } |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 259 | entry->msg = *msg; |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 260 | } |
| 261 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 262 | void write_msi_msg(unsigned int irq, struct msi_msg *msg) |
| 263 | { |
| 264 | struct irq_desc *desc = irq_to_desc(irq); |
| 265 | |
| 266 | write_msi_msg_desc(desc, msg); |
| 267 | } |
| 268 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 269 | void mask_msi_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 271 | struct irq_desc *desc = irq_to_desc(irq); |
| 272 | |
| 273 | msi_set_mask_bits(desc, 1, 1); |
| 274 | msix_flush_writes(desc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 | } |
| 276 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 277 | void unmask_msi_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 279 | struct irq_desc *desc = irq_to_desc(irq); |
| 280 | |
| 281 | msi_set_mask_bits(desc, 1, 0); |
| 282 | msix_flush_writes(desc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | } |
| 284 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 285 | static int msi_free_irqs(struct pci_dev* dev); |
Satoru Takeuchi | c54c187 | 2007-01-18 13:50:05 +0900 | [diff] [blame] | 286 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | static struct msi_desc* alloc_msi_entry(void) |
| 288 | { |
| 289 | struct msi_desc *entry; |
| 290 | |
Michael Ellerman | 3e916c0 | 2007-03-22 21:51:36 +1100 | [diff] [blame] | 291 | entry = kzalloc(sizeof(struct msi_desc), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 292 | if (!entry) |
| 293 | return NULL; |
| 294 | |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 295 | INIT_LIST_HEAD(&entry->list); |
| 296 | entry->irq = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 297 | entry->dev = NULL; |
| 298 | |
| 299 | return entry; |
| 300 | } |
| 301 | |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 302 | static void pci_intx_for_msi(struct pci_dev *dev, int enable) |
| 303 | { |
| 304 | if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG)) |
| 305 | pci_intx(dev, enable); |
| 306 | } |
| 307 | |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 308 | static void __pci_restore_msi_state(struct pci_dev *dev) |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 309 | { |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 310 | int pos; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 311 | u16 control; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 312 | struct msi_desc *entry; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 313 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 314 | if (!dev->msi_enabled) |
| 315 | return; |
| 316 | |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 317 | entry = get_irq_msi(dev->irq); |
| 318 | pos = entry->msi_attrib.pos; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 319 | |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 320 | pci_intx_for_msi(dev, 0); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 321 | msi_set_enable(dev, 0); |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 322 | write_msi_msg(dev->irq, &entry->msg); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 323 | if (entry->msi_attrib.maskbit) { |
| 324 | struct irq_desc *desc = irq_to_desc(dev->irq); |
| 325 | msi_set_mask_bits(desc, entry->msi_attrib.maskbits_mask, |
Yinghai Lu | 8e149e0 | 2008-04-23 14:56:30 -0700 | [diff] [blame] | 326 | entry->msi_attrib.masked); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 327 | } |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 328 | |
| 329 | pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); |
Jesse Barnes | abad2ec | 2008-08-07 08:52:37 -0700 | [diff] [blame] | 330 | control &= ~PCI_MSI_FLAGS_QSIZE; |
| 331 | control |= PCI_MSI_FLAGS_ENABLE; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 332 | pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 333 | } |
| 334 | |
| 335 | static void __pci_restore_msix_state(struct pci_dev *dev) |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 336 | { |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 337 | int pos; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 338 | struct msi_desc *entry; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 339 | u16 control; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 340 | |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 341 | if (!dev->msix_enabled) |
| 342 | return; |
| 343 | |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 344 | /* route the table */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 345 | pci_intx_for_msi(dev, 0); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 346 | msix_set_enable(dev, 0); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 347 | |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 348 | list_for_each_entry(entry, &dev->msi_list, list) { |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 349 | struct irq_desc *desc = irq_to_desc(entry->irq); |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 350 | write_msi_msg(entry->irq, &entry->msg); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 351 | msi_set_mask_bits(desc, 1, entry->msi_attrib.masked); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 352 | } |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 353 | |
Michael Ellerman | 314e77b | 2007-04-05 17:19:12 +1000 | [diff] [blame] | 354 | BUG_ON(list_empty(&dev->msi_list)); |
| 355 | entry = list_entry(dev->msi_list.next, struct msi_desc, list); |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 356 | pos = entry->msi_attrib.pos; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 357 | pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); |
| 358 | control &= ~PCI_MSIX_FLAGS_MASKALL; |
| 359 | control |= PCI_MSIX_FLAGS_ENABLE; |
| 360 | pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 361 | } |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 362 | |
| 363 | void pci_restore_msi_state(struct pci_dev *dev) |
| 364 | { |
| 365 | __pci_restore_msi_state(dev); |
| 366 | __pci_restore_msix_state(dev); |
| 367 | } |
Linas Vepstas | 94688cf | 2007-11-07 15:43:59 -0600 | [diff] [blame] | 368 | EXPORT_SYMBOL_GPL(pci_restore_msi_state); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 369 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | /** |
| 371 | * msi_capability_init - configure device's MSI capability structure |
| 372 | * @dev: pointer to the pci_dev data structure of MSI device function |
| 373 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 374 | * Setup the MSI capability structure of device function with a single |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 375 | * MSI irq, regardless of device function is capable of handling |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 376 | * multiple messages. A return of zero indicates the successful setup |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 377 | * of an entry zero with the new MSI irq or non-zero for otherwise. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | **/ |
| 379 | static int msi_capability_init(struct pci_dev *dev) |
| 380 | { |
| 381 | struct msi_desc *entry; |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 382 | int pos, ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | u16 control; |
| 384 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 385 | msi_set_enable(dev, 0); /* Ensure msi is disabled as I set it up */ |
| 386 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 387 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 388 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 389 | /* MSI Entry Initialization */ |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 390 | entry = alloc_msi_entry(); |
| 391 | if (!entry) |
| 392 | return -ENOMEM; |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 393 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 394 | entry->msi_attrib.type = PCI_CAP_ID_MSI; |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 395 | entry->msi_attrib.is_64 = is_64bit_address(control); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 396 | entry->msi_attrib.entry_nr = 0; |
| 397 | entry->msi_attrib.maskbit = is_mask_bit_support(control); |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 398 | entry->msi_attrib.masked = 1; |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 399 | entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 400 | entry->msi_attrib.pos = pos; |
Jike Song | 5993760 | 2008-09-09 23:42:03 +0800 | [diff] [blame] | 401 | if (entry->msi_attrib.maskbit) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 402 | entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos, |
Jike Song | 5993760 | 2008-09-09 23:42:03 +0800 | [diff] [blame] | 403 | entry->msi_attrib.is_64); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | } |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 405 | entry->dev = dev; |
| 406 | if (entry->msi_attrib.maskbit) { |
| 407 | unsigned int maskbits, temp; |
| 408 | /* All MSIs are unmasked by default, Mask them all */ |
| 409 | pci_read_config_dword(dev, |
Jike Song | 5993760 | 2008-09-09 23:42:03 +0800 | [diff] [blame] | 410 | msi_mask_bits_reg(pos, entry->msi_attrib.is_64), |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 411 | &maskbits); |
| 412 | temp = (1 << multi_msi_capable(control)); |
| 413 | temp = ((temp - 1) & ~temp); |
| 414 | maskbits |= temp; |
Jike Song | 5993760 | 2008-09-09 23:42:03 +0800 | [diff] [blame] | 415 | pci_write_config_dword(dev, entry->msi_attrib.is_64, maskbits); |
Yinghai Lu | 8e149e0 | 2008-04-23 14:56:30 -0700 | [diff] [blame] | 416 | entry->msi_attrib.maskbits_mask = temp; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 417 | } |
Eric W. Biederman | 0dd11f9 | 2007-06-01 00:46:32 -0700 | [diff] [blame] | 418 | list_add_tail(&entry->list, &dev->msi_list); |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 419 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 420 | /* Configure MSI capability structure */ |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 421 | ret = arch_setup_msi_irqs(dev, 1, PCI_CAP_ID_MSI); |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 422 | if (ret) { |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 423 | msi_free_irqs(dev); |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 424 | return ret; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 425 | } |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 426 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 427 | /* Set MSI enabled bits */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 428 | pci_intx_for_msi(dev, 0); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 429 | msi_set_enable(dev, 1); |
| 430 | dev->msi_enabled = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 431 | |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 432 | dev->irq = entry->irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | return 0; |
| 434 | } |
| 435 | |
| 436 | /** |
| 437 | * msix_capability_init - configure device's MSI-X capability |
| 438 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
Randy Dunlap | 8f7020d | 2005-10-23 11:57:38 -0700 | [diff] [blame] | 439 | * @entries: pointer to an array of struct msix_entry entries |
| 440 | * @nvec: number of @entries |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 442 | * Setup the MSI-X capability structure of device function with a |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 443 | * single MSI-X irq. A return of zero indicates the successful setup of |
| 444 | * requested MSI-X entries with allocated irqs or non-zero for otherwise. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | **/ |
| 446 | static int msix_capability_init(struct pci_dev *dev, |
| 447 | struct msix_entry *entries, int nvec) |
| 448 | { |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 449 | struct msi_desc *entry; |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 450 | int pos, i, j, nr_entries, ret; |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 451 | unsigned long phys_addr; |
| 452 | u32 table_offset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 453 | u16 control; |
| 454 | u8 bir; |
| 455 | void __iomem *base; |
| 456 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 457 | msix_set_enable(dev, 0);/* Ensure msix is disabled as I set it up */ |
| 458 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 459 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 460 | /* Request & Map MSI-X table region */ |
| 461 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 462 | nr_entries = multi_msix_capable(control); |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 463 | |
| 464 | pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK); |
Grant Grundler | a0454b4 | 2006-02-16 23:58:29 -0800 | [diff] [blame] | 466 | table_offset &= ~PCI_MSIX_FLAGS_BIRMASK; |
| 467 | phys_addr = pci_resource_start (dev, bir) + table_offset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE); |
| 469 | if (base == NULL) |
| 470 | return -ENOMEM; |
| 471 | |
| 472 | /* MSI-X Table Initialization */ |
| 473 | for (i = 0; i < nvec; i++) { |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 474 | entry = alloc_msi_entry(); |
| 475 | if (!entry) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 476 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | |
| 478 | j = entries[i].entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | entry->msi_attrib.type = PCI_CAP_ID_MSIX; |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 480 | entry->msi_attrib.is_64 = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 481 | entry->msi_attrib.entry_nr = j; |
| 482 | entry->msi_attrib.maskbit = 1; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 483 | entry->msi_attrib.masked = 1; |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 484 | entry->msi_attrib.default_irq = dev->irq; |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 485 | entry->msi_attrib.pos = pos; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 486 | entry->dev = dev; |
| 487 | entry->mask_base = base; |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 488 | |
Eric W. Biederman | 0dd11f9 | 2007-06-01 00:46:32 -0700 | [diff] [blame] | 489 | list_add_tail(&entry->list, &dev->msi_list); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 490 | } |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 491 | |
| 492 | ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); |
| 493 | if (ret) { |
| 494 | int avail = 0; |
| 495 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 496 | if (entry->irq != 0) { |
| 497 | avail++; |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 498 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 499 | } |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 500 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 501 | msi_free_irqs(dev); |
| 502 | |
Eric W. Biederman | 92db6d1 | 2006-10-04 02:16:35 -0700 | [diff] [blame] | 503 | /* If we had some success report the number of irqs |
| 504 | * we succeeded in setting up. |
| 505 | */ |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 506 | if (avail == 0) |
| 507 | avail = ret; |
Eric W. Biederman | 92db6d1 | 2006-10-04 02:16:35 -0700 | [diff] [blame] | 508 | return avail; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 509 | } |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 510 | |
| 511 | i = 0; |
| 512 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 513 | entries[i].vector = entry->irq; |
| 514 | set_irq_msi(entry->irq, entry); |
| 515 | i++; |
| 516 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | /* Set MSI-X enabled bits */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 518 | pci_intx_for_msi(dev, 0); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 519 | msix_set_enable(dev, 1); |
| 520 | dev->msix_enabled = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 521 | |
| 522 | return 0; |
| 523 | } |
| 524 | |
| 525 | /** |
Michael Ellerman | 17bbc12 | 2007-04-05 17:19:07 +1000 | [diff] [blame] | 526 | * pci_msi_check_device - check whether MSI may be enabled on a device |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 527 | * @dev: pointer to the pci_dev data structure of MSI device function |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 528 | * @nvec: how many MSIs have been requested ? |
Michael Ellerman | b1e2303 | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 529 | * @type: are we checking for MSI or MSI-X ? |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 530 | * |
Brice Goglin | 0306ebf | 2006-10-05 10:24:31 +0200 | [diff] [blame] | 531 | * Look at global flags, the device itself, and its parent busses |
Michael Ellerman | 17bbc12 | 2007-04-05 17:19:07 +1000 | [diff] [blame] | 532 | * to determine if MSI/-X are supported for the device. If MSI/-X is |
| 533 | * supported return 0, else return an error code. |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 534 | **/ |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 535 | static int pci_msi_check_device(struct pci_dev* dev, int nvec, int type) |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 536 | { |
| 537 | struct pci_bus *bus; |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 538 | int ret; |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 539 | |
Brice Goglin | 0306ebf | 2006-10-05 10:24:31 +0200 | [diff] [blame] | 540 | /* MSI must be globally enabled and supported by the device */ |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 541 | if (!pci_msi_enable || !dev || dev->no_msi) |
| 542 | return -EINVAL; |
| 543 | |
Michael Ellerman | 314e77b | 2007-04-05 17:19:12 +1000 | [diff] [blame] | 544 | /* |
| 545 | * You can't ask to have 0 or less MSIs configured. |
| 546 | * a) it's stupid .. |
| 547 | * b) the list manipulation code assumes nvec >= 1. |
| 548 | */ |
| 549 | if (nvec < 1) |
| 550 | return -ERANGE; |
| 551 | |
Brice Goglin | 0306ebf | 2006-10-05 10:24:31 +0200 | [diff] [blame] | 552 | /* Any bridge which does NOT route MSI transactions from it's |
| 553 | * secondary bus to it's primary bus must set NO_MSI flag on |
| 554 | * the secondary pci_bus. |
| 555 | * We expect only arch-specific PCI host bus controller driver |
| 556 | * or quirks for specific PCI bridges to be setting NO_MSI. |
| 557 | */ |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 558 | for (bus = dev->bus; bus; bus = bus->parent) |
| 559 | if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI) |
| 560 | return -EINVAL; |
| 561 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 562 | ret = arch_msi_check_device(dev, nvec, type); |
| 563 | if (ret) |
| 564 | return ret; |
| 565 | |
Michael Ellerman | b1e2303 | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 566 | if (!pci_find_capability(dev, type)) |
| 567 | return -EINVAL; |
| 568 | |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 569 | return 0; |
| 570 | } |
| 571 | |
| 572 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | * pci_enable_msi - configure device's MSI capability structure |
| 574 | * @dev: pointer to the pci_dev data structure of MSI device function |
| 575 | * |
| 576 | * Setup the MSI capability structure of device function with |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 577 | * a single MSI irq upon its software driver call to request for |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | * MSI mode enabled on its hardware device function. A return of zero |
| 579 | * indicates the successful setup of an entry zero with the new MSI |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 580 | * irq or non-zero for otherwise. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | **/ |
| 582 | int pci_enable_msi(struct pci_dev* dev) |
| 583 | { |
Michael Ellerman | b1e2303 | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 584 | int status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 585 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 586 | status = pci_msi_check_device(dev, 1, PCI_CAP_ID_MSI); |
| 587 | if (status) |
| 588 | return status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 590 | WARN_ON(!!dev->msi_enabled); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 591 | |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 592 | /* Check whether driver already requested for MSI-X irqs */ |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 593 | if (dev->msix_enabled) { |
Bjorn Helgaas | 80ccba1 | 2008-06-13 10:52:11 -0600 | [diff] [blame] | 594 | dev_info(&dev->dev, "can't enable MSI " |
| 595 | "(MSI-X already enabled)\n"); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 596 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | } |
| 598 | status = msi_capability_init(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 599 | return status; |
| 600 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 601 | EXPORT_SYMBOL(pci_enable_msi); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 602 | |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 603 | void pci_msi_shutdown(struct pci_dev* dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 604 | { |
| 605 | struct msi_desc *entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 606 | |
Michael Ellerman | 128bc5f | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 607 | if (!pci_msi_enable || !dev || !dev->msi_enabled) |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 608 | return; |
| 609 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 610 | msi_set_enable(dev, 0); |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 611 | pci_intx_for_msi(dev, 1); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 612 | dev->msi_enabled = 0; |
Eric W. Biederman | 7bd007e | 2006-10-04 02:16:31 -0700 | [diff] [blame] | 613 | |
Michael Ellerman | 314e77b | 2007-04-05 17:19:12 +1000 | [diff] [blame] | 614 | BUG_ON(list_empty(&dev->msi_list)); |
| 615 | entry = list_entry(dev->msi_list.next, struct msi_desc, list); |
Yinghai Lu | 8e149e0 | 2008-04-23 14:56:30 -0700 | [diff] [blame] | 616 | /* Return the the pci reset with msi irqs unmasked */ |
| 617 | if (entry->msi_attrib.maskbit) { |
| 618 | u32 mask = entry->msi_attrib.maskbits_mask; |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 619 | struct irq_desc *desc = irq_to_desc(dev->irq); |
| 620 | msi_set_mask_bits(desc, mask, ~mask); |
Yinghai Lu | 8e149e0 | 2008-04-23 14:56:30 -0700 | [diff] [blame] | 621 | } |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 622 | if (!entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 623 | return; |
Michael Ellerman | e387b9e | 2007-03-22 21:51:27 +1100 | [diff] [blame] | 624 | |
| 625 | /* Restore dev->irq to its default pin-assertion irq */ |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 626 | dev->irq = entry->msi_attrib.default_irq; |
| 627 | } |
| 628 | void pci_disable_msi(struct pci_dev* dev) |
| 629 | { |
| 630 | struct msi_desc *entry; |
| 631 | |
| 632 | if (!pci_msi_enable || !dev || !dev->msi_enabled) |
| 633 | return; |
| 634 | |
| 635 | pci_msi_shutdown(dev); |
| 636 | |
| 637 | entry = list_entry(dev->msi_list.next, struct msi_desc, list); |
| 638 | if (!entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) |
| 639 | return; |
| 640 | |
| 641 | msi_free_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 643 | EXPORT_SYMBOL(pci_disable_msi); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 644 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 645 | static int msi_free_irqs(struct pci_dev* dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | { |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 647 | struct msi_desc *entry, *tmp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | |
David Miller | b3b7cc7 | 2007-05-11 13:26:44 -0700 | [diff] [blame] | 649 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 650 | if (entry->irq) |
| 651 | BUG_ON(irq_has_action(entry->irq)); |
| 652 | } |
Michael Ellerman | 7ede9c1 | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 653 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 654 | arch_teardown_msi_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 656 | list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) { |
| 657 | if (entry->msi_attrib.type == PCI_CAP_ID_MSIX) { |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 658 | writel(1, entry->mask_base + entry->msi_attrib.entry_nr |
| 659 | * PCI_MSIX_ENTRY_SIZE |
| 660 | + PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET); |
Eric W. Biederman | 78b7611 | 2007-06-01 00:46:33 -0700 | [diff] [blame] | 661 | |
| 662 | if (list_is_last(&entry->list, &dev->msi_list)) |
| 663 | iounmap(entry->mask_base); |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 664 | } |
| 665 | list_del(&entry->list); |
| 666 | kfree(entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 667 | } |
| 668 | |
| 669 | return 0; |
| 670 | } |
| 671 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | /** |
| 673 | * pci_enable_msix - configure device's MSI-X capability structure |
| 674 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 675 | * @entries: pointer to an array of MSI-X entries |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 676 | * @nvec: number of MSI-X irqs requested for allocation by device driver |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 677 | * |
| 678 | * Setup the MSI-X capability structure of device function with the number |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 679 | * of requested irqs upon its software driver call to request for |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | * MSI-X mode enabled on its hardware device function. A return of zero |
| 681 | * indicates the successful configuration of MSI-X capability structure |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 682 | * with new allocated MSI-X irqs. A return of < 0 indicates a failure. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 683 | * Or a return of > 0 indicates that driver request is exceeding the number |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 684 | * of irqs available. Driver should use the returned value to re-send |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 685 | * its request. |
| 686 | **/ |
| 687 | int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) |
| 688 | { |
Eric W. Biederman | 92db6d1 | 2006-10-04 02:16:35 -0700 | [diff] [blame] | 689 | int status, pos, nr_entries; |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 690 | int i, j; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 691 | u16 control; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 693 | if (!entries) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 694 | return -EINVAL; |
| 695 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 696 | status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX); |
| 697 | if (status) |
| 698 | return status; |
| 699 | |
Grant Grundler | b64c05e | 2006-01-14 00:34:53 -0700 | [diff] [blame] | 700 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 701 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 702 | nr_entries = multi_msix_capable(control); |
| 703 | if (nvec > nr_entries) |
| 704 | return -EINVAL; |
| 705 | |
| 706 | /* Check for any invalid entries */ |
| 707 | for (i = 0; i < nvec; i++) { |
| 708 | if (entries[i].entry >= nr_entries) |
| 709 | return -EINVAL; /* invalid entry */ |
| 710 | for (j = i + 1; j < nvec; j++) { |
| 711 | if (entries[i].entry == entries[j].entry) |
| 712 | return -EINVAL; /* duplicate entry */ |
| 713 | } |
| 714 | } |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 715 | WARN_ON(!!dev->msix_enabled); |
Eric W. Biederman | 7bd007e | 2006-10-04 02:16:31 -0700 | [diff] [blame] | 716 | |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 717 | /* Check whether driver already requested for MSI irq */ |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 718 | if (dev->msi_enabled) { |
Bjorn Helgaas | 80ccba1 | 2008-06-13 10:52:11 -0600 | [diff] [blame] | 719 | dev_info(&dev->dev, "can't enable MSI-X " |
| 720 | "(MSI IRQ already assigned)\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 721 | return -EINVAL; |
| 722 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | status = msix_capability_init(dev, entries, nvec); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 724 | return status; |
| 725 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 726 | EXPORT_SYMBOL(pci_enable_msix); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 727 | |
Michael Ellerman | fc4afc7 | 2007-03-22 21:51:33 +1100 | [diff] [blame] | 728 | static void msix_free_all_irqs(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 729 | { |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 730 | msi_free_irqs(dev); |
Michael Ellerman | fc4afc7 | 2007-03-22 21:51:33 +1100 | [diff] [blame] | 731 | } |
| 732 | |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 733 | void pci_msix_shutdown(struct pci_dev* dev) |
Michael Ellerman | fc4afc7 | 2007-03-22 21:51:33 +1100 | [diff] [blame] | 734 | { |
Michael Ellerman | 128bc5f | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 735 | if (!pci_msi_enable || !dev || !dev->msix_enabled) |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 736 | return; |
| 737 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 738 | msix_set_enable(dev, 0); |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 739 | pci_intx_for_msi(dev, 1); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 740 | dev->msix_enabled = 0; |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 741 | } |
| 742 | void pci_disable_msix(struct pci_dev* dev) |
| 743 | { |
| 744 | if (!pci_msi_enable || !dev || !dev->msix_enabled) |
| 745 | return; |
| 746 | |
| 747 | pci_msix_shutdown(dev); |
Eric W. Biederman | 7bd007e | 2006-10-04 02:16:31 -0700 | [diff] [blame] | 748 | |
Michael Ellerman | fc4afc7 | 2007-03-22 21:51:33 +1100 | [diff] [blame] | 749 | msix_free_all_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 750 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 751 | EXPORT_SYMBOL(pci_disable_msix); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 752 | |
| 753 | /** |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 754 | * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 755 | * @dev: pointer to the pci_dev data structure of MSI(X) device function |
| 756 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 757 | * Being called during hotplug remove, from which the device function |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 758 | * is hot-removed. All previous assigned MSI/MSI-X irqs, if |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 759 | * allocated for this device function, are reclaimed to unused state, |
| 760 | * which may be used later on. |
| 761 | **/ |
| 762 | void msi_remove_pci_irq_vectors(struct pci_dev* dev) |
| 763 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | if (!pci_msi_enable || !dev) |
| 765 | return; |
| 766 | |
Michael Ellerman | 032de8e | 2007-04-18 19:39:22 +1000 | [diff] [blame] | 767 | if (dev->msi_enabled) |
| 768 | msi_free_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 769 | |
Michael Ellerman | fc4afc7 | 2007-03-22 21:51:33 +1100 | [diff] [blame] | 770 | if (dev->msix_enabled) |
| 771 | msix_free_all_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 772 | } |
| 773 | |
Matthew Wilcox | 309e57d | 2006-03-05 22:33:34 -0700 | [diff] [blame] | 774 | void pci_no_msi(void) |
| 775 | { |
| 776 | pci_msi_enable = 0; |
| 777 | } |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 778 | |
Andrew Patterson | 07ae95f | 2008-11-10 15:31:05 -0700 | [diff] [blame] | 779 | /** |
| 780 | * pci_msi_enabled - is MSI enabled? |
| 781 | * |
| 782 | * Returns true if MSI has not been disabled by the command-line option |
| 783 | * pci=nomsi. |
| 784 | **/ |
| 785 | int pci_msi_enabled(void) |
| 786 | { |
| 787 | return pci_msi_enable; |
| 788 | } |
| 789 | EXPORT_SYMBOL(pci_msi_enabled); |
| 790 | |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 791 | void pci_msi_init_pci_dev(struct pci_dev *dev) |
| 792 | { |
| 793 | INIT_LIST_HEAD(&dev->msi_list); |
| 794 | } |