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Bard Liao5e8351d2014-06-30 20:31:13 +08001/*
2 * rt5670.c -- RT5670 ALSA SoC audio codec driver
3 *
4 * Copyright 2014 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
Bard Liao64e89e52014-12-15 15:42:33 +080017#include <linux/pm_runtime.h>
Bard Liao5e8351d2014-06-30 20:31:13 +080018#include <linux/i2c.h>
19#include <linux/platform_device.h>
Mengdong Lin06058152014-11-14 15:51:34 +080020#include <linux/acpi.h>
Bard Liao5e8351d2014-06-30 20:31:13 +080021#include <linux/spi/spi.h>
Bard Liao223c0552014-12-18 11:32:52 +080022#include <linux/dmi.h>
Bard Liao5e8351d2014-06-30 20:31:13 +080023#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/jack.h>
27#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/initval.h>
30#include <sound/tlv.h>
31#include <sound/rt5670.h>
32
33#include "rl6231.h"
34#include "rt5670.h"
35#include "rt5670-dsp.h"
36
37#define RT5670_DEVICE_ID 0x6271
38
39#define RT5670_PR_RANGE_BASE (0xff + 1)
40#define RT5670_PR_SPACING 0x100
41
42#define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
43
44static const struct regmap_range_cfg rt5670_ranges[] = {
45 { .name = "PR", .range_min = RT5670_PR_BASE,
46 .range_max = RT5670_PR_BASE + 0xf8,
47 .selector_reg = RT5670_PRIV_INDEX,
48 .selector_mask = 0xff,
49 .selector_shift = 0x0,
50 .window_start = RT5670_PRIV_DATA,
51 .window_len = 0x1, },
52};
53
Nariman Poushin8019ff62015-07-16 16:36:21 +010054static const struct reg_sequence init_list[] = {
Bard Liao5e8351d2014-06-30 20:31:13 +080055 { RT5670_PR_BASE + 0x14, 0x9a8a },
56 { RT5670_PR_BASE + 0x38, 0x3ba1 },
57 { RT5670_PR_BASE + 0x3d, 0x3640 },
58};
Bard Liao5e8351d2014-06-30 20:31:13 +080059
60static const struct reg_default rt5670_reg[] = {
61 { 0x00, 0x0000 },
62 { 0x02, 0x8888 },
63 { 0x03, 0x8888 },
64 { 0x0a, 0x0001 },
65 { 0x0b, 0x0827 },
66 { 0x0c, 0x0000 },
67 { 0x0d, 0x0008 },
68 { 0x0e, 0x0000 },
69 { 0x0f, 0x0808 },
70 { 0x19, 0xafaf },
71 { 0x1a, 0xafaf },
72 { 0x1b, 0x0011 },
73 { 0x1c, 0x2f2f },
74 { 0x1d, 0x2f2f },
75 { 0x1e, 0x0000 },
76 { 0x1f, 0x2f2f },
77 { 0x20, 0x0000 },
78 { 0x26, 0x7860 },
79 { 0x27, 0x7860 },
80 { 0x28, 0x7871 },
81 { 0x29, 0x8080 },
82 { 0x2a, 0x5656 },
83 { 0x2b, 0x5454 },
84 { 0x2c, 0xaaa0 },
85 { 0x2d, 0x0000 },
86 { 0x2e, 0x2f2f },
87 { 0x2f, 0x1002 },
88 { 0x30, 0x0000 },
89 { 0x31, 0x5f00 },
90 { 0x32, 0x0000 },
91 { 0x33, 0x0000 },
92 { 0x34, 0x0000 },
93 { 0x35, 0x0000 },
94 { 0x36, 0x0000 },
95 { 0x37, 0x0000 },
96 { 0x38, 0x0000 },
97 { 0x3b, 0x0000 },
98 { 0x3c, 0x007f },
99 { 0x3d, 0x0000 },
100 { 0x3e, 0x007f },
101 { 0x45, 0xe00f },
102 { 0x4c, 0x5380 },
103 { 0x4f, 0x0073 },
104 { 0x52, 0x00d3 },
Bard Liaoac87f222014-11-06 12:23:52 +0800105 { 0x53, 0xf000 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800106 { 0x61, 0x0000 },
107 { 0x62, 0x0001 },
108 { 0x63, 0x00c3 },
109 { 0x64, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800110 { 0x65, 0x0001 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800111 { 0x66, 0x0000 },
112 { 0x6f, 0x8000 },
113 { 0x70, 0x8000 },
114 { 0x71, 0x8000 },
115 { 0x72, 0x8000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800116 { 0x73, 0x7770 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800117 { 0x74, 0x0e00 },
118 { 0x75, 0x1505 },
119 { 0x76, 0x0015 },
120 { 0x77, 0x0c00 },
121 { 0x78, 0x4000 },
122 { 0x79, 0x0123 },
123 { 0x7f, 0x1100 },
124 { 0x80, 0x0000 },
125 { 0x81, 0x0000 },
126 { 0x82, 0x0000 },
127 { 0x83, 0x0000 },
128 { 0x84, 0x0000 },
129 { 0x85, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800130 { 0x86, 0x0004 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800131 { 0x87, 0x0000 },
132 { 0x88, 0x0000 },
133 { 0x89, 0x0000 },
134 { 0x8a, 0x0000 },
135 { 0x8b, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800136 { 0x8c, 0x0003 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800137 { 0x8d, 0x0000 },
138 { 0x8e, 0x0004 },
139 { 0x8f, 0x1100 },
140 { 0x90, 0x0646 },
141 { 0x91, 0x0c06 },
142 { 0x93, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800143 { 0x94, 0x1270 },
144 { 0x95, 0x1000 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800145 { 0x97, 0x0000 },
146 { 0x98, 0x0000 },
147 { 0x99, 0x0000 },
148 { 0x9a, 0x2184 },
149 { 0x9b, 0x010a },
150 { 0x9c, 0x0aea },
151 { 0x9d, 0x000c },
152 { 0x9e, 0x0400 },
153 { 0xae, 0x7000 },
154 { 0xaf, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800155 { 0xb0, 0x7000 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800156 { 0xb1, 0x0000 },
157 { 0xb2, 0x0000 },
158 { 0xb3, 0x001f },
Bard Liaoac87f222014-11-06 12:23:52 +0800159 { 0xb4, 0x220c },
Bard Liao5e8351d2014-06-30 20:31:13 +0800160 { 0xb5, 0x1f00 },
161 { 0xb6, 0x0000 },
162 { 0xb7, 0x0000 },
163 { 0xbb, 0x0000 },
164 { 0xbc, 0x0000 },
165 { 0xbd, 0x0000 },
166 { 0xbe, 0x0000 },
167 { 0xbf, 0x0000 },
168 { 0xc0, 0x0000 },
169 { 0xc1, 0x0000 },
170 { 0xc2, 0x0000 },
171 { 0xcd, 0x0000 },
172 { 0xce, 0x0000 },
173 { 0xcf, 0x1813 },
174 { 0xd0, 0x0690 },
175 { 0xd1, 0x1c17 },
Bard Liaoac87f222014-11-06 12:23:52 +0800176 { 0xd3, 0xa220 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800177 { 0xd4, 0x0000 },
178 { 0xd6, 0x0400 },
179 { 0xd9, 0x0809 },
180 { 0xda, 0x0000 },
181 { 0xdb, 0x0001 },
182 { 0xdc, 0x0049 },
Bard Liaoac87f222014-11-06 12:23:52 +0800183 { 0xdd, 0x0024 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800184 { 0xe6, 0x8000 },
185 { 0xe7, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800186 { 0xec, 0xa200 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800187 { 0xed, 0x0000 },
Bard Liaoac87f222014-11-06 12:23:52 +0800188 { 0xee, 0xa200 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800189 { 0xef, 0x0000 },
190 { 0xf8, 0x0000 },
191 { 0xf9, 0x0000 },
192 { 0xfa, 0x8010 },
193 { 0xfb, 0x0033 },
Bard Liaoac87f222014-11-06 12:23:52 +0800194 { 0xfc, 0x0100 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800195};
196
197static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
198{
199 int i;
200
201 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
202 if ((reg >= rt5670_ranges[i].window_start &&
203 reg <= rt5670_ranges[i].window_start +
204 rt5670_ranges[i].window_len) ||
205 (reg >= rt5670_ranges[i].range_min &&
206 reg <= rt5670_ranges[i].range_max)) {
207 return true;
208 }
209 }
210
211 switch (reg) {
212 case RT5670_RESET:
213 case RT5670_PDM_DATA_CTRL1:
214 case RT5670_PDM1_DATA_CTRL4:
215 case RT5670_PDM2_DATA_CTRL4:
216 case RT5670_PRIV_DATA:
217 case RT5670_ASRC_5:
218 case RT5670_CJ_CTRL1:
219 case RT5670_CJ_CTRL2:
220 case RT5670_CJ_CTRL3:
221 case RT5670_A_JD_CTRL1:
222 case RT5670_A_JD_CTRL2:
223 case RT5670_VAD_CTRL5:
224 case RT5670_ADC_EQ_CTRL1:
225 case RT5670_EQ_CTRL1:
226 case RT5670_ALC_CTRL_1:
Bard Liao5e8351d2014-06-30 20:31:13 +0800227 case RT5670_IRQ_CTRL2:
228 case RT5670_INT_IRQ_ST:
229 case RT5670_IL_CMD:
230 case RT5670_DSP_CTRL1:
231 case RT5670_DSP_CTRL2:
232 case RT5670_DSP_CTRL3:
233 case RT5670_DSP_CTRL4:
234 case RT5670_DSP_CTRL5:
235 case RT5670_VENDOR_ID:
236 case RT5670_VENDOR_ID1:
237 case RT5670_VENDOR_ID2:
238 return true;
239 default:
240 return false;
241 }
242}
243
244static bool rt5670_readable_register(struct device *dev, unsigned int reg)
245{
246 int i;
247
248 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
249 if ((reg >= rt5670_ranges[i].window_start &&
250 reg <= rt5670_ranges[i].window_start +
251 rt5670_ranges[i].window_len) ||
252 (reg >= rt5670_ranges[i].range_min &&
253 reg <= rt5670_ranges[i].range_max)) {
254 return true;
255 }
256 }
257
258 switch (reg) {
259 case RT5670_RESET:
260 case RT5670_HP_VOL:
261 case RT5670_LOUT1:
262 case RT5670_CJ_CTRL1:
263 case RT5670_CJ_CTRL2:
264 case RT5670_CJ_CTRL3:
265 case RT5670_IN2:
266 case RT5670_INL1_INR1_VOL:
267 case RT5670_DAC1_DIG_VOL:
268 case RT5670_DAC2_DIG_VOL:
269 case RT5670_DAC_CTRL:
270 case RT5670_STO1_ADC_DIG_VOL:
271 case RT5670_MONO_ADC_DIG_VOL:
272 case RT5670_STO2_ADC_DIG_VOL:
273 case RT5670_ADC_BST_VOL1:
274 case RT5670_ADC_BST_VOL2:
275 case RT5670_STO2_ADC_MIXER:
276 case RT5670_STO1_ADC_MIXER:
277 case RT5670_MONO_ADC_MIXER:
278 case RT5670_AD_DA_MIXER:
279 case RT5670_STO_DAC_MIXER:
280 case RT5670_DD_MIXER:
281 case RT5670_DIG_MIXER:
282 case RT5670_DSP_PATH1:
283 case RT5670_DSP_PATH2:
284 case RT5670_DIG_INF1_DATA:
285 case RT5670_DIG_INF2_DATA:
286 case RT5670_PDM_OUT_CTRL:
287 case RT5670_PDM_DATA_CTRL1:
288 case RT5670_PDM1_DATA_CTRL2:
289 case RT5670_PDM1_DATA_CTRL3:
290 case RT5670_PDM1_DATA_CTRL4:
291 case RT5670_PDM2_DATA_CTRL2:
292 case RT5670_PDM2_DATA_CTRL3:
293 case RT5670_PDM2_DATA_CTRL4:
294 case RT5670_REC_L1_MIXER:
295 case RT5670_REC_L2_MIXER:
296 case RT5670_REC_R1_MIXER:
297 case RT5670_REC_R2_MIXER:
298 case RT5670_HPO_MIXER:
299 case RT5670_MONO_MIXER:
300 case RT5670_OUT_L1_MIXER:
301 case RT5670_OUT_R1_MIXER:
302 case RT5670_LOUT_MIXER:
303 case RT5670_PWR_DIG1:
304 case RT5670_PWR_DIG2:
305 case RT5670_PWR_ANLG1:
306 case RT5670_PWR_ANLG2:
307 case RT5670_PWR_MIXER:
308 case RT5670_PWR_VOL:
309 case RT5670_PRIV_INDEX:
310 case RT5670_PRIV_DATA:
311 case RT5670_I2S4_SDP:
312 case RT5670_I2S1_SDP:
313 case RT5670_I2S2_SDP:
314 case RT5670_I2S3_SDP:
315 case RT5670_ADDA_CLK1:
316 case RT5670_ADDA_CLK2:
317 case RT5670_DMIC_CTRL1:
318 case RT5670_DMIC_CTRL2:
319 case RT5670_TDM_CTRL_1:
320 case RT5670_TDM_CTRL_2:
321 case RT5670_TDM_CTRL_3:
322 case RT5670_DSP_CLK:
323 case RT5670_GLB_CLK:
324 case RT5670_PLL_CTRL1:
325 case RT5670_PLL_CTRL2:
326 case RT5670_ASRC_1:
327 case RT5670_ASRC_2:
328 case RT5670_ASRC_3:
329 case RT5670_ASRC_4:
330 case RT5670_ASRC_5:
331 case RT5670_ASRC_7:
332 case RT5670_ASRC_8:
333 case RT5670_ASRC_9:
334 case RT5670_ASRC_10:
335 case RT5670_ASRC_11:
336 case RT5670_ASRC_12:
337 case RT5670_ASRC_13:
338 case RT5670_ASRC_14:
339 case RT5670_DEPOP_M1:
340 case RT5670_DEPOP_M2:
341 case RT5670_DEPOP_M3:
342 case RT5670_CHARGE_PUMP:
343 case RT5670_MICBIAS:
344 case RT5670_A_JD_CTRL1:
345 case RT5670_A_JD_CTRL2:
346 case RT5670_VAD_CTRL1:
347 case RT5670_VAD_CTRL2:
348 case RT5670_VAD_CTRL3:
349 case RT5670_VAD_CTRL4:
350 case RT5670_VAD_CTRL5:
351 case RT5670_ADC_EQ_CTRL1:
352 case RT5670_ADC_EQ_CTRL2:
353 case RT5670_EQ_CTRL1:
354 case RT5670_EQ_CTRL2:
355 case RT5670_ALC_DRC_CTRL1:
356 case RT5670_ALC_DRC_CTRL2:
357 case RT5670_ALC_CTRL_1:
358 case RT5670_ALC_CTRL_2:
359 case RT5670_ALC_CTRL_3:
360 case RT5670_JD_CTRL:
361 case RT5670_IRQ_CTRL1:
362 case RT5670_IRQ_CTRL2:
363 case RT5670_INT_IRQ_ST:
364 case RT5670_GPIO_CTRL1:
365 case RT5670_GPIO_CTRL2:
366 case RT5670_GPIO_CTRL3:
367 case RT5670_SCRABBLE_FUN:
368 case RT5670_SCRABBLE_CTRL:
369 case RT5670_BASE_BACK:
370 case RT5670_MP3_PLUS1:
371 case RT5670_MP3_PLUS2:
372 case RT5670_ADJ_HPF1:
373 case RT5670_ADJ_HPF2:
374 case RT5670_HP_CALIB_AMP_DET:
375 case RT5670_SV_ZCD1:
376 case RT5670_SV_ZCD2:
377 case RT5670_IL_CMD:
378 case RT5670_IL_CMD2:
379 case RT5670_IL_CMD3:
380 case RT5670_DRC_HL_CTRL1:
381 case RT5670_DRC_HL_CTRL2:
382 case RT5670_ADC_MONO_HP_CTRL1:
383 case RT5670_ADC_MONO_HP_CTRL2:
384 case RT5670_ADC_STO2_HP_CTRL1:
385 case RT5670_ADC_STO2_HP_CTRL2:
386 case RT5670_JD_CTRL3:
387 case RT5670_JD_CTRL4:
388 case RT5670_DIG_MISC:
389 case RT5670_DSP_CTRL1:
390 case RT5670_DSP_CTRL2:
391 case RT5670_DSP_CTRL3:
392 case RT5670_DSP_CTRL4:
393 case RT5670_DSP_CTRL5:
394 case RT5670_GEN_CTRL2:
395 case RT5670_GEN_CTRL3:
396 case RT5670_VENDOR_ID:
397 case RT5670_VENDOR_ID1:
398 case RT5670_VENDOR_ID2:
399 return true;
400 default:
401 return false;
402 }
403}
404
Bard Liaod3ef7052015-03-11 11:42:44 +0800405/**
406 * rt5670_headset_detect - Detect headset.
407 * @codec: SoC audio codec device.
408 * @jack_insert: Jack insert or not.
409 *
410 * Detect whether is headset or not when jack inserted.
411 *
412 * Returns detect status.
413 */
414
415static int rt5670_headset_detect(struct snd_soc_codec *codec, int jack_insert)
416{
417 int val;
Lars-Peter Clausen6d8135f2015-05-19 21:49:10 +0200418 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Bard Liaod3ef7052015-03-11 11:42:44 +0800419 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
420
421 if (jack_insert) {
Lars-Peter Clausen6d8135f2015-05-19 21:49:10 +0200422 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
423 snd_soc_dapm_sync(dapm);
Bard Liaod3ef7052015-03-11 11:42:44 +0800424 snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x0);
425 snd_soc_update_bits(codec, RT5670_CJ_CTRL2,
426 RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD,
427 RT5670_CBJ_MN_JD);
428 snd_soc_write(codec, RT5670_GPIO_CTRL2, 0x0004);
429 snd_soc_update_bits(codec, RT5670_GPIO_CTRL1,
430 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
431 snd_soc_update_bits(codec, RT5670_CJ_CTRL1,
432 RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN);
433 snd_soc_write(codec, RT5670_JD_CTRL3, 0x00f0);
434 snd_soc_update_bits(codec, RT5670_CJ_CTRL2,
435 RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD);
436 snd_soc_update_bits(codec, RT5670_CJ_CTRL2,
437 RT5670_CBJ_MN_JD, 0);
438 msleep(300);
439 val = snd_soc_read(codec, RT5670_CJ_CTRL3) & 0x7;
440 if (val == 0x1 || val == 0x2) {
441 rt5670->jack_type = SND_JACK_HEADSET;
442 /* for push button */
443 snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x8);
444 snd_soc_update_bits(codec, RT5670_IL_CMD, 0x40, 0x40);
445 snd_soc_read(codec, RT5670_IL_CMD);
446 } else {
447 snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4);
448 rt5670->jack_type = SND_JACK_HEADPHONE;
Lars-Peter Clausen6d8135f2015-05-19 21:49:10 +0200449 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
450 snd_soc_dapm_sync(dapm);
Bard Liaod3ef7052015-03-11 11:42:44 +0800451 }
452 } else {
453 snd_soc_update_bits(codec, RT5670_INT_IRQ_ST, 0x8, 0x0);
454 snd_soc_update_bits(codec, RT5670_GEN_CTRL3, 0x4, 0x4);
455 rt5670->jack_type = 0;
Lars-Peter Clausen6d8135f2015-05-19 21:49:10 +0200456 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
457 snd_soc_dapm_sync(dapm);
Bard Liaod3ef7052015-03-11 11:42:44 +0800458 }
459
460 return rt5670->jack_type;
461}
462
Bard Liaocc3c3402015-03-11 11:42:45 +0800463void rt5670_jack_suspend(struct snd_soc_codec *codec)
464{
465 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
466
467 rt5670->jack_type_saved = rt5670->jack_type;
468 rt5670_headset_detect(codec, 0);
469}
470EXPORT_SYMBOL_GPL(rt5670_jack_suspend);
471
472void rt5670_jack_resume(struct snd_soc_codec *codec)
473{
474 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
475
476 if (rt5670->jack_type_saved)
477 rt5670_headset_detect(codec, 1);
478}
479EXPORT_SYMBOL_GPL(rt5670_jack_resume);
480
Bard Liaod3ef7052015-03-11 11:42:44 +0800481static int rt5670_button_detect(struct snd_soc_codec *codec)
482{
483 int btn_type, val;
484
485 val = snd_soc_read(codec, RT5670_IL_CMD);
486 btn_type = val & 0xff80;
487 snd_soc_write(codec, RT5670_IL_CMD, val);
488 if (btn_type != 0) {
489 msleep(20);
490 val = snd_soc_read(codec, RT5670_IL_CMD);
491 snd_soc_write(codec, RT5670_IL_CMD, val);
492 }
493
494 return btn_type;
495}
496
497static int rt5670_irq_detection(void *data)
498{
499 struct rt5670_priv *rt5670 = (struct rt5670_priv *)data;
500 struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio;
501 struct snd_soc_jack *jack = rt5670->jack;
502 int val, btn_type, report = jack->status;
503
504 if (rt5670->pdata.jd_mode == 1) /* 2 port */
505 val = snd_soc_read(rt5670->codec, RT5670_A_JD_CTRL1) & 0x0070;
506 else
507 val = snd_soc_read(rt5670->codec, RT5670_A_JD_CTRL1) & 0x0020;
508
509 switch (val) {
510 /* jack in */
511 case 0x30: /* 2 port */
512 case 0x0: /* 1 port or 2 port */
513 if (rt5670->jack_type == 0) {
514 report = rt5670_headset_detect(rt5670->codec, 1);
515 /* for push button and jack out */
516 gpio->debounce_time = 25;
517 break;
518 }
519 btn_type = 0;
520 if (snd_soc_read(rt5670->codec, RT5670_INT_IRQ_ST) & 0x4) {
521 /* button pressed */
522 report = SND_JACK_HEADSET;
523 btn_type = rt5670_button_detect(rt5670->codec);
524 switch (btn_type) {
525 case 0x2000: /* up */
526 report |= SND_JACK_BTN_1;
527 break;
528 case 0x0400: /* center */
529 report |= SND_JACK_BTN_0;
530 break;
531 case 0x0080: /* down */
532 report |= SND_JACK_BTN_2;
533 break;
534 default:
535 dev_err(rt5670->codec->dev,
536 "Unexpected button code 0x%04x\n",
537 btn_type);
538 break;
539 }
540 }
541 if (btn_type == 0)/* button release */
542 report = rt5670->jack_type;
543
544 break;
545 /* jack out */
546 case 0x70: /* 2 port */
547 case 0x10: /* 2 port */
548 case 0x20: /* 1 port */
549 report = 0;
550 snd_soc_update_bits(rt5670->codec, RT5670_INT_IRQ_ST, 0x1, 0x0);
551 rt5670_headset_detect(rt5670->codec, 0);
552 gpio->debounce_time = 150; /* for jack in */
553 break;
554 default:
555 break;
556 }
557
558 return report;
559}
560
561int rt5670_set_jack_detect(struct snd_soc_codec *codec,
562 struct snd_soc_jack *jack)
563{
564 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
565 int ret;
566
567 rt5670->jack = jack;
568 rt5670->hp_gpio.gpiod_dev = codec->dev;
569 rt5670->hp_gpio.name = "headphone detect";
570 rt5670->hp_gpio.report = SND_JACK_HEADSET |
571 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2;
572 rt5670->hp_gpio.debounce_time = 150;
573 rt5670->hp_gpio.wake = true;
574 rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670;
575 rt5670->hp_gpio.jack_status_check = rt5670_irq_detection;
576
577 ret = snd_soc_jack_add_gpios(rt5670->jack, 1,
578 &rt5670->hp_gpio);
579 if (ret) {
580 dev_err(codec->dev, "Adding jack GPIO failed\n");
581 return ret;
582 }
583
584 return 0;
585}
586EXPORT_SYMBOL_GPL(rt5670_set_jack_detect);
587
Bard Liao5e8351d2014-06-30 20:31:13 +0800588static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
589static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
590static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
591static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
592static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
593
594/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
Lars-Peter Clausendea6d322015-08-02 17:19:51 +0200595static const DECLARE_TLV_DB_RANGE(bst_tlv,
Bard Liao5e8351d2014-06-30 20:31:13 +0800596 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
597 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
598 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
599 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
600 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
601 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
Lars-Peter Clausendea6d322015-08-02 17:19:51 +0200602 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
603);
Bard Liao5e8351d2014-06-30 20:31:13 +0800604
605/* Interface data select */
606static const char * const rt5670_data_select[] = {
607 "Normal", "Swap", "left copy to right", "right copy to left"
608};
609
Mark Brown01957572014-08-01 17:30:38 +0100610static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800611 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
612
Mark Brown01957572014-08-01 17:30:38 +0100613static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800614 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
615
616static const struct snd_kcontrol_new rt5670_snd_controls[] = {
617 /* Headphone Output Volume */
618 SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
619 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
620 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
621 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
622 39, 0, out_vol_tlv),
623 /* OUTPUT Control */
624 SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
625 RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),
626 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
627 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
628 /* DAC Digital Volume */
629 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
630 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
631 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
632 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
633 175, 0, dac_vol_tlv),
634 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
635 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
636 175, 0, dac_vol_tlv),
637 /* IN1/IN2 Control */
638 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
639 RT5670_BST_SFT1, 8, 0, bst_tlv),
640 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
641 RT5670_BST_SFT1, 8, 0, bst_tlv),
642 /* INL/INR Volume Control */
643 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
644 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
645 31, 1, in_vol_tlv),
646 /* ADC Digital Volume Control */
647 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
648 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
649 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
650 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
651 127, 0, adc_vol_tlv),
652
653 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
654 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
655 127, 0, adc_vol_tlv),
656
657 /* ADC Boost Volume Control */
658 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
659 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
660 3, 0, adc_bst_tlv),
661
662 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
663 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
664 3, 0, adc_bst_tlv),
665
666 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
667 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
668};
669
670/**
671 * set_dmic_clk - Set parameter of dmic.
672 *
673 * @w: DAPM widget.
674 * @kcontrol: The kcontrol of this widget.
675 * @event: Event id.
676 *
677 * Choose dmic clock between 1MHz and 3MHz.
678 * It is better for clock to approximate 3MHz.
679 */
680static int set_dmic_clk(struct snd_soc_dapm_widget *w,
681 struct snd_kcontrol *kcontrol, int event)
682{
Lars-Peter Clausen8eee1462015-01-15 12:52:15 +0100683 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Bard Liao5e8351d2014-06-30 20:31:13 +0800684 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
Oder Chiou00a6d6e52015-08-05 10:03:18 +0800685 int idx, rate;
Bard Liao5e8351d2014-06-30 20:31:13 +0800686
Oder Chiou00a6d6e52015-08-05 10:03:18 +0800687 rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap,
688 RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT);
689 idx = rl6231_calc_dmic_clk(rate);
Bard Liao5e8351d2014-06-30 20:31:13 +0800690 if (idx < 0)
691 dev_err(codec->dev, "Failed to set DMIC clock\n");
692 else
693 snd_soc_update_bits(codec, RT5670_DMIC_CTRL1,
694 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
695 return idx;
696}
697
698static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
699 struct snd_soc_dapm_widget *sink)
700{
Lars-Peter Clausen66454b32015-01-15 12:52:15 +0100701 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
Bard Liao485372d2015-03-09 16:55:23 +0800702 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
Bard Liao5e8351d2014-06-30 20:31:13 +0800703
Bard Liao485372d2015-03-09 16:55:23 +0800704 if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1)
Bard Liao5e8351d2014-06-30 20:31:13 +0800705 return 1;
706 else
707 return 0;
708}
709
710static int is_using_asrc(struct snd_soc_dapm_widget *source,
711 struct snd_soc_dapm_widget *sink)
712{
Lars-Peter Clausen8eee1462015-01-15 12:52:15 +0100713 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
Bard Liao5e8351d2014-06-30 20:31:13 +0800714 unsigned int reg, shift, val;
715
716 switch (source->shift) {
717 case 0:
718 reg = RT5670_ASRC_3;
719 shift = 0;
720 break;
721 case 1:
722 reg = RT5670_ASRC_3;
723 shift = 4;
724 break;
725 case 2:
726 reg = RT5670_ASRC_5;
727 shift = 12;
728 break;
729 case 3:
730 reg = RT5670_ASRC_2;
731 shift = 0;
732 break;
733 case 8:
734 reg = RT5670_ASRC_2;
735 shift = 4;
736 break;
737 case 9:
738 reg = RT5670_ASRC_2;
739 shift = 8;
740 break;
741 case 10:
742 reg = RT5670_ASRC_2;
743 shift = 12;
744 break;
745 default:
746 return 0;
747 }
748
Lars-Peter Clausen8eee1462015-01-15 12:52:15 +0100749 val = (snd_soc_read(codec, reg) >> shift) & 0xf;
Bard Liao5e8351d2014-06-30 20:31:13 +0800750 switch (val) {
751 case 1:
752 case 2:
753 case 3:
754 case 4:
755 return 1;
756 default:
757 return 0;
758 }
759
760}
761
Bard Liaoe50334d2014-11-17 15:27:21 +0800762static int can_use_asrc(struct snd_soc_dapm_widget *source,
763 struct snd_soc_dapm_widget *sink)
764{
765 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
766 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
767
768 if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384)
769 return 1;
770
771 return 0;
772}
773
Mengdong Linea232b32015-01-07 10:19:12 +0800774
775/**
776 * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters
777 * @codec: SoC audio codec device.
778 * @filter_mask: mask of filters.
779 * @clk_src: clock source
780 *
781 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can
782 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
783 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
784 * ASRC function will track i2s clock and generate a corresponding system clock
785 * for codec. This function provides an API to select the clock source for a
786 * set of filters specified by the mask. And the codec driver will turn on ASRC
787 * for these filters if ASRC is selected as their clock source.
788 */
789int rt5670_sel_asrc_clk_src(struct snd_soc_codec *codec,
790 unsigned int filter_mask, unsigned int clk_src)
791{
792 unsigned int asrc2_mask = 0, asrc2_value = 0;
793 unsigned int asrc3_mask = 0, asrc3_value = 0;
794
795 if (clk_src > RT5670_CLK_SEL_SYS3)
796 return -EINVAL;
797
798 if (filter_mask & RT5670_DA_STEREO_FILTER) {
799 asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK;
800 asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK)
801 | (clk_src << RT5670_DA_STO_CLK_SEL_SFT);
802 }
803
804 if (filter_mask & RT5670_DA_MONO_L_FILTER) {
805 asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK;
806 asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK)
807 | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT);
808 }
809
810 if (filter_mask & RT5670_DA_MONO_R_FILTER) {
811 asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK;
812 asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK)
813 | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT);
814 }
815
816 if (filter_mask & RT5670_AD_STEREO_FILTER) {
817 asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK;
818 asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK)
819 | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT);
820 }
821
822 if (filter_mask & RT5670_AD_MONO_L_FILTER) {
823 asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK;
824 asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK)
825 | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT);
826 }
827
828 if (filter_mask & RT5670_AD_MONO_R_FILTER) {
829 asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK;
830 asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK)
831 | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT);
832 }
833
834 if (filter_mask & RT5670_UP_RATE_FILTER) {
835 asrc3_mask |= RT5670_UP_CLK_SEL_MASK;
836 asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK)
837 | (clk_src << RT5670_UP_CLK_SEL_SFT);
838 }
839
840 if (filter_mask & RT5670_DOWN_RATE_FILTER) {
841 asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK;
842 asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK)
843 | (clk_src << RT5670_DOWN_CLK_SEL_SFT);
844 }
845
846 if (asrc2_mask)
847 snd_soc_update_bits(codec, RT5670_ASRC_2,
848 asrc2_mask, asrc2_value);
849
850 if (asrc3_mask)
851 snd_soc_update_bits(codec, RT5670_ASRC_3,
852 asrc3_mask, asrc3_value);
853 return 0;
854}
855EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src);
856
Bard Liao5e8351d2014-06-30 20:31:13 +0800857/* Digital Mixer */
858static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
859 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
860 RT5670_M_ADC_L1_SFT, 1, 1),
861 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
862 RT5670_M_ADC_L2_SFT, 1, 1),
863};
864
865static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
866 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
867 RT5670_M_ADC_R1_SFT, 1, 1),
868 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
869 RT5670_M_ADC_R2_SFT, 1, 1),
870};
871
872static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
873 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
874 RT5670_M_ADC_L1_SFT, 1, 1),
875 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
876 RT5670_M_ADC_L2_SFT, 1, 1),
877};
878
879static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
880 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
881 RT5670_M_ADC_R1_SFT, 1, 1),
882 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
883 RT5670_M_ADC_R2_SFT, 1, 1),
884};
885
886static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
887 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
888 RT5670_M_MONO_ADC_L1_SFT, 1, 1),
889 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
890 RT5670_M_MONO_ADC_L2_SFT, 1, 1),
891};
892
893static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
894 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
895 RT5670_M_MONO_ADC_R1_SFT, 1, 1),
896 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
897 RT5670_M_MONO_ADC_R2_SFT, 1, 1),
898};
899
900static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
901 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
902 RT5670_M_ADCMIX_L_SFT, 1, 1),
903 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
904 RT5670_M_DAC1_L_SFT, 1, 1),
905};
906
907static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
908 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
909 RT5670_M_ADCMIX_R_SFT, 1, 1),
910 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
911 RT5670_M_DAC1_R_SFT, 1, 1),
912};
913
914static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
915 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
916 RT5670_M_DAC_L1_SFT, 1, 1),
917 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
918 RT5670_M_DAC_L2_SFT, 1, 1),
919 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
920 RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
921};
922
923static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
924 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
925 RT5670_M_DAC_R1_SFT, 1, 1),
926 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
927 RT5670_M_DAC_R2_SFT, 1, 1),
928 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
929 RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
930};
931
932static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
933 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
934 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
935 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
936 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
937 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
938 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
939};
940
941static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
942 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
943 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
944 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
945 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
946 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
947 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
948};
949
950static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
951 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
952 RT5670_M_STO_L_DAC_L_SFT, 1, 1),
953 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
954 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
955 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
956 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
957};
958
959static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
960 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
961 RT5670_M_STO_R_DAC_R_SFT, 1, 1),
962 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
963 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
964 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
965 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
966};
967
968/* Analog Input Mixer */
969static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
970 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
971 RT5670_M_IN_L_RM_L_SFT, 1, 1),
972 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
973 RT5670_M_BST2_RM_L_SFT, 1, 1),
974 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
975 RT5670_M_BST1_RM_L_SFT, 1, 1),
976};
977
978static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
979 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
980 RT5670_M_IN_R_RM_R_SFT, 1, 1),
981 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
982 RT5670_M_BST2_RM_R_SFT, 1, 1),
983 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
984 RT5670_M_BST1_RM_R_SFT, 1, 1),
985};
986
987static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
988 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
989 RT5670_M_BST1_OM_L_SFT, 1, 1),
990 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
991 RT5670_M_IN_L_OM_L_SFT, 1, 1),
992 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
993 RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
994 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
995 RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
996};
997
998static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
999 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
1000 RT5670_M_BST2_OM_R_SFT, 1, 1),
1001 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
1002 RT5670_M_IN_R_OM_R_SFT, 1, 1),
1003 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
1004 RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
1005 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
1006 RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
1007};
1008
1009static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
1010 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1011 RT5670_M_DAC1_HM_SFT, 1, 1),
1012 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
1013 RT5670_M_HPVOL_HM_SFT, 1, 1),
1014};
1015
1016static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
1017 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1018 RT5670_M_DACL1_HML_SFT, 1, 1),
1019 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
1020 RT5670_M_INL1_HML_SFT, 1, 1),
1021};
1022
1023static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
1024 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1025 RT5670_M_DACR1_HMR_SFT, 1, 1),
1026 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
1027 RT5670_M_INR1_HMR_SFT, 1, 1),
1028};
1029
1030static const struct snd_kcontrol_new rt5670_lout_mix[] = {
1031 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
1032 RT5670_M_DAC_L1_LM_SFT, 1, 1),
1033 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
1034 RT5670_M_DAC_R1_LM_SFT, 1, 1),
1035 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
1036 RT5670_M_OV_L_LM_SFT, 1, 1),
1037 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
1038 RT5670_M_OV_R_LM_SFT, 1, 1),
1039};
1040
1041static const struct snd_kcontrol_new rt5670_hpl_mix[] = {
1042 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER,
1043 RT5670_M_DACL1_HML_SFT, 1, 1),
1044 SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER,
1045 RT5670_M_INL1_HML_SFT, 1, 1),
1046};
1047
1048static const struct snd_kcontrol_new rt5670_hpr_mix[] = {
1049 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER,
1050 RT5670_M_DACR1_HMR_SFT, 1, 1),
1051 SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER,
1052 RT5670_M_INR1_HMR_SFT, 1, 1),
1053};
1054
1055static const struct snd_kcontrol_new lout_l_enable_control =
1056 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
1057 RT5670_L_MUTE_SFT, 1, 1);
1058
1059static const struct snd_kcontrol_new lout_r_enable_control =
1060 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
1061 RT5670_R_MUTE_SFT, 1, 1);
1062
1063/* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */
1064static const char * const rt5670_dac1_src[] = {
1065 "IF1 DAC", "IF2 DAC"
1066};
1067
Mark Brown01957572014-08-01 17:30:38 +01001068static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001069 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
1070
1071static const struct snd_kcontrol_new rt5670_dac1l_mux =
1072 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
1073
Mark Brown01957572014-08-01 17:30:38 +01001074static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001075 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
1076
1077static const struct snd_kcontrol_new rt5670_dac1r_mux =
1078 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
1079
1080/*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1081/* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */
1082static const char * const rt5670_dac12_src[] = {
1083 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
1084 "Bass", "VAD_ADC", "IF4 DAC"
1085};
1086
Mark Brown01957572014-08-01 17:30:38 +01001087static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +08001088 RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
1089
1090static const struct snd_kcontrol_new rt5670_dac_l2_mux =
1091 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
1092
1093static const char * const rt5670_dacr2_src[] = {
1094 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
1095};
1096
Mark Brown01957572014-08-01 17:30:38 +01001097static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +08001098 RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
1099
1100static const struct snd_kcontrol_new rt5670_dac_r2_mux =
1101 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
1102
1103/*RxDP source*/ /* MX-2D [15:13] */
1104static const char * const rt5670_rxdp_src[] = {
1105 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
1106 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
1107};
1108
Mark Brown01957572014-08-01 17:30:38 +01001109static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +08001110 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
1111
1112static const struct snd_kcontrol_new rt5670_rxdp_mux =
1113 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
1114
1115/* MX-2D [1] [0] */
1116static const char * const rt5670_dsp_bypass_src[] = {
1117 "DSP", "Bypass"
1118};
1119
Mark Brown01957572014-08-01 17:30:38 +01001120static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +08001121 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
1122
1123static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
1124 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
1125
Mark Brown01957572014-08-01 17:30:38 +01001126static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +08001127 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
1128
1129static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
1130 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
1131
1132/* Stereo2 ADC source */
1133/* MX-26 [15] */
1134static const char * const rt5670_stereo2_adc_lr_src[] = {
1135 "L", "LR"
1136};
1137
Mark Brown01957572014-08-01 17:30:38 +01001138static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001139 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
1140
1141static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
1142 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
1143
1144/* Stereo1 ADC source */
1145/* MX-27 MX-26 [12] */
1146static const char * const rt5670_stereo_adc1_src[] = {
1147 "DAC MIX", "ADC"
1148};
1149
Mark Brown01957572014-08-01 17:30:38 +01001150static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001151 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
1152
1153static const struct snd_kcontrol_new rt5670_sto_adc_l1_mux =
1154 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5670_stereo1_adc1_enum);
1155
1156static const struct snd_kcontrol_new rt5670_sto_adc_r1_mux =
1157 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5670_stereo1_adc1_enum);
1158
Mark Brown01957572014-08-01 17:30:38 +01001159static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001160 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
1161
1162static const struct snd_kcontrol_new rt5670_sto2_adc_l1_mux =
1163 SOC_DAPM_ENUM("Stereo2 ADC L1 source", rt5670_stereo2_adc1_enum);
1164
1165static const struct snd_kcontrol_new rt5670_sto2_adc_r1_mux =
1166 SOC_DAPM_ENUM("Stereo2 ADC R1 source", rt5670_stereo2_adc1_enum);
1167
1168/* MX-27 MX-26 [11] */
1169static const char * const rt5670_stereo_adc2_src[] = {
1170 "DAC MIX", "DMIC"
1171};
1172
Mark Brown01957572014-08-01 17:30:38 +01001173static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001174 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1175
1176static const struct snd_kcontrol_new rt5670_sto_adc_l2_mux =
1177 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5670_stereo1_adc2_enum);
1178
1179static const struct snd_kcontrol_new rt5670_sto_adc_r2_mux =
1180 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5670_stereo1_adc2_enum);
1181
Mark Brown01957572014-08-01 17:30:38 +01001182static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001183 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1184
1185static const struct snd_kcontrol_new rt5670_sto2_adc_l2_mux =
1186 SOC_DAPM_ENUM("Stereo2 ADC L2 source", rt5670_stereo2_adc2_enum);
1187
1188static const struct snd_kcontrol_new rt5670_sto2_adc_r2_mux =
1189 SOC_DAPM_ENUM("Stereo2 ADC R2 source", rt5670_stereo2_adc2_enum);
1190
1191/* MX-27 MX26 [10] */
1192static const char * const rt5670_stereo_adc_src[] = {
1193 "ADC1L ADC2R", "ADC3"
1194};
1195
Mark Brown01957572014-08-01 17:30:38 +01001196static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001197 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
1198
1199static const struct snd_kcontrol_new rt5670_sto_adc_mux =
1200 SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum);
1201
Mark Brown01957572014-08-01 17:30:38 +01001202static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001203 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
1204
1205static const struct snd_kcontrol_new rt5670_sto2_adc_mux =
1206 SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum);
1207
1208/* MX-27 MX-26 [9:8] */
1209static const char * const rt5670_stereo_dmic_src[] = {
1210 "DMIC1", "DMIC2", "DMIC3"
1211};
1212
Mark Brown01957572014-08-01 17:30:38 +01001213static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001214 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1215
1216static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
1217 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
1218
Mark Brown01957572014-08-01 17:30:38 +01001219static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001220 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1221
1222static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
1223 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
1224
1225/* MX-27 [0] */
1226static const char * const rt5670_stereo_dmic3_src[] = {
1227 "DMIC3", "PDM ADC"
1228};
1229
Mark Brown01957572014-08-01 17:30:38 +01001230static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001231 RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src);
1232
1233static const struct snd_kcontrol_new rt5670_sto_dmic3_mux =
1234 SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum);
1235
1236/* Mono ADC source */
1237/* MX-28 [12] */
1238static const char * const rt5670_mono_adc_l1_src[] = {
1239 "Mono DAC MIXL", "ADC1"
1240};
1241
Mark Brown01957572014-08-01 17:30:38 +01001242static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001243 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
1244
1245static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
1246 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
1247/* MX-28 [11] */
1248static const char * const rt5670_mono_adc_l2_src[] = {
1249 "Mono DAC MIXL", "DMIC"
1250};
1251
Mark Brown01957572014-08-01 17:30:38 +01001252static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001253 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
1254
1255static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
1256 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
1257
1258/* MX-28 [9:8] */
1259static const char * const rt5670_mono_dmic_src[] = {
1260 "DMIC1", "DMIC2", "DMIC3"
1261};
1262
Mark Brown01957572014-08-01 17:30:38 +01001263static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001264 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
1265
1266static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
1267 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
1268/* MX-28 [1:0] */
Mark Brown01957572014-08-01 17:30:38 +01001269static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001270 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
1271
1272static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
1273 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
1274/* MX-28 [4] */
1275static const char * const rt5670_mono_adc_r1_src[] = {
1276 "Mono DAC MIXR", "ADC2"
1277};
1278
Mark Brown01957572014-08-01 17:30:38 +01001279static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001280 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
1281
1282static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
1283 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
1284/* MX-28 [3] */
1285static const char * const rt5670_mono_adc_r2_src[] = {
1286 "Mono DAC MIXR", "DMIC"
1287};
1288
Mark Brown01957572014-08-01 17:30:38 +01001289static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +08001290 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
1291
1292static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
1293 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
1294
1295/* MX-2D [3:2] */
1296static const char * const rt5670_txdp_slot_src[] = {
1297 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
1298};
1299
Mark Brown01957572014-08-01 17:30:38 +01001300static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +08001301 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
1302
1303static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
1304 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
1305
1306/* MX-2F [15] */
1307static const char * const rt5670_if1_adc2_in_src[] = {
1308 "IF_ADC2", "VAD_ADC"
1309};
1310
Mark Brown01957572014-08-01 17:30:38 +01001311static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +08001312 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
1313
1314static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
1315 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
1316
1317/* MX-2F [14:12] */
1318static const char * const rt5670_if2_adc_in_src[] = {
1319 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
1320};
1321
Mark Brown01957572014-08-01 17:30:38 +01001322static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +08001323 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
1324
1325static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
1326 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
1327
1328/* MX-30 [5:4] */
1329static const char * const rt5670_if4_adc_in_src[] = {
1330 "IF_ADC1", "IF_ADC2", "IF_ADC3"
1331};
1332
Mark Brown01957572014-08-01 17:30:38 +01001333static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +08001334 RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src);
1335
1336static const struct snd_kcontrol_new rt5670_if4_adc_in_mux =
1337 SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum);
1338
1339/* MX-31 [15] [13] [11] [9] */
1340static const char * const rt5670_pdm_src[] = {
1341 "Mono DAC", "Stereo DAC"
1342};
1343
Mark Brown01957572014-08-01 17:30:38 +01001344static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +08001345 RT5670_PDM1_L_SFT, rt5670_pdm_src);
1346
1347static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
1348 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
1349
Mark Brown01957572014-08-01 17:30:38 +01001350static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +08001351 RT5670_PDM1_R_SFT, rt5670_pdm_src);
1352
1353static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
1354 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
1355
Mark Brown01957572014-08-01 17:30:38 +01001356static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +08001357 RT5670_PDM2_L_SFT, rt5670_pdm_src);
1358
1359static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
1360 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
1361
Mark Brown01957572014-08-01 17:30:38 +01001362static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +08001363 RT5670_PDM2_R_SFT, rt5670_pdm_src);
1364
1365static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
1366 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
1367
1368/* MX-FA [12] */
1369static const char * const rt5670_if1_adc1_in1_src[] = {
1370 "IF_ADC1", "IF1_ADC3"
1371};
1372
Mark Brown01957572014-08-01 17:30:38 +01001373static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +08001374 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
1375
1376static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
1377 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
1378
1379/* MX-FA [11] */
1380static const char * const rt5670_if1_adc1_in2_src[] = {
1381 "IF1_ADC1_IN1", "IF1_ADC4"
1382};
1383
Mark Brown01957572014-08-01 17:30:38 +01001384static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +08001385 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
1386
1387static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
1388 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
1389
1390/* MX-FA [10] */
1391static const char * const rt5670_if1_adc2_in1_src[] = {
1392 "IF1_ADC2_IN", "IF1_ADC4"
1393};
1394
Mark Brown01957572014-08-01 17:30:38 +01001395static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +08001396 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
1397
1398static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
1399 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
1400
1401/* MX-9D [9:8] */
1402static const char * const rt5670_vad_adc_src[] = {
1403 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
1404};
1405
Mark Brown01957572014-08-01 17:30:38 +01001406static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
Bard Liao5e8351d2014-06-30 20:31:13 +08001407 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
1408
1409static const struct snd_kcontrol_new rt5670_vad_adc_mux =
1410 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
1411
1412static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
1413 struct snd_kcontrol *kcontrol, int event)
1414{
Lars-Peter Clausen8eee1462015-01-15 12:52:15 +01001415 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Bard Liao5e8351d2014-06-30 20:31:13 +08001416 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1417
1418 switch (event) {
1419 case SND_SOC_DAPM_POST_PMU:
1420 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
1421 RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
1422 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1423 0x0400, 0x0400);
1424 /* headphone amp power on */
1425 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
1426 RT5670_PWR_HA | RT5670_PWR_FV1 |
1427 RT5670_PWR_FV2, RT5670_PWR_HA |
1428 RT5670_PWR_FV1 | RT5670_PWR_FV2);
1429 /* depop parameters */
1430 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
1431 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
1432 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1433 RT5670_HP_DCC_INT1, 0x9f00);
1434 mdelay(20);
1435 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1436 break;
1437 case SND_SOC_DAPM_PRE_PMD:
1438 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
1439 msleep(30);
1440 break;
1441 default:
1442 return 0;
1443 }
1444
1445 return 0;
1446}
1447
1448static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
1449 struct snd_kcontrol *kcontrol, int event)
1450{
Lars-Peter Clausen8eee1462015-01-15 12:52:15 +01001451 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Bard Liao5e8351d2014-06-30 20:31:13 +08001452 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1453
1454 switch (event) {
1455 case SND_SOC_DAPM_POST_PMU:
1456 /* headphone unmute sequence */
1457 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1458 RT5670_MAMP_INT_REG2, 0xb400);
1459 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1460 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
1461 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1462 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1463 0x0300, 0x0300);
1464 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1465 RT5670_L_MUTE | RT5670_R_MUTE, 0);
1466 msleep(80);
1467 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1468 break;
1469
1470 case SND_SOC_DAPM_PRE_PMD:
1471 /* headphone mute sequence */
1472 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1473 RT5670_MAMP_INT_REG2, 0xb400);
1474 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1475 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
1476 mdelay(10);
1477 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1478 mdelay(10);
1479 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1480 RT5670_L_MUTE | RT5670_R_MUTE,
1481 RT5670_L_MUTE | RT5670_R_MUTE);
1482 msleep(20);
1483 regmap_update_bits(rt5670->regmap,
1484 RT5670_GEN_CTRL2, 0x0300, 0x0);
1485 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1486 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
1487 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1488 RT5670_MAMP_INT_REG2, 0xfc00);
1489 break;
1490
1491 default:
1492 return 0;
1493 }
1494
1495 return 0;
1496}
1497
1498static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
1499 struct snd_kcontrol *kcontrol, int event)
1500{
Lars-Peter Clausen8eee1462015-01-15 12:52:15 +01001501 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Bard Liao5e8351d2014-06-30 20:31:13 +08001502
1503 switch (event) {
1504 case SND_SOC_DAPM_POST_PMU:
1505 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1506 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
1507 break;
1508
1509 case SND_SOC_DAPM_PRE_PMD:
1510 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1511 RT5670_PWR_BST1_P, 0);
1512 break;
1513
1514 default:
1515 return 0;
1516 }
1517
1518 return 0;
1519}
1520
1521static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
1522 struct snd_kcontrol *kcontrol, int event)
1523{
Lars-Peter Clausen8eee1462015-01-15 12:52:15 +01001524 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Bard Liao5e8351d2014-06-30 20:31:13 +08001525
1526 switch (event) {
1527 case SND_SOC_DAPM_POST_PMU:
1528 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1529 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
1530 break;
1531
1532 case SND_SOC_DAPM_PRE_PMD:
1533 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1534 RT5670_PWR_BST2_P, 0);
1535 break;
1536
1537 default:
1538 return 0;
1539 }
1540
1541 return 0;
1542}
1543
1544static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
1545 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
1546 RT5670_PWR_PLL_BIT, 0, NULL, 0),
1547 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
1548 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
1549 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
1550 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
1551
1552 /* ASRC */
1553 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
1554 11, 0, NULL, 0),
1555 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
1556 12, 0, NULL, 0),
1557 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
1558 10, 0, NULL, 0),
1559 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
1560 9, 0, NULL, 0),
1561 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
1562 8, 0, NULL, 0),
Bard Liaoff4541c2014-11-17 15:27:22 +08001563 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1,
1564 7, 0, NULL, 0),
1565 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1,
1566 6, 0, NULL, 0),
1567 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1,
1568 5, 0, NULL, 0),
1569 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1,
1570 4, 0, NULL, 0),
Bard Liao5e8351d2014-06-30 20:31:13 +08001571 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
1572 3, 0, NULL, 0),
1573 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
1574 2, 0, NULL, 0),
1575 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
1576 1, 0, NULL, 0),
1577 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
1578 0, 0, NULL, 0),
1579
1580 /* Input Side */
1581 /* micbias */
1582 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
1583 RT5670_PWR_MB1_BIT, 0, NULL, 0),
1584
1585 /* Input Lines */
1586 SND_SOC_DAPM_INPUT("DMIC L1"),
1587 SND_SOC_DAPM_INPUT("DMIC R1"),
1588 SND_SOC_DAPM_INPUT("DMIC L2"),
1589 SND_SOC_DAPM_INPUT("DMIC R2"),
1590 SND_SOC_DAPM_INPUT("DMIC L3"),
1591 SND_SOC_DAPM_INPUT("DMIC R3"),
1592
1593 SND_SOC_DAPM_INPUT("IN1P"),
1594 SND_SOC_DAPM_INPUT("IN1N"),
1595 SND_SOC_DAPM_INPUT("IN2P"),
1596 SND_SOC_DAPM_INPUT("IN2N"),
1597
1598 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1599 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1600 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1601
1602 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1603 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1604 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
1605 RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
1606 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
1607 RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
1608 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
1609 RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
1610 /* Boost */
1611 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
1612 0, NULL, 0, rt5670_bst1_event,
1613 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1614 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
1615 0, NULL, 0, rt5670_bst2_event,
1616 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1617 /* Input Volume */
1618 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
1619 RT5670_PWR_IN_L_BIT, 0, NULL, 0),
1620 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
1621 RT5670_PWR_IN_R_BIT, 0, NULL, 0),
1622
1623 /* REC Mixer */
1624 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
1625 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
1626 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
1627 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
1628 /* ADCs */
1629 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
1630 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
1631
1632 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
1633
1634 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
1635 RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
1636 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
1637 RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
1638 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
1639 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
1640 /* ADC Mux */
1641 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1642 &rt5670_sto1_dmic_mux),
1643 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1644 &rt5670_sto_adc_l2_mux),
1645 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1646 &rt5670_sto_adc_r2_mux),
1647 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1648 &rt5670_sto_adc_l1_mux),
1649 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1650 &rt5670_sto_adc_r1_mux),
1651 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
1652 &rt5670_sto2_dmic_mux),
1653 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1654 &rt5670_sto2_adc_l2_mux),
1655 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1656 &rt5670_sto2_adc_r2_mux),
1657 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1658 &rt5670_sto2_adc_l1_mux),
1659 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1660 &rt5670_sto2_adc_r1_mux),
1661 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
1662 &rt5670_sto2_adc_lr_mux),
1663 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1664 &rt5670_mono_dmic_l_mux),
1665 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1666 &rt5670_mono_dmic_r_mux),
1667 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1668 &rt5670_mono_adc_l2_mux),
1669 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1670 &rt5670_mono_adc_l1_mux),
1671 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1672 &rt5670_mono_adc_r1_mux),
1673 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1674 &rt5670_mono_adc_r2_mux),
1675 /* ADC Mixer */
1676 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
1677 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
1678 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
1679 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
1680 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL,
1681 RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix,
1682 ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
1683 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL,
1684 RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix,
1685 ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
1686 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1687 rt5670_sto2_adc_l_mix,
1688 ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
1689 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1690 rt5670_sto2_adc_r_mix,
1691 ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
1692 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
1693 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1694 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
1695 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
1696 ARRAY_SIZE(rt5670_mono_adc_l_mix)),
1697 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
1698 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1699 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
1700 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
1701 ARRAY_SIZE(rt5670_mono_adc_r_mix)),
1702
1703 /* ADC PGA */
1704 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1705 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1706 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1707 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1708 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1709 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1710 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1711 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1712 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1713 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1714 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1715 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1716 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1717 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1718 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1719 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1720
1721 /* DSP */
1722 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1723 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
1724 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
1725 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1726
1727 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
1728 &rt5670_txdp_slot_mux),
1729
1730 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
1731 &rt5670_dsp_ul_mux),
1732 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
1733 &rt5670_dsp_dl_mux),
1734
1735 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
1736 &rt5670_rxdp_mux),
1737
1738 /* IF2 Mux */
1739 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
1740 &rt5670_if2_adc_in_mux),
1741
1742 /* Digital Interface */
1743 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
1744 RT5670_PWR_I2S1_BIT, 0, NULL, 0),
1745 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1746 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1747 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1748 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1749 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1750 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1751 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1752 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1753 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1754 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
1755 RT5670_PWR_I2S2_BIT, 0, NULL, 0),
1756 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1757 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1758 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1759 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1760 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1761 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1762
1763 /* Digital Interface Select */
1764 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
1765 &rt5670_if1_adc1_in1_mux),
1766 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
1767 &rt5670_if1_adc1_in2_mux),
1768 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
1769 &rt5670_if1_adc2_in_mux),
1770 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
1771 &rt5670_if1_adc2_in1_mux),
1772 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
1773 &rt5670_vad_adc_mux),
1774
1775 /* Audio Interface */
1776 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1777 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1778 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1779 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
1780 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
1781
1782 /* Audio DSP */
1783 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1784
1785 /* Output Side */
1786 /* DAC mixer before sound effect */
1787 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1788 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
1789 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1790 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
1791 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1792
1793 /* DAC2 channel Mux */
1794 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1795 &rt5670_dac_l2_mux),
1796 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1797 &rt5670_dac_r2_mux),
1798 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
1799 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
1800 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
1801 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
1802
1803 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
1804 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
1805
1806 /* DAC Mixer */
1807 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
1808 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
1809 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
1810 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1811 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
1812 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1813 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1814 rt5670_sto_dac_l_mix,
1815 ARRAY_SIZE(rt5670_sto_dac_l_mix)),
1816 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1817 rt5670_sto_dac_r_mix,
1818 ARRAY_SIZE(rt5670_sto_dac_r_mix)),
1819 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1820 rt5670_mono_dac_l_mix,
1821 ARRAY_SIZE(rt5670_mono_dac_l_mix)),
1822 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1823 rt5670_mono_dac_r_mix,
1824 ARRAY_SIZE(rt5670_mono_dac_r_mix)),
1825 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1826 rt5670_dig_l_mix,
1827 ARRAY_SIZE(rt5670_dig_l_mix)),
1828 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1829 rt5670_dig_r_mix,
1830 ARRAY_SIZE(rt5670_dig_r_mix)),
1831
1832 /* DACs */
1833 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
1834 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
1835 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
1836 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
1837 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1838 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1839 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
1840 RT5670_PWR_DAC_L2_BIT, 0),
1841
1842 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
1843 RT5670_PWR_DAC_R2_BIT, 0),
1844 /* OUT Mixer */
1845
1846 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
1847 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
1848 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
1849 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
1850 /* Ouput Volume */
1851 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
1852 RT5670_PWR_HV_L_BIT, 0,
1853 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
1854 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
1855 RT5670_PWR_HV_R_BIT, 0,
1856 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
1857 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1858 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1859 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1860
1861 /* HPO/LOUT/Mono Mixer */
1862 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
1863 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
1864 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
1865 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
1866 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
1867 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
1868 SND_SOC_DAPM_PRE_PMD),
1869 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
1870 RT5670_PWR_HP_L_BIT, 0, NULL, 0),
1871 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
1872 RT5670_PWR_HP_R_BIT, 0, NULL, 0),
1873 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1874 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
1875 SND_SOC_DAPM_POST_PMU),
1876 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1877 &lout_l_enable_control),
1878 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1879 &lout_r_enable_control),
1880 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1881
1882 /* PDM */
1883 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
1884 RT5670_PWR_PDM1_BIT, 0, NULL, 0),
Bard Liao5e8351d2014-06-30 20:31:13 +08001885
1886 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
1887 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
1888 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
1889 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
Bard Liao5e8351d2014-06-30 20:31:13 +08001890
1891 /* Output Lines */
1892 SND_SOC_DAPM_OUTPUT("HPOL"),
1893 SND_SOC_DAPM_OUTPUT("HPOR"),
1894 SND_SOC_DAPM_OUTPUT("LOUTL"),
1895 SND_SOC_DAPM_OUTPUT("LOUTR"),
Bard Liao0cf18632014-11-11 17:59:50 +08001896};
1897
1898static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
1899 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
1900 RT5670_PWR_PDM2_BIT, 0, NULL, 0),
1901 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
1902 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
1903 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
1904 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
Bard Liao5e8351d2014-06-30 20:31:13 +08001905 SND_SOC_DAPM_OUTPUT("PDM1L"),
1906 SND_SOC_DAPM_OUTPUT("PDM1R"),
1907 SND_SOC_DAPM_OUTPUT("PDM2L"),
1908 SND_SOC_DAPM_OUTPUT("PDM2R"),
1909};
1910
Bard Liao0cf18632014-11-11 17:59:50 +08001911static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
1912 SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1913 SND_SOC_DAPM_OUTPUT("SPOLP"),
1914 SND_SOC_DAPM_OUTPUT("SPOLN"),
1915 SND_SOC_DAPM_OUTPUT("SPORP"),
1916 SND_SOC_DAPM_OUTPUT("SPORN"),
1917};
1918
Bard Liao5e8351d2014-06-30 20:31:13 +08001919static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
1920 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1921 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
1922 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1923 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1924 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1925 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1926 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
Bard Liaoff4541c2014-11-17 15:27:22 +08001927 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc },
1928 { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc },
1929 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc },
1930 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc },
Bard Liao5e8351d2014-06-30 20:31:13 +08001931
Bard Liaoe50334d2014-11-17 15:27:21 +08001932 { "I2S1", NULL, "I2S1 ASRC", can_use_asrc},
1933 { "I2S2", NULL, "I2S2 ASRC", can_use_asrc},
Bard Liao5e8351d2014-06-30 20:31:13 +08001934
1935 { "DMIC1", NULL, "DMIC L1" },
1936 { "DMIC1", NULL, "DMIC R1" },
1937 { "DMIC2", NULL, "DMIC L2" },
1938 { "DMIC2", NULL, "DMIC R2" },
1939 { "DMIC3", NULL, "DMIC L3" },
1940 { "DMIC3", NULL, "DMIC R3" },
1941
1942 { "BST1", NULL, "IN1P" },
1943 { "BST1", NULL, "IN1N" },
1944 { "BST1", NULL, "Mic Det Power" },
1945 { "BST2", NULL, "IN2P" },
1946 { "BST2", NULL, "IN2N" },
1947
1948 { "INL VOL", NULL, "IN2P" },
1949 { "INR VOL", NULL, "IN2N" },
1950
1951 { "RECMIXL", "INL Switch", "INL VOL" },
1952 { "RECMIXL", "BST2 Switch", "BST2" },
1953 { "RECMIXL", "BST1 Switch", "BST1" },
1954
1955 { "RECMIXR", "INR Switch", "INR VOL" },
1956 { "RECMIXR", "BST2 Switch", "BST2" },
1957 { "RECMIXR", "BST1 Switch", "BST1" },
1958
1959 { "ADC 1", NULL, "RECMIXL" },
1960 { "ADC 1", NULL, "ADC 1 power" },
1961 { "ADC 1", NULL, "ADC clock" },
1962 { "ADC 2", NULL, "RECMIXR" },
1963 { "ADC 2", NULL, "ADC 2 power" },
1964 { "ADC 2", NULL, "ADC clock" },
1965
1966 { "DMIC L1", NULL, "DMIC CLK" },
1967 { "DMIC L1", NULL, "DMIC1 Power" },
1968 { "DMIC R1", NULL, "DMIC CLK" },
1969 { "DMIC R1", NULL, "DMIC1 Power" },
1970 { "DMIC L2", NULL, "DMIC CLK" },
1971 { "DMIC L2", NULL, "DMIC2 Power" },
1972 { "DMIC R2", NULL, "DMIC CLK" },
1973 { "DMIC R2", NULL, "DMIC2 Power" },
1974 { "DMIC L3", NULL, "DMIC CLK" },
1975 { "DMIC L3", NULL, "DMIC3 Power" },
1976 { "DMIC R3", NULL, "DMIC CLK" },
1977 { "DMIC R3", NULL, "DMIC3 Power" },
1978
1979 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1980 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1981 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
1982
1983 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
1984 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
1985 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
1986
1987 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1988 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1989 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
1990
1991 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1992 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1993 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
1994
1995 { "ADC 1_2", NULL, "ADC 1" },
1996 { "ADC 1_2", NULL, "ADC 2" },
1997
1998 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1999 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2000 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
2001 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2002
2003 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
2004 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2005 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2006 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2007
2008 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2009 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2010 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2011 { "Mono ADC L1 Mux", "ADC1", "ADC 1" },
2012
2013 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2014 { "Mono ADC R1 Mux", "ADC2", "ADC 2" },
2015 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2016 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2017
2018 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2019 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2020 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2021 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2022
2023 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2024 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
2025 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2026
2027 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2028 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
2029 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2030
2031 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2032 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2033 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
2034 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2035
2036 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2037 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2038 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
2039 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2040
2041 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
2042 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2043 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
2044 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2045
2046 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
2047 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2048 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
2049 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2050
2051 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
2052 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
2053 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
2054 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
2055
2056 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
2057 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
2058
2059 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
2060 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
2061
2062 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
2063 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
2064 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2065
2066 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
2067 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
2068 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2069
2070 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2071 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2072 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2073 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
2074
2075 { "VAD_ADC", NULL, "VAD ADC Mux" },
2076
2077 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2078 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2079 { "IF_ADC2", NULL, "Mono ADC MIXL" },
2080 { "IF_ADC2", NULL, "Mono ADC MIXR" },
2081 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
2082 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
2083
2084 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
2085 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
2086
2087 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
2088 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "IF1_ADC4" },
2089
2090 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
2091 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
2092
2093 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
2094 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "IF1_ADC4" },
2095
2096 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
2097 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
2098
2099 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
2100 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
2101 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
2102 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
2103 { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
2104 { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
2105
2106 { "RxDP Mux", "IF2 DAC", "IF2 DAC" },
2107 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
2108 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
2109 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
2110 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
2111 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
2112 { "RxDP Mux", "DAC1", "DAC MIX" },
2113
2114 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
2115 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
2116 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
2117 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
2118
2119 { "DSP UL Mux", "Bypass", "TDM Data Mux" },
2120 { "DSP UL Mux", NULL, "I2S DSP" },
2121 { "DSP DL Mux", "Bypass", "RxDP Mux" },
2122 { "DSP DL Mux", NULL, "I2S DSP" },
2123
2124 { "TxDP_ADC_L", NULL, "DSP UL Mux" },
2125 { "TxDP_ADC_R", NULL, "DSP UL Mux" },
2126 { "TxDC_DAC", NULL, "DSP DL Mux" },
2127
2128 { "TxDP_ADC", NULL, "TxDP_ADC_L" },
2129 { "TxDP_ADC", NULL, "TxDP_ADC_R" },
2130
2131 { "IF1 ADC", NULL, "I2S1" },
2132 { "IF1 ADC", NULL, "IF1_ADC1" },
2133 { "IF1 ADC", NULL, "IF1_ADC2" },
2134 { "IF1 ADC", NULL, "IF_ADC3" },
2135 { "IF1 ADC", NULL, "TxDP_ADC" },
2136
2137 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2138 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2139 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
2140 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
2141 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
2142 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2143
2144 { "IF2 ADC L", NULL, "IF2 ADC Mux" },
2145 { "IF2 ADC R", NULL, "IF2 ADC Mux" },
2146
2147 { "IF2 ADC", NULL, "I2S2" },
2148 { "IF2 ADC", NULL, "IF2 ADC L" },
2149 { "IF2 ADC", NULL, "IF2 ADC R" },
2150
2151 { "AIF1TX", NULL, "IF1 ADC" },
2152 { "AIF2TX", NULL, "IF2 ADC" },
2153
2154 { "IF1 DAC1", NULL, "AIF1RX" },
2155 { "IF1 DAC2", NULL, "AIF1RX" },
2156 { "IF2 DAC", NULL, "AIF2RX" },
2157
2158 { "IF1 DAC1", NULL, "I2S1" },
2159 { "IF1 DAC2", NULL, "I2S1" },
2160 { "IF2 DAC", NULL, "I2S2" },
2161
2162 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
2163 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
2164 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
2165 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
2166 { "IF2 DAC L", NULL, "IF2 DAC" },
2167 { "IF2 DAC R", NULL, "IF2 DAC" },
2168
2169 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
2170 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2171
2172 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
2173 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2174
2175 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2176 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2177 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
2178 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2179 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2180 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
2181
Bard Liao96927ac2014-11-06 12:23:54 +08002182 { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2183 { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2184 { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2185
Bard Liao5e8351d2014-06-30 20:31:13 +08002186 { "DAC MIX", NULL, "DAC1 MIXL" },
2187 { "DAC MIX", NULL, "DAC1 MIXR" },
2188
2189 { "Audio DSP", NULL, "DAC1 MIXL" },
2190 { "Audio DSP", NULL, "DAC1 MIXR" },
2191
2192 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
2193 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2194 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
2195 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2196 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2197 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
2198
2199 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
2200 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2201 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
2202 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
2203 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2204 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
2205
2206 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2207 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2208 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2209 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
2210 { "Stereo DAC MIXL", NULL, "DAC L1 Power" },
2211 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2212 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2213 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2214 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
2215 { "Stereo DAC MIXR", NULL, "DAC R1 Power" },
2216
2217 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2218 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2219 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2220 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
2221 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2222 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2223 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2224 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
2225
2226 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2227 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2228 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2229 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2230 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2231 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2232
2233 { "DAC L1", NULL, "DAC L1 Power" },
2234 { "DAC L1", NULL, "Stereo DAC MIXL" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002235 { "DAC R1", NULL, "DAC R1 Power" },
2236 { "DAC R1", NULL, "Stereo DAC MIXR" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002237 { "DAC L2", NULL, "Mono DAC MIXL" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002238 { "DAC R2", NULL, "Mono DAC MIXR" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002239
2240 { "OUT MIXL", "BST1 Switch", "BST1" },
2241 { "OUT MIXL", "INL Switch", "INL VOL" },
2242 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2243 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2244
2245 { "OUT MIXR", "BST2 Switch", "BST2" },
2246 { "OUT MIXR", "INR Switch", "INR VOL" },
2247 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2248 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2249
2250 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2251 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2252 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2253 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2254
2255 { "DAC 2", NULL, "DAC L2" },
2256 { "DAC 2", NULL, "DAC R2" },
2257 { "DAC 1", NULL, "DAC L1" },
2258 { "DAC 1", NULL, "DAC R1" },
2259 { "HPOVOL", NULL, "HPOVOL MIXL" },
2260 { "HPOVOL", NULL, "HPOVOL MIXR" },
2261 { "HPO MIX", "DAC1 Switch", "DAC 1" },
2262 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2263
2264 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2265 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2266 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2267 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2268
2269 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2270 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2271 { "PDM1 L Mux", NULL, "PDM1 Power" },
2272 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2273 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2274 { "PDM1 R Mux", NULL, "PDM1 Power" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002275
2276 { "HP Amp", NULL, "HPO MIX" },
2277 { "HP Amp", NULL, "Mic Det Power" },
2278 { "HPOL", NULL, "HP Amp" },
2279 { "HPOL", NULL, "HP L Amp" },
2280 { "HPOL", NULL, "Improve HP Amp Drv" },
2281 { "HPOR", NULL, "HP Amp" },
2282 { "HPOR", NULL, "HP R Amp" },
2283 { "HPOR", NULL, "Improve HP Amp Drv" },
2284
2285 { "LOUT Amp", NULL, "LOUT MIX" },
2286 { "LOUT L Playback", "Switch", "LOUT Amp" },
2287 { "LOUT R Playback", "Switch", "LOUT Amp" },
2288 { "LOUTL", NULL, "LOUT L Playback" },
2289 { "LOUTR", NULL, "LOUT R Playback" },
2290 { "LOUTL", NULL, "Improve HP Amp Drv" },
2291 { "LOUTR", NULL, "Improve HP Amp Drv" },
Bard Liao0cf18632014-11-11 17:59:50 +08002292};
Bard Liao5e8351d2014-06-30 20:31:13 +08002293
Bard Liao0cf18632014-11-11 17:59:50 +08002294static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
2295 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2296 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
2297 { "PDM2 L Mux", NULL, "PDM2 Power" },
2298 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2299 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
2300 { "PDM2 R Mux", NULL, "PDM2 Power" },
Bard Liao5e8351d2014-06-30 20:31:13 +08002301 { "PDM1L", NULL, "PDM1 L Mux" },
2302 { "PDM1R", NULL, "PDM1 R Mux" },
2303 { "PDM2L", NULL, "PDM2 L Mux" },
2304 { "PDM2R", NULL, "PDM2 R Mux" },
2305};
2306
Bard Liao0cf18632014-11-11 17:59:50 +08002307static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
2308 { "SPO Amp", NULL, "PDM1 L Mux" },
2309 { "SPO Amp", NULL, "PDM1 R Mux" },
2310 { "SPOLP", NULL, "SPO Amp" },
2311 { "SPOLN", NULL, "SPO Amp" },
2312 { "SPORP", NULL, "SPO Amp" },
2313 { "SPORN", NULL, "SPO Amp" },
2314};
2315
Bard Liao5e8351d2014-06-30 20:31:13 +08002316static int rt5670_hw_params(struct snd_pcm_substream *substream,
2317 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2318{
2319 struct snd_soc_codec *codec = dai->codec;
2320 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2321 unsigned int val_len = 0, val_clk, mask_clk;
2322 int pre_div, bclk_ms, frame_size;
2323
2324 rt5670->lrck[dai->id] = params_rate(params);
2325 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
2326 if (pre_div < 0) {
2327 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
2328 rt5670->lrck[dai->id], dai->id);
2329 return -EINVAL;
2330 }
2331 frame_size = snd_soc_params_to_frame_size(params);
2332 if (frame_size < 0) {
2333 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2334 return -EINVAL;
2335 }
2336 bclk_ms = frame_size > 32;
2337 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
2338
2339 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2340 rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
2341 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2342 bclk_ms, pre_div, dai->id);
2343
2344 switch (params_width(params)) {
2345 case 16:
2346 break;
2347 case 20:
2348 val_len |= RT5670_I2S_DL_20;
2349 break;
2350 case 24:
2351 val_len |= RT5670_I2S_DL_24;
2352 break;
2353 case 8:
2354 val_len |= RT5670_I2S_DL_8;
2355 break;
2356 default:
2357 return -EINVAL;
2358 }
2359
2360 switch (dai->id) {
2361 case RT5670_AIF1:
2362 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
2363 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
2364 pre_div << RT5670_I2S_PD1_SFT;
2365 snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2366 RT5670_I2S_DL_MASK, val_len);
2367 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2368 break;
2369 case RT5670_AIF2:
2370 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
2371 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
2372 pre_div << RT5670_I2S_PD2_SFT;
2373 snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2374 RT5670_I2S_DL_MASK, val_len);
2375 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2376 break;
2377 default:
2378 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2379 return -EINVAL;
2380 }
2381
2382 return 0;
2383}
2384
2385static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2386{
2387 struct snd_soc_codec *codec = dai->codec;
2388 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2389 unsigned int reg_val = 0;
2390
2391 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2392 case SND_SOC_DAIFMT_CBM_CFM:
2393 rt5670->master[dai->id] = 1;
2394 break;
2395 case SND_SOC_DAIFMT_CBS_CFS:
2396 reg_val |= RT5670_I2S_MS_S;
2397 rt5670->master[dai->id] = 0;
2398 break;
2399 default:
2400 return -EINVAL;
2401 }
2402
2403 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2404 case SND_SOC_DAIFMT_NB_NF:
2405 break;
2406 case SND_SOC_DAIFMT_IB_NF:
2407 reg_val |= RT5670_I2S_BP_INV;
2408 break;
2409 default:
2410 return -EINVAL;
2411 }
2412
2413 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2414 case SND_SOC_DAIFMT_I2S:
2415 break;
2416 case SND_SOC_DAIFMT_LEFT_J:
2417 reg_val |= RT5670_I2S_DF_LEFT;
2418 break;
2419 case SND_SOC_DAIFMT_DSP_A:
2420 reg_val |= RT5670_I2S_DF_PCM_A;
2421 break;
2422 case SND_SOC_DAIFMT_DSP_B:
2423 reg_val |= RT5670_I2S_DF_PCM_B;
2424 break;
2425 default:
2426 return -EINVAL;
2427 }
2428
2429 switch (dai->id) {
2430 case RT5670_AIF1:
2431 snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2432 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2433 RT5670_I2S_DF_MASK, reg_val);
2434 break;
2435 case RT5670_AIF2:
2436 snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2437 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2438 RT5670_I2S_DF_MASK, reg_val);
2439 break;
2440 default:
2441 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2442 return -EINVAL;
2443 }
2444 return 0;
2445}
2446
2447static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai,
2448 int clk_id, unsigned int freq, int dir)
2449{
2450 struct snd_soc_codec *codec = dai->codec;
2451 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2452 unsigned int reg_val = 0;
2453
Bard Liao5e8351d2014-06-30 20:31:13 +08002454 switch (clk_id) {
2455 case RT5670_SCLK_S_MCLK:
2456 reg_val |= RT5670_SCLK_SRC_MCLK;
2457 break;
2458 case RT5670_SCLK_S_PLL1:
2459 reg_val |= RT5670_SCLK_SRC_PLL1;
2460 break;
2461 case RT5670_SCLK_S_RCCLK:
2462 reg_val |= RT5670_SCLK_SRC_RCCLK;
2463 break;
2464 default:
2465 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2466 return -EINVAL;
2467 }
2468 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2469 RT5670_SCLK_SRC_MASK, reg_val);
2470 rt5670->sysclk = freq;
Bard Liao485372d2015-03-09 16:55:23 +08002471 if (clk_id != RT5670_SCLK_S_RCCLK)
2472 rt5670->sysclk_src = clk_id;
Bard Liao5e8351d2014-06-30 20:31:13 +08002473
2474 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2475
2476 return 0;
2477}
2478
2479static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2480 unsigned int freq_in, unsigned int freq_out)
2481{
2482 struct snd_soc_codec *codec = dai->codec;
2483 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2484 struct rl6231_pll_code pll_code;
2485 int ret;
2486
2487 if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
2488 freq_out == rt5670->pll_out)
2489 return 0;
2490
2491 if (!freq_in || !freq_out) {
2492 dev_dbg(codec->dev, "PLL disabled\n");
2493
2494 rt5670->pll_in = 0;
2495 rt5670->pll_out = 0;
2496 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2497 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
2498 return 0;
2499 }
2500
2501 switch (source) {
2502 case RT5670_PLL1_S_MCLK:
2503 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2504 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
2505 break;
2506 case RT5670_PLL1_S_BCLK1:
2507 case RT5670_PLL1_S_BCLK2:
2508 case RT5670_PLL1_S_BCLK3:
2509 case RT5670_PLL1_S_BCLK4:
2510 switch (dai->id) {
2511 case RT5670_AIF1:
2512 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2513 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
2514 break;
2515 case RT5670_AIF2:
2516 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2517 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
2518 break;
2519 default:
2520 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2521 return -EINVAL;
2522 }
2523 break;
2524 default:
2525 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2526 return -EINVAL;
2527 }
2528
2529 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2530 if (ret < 0) {
2531 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2532 return ret;
2533 }
2534
2535 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2536 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2537 pll_code.n_code, pll_code.k_code);
2538
2539 snd_soc_write(codec, RT5670_PLL_CTRL1,
2540 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
2541 snd_soc_write(codec, RT5670_PLL_CTRL2,
2542 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT |
2543 pll_code.m_bp << RT5670_PLL_M_BP_SFT);
2544
2545 rt5670->pll_in = freq_in;
2546 rt5670->pll_out = freq_out;
2547 rt5670->pll_src = source;
2548
2549 return 0;
2550}
2551
2552static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2553 unsigned int rx_mask, int slots, int slot_width)
2554{
2555 struct snd_soc_codec *codec = dai->codec;
2556 unsigned int val = 0;
2557
2558 if (rx_mask || tx_mask)
2559 val |= (1 << 14);
2560
2561 switch (slots) {
2562 case 4:
2563 val |= (1 << 12);
2564 break;
2565 case 6:
2566 val |= (2 << 12);
2567 break;
2568 case 8:
2569 val |= (3 << 12);
2570 break;
2571 case 2:
2572 break;
2573 default:
2574 return -EINVAL;
2575 }
2576
2577 switch (slot_width) {
2578 case 20:
2579 val |= (1 << 10);
2580 break;
2581 case 24:
2582 val |= (2 << 10);
2583 break;
2584 case 32:
2585 val |= (3 << 10);
2586 break;
2587 case 16:
2588 break;
2589 default:
2590 return -EINVAL;
2591 }
2592
2593 snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val);
2594
2595 return 0;
2596}
2597
2598static int rt5670_set_bias_level(struct snd_soc_codec *codec,
2599 enum snd_soc_bias_level level)
2600{
Bard Liao044b7242014-11-12 19:54:30 +08002601 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2602
Bard Liao5e8351d2014-06-30 20:31:13 +08002603 switch (level) {
2604 case SND_SOC_BIAS_PREPARE:
Lars-Peter Clausen6d8135f2015-05-19 21:49:10 +02002605 if (SND_SOC_BIAS_STANDBY == snd_soc_codec_get_bias_level(codec)) {
Bard Liao5e8351d2014-06-30 20:31:13 +08002606 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2607 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2608 RT5670_PWR_BG | RT5670_PWR_VREF2,
2609 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2610 RT5670_PWR_BG | RT5670_PWR_VREF2);
2611 mdelay(10);
2612 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2613 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2614 RT5670_PWR_FV1 | RT5670_PWR_FV2);
2615 snd_soc_update_bits(codec, RT5670_CHARGE_PUMP,
2616 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
2617 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
2618 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1);
2619 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2620 RT5670_LDO_SEL_MASK, 0x3);
2621 }
2622 break;
2623 case SND_SOC_BIAS_STANDBY:
Bard Liao044b7242014-11-12 19:54:30 +08002624 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2625 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
2626 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
Bard Liao5e8351d2014-06-30 20:31:13 +08002627 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2628 RT5670_LDO_SEL_MASK, 0x1);
2629 break;
Bard Liao044b7242014-11-12 19:54:30 +08002630 case SND_SOC_BIAS_OFF:
2631 if (rt5670->pdata.jd_mode)
2632 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2633 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2634 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2635 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2636 RT5670_PWR_MB | RT5670_PWR_BG);
2637 else
2638 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2639 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2640 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2641 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2642
2643 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0);
2644 break;
Bard Liao5e8351d2014-06-30 20:31:13 +08002645
2646 default:
2647 break;
2648 }
Bard Liao5e8351d2014-06-30 20:31:13 +08002649
2650 return 0;
2651}
2652
2653static int rt5670_probe(struct snd_soc_codec *codec)
2654{
Lars-Peter Clausen6d8135f2015-05-19 21:49:10 +02002655 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Bard Liao5e8351d2014-06-30 20:31:13 +08002656 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2657
Bard Liao0cf18632014-11-11 17:59:50 +08002658 switch (snd_soc_read(codec, RT5670_RESET) & RT5670_ID_MASK) {
2659 case RT5670_ID_5670:
2660 case RT5670_ID_5671:
Lars-Peter Clausen6d8135f2015-05-19 21:49:10 +02002661 snd_soc_dapm_new_controls(dapm,
Bard Liao0cf18632014-11-11 17:59:50 +08002662 rt5670_specific_dapm_widgets,
2663 ARRAY_SIZE(rt5670_specific_dapm_widgets));
Lars-Peter Clausen6d8135f2015-05-19 21:49:10 +02002664 snd_soc_dapm_add_routes(dapm,
Bard Liao0cf18632014-11-11 17:59:50 +08002665 rt5670_specific_dapm_routes,
2666 ARRAY_SIZE(rt5670_specific_dapm_routes));
2667 break;
2668 case RT5670_ID_5672:
Lars-Peter Clausen6d8135f2015-05-19 21:49:10 +02002669 snd_soc_dapm_new_controls(dapm,
Bard Liao0cf18632014-11-11 17:59:50 +08002670 rt5672_specific_dapm_widgets,
2671 ARRAY_SIZE(rt5672_specific_dapm_widgets));
Lars-Peter Clausen6d8135f2015-05-19 21:49:10 +02002672 snd_soc_dapm_add_routes(dapm,
Bard Liao0cf18632014-11-11 17:59:50 +08002673 rt5672_specific_dapm_routes,
2674 ARRAY_SIZE(rt5672_specific_dapm_routes));
2675 break;
2676 default:
2677 dev_err(codec->dev,
2678 "The driver is for RT5670 RT5671 or RT5672 only\n");
2679 return -ENODEV;
2680 }
Bard Liao5e8351d2014-06-30 20:31:13 +08002681 rt5670->codec = codec;
2682
2683 return 0;
2684}
2685
2686static int rt5670_remove(struct snd_soc_codec *codec)
2687{
2688 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2689
2690 regmap_write(rt5670->regmap, RT5670_RESET, 0);
Bard Liaod3ef7052015-03-11 11:42:44 +08002691 snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio);
Bard Liao5e8351d2014-06-30 20:31:13 +08002692 return 0;
2693}
2694
2695#ifdef CONFIG_PM
2696static int rt5670_suspend(struct snd_soc_codec *codec)
2697{
2698 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2699
2700 regcache_cache_only(rt5670->regmap, true);
2701 regcache_mark_dirty(rt5670->regmap);
2702 return 0;
2703}
2704
2705static int rt5670_resume(struct snd_soc_codec *codec)
2706{
2707 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2708
2709 regcache_cache_only(rt5670->regmap, false);
2710 regcache_sync(rt5670->regmap);
2711
2712 return 0;
2713}
2714#else
2715#define rt5670_suspend NULL
2716#define rt5670_resume NULL
2717#endif
2718
2719#define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2720#define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2721 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2722
Axel Lin64793042015-07-15 15:38:14 +08002723static const struct snd_soc_dai_ops rt5670_aif_dai_ops = {
Bard Liao5e8351d2014-06-30 20:31:13 +08002724 .hw_params = rt5670_hw_params,
2725 .set_fmt = rt5670_set_dai_fmt,
2726 .set_sysclk = rt5670_set_dai_sysclk,
2727 .set_tdm_slot = rt5670_set_tdm_slot,
2728 .set_pll = rt5670_set_dai_pll,
2729};
2730
Mark Brownff62b952014-08-01 17:22:19 +01002731static struct snd_soc_dai_driver rt5670_dai[] = {
Bard Liao5e8351d2014-06-30 20:31:13 +08002732 {
2733 .name = "rt5670-aif1",
2734 .id = RT5670_AIF1,
2735 .playback = {
2736 .stream_name = "AIF1 Playback",
2737 .channels_min = 1,
2738 .channels_max = 2,
2739 .rates = RT5670_STEREO_RATES,
2740 .formats = RT5670_FORMATS,
2741 },
2742 .capture = {
2743 .stream_name = "AIF1 Capture",
2744 .channels_min = 1,
2745 .channels_max = 2,
2746 .rates = RT5670_STEREO_RATES,
2747 .formats = RT5670_FORMATS,
2748 },
2749 .ops = &rt5670_aif_dai_ops,
2750 },
2751 {
2752 .name = "rt5670-aif2",
2753 .id = RT5670_AIF2,
2754 .playback = {
2755 .stream_name = "AIF2 Playback",
2756 .channels_min = 1,
2757 .channels_max = 2,
2758 .rates = RT5670_STEREO_RATES,
2759 .formats = RT5670_FORMATS,
2760 },
2761 .capture = {
2762 .stream_name = "AIF2 Capture",
2763 .channels_min = 1,
2764 .channels_max = 2,
2765 .rates = RT5670_STEREO_RATES,
2766 .formats = RT5670_FORMATS,
2767 },
2768 .ops = &rt5670_aif_dai_ops,
2769 },
2770};
2771
2772static struct snd_soc_codec_driver soc_codec_dev_rt5670 = {
2773 .probe = rt5670_probe,
2774 .remove = rt5670_remove,
2775 .suspend = rt5670_suspend,
2776 .resume = rt5670_resume,
2777 .set_bias_level = rt5670_set_bias_level,
2778 .idle_bias_off = true,
2779 .controls = rt5670_snd_controls,
2780 .num_controls = ARRAY_SIZE(rt5670_snd_controls),
2781 .dapm_widgets = rt5670_dapm_widgets,
2782 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets),
2783 .dapm_routes = rt5670_dapm_routes,
2784 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes),
2785};
2786
2787static const struct regmap_config rt5670_regmap = {
2788 .reg_bits = 8,
2789 .val_bits = 16,
Bard Liao92b133f2015-02-09 14:41:50 +08002790 .use_single_rw = true,
Bard Liao5e8351d2014-06-30 20:31:13 +08002791 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
2792 RT5670_PR_SPACING),
2793 .volatile_reg = rt5670_volatile_register,
2794 .readable_reg = rt5670_readable_register,
2795 .cache_type = REGCACHE_RBTREE,
2796 .reg_defaults = rt5670_reg,
2797 .num_reg_defaults = ARRAY_SIZE(rt5670_reg),
2798 .ranges = rt5670_ranges,
2799 .num_ranges = ARRAY_SIZE(rt5670_ranges),
2800};
2801
2802static const struct i2c_device_id rt5670_i2c_id[] = {
2803 { "rt5670", 0 },
Bard Liao0cf18632014-11-11 17:59:50 +08002804 { "rt5671", 0 },
2805 { "rt5672", 0 },
Bard Liao5e8351d2014-06-30 20:31:13 +08002806 { }
2807};
2808MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
2809
Mengdong Lin06058152014-11-14 15:51:34 +08002810#ifdef CONFIG_ACPI
Mathias Krause4e0ce6a2015-06-13 14:25:15 +02002811static const struct acpi_device_id rt5670_acpi_match[] = {
Mengdong Lin06058152014-11-14 15:51:34 +08002812 { "10EC5670", 0},
2813 { },
2814};
2815MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
2816#endif
2817
Bard Liao223c0552014-12-18 11:32:52 +08002818static const struct dmi_system_id dmi_platform_intel_braswell[] = {
2819 {
2820 .ident = "Intel Braswell",
2821 .matches = {
2822 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
2823 DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"),
2824 },
2825 },
2826 {}
2827};
2828
Bard Liao5e8351d2014-06-30 20:31:13 +08002829static int rt5670_i2c_probe(struct i2c_client *i2c,
2830 const struct i2c_device_id *id)
2831{
2832 struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev);
2833 struct rt5670_priv *rt5670;
2834 int ret;
2835 unsigned int val;
2836
2837 rt5670 = devm_kzalloc(&i2c->dev,
2838 sizeof(struct rt5670_priv),
2839 GFP_KERNEL);
2840 if (NULL == rt5670)
2841 return -ENOMEM;
2842
2843 i2c_set_clientdata(i2c, rt5670);
2844
2845 if (pdata)
2846 rt5670->pdata = *pdata;
2847
Bard Liao223c0552014-12-18 11:32:52 +08002848 if (dmi_check_system(dmi_platform_intel_braswell)) {
2849 rt5670->pdata.dmic_en = true;
2850 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
Bard Liaod3ef7052015-03-11 11:42:44 +08002851 rt5670->pdata.dev_gpio = true;
Bard Liao223c0552014-12-18 11:32:52 +08002852 rt5670->pdata.jd_mode = 1;
2853 }
2854
Bard Liao5e8351d2014-06-30 20:31:13 +08002855 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
2856 if (IS_ERR(rt5670->regmap)) {
2857 ret = PTR_ERR(rt5670->regmap);
2858 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2859 ret);
2860 return ret;
2861 }
2862
2863 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
2864 if (val != RT5670_DEVICE_ID) {
2865 dev_err(&i2c->dev,
Jarkko Nikula387ad572015-06-25 13:59:00 +03002866 "Device with ID register %#x is not rt5670/72\n", val);
Bard Liao5e8351d2014-06-30 20:31:13 +08002867 return -ENODEV;
2868 }
2869
2870 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2871 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2872 RT5670_PWR_HP_L | RT5670_PWR_HP_R |
2873 RT5670_PWR_VREF2, RT5670_PWR_VREF2);
2874 msleep(100);
2875
2876 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2877
Bard Liao2bf9eba2015-03-03 18:31:29 +08002878 regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val);
2879 if (val >= 4)
2880 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980);
2881 else
2882 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00);
2883
Bard Liao5e8351d2014-06-30 20:31:13 +08002884 ret = regmap_register_patch(rt5670->regmap, init_list,
2885 ARRAY_SIZE(init_list));
2886 if (ret != 0)
2887 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2888
2889 if (rt5670->pdata.in2_diff)
2890 regmap_update_bits(rt5670->regmap, RT5670_IN2,
2891 RT5670_IN_DF2, RT5670_IN_DF2);
2892
Bard Liaod3ef7052015-03-11 11:42:44 +08002893 if (rt5670->pdata.dev_gpio) {
2894 /* for push button */
2895 regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000);
2896 regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010);
2897 regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014);
2898 /* for irq */
Bard Liao5e8351d2014-06-30 20:31:13 +08002899 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2900 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
2901 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
2902 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
Bard Liaod3ef7052015-03-11 11:42:44 +08002903 regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC, 0x8, 0x8);
Bard Liao5e8351d2014-06-30 20:31:13 +08002904 }
2905
2906 if (rt5670->pdata.jd_mode) {
Bard Liao026e73682014-12-15 15:42:34 +08002907 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
2908 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
2909 rt5670->sysclk = 0;
2910 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
Bard Liao5e8351d2014-06-30 20:31:13 +08002911 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2912 RT5670_PWR_MB, RT5670_PWR_MB);
2913 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
2914 RT5670_PWR_JD1, RT5670_PWR_JD1);
2915 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
2916 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
2917 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
2918 RT5670_JD_TRI_CBJ_SEL_MASK |
2919 RT5670_JD_TRI_HPO_SEL_MASK,
2920 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
2921 switch (rt5670->pdata.jd_mode) {
2922 case 1:
2923 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2924 RT5670_JD1_MODE_MASK,
2925 RT5670_JD1_MODE_0);
2926 break;
2927 case 2:
2928 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2929 RT5670_JD1_MODE_MASK,
2930 RT5670_JD1_MODE_1);
2931 break;
2932 case 3:
2933 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2934 RT5670_JD1_MODE_MASK,
2935 RT5670_JD1_MODE_2);
2936 break;
2937 default:
2938 break;
2939 }
2940 }
2941
2942 if (rt5670->pdata.dmic_en) {
2943 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2944 RT5670_GP2_PIN_MASK,
2945 RT5670_GP2_PIN_DMIC1_SCL);
2946
2947 switch (rt5670->pdata.dmic1_data_pin) {
2948 case RT5670_DMIC_DATA_IN2P:
2949 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2950 RT5670_DMIC_1_DP_MASK,
2951 RT5670_DMIC_1_DP_IN2P);
2952 break;
2953
2954 case RT5670_DMIC_DATA_GPIO6:
2955 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2956 RT5670_DMIC_1_DP_MASK,
2957 RT5670_DMIC_1_DP_GPIO6);
2958 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2959 RT5670_GP6_PIN_MASK,
2960 RT5670_GP6_PIN_DMIC1_SDA);
2961 break;
2962
2963 case RT5670_DMIC_DATA_GPIO7:
2964 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2965 RT5670_DMIC_1_DP_MASK,
2966 RT5670_DMIC_1_DP_GPIO7);
2967 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2968 RT5670_GP7_PIN_MASK,
2969 RT5670_GP7_PIN_DMIC1_SDA);
2970 break;
2971
2972 default:
2973 break;
2974 }
2975
2976 switch (rt5670->pdata.dmic2_data_pin) {
2977 case RT5670_DMIC_DATA_IN3N:
2978 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2979 RT5670_DMIC_2_DP_MASK,
2980 RT5670_DMIC_2_DP_IN3N);
2981 break;
2982
2983 case RT5670_DMIC_DATA_GPIO8:
2984 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2985 RT5670_DMIC_2_DP_MASK,
2986 RT5670_DMIC_2_DP_GPIO8);
2987 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2988 RT5670_GP8_PIN_MASK,
2989 RT5670_GP8_PIN_DMIC2_SDA);
2990 break;
2991
2992 default:
2993 break;
2994 }
2995
2996 switch (rt5670->pdata.dmic3_data_pin) {
2997 case RT5670_DMIC_DATA_GPIO5:
2998 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
2999 RT5670_DMIC_3_DP_MASK,
3000 RT5670_DMIC_3_DP_GPIO5);
3001 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3002 RT5670_GP5_PIN_MASK,
3003 RT5670_GP5_PIN_DMIC3_SDA);
3004 break;
3005
3006 case RT5670_DMIC_DATA_GPIO9:
3007 case RT5670_DMIC_DATA_GPIO10:
3008 dev_err(&i2c->dev,
3009 "Always use GPIO5 as DMIC3 data pin\n");
3010 break;
3011
3012 default:
3013 break;
3014 }
3015
3016 }
3017
Bard Liao64e89e52014-12-15 15:42:33 +08003018 pm_runtime_enable(&i2c->dev);
3019 pm_request_idle(&i2c->dev);
3020
Bard Liao5e8351d2014-06-30 20:31:13 +08003021 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670,
3022 rt5670_dai, ARRAY_SIZE(rt5670_dai));
3023 if (ret < 0)
3024 goto err;
3025
Bard Liao64e89e52014-12-15 15:42:33 +08003026 pm_runtime_put(&i2c->dev);
3027
Bard Liao5e8351d2014-06-30 20:31:13 +08003028 return 0;
3029err:
Bard Liao64e89e52014-12-15 15:42:33 +08003030 pm_runtime_disable(&i2c->dev);
3031
Bard Liao5e8351d2014-06-30 20:31:13 +08003032 return ret;
3033}
3034
3035static int rt5670_i2c_remove(struct i2c_client *i2c)
3036{
Bard Liao64e89e52014-12-15 15:42:33 +08003037 pm_runtime_disable(&i2c->dev);
Bard Liao5e8351d2014-06-30 20:31:13 +08003038 snd_soc_unregister_codec(&i2c->dev);
3039
3040 return 0;
3041}
3042
Mark Brownff62b952014-08-01 17:22:19 +01003043static struct i2c_driver rt5670_i2c_driver = {
Bard Liao5e8351d2014-06-30 20:31:13 +08003044 .driver = {
3045 .name = "rt5670",
Mengdong Lin06058152014-11-14 15:51:34 +08003046 .acpi_match_table = ACPI_PTR(rt5670_acpi_match),
Bard Liao5e8351d2014-06-30 20:31:13 +08003047 },
3048 .probe = rt5670_i2c_probe,
3049 .remove = rt5670_i2c_remove,
3050 .id_table = rt5670_i2c_id,
3051};
3052
3053module_i2c_driver(rt5670_i2c_driver);
3054
3055MODULE_DESCRIPTION("ASoC RT5670 driver");
3056MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
3057MODULE_LICENSE("GPL v2");