Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* |
Keith Packard | 3950725 | 2011-09-22 12:30:16 -0700 | [diff] [blame] | 2 | * Copyright © 2006 Intel Corporation |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 21 | * SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Eric Anholt <eric@anholt.net> |
| 25 | * |
| 26 | */ |
Daniel Vetter | 25e341c | 2012-03-24 23:51:30 +0100 | [diff] [blame] | 27 | #include <linux/dmi.h> |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 28 | #include <drm/drm_dp_helper.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 29 | #include <drm/drmP.h> |
| 30 | #include <drm/i915_drm.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 31 | #include "i915_drv.h" |
| 32 | #include "intel_bios.h" |
| 33 | |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 34 | #define SLAVE_ADDR1 0x70 |
| 35 | #define SLAVE_ADDR2 0x72 |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 36 | |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 37 | static int panel_type; |
| 38 | |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 39 | static const void * |
| 40 | find_section(const void *_bdb, int section_id) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 41 | { |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 42 | const struct bdb_header *bdb = _bdb; |
| 43 | const u8 *base = _bdb; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 44 | int index = 0; |
Jani Nikula | cd67d22 | 2015-09-17 16:42:07 +0300 | [diff] [blame] | 45 | u32 total, current_size; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 46 | u8 current_id; |
| 47 | |
| 48 | /* skip to first section */ |
| 49 | index += bdb->header_size; |
| 50 | total = bdb->bdb_size; |
| 51 | |
| 52 | /* walk the sections looking for section_id */ |
Chris Wilson | d1f13fd | 2014-04-18 18:04:23 -0300 | [diff] [blame] | 53 | while (index + 3 < total) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 54 | current_id = *(base + index); |
| 55 | index++; |
Chris Wilson | d1f13fd | 2014-04-18 18:04:23 -0300 | [diff] [blame] | 56 | |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 57 | current_size = *((const u16 *)(base + index)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 58 | index += 2; |
Chris Wilson | d1f13fd | 2014-04-18 18:04:23 -0300 | [diff] [blame] | 59 | |
Jani Nikula | cd67d22 | 2015-09-17 16:42:07 +0300 | [diff] [blame] | 60 | /* The MIPI Sequence Block v3+ has a separate size field. */ |
| 61 | if (current_id == BDB_MIPI_SEQUENCE && *(base + index) >= 3) |
| 62 | current_size = *((const u32 *)(base + index + 1)); |
| 63 | |
Chris Wilson | d1f13fd | 2014-04-18 18:04:23 -0300 | [diff] [blame] | 64 | if (index + current_size > total) |
| 65 | return NULL; |
| 66 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 67 | if (current_id == section_id) |
| 68 | return base + index; |
Chris Wilson | d1f13fd | 2014-04-18 18:04:23 -0300 | [diff] [blame] | 69 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 70 | index += current_size; |
| 71 | } |
| 72 | |
| 73 | return NULL; |
| 74 | } |
| 75 | |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 76 | static u16 |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 77 | get_blocksize(const void *p) |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 78 | { |
| 79 | u16 *block_ptr, block_size; |
| 80 | |
| 81 | block_ptr = (u16 *)((char *)p - 2); |
| 82 | block_size = *block_ptr; |
| 83 | return block_size; |
| 84 | } |
| 85 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 86 | static void |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 87 | fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 88 | const struct lvds_dvo_timing *dvo_timing) |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 89 | { |
| 90 | panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | |
| 91 | dvo_timing->hactive_lo; |
| 92 | panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + |
| 93 | ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); |
| 94 | panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + |
| 95 | dvo_timing->hsync_pulse_width; |
| 96 | panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + |
| 97 | ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); |
| 98 | |
| 99 | panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | |
| 100 | dvo_timing->vactive_lo; |
| 101 | panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + |
| 102 | dvo_timing->vsync_off; |
| 103 | panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + |
| 104 | dvo_timing->vsync_pulse_width; |
| 105 | panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + |
| 106 | ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); |
| 107 | panel_fixed_mode->clock = dvo_timing->clock * 10; |
| 108 | panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; |
| 109 | |
Adam Jackson | 9bc3549 | 2010-05-28 17:17:37 -0400 | [diff] [blame] | 110 | if (dvo_timing->hsync_positive) |
| 111 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; |
| 112 | else |
| 113 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; |
| 114 | |
| 115 | if (dvo_timing->vsync_positive) |
| 116 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; |
| 117 | else |
| 118 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; |
| 119 | |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 120 | /* Some VBTs have bogus h/vtotal values */ |
| 121 | if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) |
| 122 | panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; |
| 123 | if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) |
| 124 | panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; |
| 125 | |
| 126 | drm_mode_set_name(panel_fixed_mode); |
| 127 | } |
| 128 | |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 129 | static const struct lvds_dvo_timing * |
| 130 | get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, |
| 131 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, |
| 132 | int index) |
| 133 | { |
| 134 | /* |
| 135 | * the size of fp_timing varies on the different platform. |
| 136 | * So calculate the DVO timing relative offset in LVDS data |
| 137 | * entry to get the DVO timing entry |
| 138 | */ |
| 139 | |
| 140 | int lfp_data_size = |
| 141 | lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - |
| 142 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; |
| 143 | int dvo_timing_offset = |
| 144 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - |
| 145 | lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; |
| 146 | char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; |
| 147 | |
| 148 | return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); |
| 149 | } |
| 150 | |
Takashi Iwai | b035438 | 2012-03-20 13:07:05 +0100 | [diff] [blame] | 151 | /* get lvds_fp_timing entry |
| 152 | * this function may return NULL if the corresponding entry is invalid |
| 153 | */ |
| 154 | static const struct lvds_fp_timing * |
| 155 | get_lvds_fp_timing(const struct bdb_header *bdb, |
| 156 | const struct bdb_lvds_lfp_data *data, |
| 157 | const struct bdb_lvds_lfp_data_ptrs *ptrs, |
| 158 | int index) |
| 159 | { |
| 160 | size_t data_ofs = (const u8 *)data - (const u8 *)bdb; |
| 161 | u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ |
| 162 | size_t ofs; |
| 163 | |
| 164 | if (index >= ARRAY_SIZE(ptrs->ptr)) |
| 165 | return NULL; |
| 166 | ofs = ptrs->ptr[index].fp_timing_offset; |
| 167 | if (ofs < data_ofs || |
| 168 | ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) |
| 169 | return NULL; |
| 170 | return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); |
| 171 | } |
| 172 | |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 173 | /* Try to find integrated panel data */ |
| 174 | static void |
| 175 | parse_lfp_panel_data(struct drm_i915_private *dev_priv, |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 176 | const struct bdb_header *bdb) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 177 | { |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 178 | const struct bdb_lvds_options *lvds_options; |
| 179 | const struct bdb_lvds_lfp_data *lvds_lfp_data; |
| 180 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; |
| 181 | const struct lvds_dvo_timing *panel_dvo_timing; |
Takashi Iwai | b035438 | 2012-03-20 13:07:05 +0100 | [diff] [blame] | 182 | const struct lvds_fp_timing *fp_timing; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 183 | struct drm_display_mode *panel_fixed_mode; |
Daniel Vetter | c329a4e | 2015-06-18 10:30:23 +0200 | [diff] [blame] | 184 | int drrs_mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 185 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 186 | lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); |
| 187 | if (!lvds_options) |
| 188 | return; |
| 189 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 190 | dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 191 | if (lvds_options->panel_type == 0xff) |
| 192 | return; |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 193 | |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 194 | panel_type = lvds_options->panel_type; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 195 | |
Pradeep Bhat | 83a7280 | 2014-03-28 10:14:57 +0530 | [diff] [blame] | 196 | drrs_mode = (lvds_options->dps_panel_type_bits |
| 197 | >> (panel_type * 2)) & MODE_MASK; |
| 198 | /* |
| 199 | * VBT has static DRRS = 0 and seamless DRRS = 2. |
| 200 | * The below piece of code is required to adjust vbt.drrs_type |
| 201 | * to match the enum drrs_support_type. |
| 202 | */ |
| 203 | switch (drrs_mode) { |
| 204 | case 0: |
| 205 | dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; |
| 206 | DRM_DEBUG_KMS("DRRS supported mode is static\n"); |
| 207 | break; |
| 208 | case 2: |
| 209 | dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; |
| 210 | DRM_DEBUG_KMS("DRRS supported mode is seamless\n"); |
| 211 | break; |
| 212 | default: |
| 213 | dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; |
| 214 | DRM_DEBUG_KMS("DRRS not supported (VBT input)\n"); |
| 215 | break; |
| 216 | } |
| 217 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 218 | lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); |
| 219 | if (!lvds_lfp_data) |
| 220 | return; |
| 221 | |
Jesse Barnes | 1b16de0 | 2009-06-22 11:30:30 -0700 | [diff] [blame] | 222 | lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); |
| 223 | if (!lvds_lfp_data_ptrs) |
| 224 | return; |
| 225 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 226 | dev_priv->vbt.lvds_vbt = 1; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 227 | |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 228 | panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, |
| 229 | lvds_lfp_data_ptrs, |
| 230 | lvds_options->panel_type); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 231 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 232 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
Chris Wilson | 6edc324 | 2010-09-12 17:16:17 +0100 | [diff] [blame] | 233 | if (!panel_fixed_mode) |
| 234 | return; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 235 | |
Chris Wilson | 99834ea | 2011-07-13 21:01:46 +0100 | [diff] [blame] | 236 | fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 237 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 238 | dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 239 | |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 240 | DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 241 | drm_mode_debug_printmodeline(panel_fixed_mode); |
| 242 | |
Takashi Iwai | b035438 | 2012-03-20 13:07:05 +0100 | [diff] [blame] | 243 | fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, |
| 244 | lvds_lfp_data_ptrs, |
| 245 | lvds_options->panel_type); |
| 246 | if (fp_timing) { |
| 247 | /* check the resolution, just to be sure */ |
| 248 | if (fp_timing->x_res == panel_fixed_mode->hdisplay && |
| 249 | fp_timing->y_res == panel_fixed_mode->vdisplay) { |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 250 | dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; |
Takashi Iwai | b035438 | 2012-03-20 13:07:05 +0100 | [diff] [blame] | 251 | DRM_DEBUG_KMS("VBT initial LVDS value %x\n", |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 252 | dev_priv->vbt.bios_lvds_val); |
Takashi Iwai | b035438 | 2012-03-20 13:07:05 +0100 | [diff] [blame] | 253 | } |
| 254 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 255 | } |
| 256 | |
Jani Nikula | f00076d | 2013-12-14 20:38:29 -0200 | [diff] [blame] | 257 | static void |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 258 | parse_lfp_backlight(struct drm_i915_private *dev_priv, |
| 259 | const struct bdb_header *bdb) |
Jani Nikula | f00076d | 2013-12-14 20:38:29 -0200 | [diff] [blame] | 260 | { |
| 261 | const struct bdb_lfp_backlight_data *backlight_data; |
| 262 | const struct bdb_lfp_backlight_data_entry *entry; |
| 263 | |
| 264 | backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); |
| 265 | if (!backlight_data) |
| 266 | return; |
| 267 | |
| 268 | if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { |
| 269 | DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n", |
| 270 | backlight_data->entry_size); |
| 271 | return; |
| 272 | } |
| 273 | |
| 274 | entry = &backlight_data->data[panel_type]; |
| 275 | |
Jani Nikula | 39fbc9c | 2014-04-09 11:22:06 +0300 | [diff] [blame] | 276 | dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; |
| 277 | if (!dev_priv->vbt.backlight.present) { |
| 278 | DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n", |
| 279 | entry->type); |
| 280 | return; |
| 281 | } |
| 282 | |
Jani Nikula | f00076d | 2013-12-14 20:38:29 -0200 | [diff] [blame] | 283 | dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; |
| 284 | dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; |
Jani Nikula | 1de6068 | 2014-06-24 18:27:39 +0300 | [diff] [blame] | 285 | dev_priv->vbt.backlight.min_brightness = entry->min_brightness; |
Jani Nikula | f00076d | 2013-12-14 20:38:29 -0200 | [diff] [blame] | 286 | DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " |
| 287 | "active %s, min brightness %u, level %u\n", |
| 288 | dev_priv->vbt.backlight.pwm_freq_hz, |
| 289 | dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", |
Jani Nikula | 1de6068 | 2014-06-24 18:27:39 +0300 | [diff] [blame] | 290 | dev_priv->vbt.backlight.min_brightness, |
Jani Nikula | f00076d | 2013-12-14 20:38:29 -0200 | [diff] [blame] | 291 | backlight_data->level[panel_type]); |
| 292 | } |
| 293 | |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 294 | /* Try to find sdvo panel data */ |
| 295 | static void |
| 296 | parse_sdvo_panel_data(struct drm_i915_private *dev_priv, |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 297 | const struct bdb_header *bdb) |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 298 | { |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 299 | const struct lvds_dvo_timing *dvo_timing; |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 300 | struct drm_display_mode *panel_fixed_mode; |
Chris Wilson | 5a1e5b6 | 2011-01-29 16:50:25 +0000 | [diff] [blame] | 301 | int index; |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 302 | |
Jani Nikula | d330a95 | 2014-01-21 11:24:25 +0200 | [diff] [blame] | 303 | index = i915.vbt_sdvo_panel_type; |
Mathias Fröhlich | c10e408 | 2012-03-01 06:44:35 +0100 | [diff] [blame] | 304 | if (index == -2) { |
| 305 | DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n"); |
| 306 | return; |
| 307 | } |
| 308 | |
Chris Wilson | 5a1e5b6 | 2011-01-29 16:50:25 +0000 | [diff] [blame] | 309 | if (index == -1) { |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 310 | const struct bdb_sdvo_lvds_options *sdvo_lvds_options; |
Chris Wilson | 5a1e5b6 | 2011-01-29 16:50:25 +0000 | [diff] [blame] | 311 | |
| 312 | sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); |
| 313 | if (!sdvo_lvds_options) |
| 314 | return; |
| 315 | |
| 316 | index = sdvo_lvds_options->panel_type; |
| 317 | } |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 318 | |
| 319 | dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS); |
| 320 | if (!dvo_timing) |
| 321 | return; |
| 322 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 323 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 324 | if (!panel_fixed_mode) |
| 325 | return; |
| 326 | |
Chris Wilson | 5a1e5b6 | 2011-01-29 16:50:25 +0000 | [diff] [blame] | 327 | fill_detail_timing_data(panel_fixed_mode, dvo_timing + index); |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 328 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 329 | dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 330 | |
Chris Wilson | 5a1e5b6 | 2011-01-29 16:50:25 +0000 | [diff] [blame] | 331 | DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); |
| 332 | drm_mode_debug_printmodeline(panel_fixed_mode); |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 333 | } |
| 334 | |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 335 | static int intel_bios_ssc_frequency(struct drm_device *dev, |
| 336 | bool alternate) |
| 337 | { |
| 338 | switch (INTEL_INFO(dev)->gen) { |
| 339 | case 2: |
Ville Syrjälä | e91e941 | 2013-12-09 18:54:16 +0200 | [diff] [blame] | 340 | return alternate ? 66667 : 48000; |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 341 | case 3: |
| 342 | case 4: |
Ville Syrjälä | e91e941 | 2013-12-09 18:54:16 +0200 | [diff] [blame] | 343 | return alternate ? 100000 : 96000; |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 344 | default: |
Ville Syrjälä | e91e941 | 2013-12-09 18:54:16 +0200 | [diff] [blame] | 345 | return alternate ? 100000 : 120000; |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 346 | } |
| 347 | } |
| 348 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 349 | static void |
| 350 | parse_general_features(struct drm_i915_private *dev_priv, |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 351 | const struct bdb_header *bdb) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 352 | { |
Eric Anholt | bad720f | 2009-10-22 16:11:14 -0700 | [diff] [blame] | 353 | struct drm_device *dev = dev_priv->dev; |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 354 | const struct bdb_general_features *general; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 355 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 356 | general = find_section(bdb, BDB_GENERAL_FEATURES); |
| 357 | if (general) { |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 358 | dev_priv->vbt.int_tv_support = general->int_tv_support; |
| 359 | dev_priv->vbt.int_crt_support = general->int_crt_support; |
| 360 | dev_priv->vbt.lvds_use_ssc = general->enable_ssc; |
| 361 | dev_priv->vbt.lvds_ssc_freq = |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 362 | intel_bios_ssc_frequency(dev, general->ssc_freq); |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 363 | dev_priv->vbt.display_clock_mode = general->display_clock_mode; |
| 364 | dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; |
Paulo Zanoni | 3f704fa | 2013-04-08 15:48:07 -0300 | [diff] [blame] | 365 | DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 366 | dev_priv->vbt.int_tv_support, |
| 367 | dev_priv->vbt.int_crt_support, |
| 368 | dev_priv->vbt.lvds_use_ssc, |
| 369 | dev_priv->vbt.lvds_ssc_freq, |
| 370 | dev_priv->vbt.display_clock_mode, |
| 371 | dev_priv->vbt.fdi_rx_polarity_inverted); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 372 | } |
| 373 | } |
| 374 | |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 375 | static void |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 376 | parse_general_definitions(struct drm_i915_private *dev_priv, |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 377 | const struct bdb_header *bdb) |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 378 | { |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 379 | const struct bdb_general_definitions *general; |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 380 | |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 381 | general = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
| 382 | if (general) { |
| 383 | u16 block_size = get_blocksize(general); |
| 384 | if (block_size >= sizeof(*general)) { |
| 385 | int bus_pin = general->crt_ddc_gmbus_pin; |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 386 | DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); |
Jani Nikula | 88ac793 | 2015-03-27 00:20:22 +0200 | [diff] [blame] | 387 | if (intel_gmbus_is_valid_pin(dev_priv, bus_pin)) |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 388 | dev_priv->vbt.crt_ddc_pin = bus_pin; |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 389 | } else { |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 390 | DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n", |
Daniel Kurtz | 3bd7d90 | 2012-03-28 02:36:14 +0800 | [diff] [blame] | 391 | block_size); |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 392 | } |
| 393 | } |
| 394 | } |
| 395 | |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 396 | static const union child_device_config * |
| 397 | child_device_ptr(const struct bdb_general_definitions *p_defs, int i) |
Ville Syrjälä | 90e4f15 | 2015-03-25 18:45:58 +0200 | [diff] [blame] | 398 | { |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 399 | return (const void *) &p_defs->devices[i * p_defs->child_dev_size]; |
Ville Syrjälä | 90e4f15 | 2015-03-25 18:45:58 +0200 | [diff] [blame] | 400 | } |
| 401 | |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 402 | static void |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 403 | parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 404 | const struct bdb_header *bdb) |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 405 | { |
| 406 | struct sdvo_device_mapping *p_mapping; |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 407 | const struct bdb_general_definitions *p_defs; |
Jani Nikula | 6cc38ac | 2015-08-18 14:28:55 +0300 | [diff] [blame] | 408 | const struct old_child_dev_config *child; /* legacy */ |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 409 | int i, child_device_num, count; |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 410 | u16 block_size; |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 411 | |
| 412 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
| 413 | if (!p_defs) { |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 414 | DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n"); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 415 | return; |
| 416 | } |
Jani Nikula | 6cc38ac | 2015-08-18 14:28:55 +0300 | [diff] [blame] | 417 | |
| 418 | /* |
| 419 | * Only parse SDVO mappings when the general definitions block child |
| 420 | * device size matches that of the *legacy* child device config |
| 421 | * struct. Thus, SDVO mapping will be skipped for newer VBT. |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 422 | */ |
Jani Nikula | 6cc38ac | 2015-08-18 14:28:55 +0300 | [diff] [blame] | 423 | if (p_defs->child_dev_size != sizeof(*child)) { |
| 424 | DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n"); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 425 | return; |
| 426 | } |
| 427 | /* get the block size of general definitions */ |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 428 | block_size = get_blocksize(p_defs); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 429 | /* get the number of child device */ |
| 430 | child_device_num = (block_size - sizeof(*p_defs)) / |
Ville Syrjälä | 90e4f15 | 2015-03-25 18:45:58 +0200 | [diff] [blame] | 431 | p_defs->child_dev_size; |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 432 | count = 0; |
| 433 | for (i = 0; i < child_device_num; i++) { |
Jani Nikula | 6cc38ac | 2015-08-18 14:28:55 +0300 | [diff] [blame] | 434 | child = &child_device_ptr(p_defs, i)->old; |
| 435 | if (!child->device_type) { |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 436 | /* skip the device block if device type is invalid */ |
| 437 | continue; |
| 438 | } |
Jani Nikula | 6cc38ac | 2015-08-18 14:28:55 +0300 | [diff] [blame] | 439 | if (child->slave_addr != SLAVE_ADDR1 && |
| 440 | child->slave_addr != SLAVE_ADDR2) { |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 441 | /* |
| 442 | * If the slave address is neither 0x70 nor 0x72, |
| 443 | * it is not a SDVO device. Skip it. |
| 444 | */ |
| 445 | continue; |
| 446 | } |
Jani Nikula | 6cc38ac | 2015-08-18 14:28:55 +0300 | [diff] [blame] | 447 | if (child->dvo_port != DEVICE_PORT_DVOB && |
| 448 | child->dvo_port != DEVICE_PORT_DVOC) { |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 449 | /* skip the incorrect SDVO port */ |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 450 | DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 451 | continue; |
| 452 | } |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 453 | DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" |
Jani Nikula | 6cc38ac | 2015-08-18 14:28:55 +0300 | [diff] [blame] | 454 | " %s port\n", |
| 455 | child->slave_addr, |
| 456 | (child->dvo_port == DEVICE_PORT_DVOB) ? |
| 457 | "SDVOB" : "SDVOC"); |
| 458 | p_mapping = &(dev_priv->sdvo_mappings[child->dvo_port - 1]); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 459 | if (!p_mapping->initialized) { |
Jani Nikula | 6cc38ac | 2015-08-18 14:28:55 +0300 | [diff] [blame] | 460 | p_mapping->dvo_port = child->dvo_port; |
| 461 | p_mapping->slave_addr = child->slave_addr; |
| 462 | p_mapping->dvo_wiring = child->dvo_wiring; |
| 463 | p_mapping->ddc_pin = child->ddc_pin; |
| 464 | p_mapping->i2c_pin = child->i2c_pin; |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 465 | p_mapping->initialized = 1; |
Adam Jackson | 46eb303 | 2011-06-16 16:36:23 -0400 | [diff] [blame] | 466 | DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", |
Chris Wilson | e957d77 | 2010-09-24 12:52:03 +0100 | [diff] [blame] | 467 | p_mapping->dvo_port, |
| 468 | p_mapping->slave_addr, |
| 469 | p_mapping->dvo_wiring, |
| 470 | p_mapping->ddc_pin, |
Adam Jackson | 46eb303 | 2011-06-16 16:36:23 -0400 | [diff] [blame] | 471 | p_mapping->i2c_pin); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 472 | } else { |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 473 | DRM_DEBUG_KMS("Maybe one SDVO port is shared by " |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 474 | "two SDVO device.\n"); |
| 475 | } |
Jani Nikula | 6cc38ac | 2015-08-18 14:28:55 +0300 | [diff] [blame] | 476 | if (child->slave2_addr) { |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 477 | /* Maybe this is a SDVO device with multiple inputs */ |
| 478 | /* And the mapping info is not added */ |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 479 | DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" |
| 480 | " is a SDVO device with multiple inputs.\n"); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 481 | } |
| 482 | count++; |
| 483 | } |
| 484 | |
| 485 | if (!count) { |
| 486 | /* No SDVO device info is found */ |
Zhao Yakui | 28c9773 | 2009-10-09 11:39:41 +0800 | [diff] [blame] | 487 | DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 488 | } |
| 489 | return; |
| 490 | } |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 491 | |
| 492 | static void |
| 493 | parse_driver_features(struct drm_i915_private *dev_priv, |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 494 | const struct bdb_header *bdb) |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 495 | { |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 496 | const struct bdb_driver_features *driver; |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 497 | |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 498 | driver = find_section(bdb, BDB_DRIVER_FEATURES); |
Jesse Barnes | 652c393 | 2009-08-17 13:31:43 -0700 | [diff] [blame] | 499 | if (!driver) |
| 500 | return; |
| 501 | |
Daniel Vetter | 6fca55b | 2013-09-21 00:48:39 +0200 | [diff] [blame] | 502 | if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 503 | dev_priv->vbt.edp_support = 1; |
Jesse Barnes | 652c393 | 2009-08-17 13:31:43 -0700 | [diff] [blame] | 504 | |
Chris Wilson | 5ceb0f9 | 2010-09-24 10:24:28 +0100 | [diff] [blame] | 505 | if (driver->dual_frequency) |
Jesse Barnes | 652c393 | 2009-08-17 13:31:43 -0700 | [diff] [blame] | 506 | dev_priv->render_reclock_avail = true; |
Pradeep Bhat | 83a7280 | 2014-03-28 10:14:57 +0530 | [diff] [blame] | 507 | |
| 508 | DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); |
| 509 | /* |
| 510 | * If DRRS is not supported, drrs_type has to be set to 0. |
| 511 | * This is because, VBT is configured in such a way that |
| 512 | * static DRRS is 0 and DRRS not supported is represented by |
| 513 | * driver->drrs_enabled=false |
| 514 | */ |
| 515 | if (!driver->drrs_enabled) |
| 516 | dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 517 | } |
| 518 | |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 519 | static void |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 520 | parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 521 | { |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 522 | const struct bdb_edp *edp; |
| 523 | const struct edp_power_seq *edp_pps; |
| 524 | const struct edp_link_params *edp_link_params; |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 525 | |
| 526 | edp = find_section(bdb, BDB_EDP); |
| 527 | if (!edp) { |
Daniel Vetter | 6fca55b | 2013-09-21 00:48:39 +0200 | [diff] [blame] | 528 | if (dev_priv->vbt.edp_support) |
Jani Nikula | 9a30a61 | 2012-11-12 14:33:45 +0200 | [diff] [blame] | 529 | DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n"); |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 530 | return; |
| 531 | } |
| 532 | |
| 533 | switch ((edp->color_depth >> (panel_type * 2)) & 3) { |
| 534 | case EDP_18BPP: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 535 | dev_priv->vbt.edp_bpp = 18; |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 536 | break; |
| 537 | case EDP_24BPP: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 538 | dev_priv->vbt.edp_bpp = 24; |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 539 | break; |
| 540 | case EDP_30BPP: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 541 | dev_priv->vbt.edp_bpp = 30; |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 542 | break; |
| 543 | } |
Chris Wilson | 5ceb0f9 | 2010-09-24 10:24:28 +0100 | [diff] [blame] | 544 | |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 545 | /* Get the eDP sequencing and link info */ |
| 546 | edp_pps = &edp->power_seqs[panel_type]; |
| 547 | edp_link_params = &edp->link_params[panel_type]; |
Chris Wilson | 5ceb0f9 | 2010-09-24 10:24:28 +0100 | [diff] [blame] | 548 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 549 | dev_priv->vbt.edp_pps = *edp_pps; |
Chris Wilson | 5ceb0f9 | 2010-09-24 10:24:28 +0100 | [diff] [blame] | 550 | |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 551 | switch (edp_link_params->rate) { |
| 552 | case EDP_RATE_1_62: |
| 553 | dev_priv->vbt.edp_rate = DP_LINK_BW_1_62; |
| 554 | break; |
| 555 | case EDP_RATE_2_7: |
| 556 | dev_priv->vbt.edp_rate = DP_LINK_BW_2_7; |
| 557 | break; |
| 558 | default: |
| 559 | DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n", |
| 560 | edp_link_params->rate); |
| 561 | break; |
| 562 | } |
| 563 | |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 564 | switch (edp_link_params->lanes) { |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 565 | case EDP_LANE_1: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 566 | dev_priv->vbt.edp_lanes = 1; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 567 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 568 | case EDP_LANE_2: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 569 | dev_priv->vbt.edp_lanes = 2; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 570 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 571 | case EDP_LANE_4: |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 572 | dev_priv->vbt.edp_lanes = 4; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 573 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 574 | default: |
| 575 | DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n", |
| 576 | edp_link_params->lanes); |
| 577 | break; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 578 | } |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 579 | |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 580 | switch (edp_link_params->preemphasis) { |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 581 | case EDP_PREEMPHASIS_NONE: |
Sonika Jindal | bd60018 | 2014-08-08 16:23:41 +0530 | [diff] [blame] | 582 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 583 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 584 | case EDP_PREEMPHASIS_3_5dB: |
Sonika Jindal | bd60018 | 2014-08-08 16:23:41 +0530 | [diff] [blame] | 585 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 586 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 587 | case EDP_PREEMPHASIS_6dB: |
Sonika Jindal | bd60018 | 2014-08-08 16:23:41 +0530 | [diff] [blame] | 588 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 589 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 590 | case EDP_PREEMPHASIS_9_5dB: |
Sonika Jindal | bd60018 | 2014-08-08 16:23:41 +0530 | [diff] [blame] | 591 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 592 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 593 | default: |
| 594 | DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n", |
| 595 | edp_link_params->preemphasis); |
| 596 | break; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 597 | } |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 598 | |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 599 | switch (edp_link_params->vswing) { |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 600 | case EDP_VSWING_0_4V: |
Sonika Jindal | bd60018 | 2014-08-08 16:23:41 +0530 | [diff] [blame] | 601 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 602 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 603 | case EDP_VSWING_0_6V: |
Sonika Jindal | bd60018 | 2014-08-08 16:23:41 +0530 | [diff] [blame] | 604 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 605 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 606 | case EDP_VSWING_0_8V: |
Sonika Jindal | bd60018 | 2014-08-08 16:23:41 +0530 | [diff] [blame] | 607 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 608 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 609 | case EDP_VSWING_1_2V: |
Sonika Jindal | bd60018 | 2014-08-08 16:23:41 +0530 | [diff] [blame] | 610 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 611 | break; |
Jani Nikula | e13e2b2 | 2014-05-06 14:56:51 +0300 | [diff] [blame] | 612 | default: |
| 613 | DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n", |
| 614 | edp_link_params->vswing); |
| 615 | break; |
Jesse Barnes | 9f0e7ff | 2010-10-07 16:01:14 -0700 | [diff] [blame] | 616 | } |
Sonika Jindal | 9a57f5b | 2015-02-25 10:29:11 +0530 | [diff] [blame] | 617 | |
| 618 | if (bdb->version >= 173) { |
| 619 | uint8_t vswing; |
| 620 | |
Sonika Jindal | 9e45803 | 2015-05-06 17:35:48 +0530 | [diff] [blame] | 621 | /* Don't read from VBT if module parameter has valid value*/ |
| 622 | if (i915.edp_vswing) { |
| 623 | dev_priv->edp_low_vswing = i915.edp_vswing == 1; |
| 624 | } else { |
| 625 | vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; |
| 626 | dev_priv->edp_low_vswing = vswing == 0; |
| 627 | } |
Sonika Jindal | 9a57f5b | 2015-02-25 10:29:11 +0530 | [diff] [blame] | 628 | } |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 629 | } |
| 630 | |
Rodrigo Vivi | bfd7ebd | 2014-11-14 08:52:30 -0800 | [diff] [blame] | 631 | static void |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 632 | parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) |
Rodrigo Vivi | bfd7ebd | 2014-11-14 08:52:30 -0800 | [diff] [blame] | 633 | { |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 634 | const struct bdb_psr *psr; |
| 635 | const struct psr_table *psr_table; |
Rodrigo Vivi | bfd7ebd | 2014-11-14 08:52:30 -0800 | [diff] [blame] | 636 | |
| 637 | psr = find_section(bdb, BDB_PSR); |
| 638 | if (!psr) { |
| 639 | DRM_DEBUG_KMS("No PSR BDB found.\n"); |
| 640 | return; |
| 641 | } |
| 642 | |
| 643 | psr_table = &psr->psr_table[panel_type]; |
| 644 | |
| 645 | dev_priv->vbt.psr.full_link = psr_table->full_link; |
| 646 | dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; |
| 647 | |
| 648 | /* Allowed VBT values goes from 0 to 15 */ |
| 649 | dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : |
| 650 | psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; |
| 651 | |
| 652 | switch (psr_table->lines_to_wait) { |
| 653 | case 0: |
| 654 | dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; |
| 655 | break; |
| 656 | case 1: |
| 657 | dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; |
| 658 | break; |
| 659 | case 2: |
| 660 | dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; |
| 661 | break; |
| 662 | case 3: |
| 663 | dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; |
| 664 | break; |
| 665 | default: |
| 666 | DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n", |
| 667 | psr_table->lines_to_wait); |
| 668 | break; |
| 669 | } |
| 670 | |
| 671 | dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time; |
| 672 | dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time; |
| 673 | } |
| 674 | |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 675 | static u8 *goto_next_sequence(u8 *data, int *size) |
| 676 | { |
| 677 | u16 len; |
| 678 | int tmp = *size; |
| 679 | |
| 680 | if (--tmp < 0) |
| 681 | return NULL; |
| 682 | |
| 683 | /* goto first element */ |
| 684 | data++; |
| 685 | while (1) { |
| 686 | switch (*data) { |
| 687 | case MIPI_SEQ_ELEM_SEND_PKT: |
| 688 | /* |
| 689 | * skip by this element payload size |
| 690 | * skip elem id, command flag and data type |
| 691 | */ |
Shobhit Kumar | b0256cd | 2014-04-15 13:54:07 +0530 | [diff] [blame] | 692 | tmp -= 5; |
| 693 | if (tmp < 0) |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 694 | return NULL; |
| 695 | |
| 696 | data += 3; |
| 697 | len = *((u16 *)data); |
| 698 | |
Shobhit Kumar | b0256cd | 2014-04-15 13:54:07 +0530 | [diff] [blame] | 699 | tmp -= len; |
| 700 | if (tmp < 0) |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 701 | return NULL; |
| 702 | |
| 703 | /* skip by len */ |
| 704 | data = data + 2 + len; |
| 705 | break; |
| 706 | case MIPI_SEQ_ELEM_DELAY: |
| 707 | /* skip by elem id, and delay is 4 bytes */ |
Shobhit Kumar | b0256cd | 2014-04-15 13:54:07 +0530 | [diff] [blame] | 708 | tmp -= 5; |
| 709 | if (tmp < 0) |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 710 | return NULL; |
| 711 | |
| 712 | data += 5; |
| 713 | break; |
| 714 | case MIPI_SEQ_ELEM_GPIO: |
Shobhit Kumar | b0256cd | 2014-04-15 13:54:07 +0530 | [diff] [blame] | 715 | tmp -= 3; |
| 716 | if (tmp < 0) |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 717 | return NULL; |
| 718 | |
| 719 | data += 3; |
| 720 | break; |
| 721 | default: |
| 722 | DRM_ERROR("Unknown element\n"); |
| 723 | return NULL; |
| 724 | } |
| 725 | |
| 726 | /* end of sequence ? */ |
| 727 | if (*data == 0) |
| 728 | break; |
| 729 | } |
| 730 | |
| 731 | /* goto next sequence or end of block byte */ |
| 732 | if (--tmp < 0) |
| 733 | return NULL; |
| 734 | |
| 735 | data++; |
| 736 | |
| 737 | /* update amount of data left for the sequence block to be parsed */ |
| 738 | *size = tmp; |
| 739 | return data; |
| 740 | } |
| 741 | |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 742 | static void |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 743 | parse_mipi(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 744 | { |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 745 | const struct bdb_mipi_config *start; |
| 746 | const struct bdb_mipi_sequence *sequence; |
| 747 | const struct mipi_config *config; |
| 748 | const struct mipi_pps_data *pps; |
| 749 | u8 *data; |
| 750 | const u8 *seq_data; |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 751 | int i, panel_id, seq_size; |
| 752 | u16 block_size; |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 753 | |
Shobhit Kumar | 3e6bd01 | 2014-05-27 19:33:59 +0530 | [diff] [blame] | 754 | /* parse MIPI blocks only if LFP type is MIPI */ |
| 755 | if (!dev_priv->vbt.has_mipi) |
| 756 | return; |
| 757 | |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 758 | /* Initialize this to undefined indicating no generic MIPI support */ |
| 759 | dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; |
| 760 | |
| 761 | /* Block #40 is already parsed and panel_fixed_mode is |
| 762 | * stored in dev_priv->lfp_lvds_vbt_mode |
| 763 | * resuse this when needed |
| 764 | */ |
| 765 | |
| 766 | /* Parse #52 for panel index used from panel_type already |
| 767 | * parsed |
| 768 | */ |
| 769 | start = find_section(bdb, BDB_MIPI_CONFIG); |
| 770 | if (!start) { |
| 771 | DRM_DEBUG_KMS("No MIPI config BDB found"); |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 772 | return; |
| 773 | } |
| 774 | |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 775 | DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n", |
| 776 | panel_type); |
| 777 | |
| 778 | /* |
| 779 | * get hold of the correct configuration block and pps data as per |
| 780 | * the panel_type as index |
| 781 | */ |
| 782 | config = &start->config[panel_type]; |
| 783 | pps = &start->pps[panel_type]; |
| 784 | |
| 785 | /* store as of now full data. Trim when we realise all is not needed */ |
| 786 | dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); |
| 787 | if (!dev_priv->vbt.dsi.config) |
| 788 | return; |
| 789 | |
| 790 | dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); |
| 791 | if (!dev_priv->vbt.dsi.pps) { |
| 792 | kfree(dev_priv->vbt.dsi.config); |
| 793 | return; |
| 794 | } |
| 795 | |
| 796 | /* We have mandatory mipi config blocks. Initialize as generic panel */ |
Shobhit Kumar | ea9a6ba | 2014-02-28 11:18:46 +0530 | [diff] [blame] | 797 | dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 798 | |
| 799 | /* Check if we have sequence block as well */ |
| 800 | sequence = find_section(bdb, BDB_MIPI_SEQUENCE); |
| 801 | if (!sequence) { |
| 802 | DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n"); |
| 803 | return; |
| 804 | } |
| 805 | |
Jani Nikula | cd67d22 | 2015-09-17 16:42:07 +0300 | [diff] [blame] | 806 | /* Fail gracefully for forward incompatible sequence block. */ |
| 807 | if (sequence->version >= 3) { |
| 808 | DRM_ERROR("Unable to parse MIPI Sequence Block v3+\n"); |
| 809 | return; |
| 810 | } |
| 811 | |
Shobhit Kumar | d3b542f | 2014-04-14 11:00:34 +0530 | [diff] [blame] | 812 | DRM_DEBUG_DRIVER("Found MIPI sequence block\n"); |
| 813 | |
| 814 | block_size = get_blocksize(sequence); |
| 815 | |
| 816 | /* |
| 817 | * parse the sequence block for individual sequences |
| 818 | */ |
| 819 | dev_priv->vbt.dsi.seq_version = sequence->version; |
| 820 | |
| 821 | seq_data = &sequence->data[0]; |
| 822 | |
| 823 | /* |
| 824 | * sequence block is variable length and hence we need to parse and |
| 825 | * get the sequence data for specific panel id |
| 826 | */ |
| 827 | for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) { |
| 828 | panel_id = *seq_data; |
| 829 | seq_size = *((u16 *) (seq_data + 1)); |
| 830 | if (panel_id == panel_type) |
| 831 | break; |
| 832 | |
| 833 | /* skip the sequence including seq header of 3 bytes */ |
| 834 | seq_data = seq_data + 3 + seq_size; |
| 835 | if ((seq_data - &sequence->data[0]) > block_size) { |
| 836 | DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n"); |
| 837 | return; |
| 838 | } |
| 839 | } |
| 840 | |
| 841 | if (i == MAX_MIPI_CONFIGURATIONS) { |
| 842 | DRM_ERROR("Sequence block detected but no valid configuration\n"); |
| 843 | return; |
| 844 | } |
| 845 | |
| 846 | /* check if found sequence is completely within the sequence block |
| 847 | * just being paranoid */ |
| 848 | if (seq_size > block_size) { |
| 849 | DRM_ERROR("Corrupted sequence/size, bailing out\n"); |
| 850 | return; |
| 851 | } |
| 852 | |
| 853 | /* skip the panel id(1 byte) and seq size(2 bytes) */ |
| 854 | dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL); |
| 855 | if (!dev_priv->vbt.dsi.data) |
| 856 | return; |
| 857 | |
| 858 | /* |
| 859 | * loop into the sequence data and split into multiple sequneces |
| 860 | * There are only 5 types of sequences as of now |
| 861 | */ |
| 862 | data = dev_priv->vbt.dsi.data; |
| 863 | dev_priv->vbt.dsi.size = seq_size; |
| 864 | |
| 865 | /* two consecutive 0x00 indicate end of all sequences */ |
| 866 | while (1) { |
| 867 | int seq_id = *data; |
| 868 | if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) { |
| 869 | dev_priv->vbt.dsi.sequence[seq_id] = data; |
| 870 | DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id); |
| 871 | } else { |
| 872 | DRM_ERROR("undefined sequence\n"); |
| 873 | goto err; |
| 874 | } |
| 875 | |
| 876 | /* partial parsing to skip elements */ |
| 877 | data = goto_next_sequence(data, &seq_size); |
| 878 | |
| 879 | if (data == NULL) { |
| 880 | DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n"); |
| 881 | goto err; |
| 882 | } |
| 883 | |
| 884 | if (*data == 0) |
| 885 | break; /* end of sequence reached */ |
| 886 | } |
| 887 | |
| 888 | DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n"); |
| 889 | return; |
| 890 | err: |
| 891 | kfree(dev_priv->vbt.dsi.data); |
| 892 | dev_priv->vbt.dsi.data = NULL; |
| 893 | |
| 894 | /* error during parsing so set all pointers to null |
| 895 | * because of partial parsing */ |
Rafael Barbalho | ed3b667 | 2014-07-24 15:16:12 +0100 | [diff] [blame] | 896 | memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 897 | } |
| 898 | |
Antti Koskipaa | 75067dd | 2015-07-10 14:10:55 +0300 | [diff] [blame] | 899 | static u8 translate_iboost(u8 val) |
| 900 | { |
| 901 | static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ |
| 902 | |
| 903 | if (val >= ARRAY_SIZE(mapping)) { |
| 904 | DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); |
| 905 | return 0; |
| 906 | } |
| 907 | return mapping[val]; |
| 908 | } |
| 909 | |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 910 | static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 911 | const struct bdb_header *bdb) |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 912 | { |
| 913 | union child_device_config *it, *child = NULL; |
| 914 | struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; |
| 915 | uint8_t hdmi_level_shift; |
| 916 | int i, j; |
Paulo Zanoni | 554d6af | 2013-09-12 17:10:11 -0300 | [diff] [blame] | 917 | bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; |
Xiong Zhang | 11c1b65 | 2015-08-17 16:04:04 +0800 | [diff] [blame] | 918 | uint8_t aux_channel, ddc_pin; |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 919 | /* Each DDI port can have more than one value on the "DVO Port" field, |
| 920 | * so look for all the possible values for each port and abort if more |
| 921 | * than one is found. */ |
Rodrigo Vivi | 2800e4c | 2015-08-07 17:35:21 -0700 | [diff] [blame] | 922 | int dvo_ports[][3] = { |
| 923 | {DVO_PORT_HDMIA, DVO_PORT_DPA, -1}, |
| 924 | {DVO_PORT_HDMIB, DVO_PORT_DPB, -1}, |
| 925 | {DVO_PORT_HDMIC, DVO_PORT_DPC, -1}, |
| 926 | {DVO_PORT_HDMID, DVO_PORT_DPD, -1}, |
| 927 | {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE}, |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 928 | }; |
| 929 | |
| 930 | /* Find the child device to use, abort if more than one found. */ |
| 931 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { |
| 932 | it = dev_priv->vbt.child_dev + i; |
| 933 | |
Rodrigo Vivi | 2800e4c | 2015-08-07 17:35:21 -0700 | [diff] [blame] | 934 | for (j = 0; j < 3; j++) { |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 935 | if (dvo_ports[port][j] == -1) |
| 936 | break; |
| 937 | |
| 938 | if (it->common.dvo_port == dvo_ports[port][j]) { |
| 939 | if (child) { |
| 940 | DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n", |
| 941 | port_name(port)); |
| 942 | return; |
| 943 | } |
| 944 | child = it; |
| 945 | } |
| 946 | } |
| 947 | } |
| 948 | if (!child) |
| 949 | return; |
| 950 | |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 951 | aux_channel = child->raw[25]; |
Xiong Zhang | 11c1b65 | 2015-08-17 16:04:04 +0800 | [diff] [blame] | 952 | ddc_pin = child->common.ddc_pin; |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 953 | |
Ville Syrjälä | 78eb06c | 2013-11-01 20:32:07 +0200 | [diff] [blame] | 954 | is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; |
| 955 | is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; |
| 956 | is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT; |
| 957 | is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; |
| 958 | is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); |
Paulo Zanoni | 554d6af | 2013-09-12 17:10:11 -0300 | [diff] [blame] | 959 | |
Paulo Zanoni | 311a209 | 2013-09-12 17:12:18 -0300 | [diff] [blame] | 960 | info->supports_dvi = is_dvi; |
| 961 | info->supports_hdmi = is_hdmi; |
| 962 | info->supports_dp = is_dp; |
| 963 | |
Paulo Zanoni | 554d6af | 2013-09-12 17:10:11 -0300 | [diff] [blame] | 964 | DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n", |
| 965 | port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt); |
| 966 | |
| 967 | if (is_edp && is_dvi) |
| 968 | DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n", |
| 969 | port_name(port)); |
| 970 | if (is_crt && port != PORT_E) |
| 971 | DRM_DEBUG_KMS("Port %c is analog\n", port_name(port)); |
| 972 | if (is_crt && (is_dvi || is_dp)) |
| 973 | DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n", |
| 974 | port_name(port)); |
| 975 | if (is_dvi && (port == PORT_A || port == PORT_E)) |
Masanari Iida | 9b13494 | 2014-08-06 22:31:28 +0900 | [diff] [blame] | 976 | DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port)); |
Paulo Zanoni | 554d6af | 2013-09-12 17:10:11 -0300 | [diff] [blame] | 977 | if (!is_dvi && !is_dp && !is_crt) |
| 978 | DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n", |
| 979 | port_name(port)); |
| 980 | if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E)) |
| 981 | DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 982 | |
| 983 | if (is_dvi) { |
Xiong Zhang | 11c1b65 | 2015-08-17 16:04:04 +0800 | [diff] [blame] | 984 | if (port == PORT_E) { |
| 985 | info->alternate_ddc_pin = ddc_pin; |
| 986 | /* if DDIE share ddc pin with other port, then |
| 987 | * dvi/hdmi couldn't exist on the shared port. |
| 988 | * Otherwise they share the same ddc bin and system |
| 989 | * couldn't communicate with them seperately. */ |
| 990 | if (ddc_pin == DDC_PIN_B) { |
| 991 | dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0; |
| 992 | dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0; |
| 993 | } else if (ddc_pin == DDC_PIN_C) { |
| 994 | dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0; |
| 995 | dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0; |
| 996 | } else if (ddc_pin == DDC_PIN_D) { |
| 997 | dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0; |
| 998 | dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0; |
| 999 | } |
| 1000 | } else if (ddc_pin == DDC_PIN_B && port != PORT_B) |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 1001 | DRM_DEBUG_KMS("Unexpected DDC pin for port B\n"); |
Xiong Zhang | 11c1b65 | 2015-08-17 16:04:04 +0800 | [diff] [blame] | 1002 | else if (ddc_pin == DDC_PIN_C && port != PORT_C) |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 1003 | DRM_DEBUG_KMS("Unexpected DDC pin for port C\n"); |
Xiong Zhang | 11c1b65 | 2015-08-17 16:04:04 +0800 | [diff] [blame] | 1004 | else if (ddc_pin == DDC_PIN_D && port != PORT_D) |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 1005 | DRM_DEBUG_KMS("Unexpected DDC pin for port D\n"); |
| 1006 | } |
| 1007 | |
| 1008 | if (is_dp) { |
Rodrigo Vivi | 500ea70 | 2015-08-07 17:01:16 -0700 | [diff] [blame] | 1009 | if (port == PORT_E) { |
| 1010 | info->alternate_aux_channel = aux_channel; |
| 1011 | /* if DDIE share aux channel with other port, then |
| 1012 | * DP couldn't exist on the shared port. Otherwise |
| 1013 | * they share the same aux channel and system |
| 1014 | * couldn't communicate with them seperately. */ |
| 1015 | if (aux_channel == DP_AUX_A) |
| 1016 | dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0; |
| 1017 | else if (aux_channel == DP_AUX_B) |
| 1018 | dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0; |
| 1019 | else if (aux_channel == DP_AUX_C) |
| 1020 | dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0; |
| 1021 | else if (aux_channel == DP_AUX_D) |
| 1022 | dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0; |
| 1023 | } |
| 1024 | else if (aux_channel == DP_AUX_A && port != PORT_A) |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 1025 | DRM_DEBUG_KMS("Unexpected AUX channel for port A\n"); |
Rodrigo Vivi | 500ea70 | 2015-08-07 17:01:16 -0700 | [diff] [blame] | 1026 | else if (aux_channel == DP_AUX_B && port != PORT_B) |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 1027 | DRM_DEBUG_KMS("Unexpected AUX channel for port B\n"); |
Rodrigo Vivi | 500ea70 | 2015-08-07 17:01:16 -0700 | [diff] [blame] | 1028 | else if (aux_channel == DP_AUX_C && port != PORT_C) |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 1029 | DRM_DEBUG_KMS("Unexpected AUX channel for port C\n"); |
Rodrigo Vivi | 500ea70 | 2015-08-07 17:01:16 -0700 | [diff] [blame] | 1030 | else if (aux_channel == DP_AUX_D && port != PORT_D) |
Paulo Zanoni | 6bf19e7 | 2013-09-12 17:07:55 -0300 | [diff] [blame] | 1031 | DRM_DEBUG_KMS("Unexpected AUX channel for port D\n"); |
| 1032 | } |
| 1033 | |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1034 | if (bdb->version >= 158) { |
| 1035 | /* The VBT HDMI level shift values match the table we have. */ |
| 1036 | hdmi_level_shift = child->raw[7] & 0xF; |
Damien Lespiau | ce4dd49 | 2014-08-01 11:07:54 +0100 | [diff] [blame] | 1037 | DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n", |
| 1038 | port_name(port), |
| 1039 | hdmi_level_shift); |
| 1040 | info->hdmi_level_shift = hdmi_level_shift; |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1041 | } |
Antti Koskipaa | 75067dd | 2015-07-10 14:10:55 +0300 | [diff] [blame] | 1042 | |
| 1043 | /* Parse the I_boost config for SKL and above */ |
| 1044 | if (bdb->version >= 196 && (child->common.flags_1 & IBOOST_ENABLE)) { |
| 1045 | info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF); |
| 1046 | DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n", |
| 1047 | port_name(port), info->dp_boost_level); |
| 1048 | info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4); |
| 1049 | DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n", |
| 1050 | port_name(port), info->hdmi_boost_level); |
| 1051 | } |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1052 | } |
| 1053 | |
| 1054 | static void parse_ddi_ports(struct drm_i915_private *dev_priv, |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 1055 | const struct bdb_header *bdb) |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1056 | { |
| 1057 | struct drm_device *dev = dev_priv->dev; |
| 1058 | enum port port; |
| 1059 | |
| 1060 | if (!HAS_DDI(dev)) |
| 1061 | return; |
| 1062 | |
| 1063 | if (!dev_priv->vbt.child_dev_num) |
| 1064 | return; |
| 1065 | |
| 1066 | if (bdb->version < 155) |
| 1067 | return; |
| 1068 | |
| 1069 | for (port = PORT_A; port < I915_MAX_PORTS; port++) |
| 1070 | parse_ddi_port(dev_priv, port, bdb); |
| 1071 | } |
| 1072 | |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 1073 | static void |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1074 | parse_device_mapping(struct drm_i915_private *dev_priv, |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 1075 | const struct bdb_header *bdb) |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1076 | { |
Jani Nikula | e8ef3b4 | 2015-04-15 15:18:28 +0300 | [diff] [blame] | 1077 | const struct bdb_general_definitions *p_defs; |
| 1078 | const union child_device_config *p_child; |
| 1079 | union child_device_config *child_dev_ptr; |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1080 | int i, child_device_num, count; |
David Weinehall | e2d6cf7 | 2015-08-21 16:52:01 +0300 | [diff] [blame] | 1081 | u8 expected_size; |
| 1082 | u16 block_size; |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1083 | |
| 1084 | p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
| 1085 | if (!p_defs) { |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1086 | DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1087 | return; |
| 1088 | } |
David Weinehall | e2d6cf7 | 2015-08-21 16:52:01 +0300 | [diff] [blame] | 1089 | if (bdb->version < 195) { |
| 1090 | expected_size = sizeof(struct old_child_dev_config); |
| 1091 | } else if (bdb->version == 195) { |
| 1092 | expected_size = 37; |
| 1093 | } else if (bdb->version <= 197) { |
| 1094 | expected_size = 38; |
| 1095 | } else { |
| 1096 | expected_size = 38; |
| 1097 | BUILD_BUG_ON(sizeof(*p_child) < 38); |
| 1098 | DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n", |
| 1099 | bdb->version, expected_size); |
| 1100 | } |
| 1101 | |
| 1102 | /* The legacy sized child device config is the minimum we need. */ |
| 1103 | if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) { |
| 1104 | DRM_ERROR("Child device config size %u is too small.\n", |
| 1105 | p_defs->child_dev_size); |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1106 | return; |
| 1107 | } |
David Weinehall | e2d6cf7 | 2015-08-21 16:52:01 +0300 | [diff] [blame] | 1108 | |
| 1109 | /* Flag an error for unexpected size, but continue anyway. */ |
| 1110 | if (p_defs->child_dev_size != expected_size) |
| 1111 | DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n", |
| 1112 | p_defs->child_dev_size, expected_size, bdb->version); |
| 1113 | |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1114 | /* get the block size of general definitions */ |
| 1115 | block_size = get_blocksize(p_defs); |
| 1116 | /* get the number of child device */ |
| 1117 | child_device_num = (block_size - sizeof(*p_defs)) / |
Ville Syrjälä | 90e4f15 | 2015-03-25 18:45:58 +0200 | [diff] [blame] | 1118 | p_defs->child_dev_size; |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1119 | count = 0; |
| 1120 | /* get the number of child device that is present */ |
| 1121 | for (i = 0; i < child_device_num; i++) { |
Ville Syrjälä | 90e4f15 | 2015-03-25 18:45:58 +0200 | [diff] [blame] | 1122 | p_child = child_device_ptr(p_defs, i); |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 1123 | if (!p_child->common.device_type) { |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1124 | /* skip the device block if device type is invalid */ |
| 1125 | continue; |
| 1126 | } |
| 1127 | count++; |
| 1128 | } |
| 1129 | if (!count) { |
Akshay Joshi | 0206e35 | 2011-08-16 15:34:10 -0400 | [diff] [blame] | 1130 | DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1131 | return; |
| 1132 | } |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1133 | dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL); |
| 1134 | if (!dev_priv->vbt.child_dev) { |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1135 | DRM_DEBUG_KMS("No memory space for child device\n"); |
| 1136 | return; |
| 1137 | } |
| 1138 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1139 | dev_priv->vbt.child_dev_num = count; |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1140 | count = 0; |
| 1141 | for (i = 0; i < child_device_num; i++) { |
Ville Syrjälä | 90e4f15 | 2015-03-25 18:45:58 +0200 | [diff] [blame] | 1142 | p_child = child_device_ptr(p_defs, i); |
Paulo Zanoni | 768f69c | 2013-09-11 18:02:47 -0300 | [diff] [blame] | 1143 | if (!p_child->common.device_type) { |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1144 | /* skip the device block if device type is invalid */ |
| 1145 | continue; |
| 1146 | } |
Shobhit Kumar | 3e6bd01 | 2014-05-27 19:33:59 +0530 | [diff] [blame] | 1147 | |
| 1148 | if (p_child->common.dvo_port >= DVO_PORT_MIPIA |
| 1149 | && p_child->common.dvo_port <= DVO_PORT_MIPID |
| 1150 | &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) { |
| 1151 | DRM_DEBUG_KMS("Found MIPI as LFP\n"); |
| 1152 | dev_priv->vbt.has_mipi = 1; |
| 1153 | dev_priv->vbt.dsi.port = p_child->common.dvo_port; |
| 1154 | } |
| 1155 | |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1156 | child_dev_ptr = dev_priv->vbt.child_dev + count; |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1157 | count++; |
David Weinehall | e2d6cf7 | 2015-08-21 16:52:01 +0300 | [diff] [blame] | 1158 | |
| 1159 | /* |
| 1160 | * Copy as much as we know (sizeof) and is available |
| 1161 | * (child_dev_size) of the child device. Accessing the data must |
| 1162 | * depend on VBT version. |
| 1163 | */ |
| 1164 | memcpy(child_dev_ptr, p_child, |
| 1165 | min_t(size_t, p_defs->child_dev_size, sizeof(*p_child))); |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1166 | } |
| 1167 | return; |
| 1168 | } |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1169 | |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1170 | static void |
| 1171 | init_vbt_defaults(struct drm_i915_private *dev_priv) |
| 1172 | { |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 1173 | struct drm_device *dev = dev_priv->dev; |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1174 | enum port port; |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 1175 | |
Jani Nikula | 988c701 | 2015-03-27 00:20:19 +0200 | [diff] [blame] | 1176 | dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1177 | |
Jani Nikula | 56c4b63 | 2014-06-17 15:47:05 +0300 | [diff] [blame] | 1178 | /* Default to having backlight */ |
| 1179 | dev_priv->vbt.backlight.present = true; |
| 1180 | |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1181 | /* LFP panel data */ |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1182 | dev_priv->vbt.lvds_dither = 1; |
| 1183 | dev_priv->vbt.lvds_vbt = 0; |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1184 | |
| 1185 | /* SDVO panel data */ |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1186 | dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1187 | |
| 1188 | /* general features */ |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1189 | dev_priv->vbt.int_tv_support = 1; |
| 1190 | dev_priv->vbt.int_crt_support = 1; |
Bryan Freed | 9a4114f | 2011-01-12 13:38:39 -0800 | [diff] [blame] | 1191 | |
| 1192 | /* Default to using SSC */ |
Rodrigo Vivi | 41aa344 | 2013-05-09 20:03:18 -0300 | [diff] [blame] | 1193 | dev_priv->vbt.lvds_use_ssc = 1; |
Duncan Laurie | f69e515 | 2013-11-13 17:59:43 -0800 | [diff] [blame] | 1194 | /* |
| 1195 | * Core/SandyBridge/IvyBridge use alternative (120MHz) reference |
| 1196 | * clock for LVDS. |
| 1197 | */ |
| 1198 | dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev, |
| 1199 | !HAS_PCH_SPLIT(dev)); |
Ville Syrjälä | e91e941 | 2013-12-09 18:54:16 +0200 | [diff] [blame] | 1200 | DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq); |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1201 | |
| 1202 | for (port = PORT_A; port < I915_MAX_PORTS; port++) { |
Paulo Zanoni | 311a209 | 2013-09-12 17:12:18 -0300 | [diff] [blame] | 1203 | struct ddi_vbt_port_info *info = |
| 1204 | &dev_priv->vbt.ddi_port_info[port]; |
| 1205 | |
Damien Lespiau | ce4dd49 | 2014-08-01 11:07:54 +0100 | [diff] [blame] | 1206 | info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN; |
Paulo Zanoni | 311a209 | 2013-09-12 17:12:18 -0300 | [diff] [blame] | 1207 | |
| 1208 | info->supports_dvi = (port != PORT_A && port != PORT_E); |
| 1209 | info->supports_hdmi = info->supports_dvi; |
| 1210 | info->supports_dp = (port != PORT_E); |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1211 | } |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1212 | } |
| 1213 | |
Mathias Krause | bbe1c27 | 2014-08-27 18:41:19 +0200 | [diff] [blame] | 1214 | static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id) |
Daniel Vetter | 25e341c | 2012-03-24 23:51:30 +0100 | [diff] [blame] | 1215 | { |
| 1216 | DRM_DEBUG_KMS("Falling back to manually reading VBT from " |
| 1217 | "VBIOS ROM for %s\n", |
| 1218 | id->ident); |
| 1219 | return 1; |
| 1220 | } |
| 1221 | |
| 1222 | static const struct dmi_system_id intel_no_opregion_vbt[] = { |
| 1223 | { |
| 1224 | .callback = intel_no_opregion_vbt_callback, |
| 1225 | .ident = "ThinkCentre A57", |
| 1226 | .matches = { |
| 1227 | DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), |
| 1228 | DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"), |
| 1229 | }, |
| 1230 | }, |
| 1231 | { } |
| 1232 | }; |
| 1233 | |
Jani Nikula | acbb479 | 2015-05-13 15:34:05 +0300 | [diff] [blame] | 1234 | static const struct bdb_header *validate_vbt(const void __iomem *_base, |
| 1235 | size_t size, |
| 1236 | const void __iomem *_vbt, |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 1237 | const char *source) |
Chris Wilson | 3dd4e84 | 2014-04-18 18:04:22 -0300 | [diff] [blame] | 1238 | { |
Jani Nikula | acbb479 | 2015-05-13 15:34:05 +0300 | [diff] [blame] | 1239 | /* |
| 1240 | * This is the one place where we explicitly discard the address space |
| 1241 | * (__iomem) of the BIOS/VBT. (And this will cause a sparse complaint.) |
| 1242 | * From now on everything is based on 'base', and treated as regular |
| 1243 | * memory. |
| 1244 | */ |
| 1245 | const void *base = (const void *) _base; |
| 1246 | size_t offset = _vbt - _base; |
| 1247 | const struct vbt_header *vbt = base + offset; |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 1248 | const struct bdb_header *bdb; |
Chris Wilson | 3dd4e84 | 2014-04-18 18:04:22 -0300 | [diff] [blame] | 1249 | |
Chris Wilson | 3dd4e84 | 2014-04-18 18:04:22 -0300 | [diff] [blame] | 1250 | if (offset + sizeof(struct vbt_header) > size) { |
| 1251 | DRM_DEBUG_DRIVER("VBT header incomplete\n"); |
| 1252 | return NULL; |
| 1253 | } |
| 1254 | |
| 1255 | if (memcmp(vbt->signature, "$VBT", 4)) { |
| 1256 | DRM_DEBUG_DRIVER("VBT invalid signature\n"); |
| 1257 | return NULL; |
| 1258 | } |
| 1259 | |
| 1260 | offset += vbt->bdb_offset; |
| 1261 | if (offset + sizeof(struct bdb_header) > size) { |
| 1262 | DRM_DEBUG_DRIVER("BDB header incomplete\n"); |
| 1263 | return NULL; |
| 1264 | } |
| 1265 | |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 1266 | bdb = base + offset; |
Chris Wilson | 3dd4e84 | 2014-04-18 18:04:22 -0300 | [diff] [blame] | 1267 | if (offset + bdb->bdb_size > size) { |
| 1268 | DRM_DEBUG_DRIVER("BDB incomplete\n"); |
| 1269 | return NULL; |
| 1270 | } |
| 1271 | |
| 1272 | DRM_DEBUG_KMS("Using VBT from %s: %20s\n", |
| 1273 | source, vbt->signature); |
| 1274 | return bdb; |
| 1275 | } |
| 1276 | |
Jani Nikula | acbb479 | 2015-05-13 15:34:05 +0300 | [diff] [blame] | 1277 | static const struct bdb_header *find_vbt(void __iomem *bios, size_t size) |
Jani Nikula | b34a991 | 2015-05-13 15:34:04 +0300 | [diff] [blame] | 1278 | { |
| 1279 | const struct bdb_header *bdb = NULL; |
| 1280 | size_t i; |
| 1281 | |
| 1282 | /* Scour memory looking for the VBT signature. */ |
| 1283 | for (i = 0; i + 4 < size; i++) { |
Jani Nikula | acbb479 | 2015-05-13 15:34:05 +0300 | [diff] [blame] | 1284 | if (ioread32(bios + i) == *((const u32 *) "$VBT")) { |
Jani Nikula | b34a991 | 2015-05-13 15:34:04 +0300 | [diff] [blame] | 1285 | bdb = validate_vbt(bios, size, bios + i, "PCI ROM"); |
| 1286 | break; |
| 1287 | } |
| 1288 | } |
| 1289 | |
| 1290 | return bdb; |
| 1291 | } |
| 1292 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1293 | /** |
Bryan Freed | 6d139a8 | 2010-10-14 09:14:51 +0100 | [diff] [blame] | 1294 | * intel_parse_bios - find VBT and initialize settings from the BIOS |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1295 | * @dev: DRM device |
| 1296 | * |
| 1297 | * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers |
| 1298 | * to appropriate values. |
| 1299 | * |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1300 | * Returns 0 on success, nonzero on failure. |
| 1301 | */ |
Dan Carpenter | 0317c6c | 2012-06-27 12:10:30 +0300 | [diff] [blame] | 1302 | int |
Bryan Freed | 6d139a8 | 2010-10-14 09:14:51 +0100 | [diff] [blame] | 1303 | intel_parse_bios(struct drm_device *dev) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1304 | { |
| 1305 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1306 | struct pci_dev *pdev = dev->pdev; |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 1307 | const struct bdb_header *bdb = NULL; |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1308 | u8 __iomem *bios = NULL; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1309 | |
Ben Widawsky | ab5c608 | 2013-04-05 13:12:41 -0700 | [diff] [blame] | 1310 | if (HAS_PCH_NOP(dev)) |
| 1311 | return -ENODEV; |
| 1312 | |
Simon Que | 6a04002 | 2010-09-30 09:36:39 +0100 | [diff] [blame] | 1313 | init_vbt_defaults(dev_priv); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 1314 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1315 | /* XXX Should this validation be moved to intel_opregion.c? */ |
Chris Wilson | 3dd4e84 | 2014-04-18 18:04:22 -0300 | [diff] [blame] | 1316 | if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) |
Jani Nikula | dcb58a4 | 2015-05-12 15:41:32 +0300 | [diff] [blame] | 1317 | bdb = validate_vbt(dev_priv->opregion.header, OPREGION_SIZE, |
| 1318 | dev_priv->opregion.vbt, "OpRegion"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1319 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1320 | if (bdb == NULL) { |
Jani Nikula | b34a991 | 2015-05-13 15:34:04 +0300 | [diff] [blame] | 1321 | size_t size; |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1322 | |
| 1323 | bios = pci_map_rom(pdev, &size); |
| 1324 | if (!bios) |
| 1325 | return -1; |
| 1326 | |
Jani Nikula | b34a991 | 2015-05-13 15:34:04 +0300 | [diff] [blame] | 1327 | bdb = find_vbt(bios, size); |
Chris Wilson | 3dd4e84 | 2014-04-18 18:04:22 -0300 | [diff] [blame] | 1328 | if (!bdb) { |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1329 | pci_unmap_rom(pdev, bios); |
| 1330 | return -1; |
| 1331 | } |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1332 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1333 | |
| 1334 | /* Grab useful general definitions */ |
| 1335 | parse_general_features(dev_priv, bdb); |
David Müller (ELSOFT AG) | db54501 | 2009-08-29 08:54:45 +0200 | [diff] [blame] | 1336 | parse_general_definitions(dev_priv, bdb); |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 1337 | parse_lfp_panel_data(dev_priv, bdb); |
Jani Nikula | f00076d | 2013-12-14 20:38:29 -0200 | [diff] [blame] | 1338 | parse_lfp_backlight(dev_priv, bdb); |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 1339 | parse_sdvo_panel_data(dev_priv, bdb); |
yakui_zhao | 9b9d172 | 2009-05-31 17:17:17 +0800 | [diff] [blame] | 1340 | parse_sdvo_device_mapping(dev_priv, bdb); |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1341 | parse_device_mapping(dev_priv, bdb); |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 1342 | parse_driver_features(dev_priv, bdb); |
Zhenyu Wang | 500a8cc | 2010-01-13 11:19:52 +0800 | [diff] [blame] | 1343 | parse_edp(dev_priv, bdb); |
Rodrigo Vivi | bfd7ebd | 2014-11-14 08:52:30 -0800 | [diff] [blame] | 1344 | parse_psr(dev_priv, bdb); |
Shobhit Kumar | d17c544 | 2013-08-27 15:12:25 +0300 | [diff] [blame] | 1345 | parse_mipi(dev_priv, bdb); |
Paulo Zanoni | 6acab15 | 2013-09-12 17:06:24 -0300 | [diff] [blame] | 1346 | parse_ddi_ports(dev_priv, bdb); |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 1347 | |
Chris Wilson | 44834a6 | 2010-08-19 16:09:23 +0100 | [diff] [blame] | 1348 | if (bios) |
| 1349 | pci_unmap_rom(pdev, bios); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1350 | |
| 1351 | return 0; |
| 1352 | } |