| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can distribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License (Version 2) as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 11 | * for more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License along |
| 14 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 15 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
| 16 | */ |
| 17 | #ifndef _MIPS_SIMINT_H |
| 18 | #define _MIPS_SIMINT_H |
| 19 | |
| Atsushi Nemoto | 97dcb82 | 2007-01-08 02:14:29 +0900 | [diff] [blame] | 20 | #include <irq.h> |
| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 21 | |
| 22 | #define SIM_INT_BASE 0 |
| 23 | #define MIPSCPU_INT_MB0 2 |
| Atsushi Nemoto | 97dcb82 | 2007-01-08 02:14:29 +0900 | [diff] [blame] | 24 | #define MIPSCPU_INT_BASE MIPS_CPU_IRQ_BASE |
| Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 25 | #define MIPS_CPU_TIMER_IRQ 7 |
| 26 | |
| 27 | |
| 28 | #define MIPSCPU_INT_CPUCTR 7 |
| 29 | |
| 30 | #define MSC01E_INT_BASE 64 |
| 31 | |
| 32 | #define MIPSCPU_INT_CPUCTR 7 |
| 33 | #define MSC01E_INT_CPUCTR 11 |
| 34 | |
| 35 | #endif |