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Bard Liao997b0522013-06-11 13:10:16 +08001/*
Oder Chioub0c27842014-04-10 10:57:34 +08002 * rt5640.c -- RT5640/RT5639 ALSA SoC audio codec driver
Bard Liao997b0522013-06-11 13:10:16 +08003 *
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/gpio.h>
19#include <linux/i2c.h>
20#include <linux/regmap.h>
Sachin Kamataffb74a2014-04-04 11:29:11 +053021#include <linux/of.h>
Stephen Warrendcad9f02013-06-12 11:34:30 -060022#include <linux/of_gpio.h>
Bard Liao997b0522013-06-11 13:10:16 +080023#include <linux/platform_device.h>
24#include <linux/spi/spi.h>
Liam Girdwood02b80772013-09-13 17:57:36 +010025#include <linux/acpi.h>
Bard Liao997b0522013-06-11 13:10:16 +080026#include <sound/core.h>
27#include <sound/pcm.h>
28#include <sound/pcm_params.h>
29#include <sound/soc.h>
30#include <sound/soc-dapm.h>
31#include <sound/initval.h>
32#include <sound/tlv.h>
33
Oder Chiou49ef7922014-05-20 15:01:53 +080034#include "rl6231.h"
Bard Liao997b0522013-06-11 13:10:16 +080035#include "rt5640.h"
36
37#define RT5640_DEVICE_ID 0x6231
38
39#define RT5640_PR_RANGE_BASE (0xff + 1)
40#define RT5640_PR_SPACING 0x100
41
42#define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
43
44static const struct regmap_range_cfg rt5640_ranges[] = {
45 { .name = "PR", .range_min = RT5640_PR_BASE,
46 .range_max = RT5640_PR_BASE + 0xb4,
47 .selector_reg = RT5640_PRIV_INDEX,
48 .selector_mask = 0xff,
49 .selector_shift = 0x0,
50 .window_start = RT5640_PRIV_DATA,
51 .window_len = 0x1, },
52};
53
Nariman Poushin8019ff62015-07-16 16:36:21 +010054static const struct reg_sequence init_list[] = {
Bard Liao997b0522013-06-11 13:10:16 +080055 {RT5640_PR_BASE + 0x3d, 0x3600},
Bard Liao997b0522013-06-11 13:10:16 +080056 {RT5640_PR_BASE + 0x12, 0x0aa8},
57 {RT5640_PR_BASE + 0x14, 0x0aaa},
58 {RT5640_PR_BASE + 0x20, 0x6110},
59 {RT5640_PR_BASE + 0x21, 0xe0e0},
60 {RT5640_PR_BASE + 0x23, 0x1804},
61};
Bard Liao997b0522013-06-11 13:10:16 +080062
Oder Chiou2f2a7142014-03-28 20:28:25 +080063static const struct reg_default rt5640_reg[] = {
Bard Liao997b0522013-06-11 13:10:16 +080064 { 0x00, 0x000e },
65 { 0x01, 0xc8c8 },
66 { 0x02, 0xc8c8 },
67 { 0x03, 0xc8c8 },
68 { 0x04, 0x8000 },
69 { 0x0d, 0x0000 },
70 { 0x0e, 0x0000 },
71 { 0x0f, 0x0808 },
72 { 0x19, 0xafaf },
73 { 0x1a, 0xafaf },
74 { 0x1b, 0x0000 },
75 { 0x1c, 0x2f2f },
76 { 0x1d, 0x2f2f },
77 { 0x1e, 0x0000 },
78 { 0x27, 0x7060 },
79 { 0x28, 0x7070 },
80 { 0x29, 0x8080 },
81 { 0x2a, 0x5454 },
82 { 0x2b, 0x5454 },
83 { 0x2c, 0xaa00 },
84 { 0x2d, 0x0000 },
85 { 0x2e, 0xa000 },
86 { 0x2f, 0x0000 },
87 { 0x3b, 0x0000 },
88 { 0x3c, 0x007f },
89 { 0x3d, 0x0000 },
90 { 0x3e, 0x007f },
91 { 0x45, 0xe000 },
92 { 0x46, 0x003e },
93 { 0x47, 0x003e },
94 { 0x48, 0xf800 },
95 { 0x49, 0x3800 },
96 { 0x4a, 0x0004 },
97 { 0x4c, 0xfc00 },
98 { 0x4d, 0x0000 },
99 { 0x4f, 0x01ff },
100 { 0x50, 0x0000 },
101 { 0x51, 0x0000 },
102 { 0x52, 0x01ff },
103 { 0x53, 0xf000 },
104 { 0x61, 0x0000 },
105 { 0x62, 0x0000 },
106 { 0x63, 0x00c0 },
107 { 0x64, 0x0000 },
108 { 0x65, 0x0000 },
109 { 0x66, 0x0000 },
110 { 0x6a, 0x0000 },
111 { 0x6c, 0x0000 },
112 { 0x70, 0x8000 },
113 { 0x71, 0x8000 },
114 { 0x72, 0x8000 },
115 { 0x73, 0x1114 },
116 { 0x74, 0x0c00 },
117 { 0x75, 0x1d00 },
118 { 0x80, 0x0000 },
119 { 0x81, 0x0000 },
120 { 0x82, 0x0000 },
121 { 0x83, 0x0000 },
122 { 0x84, 0x0000 },
123 { 0x85, 0x0008 },
124 { 0x89, 0x0000 },
125 { 0x8a, 0x0000 },
126 { 0x8b, 0x0600 },
127 { 0x8c, 0x0228 },
128 { 0x8d, 0xa000 },
129 { 0x8e, 0x0004 },
130 { 0x8f, 0x1100 },
131 { 0x90, 0x0646 },
132 { 0x91, 0x0c00 },
133 { 0x92, 0x0000 },
134 { 0x93, 0x3000 },
135 { 0xb0, 0x2080 },
136 { 0xb1, 0x0000 },
137 { 0xb4, 0x2206 },
138 { 0xb5, 0x1f00 },
139 { 0xb6, 0x0000 },
140 { 0xb8, 0x034b },
141 { 0xb9, 0x0066 },
142 { 0xba, 0x000b },
143 { 0xbb, 0x0000 },
144 { 0xbc, 0x0000 },
145 { 0xbd, 0x0000 },
146 { 0xbe, 0x0000 },
147 { 0xbf, 0x0000 },
148 { 0xc0, 0x0400 },
149 { 0xc2, 0x0000 },
150 { 0xc4, 0x0000 },
151 { 0xc5, 0x0000 },
152 { 0xc6, 0x2000 },
153 { 0xc8, 0x0000 },
154 { 0xc9, 0x0000 },
155 { 0xca, 0x0000 },
156 { 0xcb, 0x0000 },
157 { 0xcc, 0x0000 },
158 { 0xcf, 0x0013 },
159 { 0xd0, 0x0680 },
160 { 0xd1, 0x1c17 },
161 { 0xd2, 0x8c00 },
162 { 0xd3, 0xaa20 },
163 { 0xd6, 0x0400 },
164 { 0xd9, 0x0809 },
165 { 0xfe, 0x10ec },
166 { 0xff, 0x6231 },
167};
168
169static int rt5640_reset(struct snd_soc_codec *codec)
170{
171 return snd_soc_write(codec, RT5640_RESET, 0);
172}
173
174static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
175{
176 int i;
177
178 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
179 if ((reg >= rt5640_ranges[i].window_start &&
180 reg <= rt5640_ranges[i].window_start +
181 rt5640_ranges[i].window_len) ||
182 (reg >= rt5640_ranges[i].range_min &&
183 reg <= rt5640_ranges[i].range_max))
184 return true;
185
186 switch (reg) {
187 case RT5640_RESET:
188 case RT5640_ASRC_5:
189 case RT5640_EQ_CTRL1:
190 case RT5640_DRC_AGC_1:
191 case RT5640_ANC_CTRL1:
192 case RT5640_IRQ_CTRL2:
193 case RT5640_INT_IRQ_ST:
194 case RT5640_DSP_CTRL2:
195 case RT5640_DSP_CTRL3:
196 case RT5640_PRIV_INDEX:
197 case RT5640_PRIV_DATA:
198 case RT5640_PGM_REG_ARR1:
199 case RT5640_PGM_REG_ARR3:
200 case RT5640_VENDOR_ID:
201 case RT5640_VENDOR_ID1:
202 case RT5640_VENDOR_ID2:
203 return true;
204 default:
205 return false;
206 }
207}
208
209static bool rt5640_readable_register(struct device *dev, unsigned int reg)
210{
211 int i;
212
213 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
214 if ((reg >= rt5640_ranges[i].window_start &&
215 reg <= rt5640_ranges[i].window_start +
216 rt5640_ranges[i].window_len) ||
217 (reg >= rt5640_ranges[i].range_min &&
218 reg <= rt5640_ranges[i].range_max))
219 return true;
220
221 switch (reg) {
222 case RT5640_RESET:
223 case RT5640_SPK_VOL:
224 case RT5640_HP_VOL:
225 case RT5640_OUTPUT:
226 case RT5640_MONO_OUT:
227 case RT5640_IN1_IN2:
228 case RT5640_IN3_IN4:
229 case RT5640_INL_INR_VOL:
230 case RT5640_DAC1_DIG_VOL:
231 case RT5640_DAC2_DIG_VOL:
232 case RT5640_DAC2_CTRL:
233 case RT5640_ADC_DIG_VOL:
234 case RT5640_ADC_DATA:
235 case RT5640_ADC_BST_VOL:
236 case RT5640_STO_ADC_MIXER:
237 case RT5640_MONO_ADC_MIXER:
238 case RT5640_AD_DA_MIXER:
239 case RT5640_STO_DAC_MIXER:
240 case RT5640_MONO_DAC_MIXER:
241 case RT5640_DIG_MIXER:
242 case RT5640_DSP_PATH1:
243 case RT5640_DSP_PATH2:
244 case RT5640_DIG_INF_DATA:
245 case RT5640_REC_L1_MIXER:
246 case RT5640_REC_L2_MIXER:
247 case RT5640_REC_R1_MIXER:
248 case RT5640_REC_R2_MIXER:
249 case RT5640_HPO_MIXER:
250 case RT5640_SPK_L_MIXER:
251 case RT5640_SPK_R_MIXER:
252 case RT5640_SPO_L_MIXER:
253 case RT5640_SPO_R_MIXER:
254 case RT5640_SPO_CLSD_RATIO:
255 case RT5640_MONO_MIXER:
256 case RT5640_OUT_L1_MIXER:
257 case RT5640_OUT_L2_MIXER:
258 case RT5640_OUT_L3_MIXER:
259 case RT5640_OUT_R1_MIXER:
260 case RT5640_OUT_R2_MIXER:
261 case RT5640_OUT_R3_MIXER:
262 case RT5640_LOUT_MIXER:
263 case RT5640_PWR_DIG1:
264 case RT5640_PWR_DIG2:
265 case RT5640_PWR_ANLG1:
266 case RT5640_PWR_ANLG2:
267 case RT5640_PWR_MIXER:
268 case RT5640_PWR_VOL:
269 case RT5640_PRIV_INDEX:
270 case RT5640_PRIV_DATA:
271 case RT5640_I2S1_SDP:
272 case RT5640_I2S2_SDP:
273 case RT5640_ADDA_CLK1:
274 case RT5640_ADDA_CLK2:
275 case RT5640_DMIC:
276 case RT5640_GLB_CLK:
277 case RT5640_PLL_CTRL1:
278 case RT5640_PLL_CTRL2:
279 case RT5640_ASRC_1:
280 case RT5640_ASRC_2:
281 case RT5640_ASRC_3:
282 case RT5640_ASRC_4:
283 case RT5640_ASRC_5:
284 case RT5640_HP_OVCD:
285 case RT5640_CLS_D_OVCD:
286 case RT5640_CLS_D_OUT:
287 case RT5640_DEPOP_M1:
288 case RT5640_DEPOP_M2:
289 case RT5640_DEPOP_M3:
290 case RT5640_CHARGE_PUMP:
291 case RT5640_PV_DET_SPK_G:
292 case RT5640_MICBIAS:
293 case RT5640_EQ_CTRL1:
294 case RT5640_EQ_CTRL2:
295 case RT5640_WIND_FILTER:
296 case RT5640_DRC_AGC_1:
297 case RT5640_DRC_AGC_2:
298 case RT5640_DRC_AGC_3:
299 case RT5640_SVOL_ZC:
300 case RT5640_ANC_CTRL1:
301 case RT5640_ANC_CTRL2:
302 case RT5640_ANC_CTRL3:
303 case RT5640_JD_CTRL:
304 case RT5640_ANC_JD:
305 case RT5640_IRQ_CTRL1:
306 case RT5640_IRQ_CTRL2:
307 case RT5640_INT_IRQ_ST:
308 case RT5640_GPIO_CTRL1:
309 case RT5640_GPIO_CTRL2:
310 case RT5640_GPIO_CTRL3:
311 case RT5640_DSP_CTRL1:
312 case RT5640_DSP_CTRL2:
313 case RT5640_DSP_CTRL3:
314 case RT5640_DSP_CTRL4:
315 case RT5640_PGM_REG_ARR1:
316 case RT5640_PGM_REG_ARR2:
317 case RT5640_PGM_REG_ARR3:
318 case RT5640_PGM_REG_ARR4:
319 case RT5640_PGM_REG_ARR5:
320 case RT5640_SCB_FUNC:
321 case RT5640_SCB_CTRL:
322 case RT5640_BASE_BACK:
323 case RT5640_MP3_PLUS1:
324 case RT5640_MP3_PLUS2:
325 case RT5640_3D_HP:
326 case RT5640_ADJ_HPF:
327 case RT5640_HP_CALIB_AMP_DET:
328 case RT5640_HP_CALIB2:
329 case RT5640_SV_ZCD1:
330 case RT5640_SV_ZCD2:
331 case RT5640_DUMMY1:
332 case RT5640_DUMMY2:
333 case RT5640_DUMMY3:
334 case RT5640_VENDOR_ID:
335 case RT5640_VENDOR_ID1:
336 case RT5640_VENDOR_ID2:
337 return true;
338 default:
339 return false;
340 }
341}
342
343static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
344static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
345static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
346static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
347static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
348
349/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
Lars-Peter Clausen82958222015-08-02 17:19:48 +0200350static const DECLARE_TLV_DB_RANGE(bst_tlv,
Bard Liao997b0522013-06-11 13:10:16 +0800351 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
352 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
353 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
354 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
355 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
356 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
Lars-Peter Clausen82958222015-08-02 17:19:48 +0200357 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
358);
Bard Liao997b0522013-06-11 13:10:16 +0800359
360/* Interface data select */
361static const char * const rt5640_data_select[] = {
362 "Normal", "left copy to right", "right copy to left", "Swap"};
363
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100364static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
365 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800366
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100367static SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
368 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800369
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100370static SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
371 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800372
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100373static SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
374 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
Bard Liao997b0522013-06-11 13:10:16 +0800375
376/* Class D speaker gain ratio */
377static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
378 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
379
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100380static SOC_ENUM_SINGLE_DECL(rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
381 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
Bard Liao997b0522013-06-11 13:10:16 +0800382
383static const struct snd_kcontrol_new rt5640_snd_controls[] = {
384 /* Speaker Output Volume */
Bard Liao997b0522013-06-11 13:10:16 +0800385 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
386 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
387 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
388 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
389 /* Headphone Output Volume */
Bard Liao997b0522013-06-11 13:10:16 +0800390 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
391 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
392 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
393 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
394 /* OUTPUT Control */
395 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
396 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
397 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
398 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
399 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
400 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
Oder Chiou022d21f2014-04-08 19:40:00 +0800401
Bard Liao997b0522013-06-11 13:10:16 +0800402 /* DAC Digital Volume */
403 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
404 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
405 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
406 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
407 175, 0, dac_vol_tlv),
Oder Chiou16566e42015-10-21 09:46:05 +0800408 /* IN1/IN2/IN3 Control */
Bard Liao997b0522013-06-11 13:10:16 +0800409 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
410 RT5640_BST_SFT1, 8, 0, bst_tlv),
411 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
412 RT5640_BST_SFT2, 8, 0, bst_tlv),
Oder Chiou16566e42015-10-21 09:46:05 +0800413 SOC_SINGLE_TLV("IN3 Boost", RT5640_IN1_IN2,
414 RT5640_BST_SFT2, 8, 0, bst_tlv),
415
Bard Liao997b0522013-06-11 13:10:16 +0800416 /* INL/INR Volume Control */
417 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
418 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
419 31, 1, in_vol_tlv),
420 /* ADC Digital Volume Control */
421 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
422 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
423 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
424 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
425 127, 0, adc_vol_tlv),
426 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
427 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
428 127, 0, adc_vol_tlv),
429 /* ADC Boost Volume Control */
430 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
431 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
432 3, 0, adc_bst_tlv),
433 /* Class D speaker gain ratio */
434 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
435
436 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
437 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
438 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
439 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
440};
441
Oder Chiou022d21f2014-04-08 19:40:00 +0800442static const struct snd_kcontrol_new rt5640_specific_snd_controls[] = {
443 /* MONO Output Control */
444 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT, RT5640_L_MUTE_SFT,
445 1, 1),
446
447 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
448 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 175, 0, dac_vol_tlv),
449};
450
Bard Liao997b0522013-06-11 13:10:16 +0800451/**
452 * set_dmic_clk - Set parameter of dmic.
453 *
454 * @w: DAPM widget.
455 * @kcontrol: The kcontrol of this widget.
456 * @event: Event id.
457 *
Bard Liao997b0522013-06-11 13:10:16 +0800458 */
459static int set_dmic_clk(struct snd_soc_dapm_widget *w,
460 struct snd_kcontrol *kcontrol, int event)
461{
Lars-Peter Clausenbb1cd602015-01-15 12:52:12 +0100462 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Bard Liao997b0522013-06-11 13:10:16 +0800463 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Oder Chiou00a6d6e52015-08-05 10:03:18 +0800464 int idx, rate;
Bard Liao997b0522013-06-11 13:10:16 +0800465
Oder Chiou00a6d6e52015-08-05 10:03:18 +0800466 rate = rt5640->sysclk / rl6231_get_pre_div(rt5640->regmap,
467 RT5640_ADDA_CLK1, RT5640_I2S_PD1_SFT);
468 idx = rl6231_calc_dmic_clk(rate);
Bard Liao997b0522013-06-11 13:10:16 +0800469 if (idx < 0)
470 dev_err(codec->dev, "Failed to set DMIC clock\n");
471 else
472 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
473 idx << RT5640_DMIC_CLK_SFT);
474 return idx;
475}
476
Oder Chiou218a3f92014-03-28 20:28:26 +0800477static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
Bard Liao997b0522013-06-11 13:10:16 +0800478 struct snd_soc_dapm_widget *sink)
479{
Lars-Peter Clausenbb1cd602015-01-15 12:52:12 +0100480 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
Bard Liao997b0522013-06-11 13:10:16 +0800481 unsigned int val;
482
Lars-Peter Clausenbb1cd602015-01-15 12:52:12 +0100483 val = snd_soc_read(codec, RT5640_GLB_CLK);
Bard Liao997b0522013-06-11 13:10:16 +0800484 val &= RT5640_SCLK_SRC_MASK;
Oder Chiouacf04e62014-03-28 20:28:27 +0800485 if (val == RT5640_SCLK_SRC_PLL1)
Bard Liao997b0522013-06-11 13:10:16 +0800486 return 1;
487 else
488 return 0;
489}
490
Jack Yubee3e022016-01-04 17:20:26 -0600491static int is_using_asrc(struct snd_soc_dapm_widget *source,
492 struct snd_soc_dapm_widget *sink)
493{
494 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
495 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
496
497 if (!rt5640->asrc_en)
498 return 0;
499
500 return 1;
501}
502
Bard Liao997b0522013-06-11 13:10:16 +0800503/* Digital Mixer */
504static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
505 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
506 RT5640_M_ADC_L1_SFT, 1, 1),
507 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
508 RT5640_M_ADC_L2_SFT, 1, 1),
509};
510
511static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
512 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
513 RT5640_M_ADC_R1_SFT, 1, 1),
514 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
515 RT5640_M_ADC_R2_SFT, 1, 1),
516};
517
518static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
519 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
520 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
521 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
522 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
523};
524
525static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
526 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
527 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
528 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
529 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
530};
531
532static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
533 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
534 RT5640_M_ADCMIX_L_SFT, 1, 1),
535 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
536 RT5640_M_IF1_DAC_L_SFT, 1, 1),
537};
538
539static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
540 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
541 RT5640_M_ADCMIX_R_SFT, 1, 1),
542 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
543 RT5640_M_IF1_DAC_R_SFT, 1, 1),
544};
545
546static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
547 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
548 RT5640_M_DAC_L1_SFT, 1, 1),
549 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
550 RT5640_M_DAC_L2_SFT, 1, 1),
551 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
552 RT5640_M_ANC_DAC_L_SFT, 1, 1),
553};
554
555static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
556 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
557 RT5640_M_DAC_R1_SFT, 1, 1),
558 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
559 RT5640_M_DAC_R2_SFT, 1, 1),
560 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
561 RT5640_M_ANC_DAC_R_SFT, 1, 1),
562};
563
Oder Chiou022d21f2014-04-08 19:40:00 +0800564static const struct snd_kcontrol_new rt5639_sto_dac_l_mix[] = {
565 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
566 RT5640_M_DAC_L1_SFT, 1, 1),
567 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
568 RT5640_M_DAC_L2_SFT, 1, 1),
569};
570
571static const struct snd_kcontrol_new rt5639_sto_dac_r_mix[] = {
572 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
573 RT5640_M_DAC_R1_SFT, 1, 1),
574 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
575 RT5640_M_DAC_R2_SFT, 1, 1),
576};
577
Bard Liao997b0522013-06-11 13:10:16 +0800578static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
579 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
580 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
581 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
582 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
583 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
584 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
585};
586
587static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
588 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
589 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
590 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
591 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
592 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
593 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
594};
595
596static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
597 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
598 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
599 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
600 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
601};
602
603static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
604 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
605 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
606 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
607 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
608};
609
610/* Analog Input Mixer */
611static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
612 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
613 RT5640_M_HP_L_RM_L_SFT, 1, 1),
614 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
615 RT5640_M_IN_L_RM_L_SFT, 1, 1),
Oder Chiou16566e42015-10-21 09:46:05 +0800616 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_L2_MIXER,
617 RT5640_M_BST2_RM_L_SFT, 1, 1),
Bard Liao997b0522013-06-11 13:10:16 +0800618 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
619 RT5640_M_BST4_RM_L_SFT, 1, 1),
620 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
621 RT5640_M_BST1_RM_L_SFT, 1, 1),
622 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
623 RT5640_M_OM_L_RM_L_SFT, 1, 1),
624};
625
626static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
627 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
628 RT5640_M_HP_R_RM_R_SFT, 1, 1),
629 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
630 RT5640_M_IN_R_RM_R_SFT, 1, 1),
Oder Chiou16566e42015-10-21 09:46:05 +0800631 SOC_DAPM_SINGLE("BST3 Switch", RT5640_REC_R2_MIXER,
632 RT5640_M_BST2_RM_R_SFT, 1, 1),
Bard Liao997b0522013-06-11 13:10:16 +0800633 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
634 RT5640_M_BST4_RM_R_SFT, 1, 1),
635 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
636 RT5640_M_BST1_RM_R_SFT, 1, 1),
637 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
638 RT5640_M_OM_R_RM_R_SFT, 1, 1),
639};
640
641/* Analog Output Mixer */
642static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
643 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
644 RT5640_M_RM_L_SM_L_SFT, 1, 1),
645 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
646 RT5640_M_IN_L_SM_L_SFT, 1, 1),
647 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
648 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
649 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
650 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
651 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
652 RT5640_M_OM_L_SM_L_SFT, 1, 1),
653};
654
655static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
656 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
657 RT5640_M_RM_R_SM_R_SFT, 1, 1),
658 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
659 RT5640_M_IN_R_SM_R_SFT, 1, 1),
660 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
661 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
662 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
663 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
664 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
665 RT5640_M_OM_R_SM_R_SFT, 1, 1),
666};
667
668static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
669 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
670 RT5640_M_SM_L_OM_L_SFT, 1, 1),
671 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
672 RT5640_M_BST1_OM_L_SFT, 1, 1),
673 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
674 RT5640_M_IN_L_OM_L_SFT, 1, 1),
675 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
676 RT5640_M_RM_L_OM_L_SFT, 1, 1),
677 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
678 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
679 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
680 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
681 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
682 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
683};
684
685static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
686 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
687 RT5640_M_SM_L_OM_R_SFT, 1, 1),
688 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
689 RT5640_M_BST4_OM_R_SFT, 1, 1),
690 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
691 RT5640_M_BST1_OM_R_SFT, 1, 1),
692 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
693 RT5640_M_IN_R_OM_R_SFT, 1, 1),
694 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
695 RT5640_M_RM_R_OM_R_SFT, 1, 1),
696 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
697 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
698 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
699 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
700 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
701 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
702};
703
Oder Chiou022d21f2014-04-08 19:40:00 +0800704static const struct snd_kcontrol_new rt5639_out_l_mix[] = {
705 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
706 RT5640_M_BST1_OM_L_SFT, 1, 1),
707 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
708 RT5640_M_IN_L_OM_L_SFT, 1, 1),
709 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
710 RT5640_M_RM_L_OM_L_SFT, 1, 1),
711 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
712 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
713};
714
715static const struct snd_kcontrol_new rt5639_out_r_mix[] = {
716 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
717 RT5640_M_BST4_OM_R_SFT, 1, 1),
718 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
719 RT5640_M_BST1_OM_R_SFT, 1, 1),
720 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
721 RT5640_M_IN_R_OM_R_SFT, 1, 1),
722 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
723 RT5640_M_RM_R_OM_R_SFT, 1, 1),
724 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
725 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
726};
727
Bard Liao997b0522013-06-11 13:10:16 +0800728static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
729 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
730 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
731 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
732 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
733 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
734 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
735 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
736 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
737 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
738 RT5640_M_BST1_SPM_L_SFT, 1, 1),
739};
740
741static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
742 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
743 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
744 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
745 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
746 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
747 RT5640_M_BST1_SPM_R_SFT, 1, 1),
748};
749
750static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
751 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
752 RT5640_M_DAC2_HM_SFT, 1, 1),
753 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
754 RT5640_M_DAC1_HM_SFT, 1, 1),
755 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
756 RT5640_M_HPVOL_HM_SFT, 1, 1),
757};
758
Oder Chiou022d21f2014-04-08 19:40:00 +0800759static const struct snd_kcontrol_new rt5639_hpo_mix[] = {
760 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
761 RT5640_M_DAC1_HM_SFT, 1, 1),
762 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
763 RT5640_M_HPVOL_HM_SFT, 1, 1),
764};
765
Bard Liao997b0522013-06-11 13:10:16 +0800766static const struct snd_kcontrol_new rt5640_lout_mix[] = {
767 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
768 RT5640_M_DAC_L1_LM_SFT, 1, 1),
769 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
770 RT5640_M_DAC_R1_LM_SFT, 1, 1),
771 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
772 RT5640_M_OV_L_LM_SFT, 1, 1),
773 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
774 RT5640_M_OV_R_LM_SFT, 1, 1),
775};
776
777static const struct snd_kcontrol_new rt5640_mono_mix[] = {
778 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
779 RT5640_M_DAC_R2_MM_SFT, 1, 1),
780 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
781 RT5640_M_DAC_L2_MM_SFT, 1, 1),
782 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
783 RT5640_M_OV_R_MM_SFT, 1, 1),
784 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
785 RT5640_M_OV_L_MM_SFT, 1, 1),
786 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
787 RT5640_M_BST1_MM_SFT, 1, 1),
788};
789
Bard Liao246693b2013-08-23 10:29:26 +0800790static const struct snd_kcontrol_new spk_l_enable_control =
791 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
792 RT5640_L_MUTE_SFT, 1, 1);
793
794static const struct snd_kcontrol_new spk_r_enable_control =
795 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
796 RT5640_R_MUTE_SFT, 1, 1);
797
798static const struct snd_kcontrol_new hp_l_enable_control =
799 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
800 RT5640_L_MUTE_SFT, 1, 1);
801
802static const struct snd_kcontrol_new hp_r_enable_control =
803 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
804 RT5640_R_MUTE_SFT, 1, 1);
805
Bard Liao997b0522013-06-11 13:10:16 +0800806/* Stereo ADC source */
807static const char * const rt5640_stereo_adc1_src[] = {
808 "DIG MIX", "ADC"
809};
810
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100811static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
812 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
Bard Liao997b0522013-06-11 13:10:16 +0800813
814static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
815 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
816
817static const char * const rt5640_stereo_adc2_src[] = {
818 "DMIC1", "DMIC2", "DIG MIX"
819};
820
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100821static SOC_ENUM_SINGLE_DECL(rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
822 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
Bard Liao997b0522013-06-11 13:10:16 +0800823
824static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
825 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
826
827/* Mono ADC source */
828static const char * const rt5640_mono_adc_l1_src[] = {
829 "Mono DAC MIXL", "ADCL"
830};
831
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100832static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
833 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
Bard Liao997b0522013-06-11 13:10:16 +0800834
835static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
836 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
837
838static const char * const rt5640_mono_adc_l2_src[] = {
839 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
840};
841
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100842static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
843 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
Bard Liao997b0522013-06-11 13:10:16 +0800844
845static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
846 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
847
848static const char * const rt5640_mono_adc_r1_src[] = {
849 "Mono DAC MIXR", "ADCR"
850};
851
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100852static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
853 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
Bard Liao997b0522013-06-11 13:10:16 +0800854
855static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
856 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
857
858static const char * const rt5640_mono_adc_r2_src[] = {
859 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
860};
861
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100862static SOC_ENUM_SINGLE_DECL(rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
863 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
Bard Liao997b0522013-06-11 13:10:16 +0800864
865static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
866 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
867
868/* DAC2 channel source */
869static const char * const rt5640_dac_l2_src[] = {
870 "IF2", "Base L/R"
871};
872
873static int rt5640_dac_l2_values[] = {
874 0,
875 3,
876};
877
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100878static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_l2_enum,
879 RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
880 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
Bard Liao997b0522013-06-11 13:10:16 +0800881
882static const struct snd_kcontrol_new rt5640_dac_l2_mux =
Lars-Peter Clausen712fb1c2014-04-14 21:31:02 +0200883 SOC_DAPM_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
Bard Liao997b0522013-06-11 13:10:16 +0800884
885static const char * const rt5640_dac_r2_src[] = {
886 "IF2",
887};
888
889static int rt5640_dac_r2_values[] = {
890 0,
891};
892
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100893static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dac_r2_enum,
894 RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
895 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
Bard Liao997b0522013-06-11 13:10:16 +0800896
897static const struct snd_kcontrol_new rt5640_dac_r2_mux =
898 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
899
900/* digital interface and iis interface map */
901static const char * const rt5640_dai_iis_map[] = {
902 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
903};
904
905static int rt5640_dai_iis_map_values[] = {
906 0,
907 5,
908 6,
909 7,
910};
911
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100912static SOC_VALUE_ENUM_SINGLE_DECL(rt5640_dai_iis_map_enum,
913 RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
914 0x7, rt5640_dai_iis_map,
915 rt5640_dai_iis_map_values);
Bard Liao997b0522013-06-11 13:10:16 +0800916
917static const struct snd_kcontrol_new rt5640_dai_mux =
Lars-Peter Clausen712fb1c2014-04-14 21:31:02 +0200918 SOC_DAPM_ENUM("DAI select", rt5640_dai_iis_map_enum);
Bard Liao997b0522013-06-11 13:10:16 +0800919
920/* SDI select */
921static const char * const rt5640_sdi_sel[] = {
922 "IF1", "IF2"
923};
924
Takashi Iwai4c03cb62014-02-18 09:43:21 +0100925static SOC_ENUM_SINGLE_DECL(rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
926 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
Bard Liao997b0522013-06-11 13:10:16 +0800927
928static const struct snd_kcontrol_new rt5640_sdi_mux =
929 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
930
Sachin Kamat89d05132013-09-13 15:22:18 +0530931static void hp_amp_power_on(struct snd_soc_codec *codec)
Bard Liao246693b2013-08-23 10:29:26 +0800932{
933 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
934
935 /* depop parameters */
936 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
937 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0200);
938 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
939 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
940 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
941 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
942 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
943 regmap_write(rt5640->regmap, RT5640_PR_BASE + RT5640_HP_DCC_INT1,
944 0x9f00);
945 /* headphone amp power on */
946 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
947 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
948 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
949 RT5640_PWR_HA,
950 RT5640_PWR_HA);
951 usleep_range(10000, 15000);
952 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
953 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
954 RT5640_PWR_FV1 | RT5640_PWR_FV2);
955}
956
957static void rt5640_pmu_depop(struct snd_soc_codec *codec)
958{
959 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
960
961 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
962 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
963 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
964 regmap_update_bits(rt5640->regmap, RT5640_CHARGE_PUMP,
965 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
966
967 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M3,
968 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
969 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
970 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
971 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
972
973 regmap_write(rt5640->regmap, RT5640_PR_BASE +
974 RT5640_MAMP_INT_REG2, 0x1c00);
975 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
976 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,
977 RT5640_HP_CP_PD | RT5640_HP_SG_EN);
978 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
979 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0400);
980}
981
982static int rt5640_hp_event(struct snd_soc_dapm_widget *w,
983 struct snd_kcontrol *kcontrol, int event)
984{
Lars-Peter Clausenbb1cd602015-01-15 12:52:12 +0100985 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Bard Liao246693b2013-08-23 10:29:26 +0800986 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
987
988 switch (event) {
989 case SND_SOC_DAPM_POST_PMU:
990 rt5640_pmu_depop(codec);
991 rt5640->hp_mute = 0;
992 break;
993
994 case SND_SOC_DAPM_PRE_PMD:
995 rt5640->hp_mute = 1;
996 usleep_range(70000, 75000);
997 break;
998
999 default:
1000 return 0;
1001 }
1002
1003 return 0;
1004}
1005
John Lin9b850ca2015-08-11 14:27:25 +08001006static int rt5640_lout_event(struct snd_soc_dapm_widget *w,
1007 struct snd_kcontrol *kcontrol, int event)
1008{
1009 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1010
1011 switch (event) {
1012 case SND_SOC_DAPM_POST_PMU:
1013 hp_amp_power_on(codec);
1014 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1015 RT5640_PWR_LM, RT5640_PWR_LM);
1016 snd_soc_update_bits(codec, RT5640_OUTPUT,
1017 RT5640_L_MUTE | RT5640_R_MUTE, 0);
1018 break;
1019
1020 case SND_SOC_DAPM_PRE_PMD:
1021 snd_soc_update_bits(codec, RT5640_OUTPUT,
1022 RT5640_L_MUTE | RT5640_R_MUTE,
1023 RT5640_L_MUTE | RT5640_R_MUTE);
1024 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1025 RT5640_PWR_LM, 0);
1026 break;
1027
1028 default:
1029 return 0;
1030 }
1031
1032 return 0;
1033}
1034
Bard Liao246693b2013-08-23 10:29:26 +08001035static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w,
1036 struct snd_kcontrol *kcontrol, int event)
1037{
Lars-Peter Clausenbb1cd602015-01-15 12:52:12 +01001038 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Bard Liao246693b2013-08-23 10:29:26 +08001039
1040 switch (event) {
1041 case SND_SOC_DAPM_POST_PMU:
1042 hp_amp_power_on(codec);
1043 break;
1044 default:
1045 return 0;
1046 }
1047
1048 return 0;
1049}
1050
1051static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,
1052 struct snd_kcontrol *kcontrol, int event)
1053{
Lars-Peter Clausenbb1cd602015-01-15 12:52:12 +01001054 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
Bard Liao246693b2013-08-23 10:29:26 +08001055 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1056
1057 switch (event) {
1058 case SND_SOC_DAPM_POST_PMU:
1059 if (!rt5640->hp_mute)
1060 usleep_range(80000, 85000);
1061
1062 break;
1063
1064 default:
1065 return 0;
1066 }
1067
1068 return 0;
1069}
1070
Bard Liao997b0522013-06-11 13:10:16 +08001071static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1072 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1073 RT5640_PWR_PLL_BIT, 0, NULL, 0),
Jack Yubee3e022016-01-04 17:20:26 -06001074
1075 /* ASRC */
1076 SND_SOC_DAPM_SUPPLY_S("Stereo Filter ASRC", 1, RT5640_ASRC_1,
1077 15, 0, NULL, 0),
1078 SND_SOC_DAPM_SUPPLY_S("I2S2 Filter ASRC", 1, RT5640_ASRC_1,
1079 12, 0, NULL, 0),
1080 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5640_ASRC_1,
1081 11, 0, NULL, 0),
1082 SND_SOC_DAPM_SUPPLY_S("DMIC1 ASRC", 1, RT5640_ASRC_1,
1083 9, 0, NULL, 0),
1084 SND_SOC_DAPM_SUPPLY_S("DMIC2 ASRC", 1, RT5640_ASRC_1,
1085 8, 0, NULL, 0),
1086
1087
Bard Liao997b0522013-06-11 13:10:16 +08001088 /* Input Side */
1089 /* micbias */
1090 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1091 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1092 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
Stephen Warren9be94ae2013-06-12 15:34:23 -06001093 RT5640_PWR_MB1_BIT, 0, NULL, 0),
Bard Liao997b0522013-06-11 13:10:16 +08001094 /* Input Lines */
1095 SND_SOC_DAPM_INPUT("DMIC1"),
1096 SND_SOC_DAPM_INPUT("DMIC2"),
1097 SND_SOC_DAPM_INPUT("IN1P"),
1098 SND_SOC_DAPM_INPUT("IN1N"),
1099 SND_SOC_DAPM_INPUT("IN2P"),
1100 SND_SOC_DAPM_INPUT("IN2N"),
Oder Chiou16566e42015-10-21 09:46:05 +08001101 SND_SOC_DAPM_INPUT("IN3P"),
1102 SND_SOC_DAPM_INPUT("IN3N"),
Bard Liao997b0522013-06-11 13:10:16 +08001103 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
1104 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1105 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
1106 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1107
1108 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1109 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
Oder Chiou71d97a792014-03-28 10:46:18 +08001110 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC, RT5640_DMIC_1_EN_SFT, 0,
1111 NULL, 0),
1112 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC, RT5640_DMIC_2_EN_SFT, 0,
1113 NULL, 0),
Bard Liao997b0522013-06-11 13:10:16 +08001114 /* Boost */
1115 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1116 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1117 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1118 RT5640_PWR_BST4_BIT, 0, NULL, 0),
Oder Chiou16566e42015-10-21 09:46:05 +08001119 SND_SOC_DAPM_PGA("BST3", RT5640_PWR_ANLG2,
1120 RT5640_PWR_BST2_BIT, 0, NULL, 0),
Bard Liao997b0522013-06-11 13:10:16 +08001121 /* Input Volume */
1122 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1123 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1124 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1125 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
Bard Liao997b0522013-06-11 13:10:16 +08001126 /* REC Mixer */
1127 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1128 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1129 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1130 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1131 /* ADCs */
1132 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1133 RT5640_PWR_ADC_L_BIT, 0),
1134 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1135 RT5640_PWR_ADC_R_BIT, 0),
1136 /* ADC Mux */
1137 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1138 &rt5640_sto_adc_2_mux),
1139 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1140 &rt5640_sto_adc_2_mux),
1141 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1142 &rt5640_sto_adc_1_mux),
1143 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1144 &rt5640_sto_adc_1_mux),
1145 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1146 &rt5640_mono_adc_l2_mux),
1147 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1148 &rt5640_mono_adc_l1_mux),
1149 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1150 &rt5640_mono_adc_r1_mux),
1151 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1152 &rt5640_mono_adc_r2_mux),
1153 /* ADC Mixer */
1154 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1155 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1156 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1157 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1158 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1159 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1160 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1161 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1162 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1163 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1164 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1165 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1166 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1167 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1168
1169 /* Digital Interface */
1170 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1171 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1172 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1173 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1174 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1175 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1176 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1177 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1178 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1179 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1180 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1181 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1182 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1183 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1184 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1185 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1186 /* Digital Interface Select */
1187 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1188 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1189 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1190 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1191 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1192 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1193 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1194 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1195 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1196 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1197 /* Audio Interface */
1198 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1199 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1200 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1201 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
Oder Chiou022d21f2014-04-08 19:40:00 +08001202
Bard Liao997b0522013-06-11 13:10:16 +08001203 /* Output Side */
1204 /* DAC mixer before sound effect */
1205 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1206 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1207 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1208 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
Oder Chiou022d21f2014-04-08 19:40:00 +08001209
Bard Liao997b0522013-06-11 13:10:16 +08001210 /* DAC Mixer */
Bard Liao997b0522013-06-11 13:10:16 +08001211 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1212 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1213 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1214 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1215 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1216 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1217 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1218 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1219 /* DACs */
Bard Liao57586fb2016-03-07 15:09:38 +08001220 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM,
1221 0, 0),
1222 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM,
1223 0, 0),
1224 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5640_PWR_DIG1,
1225 RT5640_PWR_DAC_L1_BIT, 0, NULL, 0),
1226 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5640_PWR_DIG1,
1227 RT5640_PWR_DAC_R1_BIT, 0, NULL, 0),
Bard Liao997b0522013-06-11 13:10:16 +08001228 /* SPK/OUT Mixer */
1229 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1230 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1231 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1232 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
Bard Liao997b0522013-06-11 13:10:16 +08001233 /* Ouput Volume */
1234 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1235 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1236 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1237 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1238 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1239 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1240 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1241 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1242 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1243 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1244 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1245 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1246 /* SPO/HPO/LOUT/Mono Mixer */
1247 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1248 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1249 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1250 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
John Lin9b850ca2015-08-11 14:27:25 +08001251 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
Bard Liao997b0522013-06-11 13:10:16 +08001252 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
Bard Liao246693b2013-08-23 10:29:26 +08001253 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,
1254 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),
1255 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1256 rt5640_hp_event,
1257 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
John Lin9b850ca2015-08-11 14:27:25 +08001258 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
1259 rt5640_lout_event,
1260 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
Bard Liao246693b2013-08-23 10:29:26 +08001261 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1,
Bard Liao997b0522013-06-11 13:10:16 +08001262 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
Bard Liao246693b2013-08-23 10:29:26 +08001263 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1,
Bard Liao997b0522013-06-11 13:10:16 +08001264 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1265 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
Bard Liao246693b2013-08-23 10:29:26 +08001266 RT5640_PWR_CLS_D_BIT, 0, NULL, 0),
1267
1268 /* Output Switch */
1269 SND_SOC_DAPM_SWITCH("Speaker L Playback", SND_SOC_NOPM, 0, 0,
1270 &spk_l_enable_control),
1271 SND_SOC_DAPM_SWITCH("Speaker R Playback", SND_SOC_NOPM, 0, 0,
1272 &spk_r_enable_control),
1273 SND_SOC_DAPM_SWITCH("HP L Playback", SND_SOC_NOPM, 0, 0,
1274 &hp_l_enable_control),
1275 SND_SOC_DAPM_SWITCH("HP R Playback", SND_SOC_NOPM, 0, 0,
1276 &hp_r_enable_control),
1277 SND_SOC_DAPM_POST("HP Post", rt5640_hp_post_event),
Bard Liao997b0522013-06-11 13:10:16 +08001278 /* Output Lines */
1279 SND_SOC_DAPM_OUTPUT("SPOLP"),
1280 SND_SOC_DAPM_OUTPUT("SPOLN"),
1281 SND_SOC_DAPM_OUTPUT("SPORP"),
1282 SND_SOC_DAPM_OUTPUT("SPORN"),
1283 SND_SOC_DAPM_OUTPUT("HPOL"),
1284 SND_SOC_DAPM_OUTPUT("HPOR"),
1285 SND_SOC_DAPM_OUTPUT("LOUTL"),
1286 SND_SOC_DAPM_OUTPUT("LOUTR"),
Oder Chiou022d21f2014-04-08 19:40:00 +08001287};
1288
1289static const struct snd_soc_dapm_widget rt5640_specific_dapm_widgets[] = {
1290 /* Audio DSP */
1291 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1292 /* ANC */
1293 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1294
1295 /* DAC2 channel Mux */
1296 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_l2_mux),
1297 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dac_r2_mux),
1298
1299 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1300 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1301 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1302 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1303
Bard Liao57586fb2016-03-07 15:09:38 +08001304 SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0,
Oder Chiou022d21f2014-04-08 19:40:00 +08001305 0),
Bard Liao57586fb2016-03-07 15:09:38 +08001306 SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0,
Oder Chiou022d21f2014-04-08 19:40:00 +08001307 0),
1308
1309 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1310 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1311 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1312 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1313
1314 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1315 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1316 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1317 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1318
1319 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1320 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1321 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1322 RT5640_PWR_MA_BIT, 0, NULL, 0),
Bard Liao57586fb2016-03-07 15:09:38 +08001323 SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5640_PWR_DIG1,
1324 RT5640_PWR_DAC_L2_BIT, 0, NULL, 0),
1325 SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5640_PWR_DIG1,
1326 RT5640_PWR_DAC_R2_BIT, 0, NULL, 0),
Oder Chiou022d21f2014-04-08 19:40:00 +08001327
Bard Liao997b0522013-06-11 13:10:16 +08001328 SND_SOC_DAPM_OUTPUT("MONOP"),
1329 SND_SOC_DAPM_OUTPUT("MONON"),
1330};
1331
Oder Chiou022d21f2014-04-08 19:40:00 +08001332static const struct snd_soc_dapm_widget rt5639_specific_dapm_widgets[] = {
1333 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1334 rt5639_sto_dac_l_mix, ARRAY_SIZE(rt5639_sto_dac_l_mix)),
1335 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1336 rt5639_sto_dac_r_mix, ARRAY_SIZE(rt5639_sto_dac_r_mix)),
1337
Oder Chiou022d21f2014-04-08 19:40:00 +08001338 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1339 0, rt5639_out_l_mix, ARRAY_SIZE(rt5639_out_l_mix)),
1340 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1341 0, rt5639_out_r_mix, ARRAY_SIZE(rt5639_out_r_mix)),
1342
1343 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1344 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1345 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1346 rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
1347};
1348
Bard Liao997b0522013-06-11 13:10:16 +08001349static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
Jack Yubee3e022016-01-04 17:20:26 -06001350 { "I2S1", NULL, "Stereo Filter ASRC", is_using_asrc },
1351 { "I2S2", NULL, "I2S2 ASRC", is_using_asrc },
1352 { "I2S2", NULL, "I2S2 Filter ASRC", is_using_asrc },
1353 { "DMIC1", NULL, "DMIC1 ASRC", is_using_asrc },
1354 { "DMIC2", NULL, "DMIC2 ASRC", is_using_asrc },
1355
Bard Liao997b0522013-06-11 13:10:16 +08001356 {"IN1P", NULL, "LDO2"},
1357 {"IN2P", NULL, "LDO2"},
Oder Chiou16566e42015-10-21 09:46:05 +08001358 {"IN3P", NULL, "LDO2"},
Bard Liao997b0522013-06-11 13:10:16 +08001359
1360 {"DMIC L1", NULL, "DMIC1"},
1361 {"DMIC R1", NULL, "DMIC1"},
1362 {"DMIC L2", NULL, "DMIC2"},
1363 {"DMIC R2", NULL, "DMIC2"},
1364
1365 {"BST1", NULL, "IN1P"},
1366 {"BST1", NULL, "IN1N"},
1367 {"BST2", NULL, "IN2P"},
1368 {"BST2", NULL, "IN2N"},
Oder Chiou16566e42015-10-21 09:46:05 +08001369 {"BST3", NULL, "IN3P"},
1370 {"BST3", NULL, "IN3N"},
Bard Liao997b0522013-06-11 13:10:16 +08001371
1372 {"INL VOL", NULL, "IN2P"},
1373 {"INR VOL", NULL, "IN2N"},
1374
1375 {"RECMIXL", "HPOL Switch", "HPOL"},
1376 {"RECMIXL", "INL Switch", "INL VOL"},
Oder Chiou16566e42015-10-21 09:46:05 +08001377 {"RECMIXL", "BST3 Switch", "BST3"},
Bard Liao997b0522013-06-11 13:10:16 +08001378 {"RECMIXL", "BST2 Switch", "BST2"},
1379 {"RECMIXL", "BST1 Switch", "BST1"},
1380 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1381
1382 {"RECMIXR", "HPOR Switch", "HPOR"},
1383 {"RECMIXR", "INR Switch", "INR VOL"},
Oder Chiou16566e42015-10-21 09:46:05 +08001384 {"RECMIXR", "BST3 Switch", "BST3"},
Bard Liao997b0522013-06-11 13:10:16 +08001385 {"RECMIXR", "BST2 Switch", "BST2"},
1386 {"RECMIXR", "BST1 Switch", "BST1"},
1387 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1388
1389 {"ADC L", NULL, "RECMIXL"},
1390 {"ADC R", NULL, "RECMIXR"},
1391
1392 {"DMIC L1", NULL, "DMIC CLK"},
1393 {"DMIC L1", NULL, "DMIC1 Power"},
1394 {"DMIC R1", NULL, "DMIC CLK"},
1395 {"DMIC R1", NULL, "DMIC1 Power"},
1396 {"DMIC L2", NULL, "DMIC CLK"},
1397 {"DMIC L2", NULL, "DMIC2 Power"},
1398 {"DMIC R2", NULL, "DMIC CLK"},
1399 {"DMIC R2", NULL, "DMIC2 Power"},
1400
1401 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1402 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1403 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1404 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1405 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1406
1407 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1408 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1409 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1410 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1411 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1412
1413 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1414 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1415 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1416 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1417 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1418
1419 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1420 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1421 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1422 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1423 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1424
1425 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1426 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1427 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001428 {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao997b0522013-06-11 13:10:16 +08001429
1430 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1431 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1432 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001433 {"Stereo Filter", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao997b0522013-06-11 13:10:16 +08001434
1435 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1436 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1437 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001438 {"Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao997b0522013-06-11 13:10:16 +08001439
1440 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1441 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1442 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001443 {"Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao997b0522013-06-11 13:10:16 +08001444
1445 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1446 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
1447 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1448 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1449
1450 {"IF1 ADC", NULL, "I2S1"},
1451 {"IF1 ADC", NULL, "IF1 ADC L"},
1452 {"IF1 ADC", NULL, "IF1 ADC R"},
1453 {"IF2 ADC", NULL, "I2S2"},
1454 {"IF2 ADC", NULL, "IF2 ADC L"},
1455 {"IF2 ADC", NULL, "IF2 ADC R"},
1456
1457 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1458 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1459 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1460 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1461 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1462 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1463
1464 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1465 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1466 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1467 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1468 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1469 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1470
1471 {"AIF1TX", NULL, "DAI1 TX Mux"},
1472 {"AIF1TX", NULL, "SDI1 TX Mux"},
1473 {"AIF2TX", NULL, "DAI2 TX Mux"},
1474 {"AIF2TX", NULL, "SDI2 TX Mux"},
1475
1476 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1477 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1478 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1479 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1480
1481 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1482 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1483 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1484 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1485
1486 {"IF1 DAC", NULL, "I2S1"},
1487 {"IF1 DAC", NULL, "DAI1 RX Mux"},
1488 {"IF2 DAC", NULL, "I2S2"},
1489 {"IF2 DAC", NULL, "DAI2 RX Mux"},
1490
1491 {"IF1 DAC L", NULL, "IF1 DAC"},
1492 {"IF1 DAC R", NULL, "IF1 DAC"},
1493 {"IF2 DAC L", NULL, "IF2 DAC"},
1494 {"IF2 DAC R", NULL, "IF2 DAC"},
1495
1496 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1497 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
Bard Liao57586fb2016-03-07 15:09:38 +08001498 {"DAC MIXL", NULL, "DAC L1 Power"},
Bard Liao997b0522013-06-11 13:10:16 +08001499 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1500 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
Bard Liao57586fb2016-03-07 15:09:38 +08001501 {"DAC MIXR", NULL, "DAC R1 Power"},
Bard Liao997b0522013-06-11 13:10:16 +08001502
Bard Liao997b0522013-06-11 13:10:16 +08001503 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
Bard Liao997b0522013-06-11 13:10:16 +08001504 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
Bard Liao997b0522013-06-11 13:10:16 +08001505
1506 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
Bard Liao997b0522013-06-11 13:10:16 +08001507 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
Bard Liao997b0522013-06-11 13:10:16 +08001508
1509 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
Bard Liao997b0522013-06-11 13:10:16 +08001510 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
Bard Liao997b0522013-06-11 13:10:16 +08001511
1512 {"DAC L1", NULL, "Stereo DAC MIXL"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001513 {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao57586fb2016-03-07 15:09:38 +08001514 {"DAC L1", NULL, "DAC L1 Power"},
Bard Liao997b0522013-06-11 13:10:16 +08001515 {"DAC R1", NULL, "Stereo DAC MIXR"},
Oder Chiou218a3f92014-03-28 20:28:26 +08001516 {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao57586fb2016-03-07 15:09:38 +08001517 {"DAC R1", NULL, "DAC R1 Power"},
Bard Liao997b0522013-06-11 13:10:16 +08001518
1519 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1520 {"SPK MIXL", "INL Switch", "INL VOL"},
1521 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
Bard Liao997b0522013-06-11 13:10:16 +08001522 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1523 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1524 {"SPK MIXR", "INR Switch", "INR VOL"},
1525 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
Bard Liao997b0522013-06-11 13:10:16 +08001526 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1527
Bard Liao997b0522013-06-11 13:10:16 +08001528 {"OUT MIXL", "BST1 Switch", "BST1"},
1529 {"OUT MIXL", "INL Switch", "INL VOL"},
1530 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
Bard Liao997b0522013-06-11 13:10:16 +08001531 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1532
Bard Liao997b0522013-06-11 13:10:16 +08001533 {"OUT MIXR", "BST2 Switch", "BST2"},
1534 {"OUT MIXR", "BST1 Switch", "BST1"},
1535 {"OUT MIXR", "INR Switch", "INR VOL"},
1536 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
Bard Liao997b0522013-06-11 13:10:16 +08001537 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1538
1539 {"SPKVOL L", NULL, "SPK MIXL"},
1540 {"SPKVOL R", NULL, "SPK MIXR"},
1541 {"HPOVOL L", NULL, "OUT MIXL"},
1542 {"HPOVOL R", NULL, "OUT MIXR"},
1543 {"OUTVOL L", NULL, "OUT MIXL"},
1544 {"OUTVOL R", NULL, "OUT MIXR"},
1545
1546 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1547 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1548 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1549 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1550 {"SPOL MIX", "BST1 Switch", "BST1"},
1551 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1552 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1553 {"SPOR MIX", "BST1 Switch", "BST1"},
1554
Bard Liao997b0522013-06-11 13:10:16 +08001555 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1556 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
Bard Liao246693b2013-08-23 10:29:26 +08001557 {"HPO MIX L", NULL, "HP L Amp"},
Bard Liao997b0522013-06-11 13:10:16 +08001558 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1559 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
Bard Liao246693b2013-08-23 10:29:26 +08001560 {"HPO MIX R", NULL, "HP R Amp"},
Bard Liao997b0522013-06-11 13:10:16 +08001561
1562 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1563 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1564 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1565 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1566
Bard Liao246693b2013-08-23 10:29:26 +08001567 {"HP Amp", NULL, "HPO MIX L"},
1568 {"HP Amp", NULL, "HPO MIX R"},
Bard Liao997b0522013-06-11 13:10:16 +08001569
Bard Liao246693b2013-08-23 10:29:26 +08001570 {"Speaker L Playback", "Switch", "SPOL MIX"},
1571 {"Speaker R Playback", "Switch", "SPOR MIX"},
1572 {"SPOLP", NULL, "Speaker L Playback"},
1573 {"SPOLN", NULL, "Speaker L Playback"},
1574 {"SPORP", NULL, "Speaker R Playback"},
1575 {"SPORN", NULL, "Speaker R Playback"},
Bard Liao997b0522013-06-11 13:10:16 +08001576
1577 {"SPOLP", NULL, "Improve SPK Amp Drv"},
1578 {"SPOLN", NULL, "Improve SPK Amp Drv"},
1579 {"SPORP", NULL, "Improve SPK Amp Drv"},
1580 {"SPORN", NULL, "Improve SPK Amp Drv"},
1581
1582 {"HPOL", NULL, "Improve HP Amp Drv"},
1583 {"HPOR", NULL, "Improve HP Amp Drv"},
1584
Bard Liao246693b2013-08-23 10:29:26 +08001585 {"HP L Playback", "Switch", "HP Amp"},
1586 {"HP R Playback", "Switch", "HP Amp"},
1587 {"HPOL", NULL, "HP L Playback"},
1588 {"HPOR", NULL, "HP R Playback"},
John Lin9b850ca2015-08-11 14:27:25 +08001589
1590 {"LOUT amp", NULL, "LOUT MIX"},
1591 {"LOUTL", NULL, "LOUT amp"},
1592 {"LOUTR", NULL, "LOUT amp"},
Oder Chiou022d21f2014-04-08 19:40:00 +08001593};
1594
1595static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = {
1596 {"ANC", NULL, "Stereo ADC MIXL"},
1597 {"ANC", NULL, "Stereo ADC MIXR"},
1598
1599 {"Audio DSP", NULL, "DAC MIXL"},
1600 {"Audio DSP", NULL, "DAC MIXR"},
1601
1602 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1603 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
Bard Liao57586fb2016-03-07 15:09:38 +08001604 {"DAC L2 Mux", NULL, "DAC L2 Power"},
Oder Chiou022d21f2014-04-08 19:40:00 +08001605 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
Bard Liao57586fb2016-03-07 15:09:38 +08001606 {"DAC R2 Mux", NULL, "DAC R2 Power"},
Oder Chiou022d21f2014-04-08 19:40:00 +08001607
1608 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1609 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1610 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1611 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1612
1613 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1614 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1615
1616 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1617 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1618
1619 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1620 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1621
1622 {"DAC L2", NULL, "Mono DAC MIXL"},
1623 {"DAC L2", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao57586fb2016-03-07 15:09:38 +08001624 {"DAC L2", NULL, "DAC L2 Power"},
Oder Chiou022d21f2014-04-08 19:40:00 +08001625 {"DAC R2", NULL, "Mono DAC MIXR"},
1626 {"DAC R2", NULL, "PLL1", is_sys_clk_from_pll},
Bard Liao57586fb2016-03-07 15:09:38 +08001627 {"DAC R2", NULL, "DAC R2 Power"},
Oder Chiou022d21f2014-04-08 19:40:00 +08001628
1629 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1630 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1631
1632 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1633 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1634
1635 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1636 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1637
1638 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1639 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1640
1641 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1642 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1643
1644 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1645 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1646 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1647 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1648 {"Mono MIX", "BST1 Switch", "BST1"},
1649
Bard Liao997b0522013-06-11 13:10:16 +08001650 {"MONOP", NULL, "Mono MIX"},
1651 {"MONON", NULL, "Mono MIX"},
1652 {"MONOP", NULL, "Improve MONO Amp Drv"},
1653};
1654
Oder Chiou022d21f2014-04-08 19:40:00 +08001655static const struct snd_soc_dapm_route rt5639_specific_dapm_routes[] = {
1656 {"Stereo DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1657 {"Stereo DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1658
1659 {"Mono DAC MIXL", "DAC L2 Switch", "IF2 DAC L"},
1660 {"Mono DAC MIXL", "DAC R2 Switch", "IF2 DAC R"},
1661
1662 {"Mono DAC MIXR", "DAC R2 Switch", "IF2 DAC R"},
1663 {"Mono DAC MIXR", "DAC L2 Switch", "IF2 DAC L"},
1664
1665 {"DIG MIXL", "DAC L2 Switch", "IF2 DAC L"},
1666 {"DIG MIXR", "DAC R2 Switch", "IF2 DAC R"},
1667
Bard Liao57586fb2016-03-07 15:09:38 +08001668 {"IF2 DAC L", NULL, "DAC L2 Power"},
1669 {"IF2 DAC R", NULL, "DAC R2 Power"},
Oder Chiou022d21f2014-04-08 19:40:00 +08001670};
1671
Bard Liao997b0522013-06-11 13:10:16 +08001672static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1673{
1674 int ret = 0, val;
1675
1676 if (codec == NULL)
1677 return -EINVAL;
1678
1679 val = snd_soc_read(codec, RT5640_I2S1_SDP);
1680 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1681 switch (dai_id) {
1682 case RT5640_AIF1:
1683 switch (val) {
1684 case RT5640_IF_123:
1685 case RT5640_IF_132:
1686 ret |= RT5640_U_IF1;
1687 break;
1688 case RT5640_IF_113:
1689 ret |= RT5640_U_IF1;
1690 case RT5640_IF_312:
1691 case RT5640_IF_213:
1692 ret |= RT5640_U_IF2;
1693 break;
1694 }
1695 break;
1696
1697 case RT5640_AIF2:
1698 switch (val) {
1699 case RT5640_IF_231:
1700 case RT5640_IF_213:
1701 ret |= RT5640_U_IF1;
1702 break;
1703 case RT5640_IF_223:
1704 ret |= RT5640_U_IF1;
1705 case RT5640_IF_123:
1706 case RT5640_IF_321:
1707 ret |= RT5640_U_IF2;
1708 break;
1709 }
1710 break;
1711
1712 default:
1713 ret = -EINVAL;
1714 break;
1715 }
1716
1717 return ret;
1718}
1719
Bard Liao997b0522013-06-11 13:10:16 +08001720static int rt5640_hw_params(struct snd_pcm_substream *substream,
1721 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1722{
Lars-Peter Clausenab642462014-03-13 21:24:54 +01001723 struct snd_soc_codec *codec = dai->codec;
Bard Liao997b0522013-06-11 13:10:16 +08001724 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Takashi Iwai5a7615c2013-10-30 08:35:06 +01001725 unsigned int val_len = 0, val_clk, mask_clk;
1726 int dai_sel, pre_div, bclk_ms, frame_size;
Bard Liao997b0522013-06-11 13:10:16 +08001727
1728 rt5640->lrck[dai->id] = params_rate(params);
Oder Chioud92950e2014-05-20 15:01:55 +08001729 pre_div = rl6231_get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
Bard Liao997b0522013-06-11 13:10:16 +08001730 if (pre_div < 0) {
Liam Girdwood9e9cb9b2013-09-13 17:57:35 +01001731 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
1732 rt5640->lrck[dai->id], dai->id);
Bard Liao997b0522013-06-11 13:10:16 +08001733 return -EINVAL;
1734 }
1735 frame_size = snd_soc_params_to_frame_size(params);
1736 if (frame_size < 0) {
1737 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1738 return frame_size;
1739 }
1740 if (frame_size > 32)
1741 bclk_ms = 1;
1742 else
1743 bclk_ms = 0;
1744 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1745
1746 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1747 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1748 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1749 bclk_ms, pre_div, dai->id);
1750
Oder Chiou9bccae72014-03-27 19:34:51 +08001751 switch (params_width(params)) {
1752 case 16:
Bard Liao997b0522013-06-11 13:10:16 +08001753 break;
Oder Chiou9bccae72014-03-27 19:34:51 +08001754 case 20:
Bard Liao997b0522013-06-11 13:10:16 +08001755 val_len |= RT5640_I2S_DL_20;
1756 break;
Oder Chiou9bccae72014-03-27 19:34:51 +08001757 case 24:
Bard Liao997b0522013-06-11 13:10:16 +08001758 val_len |= RT5640_I2S_DL_24;
1759 break;
Oder Chiou9bccae72014-03-27 19:34:51 +08001760 case 8:
Bard Liao997b0522013-06-11 13:10:16 +08001761 val_len |= RT5640_I2S_DL_8;
1762 break;
1763 default:
1764 return -EINVAL;
1765 }
1766
1767 dai_sel = get_sdp_info(codec, dai->id);
1768 if (dai_sel < 0) {
1769 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1770 return -EINVAL;
1771 }
1772 if (dai_sel & RT5640_U_IF1) {
1773 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1774 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1775 pre_div << RT5640_I2S_PD1_SFT;
1776 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1777 RT5640_I2S_DL_MASK, val_len);
1778 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1779 }
1780 if (dai_sel & RT5640_U_IF2) {
1781 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1782 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1783 pre_div << RT5640_I2S_PD2_SFT;
1784 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1785 RT5640_I2S_DL_MASK, val_len);
1786 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1787 }
1788
1789 return 0;
1790}
1791
1792static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1793{
1794 struct snd_soc_codec *codec = dai->codec;
1795 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Takashi Iwai5a7615c2013-10-30 08:35:06 +01001796 unsigned int reg_val = 0;
1797 int dai_sel;
Bard Liao997b0522013-06-11 13:10:16 +08001798
1799 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1800 case SND_SOC_DAIFMT_CBM_CFM:
1801 rt5640->master[dai->id] = 1;
1802 break;
1803 case SND_SOC_DAIFMT_CBS_CFS:
1804 reg_val |= RT5640_I2S_MS_S;
1805 rt5640->master[dai->id] = 0;
1806 break;
1807 default:
1808 return -EINVAL;
1809 }
1810
1811 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1812 case SND_SOC_DAIFMT_NB_NF:
1813 break;
1814 case SND_SOC_DAIFMT_IB_NF:
1815 reg_val |= RT5640_I2S_BP_INV;
1816 break;
1817 default:
1818 return -EINVAL;
1819 }
1820
1821 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1822 case SND_SOC_DAIFMT_I2S:
1823 break;
1824 case SND_SOC_DAIFMT_LEFT_J:
1825 reg_val |= RT5640_I2S_DF_LEFT;
1826 break;
1827 case SND_SOC_DAIFMT_DSP_A:
1828 reg_val |= RT5640_I2S_DF_PCM_A;
1829 break;
1830 case SND_SOC_DAIFMT_DSP_B:
1831 reg_val |= RT5640_I2S_DF_PCM_B;
1832 break;
1833 default:
1834 return -EINVAL;
1835 }
1836
1837 dai_sel = get_sdp_info(codec, dai->id);
1838 if (dai_sel < 0) {
1839 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1840 return -EINVAL;
1841 }
1842 if (dai_sel & RT5640_U_IF1) {
1843 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1844 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1845 RT5640_I2S_DF_MASK, reg_val);
1846 }
1847 if (dai_sel & RT5640_U_IF2) {
1848 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1849 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1850 RT5640_I2S_DF_MASK, reg_val);
1851 }
1852
1853 return 0;
1854}
1855
1856static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1857 int clk_id, unsigned int freq, int dir)
1858{
1859 struct snd_soc_codec *codec = dai->codec;
1860 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1861 unsigned int reg_val = 0;
1862
1863 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1864 return 0;
1865
1866 switch (clk_id) {
1867 case RT5640_SCLK_S_MCLK:
1868 reg_val |= RT5640_SCLK_SRC_MCLK;
1869 break;
1870 case RT5640_SCLK_S_PLL1:
1871 reg_val |= RT5640_SCLK_SRC_PLL1;
1872 break;
Bard Liao997b0522013-06-11 13:10:16 +08001873 default:
1874 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1875 return -EINVAL;
1876 }
1877 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1878 RT5640_SCLK_SRC_MASK, reg_val);
1879 rt5640->sysclk = freq;
1880 rt5640->sysclk_src = clk_id;
1881
1882 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1883 return 0;
1884}
1885
Bard Liao997b0522013-06-11 13:10:16 +08001886static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1887 unsigned int freq_in, unsigned int freq_out)
1888{
1889 struct snd_soc_codec *codec = dai->codec;
1890 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Oder Chiou71c7a2d2014-05-20 15:01:54 +08001891 struct rl6231_pll_code pll_code;
Sudip Mukherjeec77dd672016-03-08 13:35:31 +05301892 int ret;
Bard Liao997b0522013-06-11 13:10:16 +08001893
1894 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1895 freq_out == rt5640->pll_out)
1896 return 0;
1897
1898 if (!freq_in || !freq_out) {
1899 dev_dbg(codec->dev, "PLL disabled\n");
1900
1901 rt5640->pll_in = 0;
1902 rt5640->pll_out = 0;
1903 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1904 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1905 return 0;
1906 }
1907
1908 switch (source) {
1909 case RT5640_PLL1_S_MCLK:
1910 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1911 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1912 break;
1913 case RT5640_PLL1_S_BCLK1:
Bard Liaoc467fc02016-03-07 15:09:37 +08001914 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1915 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1916 break;
Bard Liao997b0522013-06-11 13:10:16 +08001917 case RT5640_PLL1_S_BCLK2:
Bard Liaoc467fc02016-03-07 15:09:37 +08001918 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1919 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
Bard Liao997b0522013-06-11 13:10:16 +08001920 break;
1921 default:
1922 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1923 return -EINVAL;
1924 }
1925
Oder Chiou71c7a2d2014-05-20 15:01:54 +08001926 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
Bard Liao997b0522013-06-11 13:10:16 +08001927 if (ret < 0) {
1928 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1929 return ret;
1930 }
1931
Oder Chiou71c7a2d2014-05-20 15:01:54 +08001932 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
1933 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1934 pll_code.n_code, pll_code.k_code);
Bard Liao997b0522013-06-11 13:10:16 +08001935
1936 snd_soc_write(codec, RT5640_PLL_CTRL1,
Oder Chiou71c7a2d2014-05-20 15:01:54 +08001937 pll_code.n_code << RT5640_PLL_N_SFT | pll_code.k_code);
Bard Liao997b0522013-06-11 13:10:16 +08001938 snd_soc_write(codec, RT5640_PLL_CTRL2,
Oder Chiou71c7a2d2014-05-20 15:01:54 +08001939 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5640_PLL_M_SFT |
1940 pll_code.m_bp << RT5640_PLL_M_BP_SFT);
Bard Liao997b0522013-06-11 13:10:16 +08001941
1942 rt5640->pll_in = freq_in;
1943 rt5640->pll_out = freq_out;
1944 rt5640->pll_src = source;
1945
1946 return 0;
1947}
1948
1949static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1950 enum snd_soc_bias_level level)
1951{
Sugar Zhang6049af02016-02-22 15:56:55 +08001952 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1953 int ret;
1954
Bard Liao997b0522013-06-11 13:10:16 +08001955 switch (level) {
Sugar Zhang6049af02016-02-22 15:56:55 +08001956 case SND_SOC_BIAS_ON:
1957 break;
1958
1959 case SND_SOC_BIAS_PREPARE:
1960 /*
1961 * SND_SOC_BIAS_PREPARE is called while preparing for a
1962 * transition to ON or away from ON. If current bias_level
1963 * is SND_SOC_BIAS_ON, then it is preparing for a transition
1964 * away from ON. Disable the clock in that case, otherwise
1965 * enable it.
1966 */
1967 if (IS_ERR(rt5640->mclk))
1968 break;
1969
1970 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON) {
1971 clk_disable_unprepare(rt5640->mclk);
1972 } else {
1973 ret = clk_prepare_enable(rt5640->mclk);
1974 if (ret)
1975 return ret;
1976 }
1977 break;
1978
Bard Liao997b0522013-06-11 13:10:16 +08001979 case SND_SOC_BIAS_STANDBY:
Lars-Peter Clausen76aad742015-05-19 21:49:08 +02001980 if (SND_SOC_BIAS_OFF == snd_soc_codec_get_bias_level(codec)) {
Bard Liao997b0522013-06-11 13:10:16 +08001981 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1982 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1983 RT5640_PWR_BG | RT5640_PWR_VREF2,
1984 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1985 RT5640_PWR_BG | RT5640_PWR_VREF2);
Bard Liao246693b2013-08-23 10:29:26 +08001986 usleep_range(10000, 15000);
Bard Liao997b0522013-06-11 13:10:16 +08001987 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1988 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1989 RT5640_PWR_FV1 | RT5640_PWR_FV2);
Bard Liao997b0522013-06-11 13:10:16 +08001990 snd_soc_update_bits(codec, RT5640_DUMMY1,
1991 0x0301, 0x0301);
Bard Liao997b0522013-06-11 13:10:16 +08001992 snd_soc_update_bits(codec, RT5640_MICBIAS,
1993 0x0030, 0x0030);
1994 }
1995 break;
1996
1997 case SND_SOC_BIAS_OFF:
1998 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1999 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
2000 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
2001 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
2002 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
2003 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
2004 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
2005 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
2006 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
2007 break;
2008
2009 default:
2010 break;
2011 }
Bard Liao997b0522013-06-11 13:10:16 +08002012
2013 return 0;
2014}
2015
Jarkko Nikulacd69dc82014-10-01 15:08:14 +03002016int rt5640_dmic_enable(struct snd_soc_codec *codec,
2017 bool dmic1_data_pin, bool dmic2_data_pin)
2018{
2019 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2020
2021 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2022 RT5640_GP2_PIN_MASK, RT5640_GP2_PIN_DMIC1_SCL);
2023
2024 if (dmic1_data_pin) {
2025 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
2026 RT5640_DMIC_1_DP_MASK, RT5640_DMIC_1_DP_GPIO3);
2027 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2028 RT5640_GP3_PIN_MASK, RT5640_GP3_PIN_DMIC1_SDA);
2029 }
2030
2031 if (dmic2_data_pin) {
2032 regmap_update_bits(rt5640->regmap, RT5640_DMIC,
2033 RT5640_DMIC_2_DP_MASK, RT5640_DMIC_2_DP_GPIO4);
2034 regmap_update_bits(rt5640->regmap, RT5640_GPIO_CTRL1,
2035 RT5640_GP4_PIN_MASK, RT5640_GP4_PIN_DMIC2_SDA);
2036 }
2037
2038 return 0;
2039}
2040EXPORT_SYMBOL_GPL(rt5640_dmic_enable);
2041
Jack Yubee3e022016-01-04 17:20:26 -06002042int rt5640_sel_asrc_clk_src(struct snd_soc_codec *codec,
2043 unsigned int filter_mask, unsigned int clk_src)
2044{
2045 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2046 unsigned int asrc2_mask = 0;
2047 unsigned int asrc2_value = 0;
2048
2049 switch (clk_src) {
2050 case RT5640_CLK_SEL_SYS:
2051 case RT5640_CLK_SEL_ASRC:
2052 break;
2053
2054 default:
2055 return -EINVAL;
2056 }
2057
2058 if (!filter_mask)
2059 return -EINVAL;
2060
2061 if (filter_mask & RT5640_DA_STEREO_FILTER) {
2062 asrc2_mask |= RT5640_STO_DAC_M_MASK;
2063 asrc2_value = (asrc2_value & ~RT5640_STO_DAC_M_MASK)
2064 | (clk_src << RT5640_STO_DAC_M_SFT);
2065 }
2066
2067 if (filter_mask & RT5640_DA_MONO_L_FILTER) {
2068 asrc2_mask |= RT5640_MDA_L_M_MASK;
2069 asrc2_value = (asrc2_value & ~RT5640_MDA_L_M_MASK)
2070 | (clk_src << RT5640_MDA_L_M_SFT);
2071 }
2072
2073 if (filter_mask & RT5640_DA_MONO_R_FILTER) {
2074 asrc2_mask |= RT5640_MDA_R_M_MASK;
2075 asrc2_value = (asrc2_value & ~RT5640_MDA_R_M_MASK)
2076 | (clk_src << RT5640_MDA_R_M_SFT);
2077 }
2078
2079 if (filter_mask & RT5640_AD_STEREO_FILTER) {
2080 asrc2_mask |= RT5640_ADC_M_MASK;
2081 asrc2_value = (asrc2_value & ~RT5640_ADC_M_MASK)
2082 | (clk_src << RT5640_ADC_M_SFT);
2083 }
2084
2085 if (filter_mask & RT5640_AD_MONO_L_FILTER) {
2086 asrc2_mask |= RT5640_MAD_L_M_MASK;
2087 asrc2_value = (asrc2_value & ~RT5640_MAD_L_M_MASK)
2088 | (clk_src << RT5640_MAD_L_M_SFT);
2089 }
2090
2091 if (filter_mask & RT5640_AD_MONO_R_FILTER) {
2092 asrc2_mask |= RT5640_MAD_R_M_MASK;
2093 asrc2_value = (asrc2_value & ~RT5640_MAD_R_M_MASK)
2094 | (clk_src << RT5640_MAD_R_M_SFT);
2095 }
2096
2097 snd_soc_update_bits(codec, RT5640_ASRC_2,
2098 asrc2_mask, asrc2_value);
2099
2100 if (snd_soc_read(codec, RT5640_ASRC_2)) {
2101 rt5640->asrc_en = true;
2102 snd_soc_update_bits(codec, RT5640_JD_CTRL, 0x3, 0x3);
2103 } else {
2104 rt5640->asrc_en = false;
2105 snd_soc_update_bits(codec, RT5640_JD_CTRL, 0x3, 0x0);
2106 }
2107
2108 return 0;
2109}
2110EXPORT_SYMBOL_GPL(rt5640_sel_asrc_clk_src);
2111
Bard Liao997b0522013-06-11 13:10:16 +08002112static int rt5640_probe(struct snd_soc_codec *codec)
2113{
Lars-Peter Clausen76aad742015-05-19 21:49:08 +02002114 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Bard Liao997b0522013-06-11 13:10:16 +08002115 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
Bard Liao997b0522013-06-11 13:10:16 +08002116
Sugar Zhang6049af02016-02-22 15:56:55 +08002117 /* Check if MCLK provided */
2118 rt5640->mclk = devm_clk_get(codec->dev, "mclk");
2119 if (PTR_ERR(rt5640->mclk) == -EPROBE_DEFER)
2120 return -EPROBE_DEFER;
2121
Bard Liao997b0522013-06-11 13:10:16 +08002122 rt5640->codec = codec;
Bard Liao997b0522013-06-11 13:10:16 +08002123
Lars-Peter Clausenbd1204c2015-04-27 22:13:24 +02002124 snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
Bard Liao997b0522013-06-11 13:10:16 +08002125
2126 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
Bard Liao997b0522013-06-11 13:10:16 +08002127 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
2128 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
2129
Bard Liao8bfc6d22014-04-17 10:24:06 +08002130 switch (snd_soc_read(codec, RT5640_RESET) & RT5640_ID_MASK) {
2131 case RT5640_ID_5640:
2132 case RT5640_ID_5642:
Oder Chiou022d21f2014-04-08 19:40:00 +08002133 snd_soc_add_codec_controls(codec,
2134 rt5640_specific_snd_controls,
2135 ARRAY_SIZE(rt5640_specific_snd_controls));
Lars-Peter Clausen76aad742015-05-19 21:49:08 +02002136 snd_soc_dapm_new_controls(dapm,
Oder Chiou022d21f2014-04-08 19:40:00 +08002137 rt5640_specific_dapm_widgets,
2138 ARRAY_SIZE(rt5640_specific_dapm_widgets));
Lars-Peter Clausen76aad742015-05-19 21:49:08 +02002139 snd_soc_dapm_add_routes(dapm,
Oder Chiou022d21f2014-04-08 19:40:00 +08002140 rt5640_specific_dapm_routes,
2141 ARRAY_SIZE(rt5640_specific_dapm_routes));
2142 break;
Bard Liao8bfc6d22014-04-17 10:24:06 +08002143 case RT5640_ID_5639:
Lars-Peter Clausen76aad742015-05-19 21:49:08 +02002144 snd_soc_dapm_new_controls(dapm,
Oder Chiou022d21f2014-04-08 19:40:00 +08002145 rt5639_specific_dapm_widgets,
2146 ARRAY_SIZE(rt5639_specific_dapm_widgets));
Lars-Peter Clausen76aad742015-05-19 21:49:08 +02002147 snd_soc_dapm_add_routes(dapm,
Oder Chiou022d21f2014-04-08 19:40:00 +08002148 rt5639_specific_dapm_routes,
2149 ARRAY_SIZE(rt5639_specific_dapm_routes));
2150 break;
Bard Liao57f174f2014-05-06 15:56:06 +08002151 default:
2152 dev_err(codec->dev,
2153 "The driver is for RT5639 RT5640 or RT5642 only\n");
2154 return -ENODEV;
Oder Chiou022d21f2014-04-08 19:40:00 +08002155 }
2156
Jarkko Nikulacd69dc82014-10-01 15:08:14 +03002157 if (rt5640->pdata.dmic_en)
2158 rt5640_dmic_enable(codec, rt5640->pdata.dmic1_data_pin,
2159 rt5640->pdata.dmic2_data_pin);
2160
Bard Liao997b0522013-06-11 13:10:16 +08002161 return 0;
2162}
2163
2164static int rt5640_remove(struct snd_soc_codec *codec)
2165{
2166 rt5640_reset(codec);
2167
2168 return 0;
2169}
2170
2171#ifdef CONFIG_PM
2172static int rt5640_suspend(struct snd_soc_codec *codec)
2173{
2174 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2175
Lars-Peter Clausenbd1204c2015-04-27 22:13:24 +02002176 snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF);
Bard Liao997b0522013-06-11 13:10:16 +08002177 rt5640_reset(codec);
2178 regcache_cache_only(rt5640->regmap, true);
2179 regcache_mark_dirty(rt5640->regmap);
Mark Browne58f3012013-10-16 17:26:22 +01002180 if (gpio_is_valid(rt5640->pdata.ldo1_en))
2181 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 0);
Bard Liao997b0522013-06-11 13:10:16 +08002182
2183 return 0;
2184}
2185
2186static int rt5640_resume(struct snd_soc_codec *codec)
2187{
Mark Browne58f3012013-10-16 17:26:22 +01002188 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
2189
2190 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
2191 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 1);
2192 msleep(400);
2193 }
Bard Liao997b0522013-06-11 13:10:16 +08002194
Oder Chiou4c9185b2014-03-27 15:55:47 +08002195 regcache_cache_only(rt5640->regmap, false);
2196 regcache_sync(rt5640->regmap);
2197
Bard Liao997b0522013-06-11 13:10:16 +08002198 return 0;
2199}
2200#else
2201#define rt5640_suspend NULL
2202#define rt5640_resume NULL
2203#endif
2204
2205#define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2206#define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2207 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2208
Stephen Warren9be94ae2013-06-12 15:34:23 -06002209static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
Bard Liao997b0522013-06-11 13:10:16 +08002210 .hw_params = rt5640_hw_params,
2211 .set_fmt = rt5640_set_dai_fmt,
2212 .set_sysclk = rt5640_set_dai_sysclk,
2213 .set_pll = rt5640_set_dai_pll,
2214};
2215
Stephen Warren9be94ae2013-06-12 15:34:23 -06002216static struct snd_soc_dai_driver rt5640_dai[] = {
Bard Liao997b0522013-06-11 13:10:16 +08002217 {
2218 .name = "rt5640-aif1",
2219 .id = RT5640_AIF1,
2220 .playback = {
2221 .stream_name = "AIF1 Playback",
2222 .channels_min = 1,
2223 .channels_max = 2,
2224 .rates = RT5640_STEREO_RATES,
2225 .formats = RT5640_FORMATS,
2226 },
2227 .capture = {
2228 .stream_name = "AIF1 Capture",
2229 .channels_min = 1,
2230 .channels_max = 2,
2231 .rates = RT5640_STEREO_RATES,
2232 .formats = RT5640_FORMATS,
2233 },
2234 .ops = &rt5640_aif_dai_ops,
2235 },
2236 {
2237 .name = "rt5640-aif2",
2238 .id = RT5640_AIF2,
2239 .playback = {
2240 .stream_name = "AIF2 Playback",
2241 .channels_min = 1,
2242 .channels_max = 2,
2243 .rates = RT5640_STEREO_RATES,
2244 .formats = RT5640_FORMATS,
2245 },
2246 .capture = {
2247 .stream_name = "AIF2 Capture",
2248 .channels_min = 1,
2249 .channels_max = 2,
2250 .rates = RT5640_STEREO_RATES,
2251 .formats = RT5640_FORMATS,
2252 },
2253 .ops = &rt5640_aif_dai_ops,
2254 },
2255};
2256
2257static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2258 .probe = rt5640_probe,
2259 .remove = rt5640_remove,
2260 .suspend = rt5640_suspend,
2261 .resume = rt5640_resume,
2262 .set_bias_level = rt5640_set_bias_level,
Oder Chiou09caf302014-03-31 10:21:10 +08002263 .idle_bias_off = true,
Bard Liao997b0522013-06-11 13:10:16 +08002264 .controls = rt5640_snd_controls,
2265 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
2266 .dapm_widgets = rt5640_dapm_widgets,
2267 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2268 .dapm_routes = rt5640_dapm_routes,
2269 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2270};
2271
2272static const struct regmap_config rt5640_regmap = {
2273 .reg_bits = 8,
2274 .val_bits = 16,
Jarkko Nikulaf4821e82014-08-26 17:03:13 +03002275 .use_single_rw = true,
Bard Liao997b0522013-06-11 13:10:16 +08002276
2277 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
2278 RT5640_PR_SPACING),
2279 .volatile_reg = rt5640_volatile_register,
2280 .readable_reg = rt5640_readable_register,
2281
2282 .cache_type = REGCACHE_RBTREE,
2283 .reg_defaults = rt5640_reg,
2284 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),
2285 .ranges = rt5640_ranges,
2286 .num_ranges = ARRAY_SIZE(rt5640_ranges),
2287};
2288
2289static const struct i2c_device_id rt5640_i2c_id[] = {
2290 { "rt5640", 0 },
Oder Chioub0c27842014-04-10 10:57:34 +08002291 { "rt5639", 0 },
Bard Liao8bfc6d22014-04-17 10:24:06 +08002292 { "rt5642", 0 },
Bard Liao997b0522013-06-11 13:10:16 +08002293 { }
2294};
2295MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2296
Stephen Warren03a620d2014-03-31 11:05:17 -06002297#if defined(CONFIG_OF)
2298static const struct of_device_id rt5640_of_match[] = {
Oder Chiou33fcec22014-04-28 16:55:21 +08002299 { .compatible = "realtek,rt5639", },
Stephen Warren03a620d2014-03-31 11:05:17 -06002300 { .compatible = "realtek,rt5640", },
2301 {},
2302};
2303MODULE_DEVICE_TABLE(of, rt5640_of_match);
2304#endif
2305
Thierry Reding32fcb972013-09-19 11:18:06 +02002306#ifdef CONFIG_ACPI
Mathias Krauseb895dc22015-06-13 14:25:14 +02002307static const struct acpi_device_id rt5640_acpi_match[] = {
Liam Girdwood02b80772013-09-13 17:57:36 +01002308 { "INT33CA", 0 },
Jarkko Nikulab31b2b62014-02-07 09:35:16 +02002309 { "10EC5640", 0 },
Jarkko Nikula34636672015-01-23 14:15:30 +02002310 { "10EC5642", 0 },
Jorge Fernandez Monteagudo55fc2052016-01-04 17:20:30 -06002311 { "INTCCFFD", 0 },
Liam Girdwood02b80772013-09-13 17:57:36 +01002312 { },
2313};
2314MODULE_DEVICE_TABLE(acpi, rt5640_acpi_match);
Thierry Reding32fcb972013-09-19 11:18:06 +02002315#endif
Liam Girdwood02b80772013-09-13 17:57:36 +01002316
Stephen Warrendcad9f02013-06-12 11:34:30 -06002317static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
2318{
2319 rt5640->pdata.in1_diff = of_property_read_bool(np,
2320 "realtek,in1-differential");
2321 rt5640->pdata.in2_diff = of_property_read_bool(np,
2322 "realtek,in2-differential");
2323
2324 rt5640->pdata.ldo1_en = of_get_named_gpio(np,
2325 "realtek,ldo1-en-gpios", 0);
2326 /*
2327 * LDO1_EN is optional (it may be statically tied on the board).
2328 * -ENOENT means that the property doesn't exist, i.e. there is no
2329 * GPIO, so is not an error. Any other error code means the property
2330 * exists, but could not be parsed.
2331 */
2332 if (!gpio_is_valid(rt5640->pdata.ldo1_en) &&
2333 (rt5640->pdata.ldo1_en != -ENOENT))
2334 return rt5640->pdata.ldo1_en;
2335
2336 return 0;
2337}
2338
Bard Liao997b0522013-06-11 13:10:16 +08002339static int rt5640_i2c_probe(struct i2c_client *i2c,
2340 const struct i2c_device_id *id)
2341{
2342 struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2343 struct rt5640_priv *rt5640;
2344 int ret;
2345 unsigned int val;
2346
2347 rt5640 = devm_kzalloc(&i2c->dev,
2348 sizeof(struct rt5640_priv),
2349 GFP_KERNEL);
2350 if (NULL == rt5640)
2351 return -ENOMEM;
Stephen Warrendcad9f02013-06-12 11:34:30 -06002352 i2c_set_clientdata(i2c, rt5640);
2353
2354 if (pdata) {
2355 rt5640->pdata = *pdata;
2356 /*
2357 * Translate zero'd out (default) pdata value to an invalid
2358 * GPIO ID. This makes the pdata and DT paths consistent in
2359 * terms of the value left in this field when no GPIO is
2360 * specified, but means we can't actually use GPIO 0.
2361 */
2362 if (!rt5640->pdata.ldo1_en)
2363 rt5640->pdata.ldo1_en = -EINVAL;
2364 } else if (i2c->dev.of_node) {
2365 ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2366 if (ret)
2367 return ret;
2368 } else
2369 rt5640->pdata.ldo1_en = -EINVAL;
Bard Liao997b0522013-06-11 13:10:16 +08002370
2371 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2372 if (IS_ERR(rt5640->regmap)) {
2373 ret = PTR_ERR(rt5640->regmap);
2374 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2375 ret);
2376 return ret;
2377 }
2378
Stephen Warrendcad9f02013-06-12 11:34:30 -06002379 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
Bard Liao997b0522013-06-11 13:10:16 +08002380 ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2381 GPIOF_OUT_INIT_HIGH,
2382 "RT5640 LDO1_EN");
2383 if (ret < 0) {
2384 dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2385 rt5640->pdata.ldo1_en, ret);
2386 return ret;
2387 }
2388 msleep(400);
2389 }
2390
2391 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
Oder Chiou3441e522014-03-28 20:28:29 +08002392 if (val != RT5640_DEVICE_ID) {
Bard Liao997b0522013-06-11 13:10:16 +08002393 dev_err(&i2c->dev,
Jarkko Nikula818454d2015-06-25 13:58:57 +03002394 "Device with ID register %#x is not rt5640/39\n", val);
Bard Liao997b0522013-06-11 13:10:16 +08002395 return -ENODEV;
2396 }
2397
2398 regmap_write(rt5640->regmap, RT5640_RESET, 0);
2399
2400 ret = regmap_register_patch(rt5640->regmap, init_list,
2401 ARRAY_SIZE(init_list));
2402 if (ret != 0)
2403 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2404
2405 if (rt5640->pdata.in1_diff)
2406 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2407 RT5640_IN_DF1, RT5640_IN_DF1);
2408
2409 if (rt5640->pdata.in2_diff)
2410 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2411 RT5640_IN_DF2, RT5640_IN_DF2);
2412
Oder Chiou16566e42015-10-21 09:46:05 +08002413 if (rt5640->pdata.in3_diff)
2414 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2415 RT5640_IN_DF2, RT5640_IN_DF2);
2416
Bard Liao246693b2013-08-23 10:29:26 +08002417 rt5640->hp_mute = 1;
2418
Axel Lin1657caf2014-06-10 11:35:56 +08002419 return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2420 rt5640_dai, ARRAY_SIZE(rt5640_dai));
Bard Liao997b0522013-06-11 13:10:16 +08002421}
2422
2423static int rt5640_i2c_remove(struct i2c_client *i2c)
2424{
2425 snd_soc_unregister_codec(&i2c->dev);
2426
2427 return 0;
2428}
2429
Stephen Warren9be94ae2013-06-12 15:34:23 -06002430static struct i2c_driver rt5640_i2c_driver = {
Bard Liao997b0522013-06-11 13:10:16 +08002431 .driver = {
2432 .name = "rt5640",
Liam Girdwood02b80772013-09-13 17:57:36 +01002433 .acpi_match_table = ACPI_PTR(rt5640_acpi_match),
Stephen Warren03a620d2014-03-31 11:05:17 -06002434 .of_match_table = of_match_ptr(rt5640_of_match),
Bard Liao997b0522013-06-11 13:10:16 +08002435 },
2436 .probe = rt5640_i2c_probe,
2437 .remove = rt5640_i2c_remove,
2438 .id_table = rt5640_i2c_id,
2439};
2440module_i2c_driver(rt5640_i2c_driver);
2441
Oder Chioub0c27842014-04-10 10:57:34 +08002442MODULE_DESCRIPTION("ASoC RT5640/RT5639 driver");
Bard Liao997b0522013-06-11 13:10:16 +08002443MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2444MODULE_LICENSE("GPL v2");