blob: 215d5c51bfa0c424e2030347690dded37e5433ee [file] [log] [blame]
Ben Hutchings8ceee662008-04-27 12:55:59 +01001/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
Ben Hutchings0a6f40c2011-02-25 00:01:34 +00004 * Copyright 2005-2011 Solarflare Communications Inc.
Ben Hutchings8ceee662008-04-27 12:55:59 +01005 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11/* Common definitions for all Efx net driver code */
12
13#ifndef EFX_NET_DRIVER_H
14#define EFX_NET_DRIVER_H
15
Ben Hutchings62776d02010-06-23 11:30:07 +000016#if defined(EFX_ENABLE_DEBUG) && !defined(DEBUG)
17#define DEBUG
18#endif
19
Ben Hutchings8ceee662008-04-27 12:55:59 +010020#include <linux/version.h>
21#include <linux/netdevice.h>
22#include <linux/etherdevice.h>
23#include <linux/ethtool.h>
24#include <linux/if_vlan.h>
Steve Hodgson90d683a2010-06-01 11:19:39 +000025#include <linux/timer.h>
Ben Hutchings68e7f452009-04-29 08:05:08 +000026#include <linux/mdio.h>
Ben Hutchings8ceee662008-04-27 12:55:59 +010027#include <linux/list.h>
28#include <linux/pci.h>
29#include <linux/device.h>
30#include <linux/highmem.h>
31#include <linux/workqueue.h>
David S. Miller10ed61c2010-09-21 16:11:06 -070032#include <linux/vmalloc.h>
Ben Hutchings37b5a602008-05-30 22:27:04 +010033#include <linux/i2c.h>
Ben Hutchings8ceee662008-04-27 12:55:59 +010034
35#include "enum.h"
36#include "bitfield.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010037
Ben Hutchings8ceee662008-04-27 12:55:59 +010038/**************************************************************************
39 *
40 * Build definitions
41 *
42 **************************************************************************/
Ben Hutchingsc5d5f5f2010-06-23 11:30:26 +000043
Ben Hutchings6d84b982011-02-25 00:04:42 +000044#define EFX_DRIVER_VERSION "3.1"
Ben Hutchings8ceee662008-04-27 12:55:59 +010045
46#ifdef EFX_ENABLE_DEBUG
47#define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
48#define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
49#else
50#define EFX_BUG_ON_PARANOID(x) do {} while (0)
51#define EFX_WARN_ON_PARANOID(x) do {} while (0)
52#endif
53
Ben Hutchings8ceee662008-04-27 12:55:59 +010054/**************************************************************************
55 *
56 * Efx data structures
57 *
58 **************************************************************************/
59
60#define EFX_MAX_CHANNELS 32
Ben Hutchings8ceee662008-04-27 12:55:59 +010061#define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
62
Ben Hutchingsa4900ac2010-04-28 09:30:43 +000063/* Checksum generation is a per-queue option in hardware, so each
64 * queue visible to the networking core is backed by two hardware TX
65 * queues. */
Ben Hutchings94b274b2011-01-10 21:18:20 +000066#define EFX_MAX_TX_TC 2
67#define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
68#define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
69#define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
70#define EFX_TXQ_TYPES 4
71#define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
Ben Hutchings60ac1062008-09-01 12:44:59 +010072
Ben Hutchings8ceee662008-04-27 12:55:59 +010073/**
74 * struct efx_special_buffer - An Efx special buffer
75 * @addr: CPU base address of the buffer
76 * @dma_addr: DMA base address of the buffer
77 * @len: Buffer length, in bytes
78 * @index: Buffer index within controller;s buffer table
79 * @entries: Number of buffer table entries
80 *
81 * Special buffers are used for the event queues and the TX and RX
82 * descriptor queues for each channel. They are *not* used for the
83 * actual transmit and receive buffers.
Ben Hutchings8ceee662008-04-27 12:55:59 +010084 */
85struct efx_special_buffer {
86 void *addr;
87 dma_addr_t dma_addr;
88 unsigned int len;
89 int index;
90 int entries;
91};
92
Ben Hutchings127e6e12009-11-25 16:09:55 +000093enum efx_flush_state {
94 FLUSH_NONE,
95 FLUSH_PENDING,
96 FLUSH_FAILED,
97 FLUSH_DONE,
98};
99
Ben Hutchings8ceee662008-04-27 12:55:59 +0100100/**
101 * struct efx_tx_buffer - An Efx TX buffer
102 * @skb: The associated socket buffer.
103 * Set only on the final fragment of a packet; %NULL for all other
104 * fragments. When this fragment completes, then we can free this
105 * skb.
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100106 * @tsoh: The associated TSO header structure, or %NULL if this
107 * buffer is not a TSO header.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100108 * @dma_addr: DMA address of the fragment.
109 * @len: Length of this fragment.
110 * This field is zero when the queue slot is empty.
111 * @continuation: True if this fragment is not the end of a packet.
112 * @unmap_single: True if pci_unmap_single should be used.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100113 * @unmap_len: Length of this fragment to unmap
114 */
115struct efx_tx_buffer {
116 const struct sk_buff *skb;
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100117 struct efx_tso_header *tsoh;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100118 dma_addr_t dma_addr;
119 unsigned short len;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100120 bool continuation;
121 bool unmap_single;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100122 unsigned short unmap_len;
123};
124
125/**
126 * struct efx_tx_queue - An Efx TX queue
127 *
128 * This is a ring buffer of TX fragments.
129 * Since the TX completion path always executes on the same
130 * CPU and the xmit path can operate on different CPUs,
131 * performance is increased by ensuring that the completion
132 * path and the xmit path operate on different cache lines.
133 * This is particularly important if the xmit path is always
134 * executing on one CPU which is different from the completion
135 * path. There is also a cache line for members which are
136 * read but not written on the fast path.
137 *
138 * @efx: The associated Efx NIC
139 * @queue: DMA queue number
Ben Hutchings8ceee662008-04-27 12:55:59 +0100140 * @channel: The associated channel
Ben Hutchingsc04bfc62010-12-10 01:24:16 +0000141 * @core_txq: The networking core TX queue structure
Ben Hutchings8ceee662008-04-27 12:55:59 +0100142 * @buffer: The software buffer ring
143 * @txd: The hardware descriptor ring
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000144 * @ptr_mask: The size of the ring minus 1.
Ben Hutchings94b274b2011-01-10 21:18:20 +0000145 * @initialised: Has hardware queue been initialised?
Ben Hutchings6bc5d3a2008-09-01 12:49:37 +0100146 * @flushed: Used when handling queue flushing
Ben Hutchings8ceee662008-04-27 12:55:59 +0100147 * @read_count: Current read pointer.
148 * This is the number of buffers that have been removed from both rings.
Ben Hutchingscd385572010-11-15 23:53:11 +0000149 * @old_write_count: The value of @write_count when last checked.
150 * This is here for performance reasons. The xmit path will
151 * only get the up-to-date value of @write_count if this
152 * variable indicates that the queue is empty. This is to
153 * avoid cache-line ping-pong between the xmit path and the
154 * completion path.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100155 * @insert_count: Current insert pointer
156 * This is the number of buffers that have been added to the
157 * software ring.
158 * @write_count: Current write pointer
159 * This is the number of buffers that have been added to the
160 * hardware ring.
161 * @old_read_count: The value of read_count when last checked.
162 * This is here for performance reasons. The xmit path will
163 * only get the up-to-date value of read_count if this
164 * variable indicates that the queue is full. This is to
165 * avoid cache-line ping-pong between the xmit path and the
166 * completion path.
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100167 * @tso_headers_free: A list of TSO headers allocated for this TX queue
168 * that are not in use, and so available for new TSO sends. The list
169 * is protected by the TX queue lock.
170 * @tso_bursts: Number of times TSO xmit invoked by kernel
171 * @tso_long_headers: Number of packets with headers too long for standard
172 * blocks
173 * @tso_packets: Number of packets via the TSO xmit path
Ben Hutchingscd385572010-11-15 23:53:11 +0000174 * @pushes: Number of times the TX push feature has been used
175 * @empty_read_count: If the completion path has seen the queue as empty
176 * and the transmission path has not yet checked this, the value of
177 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100178 */
179struct efx_tx_queue {
180 /* Members which don't change on the fast path */
181 struct efx_nic *efx ____cacheline_aligned_in_smp;
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000182 unsigned queue;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100183 struct efx_channel *channel;
Ben Hutchingsc04bfc62010-12-10 01:24:16 +0000184 struct netdev_queue *core_txq;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100185 struct efx_tx_buffer *buffer;
186 struct efx_special_buffer txd;
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000187 unsigned int ptr_mask;
Ben Hutchings94b274b2011-01-10 21:18:20 +0000188 bool initialised;
Ben Hutchings127e6e12009-11-25 16:09:55 +0000189 enum efx_flush_state flushed;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100190
191 /* Members used mainly on the completion path */
192 unsigned int read_count ____cacheline_aligned_in_smp;
Ben Hutchingscd385572010-11-15 23:53:11 +0000193 unsigned int old_write_count;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100194
195 /* Members used only on the xmit path */
196 unsigned int insert_count ____cacheline_aligned_in_smp;
197 unsigned int write_count;
198 unsigned int old_read_count;
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100199 struct efx_tso_header *tso_headers_free;
200 unsigned int tso_bursts;
201 unsigned int tso_long_headers;
202 unsigned int tso_packets;
Ben Hutchingscd385572010-11-15 23:53:11 +0000203 unsigned int pushes;
204
205 /* Members shared between paths and sometimes updated */
206 unsigned int empty_read_count ____cacheline_aligned_in_smp;
207#define EFX_EMPTY_COUNT_VALID 0x80000000
Ben Hutchings8ceee662008-04-27 12:55:59 +0100208};
209
210/**
211 * struct efx_rx_buffer - An Efx RX data buffer
212 * @dma_addr: DMA base address of the buffer
213 * @skb: The associated socket buffer, if any.
214 * If both this and page are %NULL, the buffer slot is currently free.
215 * @page: The associated page buffer, if any.
216 * If both this and skb are %NULL, the buffer slot is currently free.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100217 * @len: Buffer length, in bytes.
Steve Hodgson8ba53662011-02-24 23:36:01 +0000218 * @is_page: Indicates if @page is valid. If false, @skb is valid.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100219 */
220struct efx_rx_buffer {
221 dma_addr_t dma_addr;
Steve Hodgson8ba53662011-02-24 23:36:01 +0000222 union {
223 struct sk_buff *skb;
224 struct page *page;
225 } u;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100226 unsigned int len;
Steve Hodgson8ba53662011-02-24 23:36:01 +0000227 bool is_page;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100228};
229
230/**
Steve Hodgson62b330b2010-06-01 11:20:53 +0000231 * struct efx_rx_page_state - Page-based rx buffer state
232 *
233 * Inserted at the start of every page allocated for receive buffers.
234 * Used to facilitate sharing dma mappings between recycled rx buffers
235 * and those passed up to the kernel.
236 *
237 * @refcnt: Number of struct efx_rx_buffer's referencing this page.
238 * When refcnt falls to zero, the page is unmapped for dma
239 * @dma_addr: The dma address of this page.
240 */
241struct efx_rx_page_state {
242 unsigned refcnt;
243 dma_addr_t dma_addr;
244
245 unsigned int __pad[0] ____cacheline_aligned;
246};
247
248/**
Ben Hutchings8ceee662008-04-27 12:55:59 +0100249 * struct efx_rx_queue - An Efx RX queue
250 * @efx: The associated Efx NIC
Ben Hutchings8ceee662008-04-27 12:55:59 +0100251 * @buffer: The software buffer ring
252 * @rxd: The hardware descriptor ring
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000253 * @ptr_mask: The size of the ring minus 1.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100254 * @added_count: Number of buffers added to the receive queue.
255 * @notified_count: Number of buffers given to NIC (<= @added_count).
256 * @removed_count: Number of buffers removed from the receive queue.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100257 * @max_fill: RX descriptor maximum fill level (<= ring size)
258 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
259 * (<= @max_fill)
260 * @fast_fill_limit: The level to which a fast fill will fill
261 * (@fast_fill_trigger <= @fast_fill_limit <= @max_fill)
262 * @min_fill: RX descriptor minimum non-zero fill level.
263 * This records the minimum fill level observed when a ring
264 * refill was triggered.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100265 * @alloc_page_count: RX allocation strategy counter.
266 * @alloc_skb_count: RX allocation strategy counter.
Steve Hodgson90d683a2010-06-01 11:19:39 +0000267 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
Ben Hutchings6bc5d3a2008-09-01 12:49:37 +0100268 * @flushed: Use when handling queue flushing
Ben Hutchings8ceee662008-04-27 12:55:59 +0100269 */
270struct efx_rx_queue {
271 struct efx_nic *efx;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100272 struct efx_rx_buffer *buffer;
273 struct efx_special_buffer rxd;
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000274 unsigned int ptr_mask;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100275
276 int added_count;
277 int notified_count;
278 int removed_count;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100279 unsigned int max_fill;
280 unsigned int fast_fill_trigger;
281 unsigned int fast_fill_limit;
282 unsigned int min_fill;
283 unsigned int min_overfill;
284 unsigned int alloc_page_count;
285 unsigned int alloc_skb_count;
Steve Hodgson90d683a2010-06-01 11:19:39 +0000286 struct timer_list slow_fill;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100287 unsigned int slow_fill_count;
288
Ben Hutchings127e6e12009-11-25 16:09:55 +0000289 enum efx_flush_state flushed;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100290};
291
292/**
293 * struct efx_buffer - An Efx general-purpose buffer
294 * @addr: host base address of the buffer
295 * @dma_addr: DMA base address of the buffer
296 * @len: Buffer length, in bytes
297 *
Ben Hutchings754c6532010-02-03 09:31:57 +0000298 * The NIC uses these buffers for its interrupt status registers and
Ben Hutchings8ceee662008-04-27 12:55:59 +0100299 * MAC stats dumps.
300 */
301struct efx_buffer {
302 void *addr;
303 dma_addr_t dma_addr;
304 unsigned int len;
305};
306
307
Ben Hutchings8ceee662008-04-27 12:55:59 +0100308enum efx_rx_alloc_method {
309 RX_ALLOC_METHOD_AUTO = 0,
310 RX_ALLOC_METHOD_SKB = 1,
311 RX_ALLOC_METHOD_PAGE = 2,
312};
313
314/**
315 * struct efx_channel - An Efx channel
316 *
317 * A channel comprises an event queue, at least one TX queue, at least
318 * one RX queue, and an associated tasklet for processing the event
319 * queue.
320 *
321 * @efx: Associated Efx NIC
Ben Hutchings8ceee662008-04-27 12:55:59 +0100322 * @channel: Channel instance number
Ben Hutchings8ceee662008-04-27 12:55:59 +0100323 * @enabled: Channel enabled indicator
324 * @irq: IRQ number (MSI and MSI-X only)
Ben Hutchings0d86ebd2009-10-23 08:32:13 +0000325 * @irq_moderation: IRQ moderation value (in hardware ticks)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100326 * @napi_dev: Net device used with NAPI
327 * @napi_str: NAPI control structure
Ben Hutchings8ceee662008-04-27 12:55:59 +0100328 * @work_pending: Is work pending via NAPI?
329 * @eventq: Event queue buffer
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000330 * @eventq_mask: Event queue pointer mask
Ben Hutchings8ceee662008-04-27 12:55:59 +0100331 * @eventq_read_ptr: Event queue read pointer
332 * @last_eventq_read_ptr: Last event queue read pointer value.
Steve Hodgsond730dc52010-06-01 11:19:09 +0000333 * @magic_count: Event queue test event count
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000334 * @irq_count: Number of IRQs since last adaptive moderation decision
335 * @irq_mod_score: IRQ moderation score
Ben Hutchings8ceee662008-04-27 12:55:59 +0100336 * @rx_alloc_level: Watermark based heuristic counter for pushing descriptors
337 * and diagnostic counters
338 * @rx_alloc_push_pages: RX allocation method currently in use for pushing
339 * descriptors
Ben Hutchings8ceee662008-04-27 12:55:59 +0100340 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
Ben Hutchings8ceee662008-04-27 12:55:59 +0100341 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
342 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
Ben Hutchingsc1ac4032009-11-28 05:36:29 +0000343 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
Ben Hutchings8ceee662008-04-27 12:55:59 +0100344 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
345 * @n_rx_overlength: Count of RX_OVERLENGTH errors
346 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
Ben Hutchings8313aca2010-09-10 06:41:57 +0000347 * @rx_queue: RX queue for this channel
Ben Hutchings8313aca2010-09-10 06:41:57 +0000348 * @tx_queue: TX queues for this channel
Ben Hutchings8ceee662008-04-27 12:55:59 +0100349 */
350struct efx_channel {
351 struct efx_nic *efx;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100352 int channel;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100353 bool enabled;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100354 int irq;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100355 unsigned int irq_moderation;
356 struct net_device *napi_dev;
357 struct napi_struct napi_str;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100358 bool work_pending;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100359 struct efx_special_buffer eventq;
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000360 unsigned int eventq_mask;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100361 unsigned int eventq_read_ptr;
362 unsigned int last_eventq_read_ptr;
Steve Hodgsond730dc52010-06-01 11:19:09 +0000363 unsigned int magic_count;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100364
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000365 unsigned int irq_count;
366 unsigned int irq_mod_score;
Ben Hutchings64d8ad62011-01-05 00:50:41 +0000367#ifdef CONFIG_RFS_ACCEL
368 unsigned int rfs_filters_added;
369#endif
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000370
Ben Hutchings8ceee662008-04-27 12:55:59 +0100371 int rx_alloc_level;
372 int rx_alloc_push_pages;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100373
374 unsigned n_rx_tobe_disc;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100375 unsigned n_rx_ip_hdr_chksum_err;
376 unsigned n_rx_tcp_udp_chksum_err;
Ben Hutchingsc1ac4032009-11-28 05:36:29 +0000377 unsigned n_rx_mcast_mismatch;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100378 unsigned n_rx_frm_trunc;
379 unsigned n_rx_overlength;
380 unsigned n_skbuff_leaks;
381
382 /* Used to pipeline received packets in order to optimise memory
383 * access with prefetches.
384 */
385 struct efx_rx_buffer *rx_pkt;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100386 bool rx_pkt_csummed;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100387
Ben Hutchings8313aca2010-09-10 06:41:57 +0000388 struct efx_rx_queue rx_queue;
Ben Hutchings94b274b2011-01-10 21:18:20 +0000389 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100390};
391
Ben Hutchings398468e2009-11-23 16:03:45 +0000392enum efx_led_mode {
393 EFX_LED_OFF = 0,
394 EFX_LED_ON = 1,
395 EFX_LED_DEFAULT = 2
396};
397
Ben Hutchingsc4593022009-11-23 16:08:17 +0000398#define STRING_TABLE_LOOKUP(val, member) \
399 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
400
401extern const char *efx_loopback_mode_names[];
402extern const unsigned int efx_loopback_mode_max;
403#define LOOPBACK_MODE(efx) \
404 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
405
Ben Hutchingsc4593022009-11-23 16:08:17 +0000406extern const char *efx_reset_type_names[];
407extern const unsigned int efx_reset_type_max;
408#define RESET_TYPE(type) \
409 STRING_TABLE_LOOKUP(type, efx_reset_type)
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100410
Ben Hutchings8ceee662008-04-27 12:55:59 +0100411enum efx_int_mode {
412 /* Be careful if altering to correct macro below */
413 EFX_INT_MODE_MSIX = 0,
414 EFX_INT_MODE_MSI = 1,
415 EFX_INT_MODE_LEGACY = 2,
416 EFX_INT_MODE_MAX /* Insert any new items before this */
417};
418#define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
419
Ben Hutchings8ceee662008-04-27 12:55:59 +0100420enum nic_state {
421 STATE_INIT = 0,
422 STATE_RUNNING = 1,
423 STATE_FINI = 2,
Ben Hutchings3c787082008-09-01 12:49:08 +0100424 STATE_DISABLED = 3,
Ben Hutchings8ceee662008-04-27 12:55:59 +0100425 STATE_MAX,
426};
427
428/*
429 * Alignment of page-allocated RX buffers
430 *
431 * Controls the number of bytes inserted at the start of an RX buffer.
432 * This is the equivalent of NET_IP_ALIGN [which controls the alignment
433 * of the skb->head for hardware DMA].
434 */
Ben Hutchings13e9ab12008-09-01 12:50:28 +0100435#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
Ben Hutchings8ceee662008-04-27 12:55:59 +0100436#define EFX_PAGE_IP_ALIGN 0
437#else
438#define EFX_PAGE_IP_ALIGN NET_IP_ALIGN
439#endif
440
441/*
442 * Alignment of the skb->head which wraps a page-allocated RX buffer
443 *
444 * The skb allocated to wrap an rx_buffer can have this alignment. Since
445 * the data is memcpy'd from the rx_buf, it does not need to be equal to
446 * EFX_PAGE_IP_ALIGN.
447 */
448#define EFX_PAGE_SKB_ALIGN 2
449
450/* Forward declaration */
451struct efx_nic;
452
453/* Pseudo bit-mask flow control field */
454enum efx_fc_type {
Ben Hutchings3f926da2009-04-29 08:20:37 +0000455 EFX_FC_RX = FLOW_CTRL_RX,
456 EFX_FC_TX = FLOW_CTRL_TX,
Ben Hutchings8ceee662008-04-27 12:55:59 +0100457 EFX_FC_AUTO = 4,
458};
459
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800460/**
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000461 * struct efx_link_state - Current state of the link
462 * @up: Link is up
463 * @fd: Link is full-duplex
464 * @fc: Actual flow control flags
465 * @speed: Link speed (Mbps)
466 */
467struct efx_link_state {
468 bool up;
469 bool fd;
470 enum efx_fc_type fc;
471 unsigned int speed;
472};
473
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000474static inline bool efx_link_state_equal(const struct efx_link_state *left,
475 const struct efx_link_state *right)
476{
477 return left->up == right->up && left->fd == right->fd &&
478 left->fc == right->fc && left->speed == right->speed;
479}
480
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000481/**
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800482 * struct efx_mac_operations - Efx MAC operations table
483 * @reconfigure: Reconfigure MAC. Serialised by the mac_lock
484 * @update_stats: Update statistics
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000485 * @check_fault: Check fault state. True if fault present.
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800486 */
487struct efx_mac_operations {
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000488 int (*reconfigure) (struct efx_nic *efx);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800489 void (*update_stats) (struct efx_nic *efx);
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000490 bool (*check_fault)(struct efx_nic *efx);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800491};
492
Ben Hutchings8ceee662008-04-27 12:55:59 +0100493/**
494 * struct efx_phy_operations - Efx PHY operations table
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000495 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
496 * efx->loopback_modes.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100497 * @init: Initialise PHY
498 * @fini: Shut down PHY
499 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000500 * @poll: Update @link_state and report whether it changed.
501 * Serialised by the mac_lock.
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800502 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
503 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000504 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800505 * (only needed where AN bit is set in mmds)
Ben Hutchings4f16c072010-02-03 09:30:50 +0000506 * @test_alive: Test that PHY is 'alive' (online)
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000507 * @test_name: Get the name of a PHY-specific test/result
Ben Hutchings4f16c072010-02-03 09:30:50 +0000508 * @run_tests: Run tests and record results as appropriate (offline).
Ben Hutchings17967212008-12-26 13:47:25 -0800509 * Flags are the ethtool tests flags.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100510 */
511struct efx_phy_operations {
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000512 int (*probe) (struct efx_nic *efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100513 int (*init) (struct efx_nic *efx);
514 void (*fini) (struct efx_nic *efx);
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000515 void (*remove) (struct efx_nic *efx);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000516 int (*reconfigure) (struct efx_nic *efx);
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000517 bool (*poll) (struct efx_nic *efx);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800518 void (*get_settings) (struct efx_nic *efx,
519 struct ethtool_cmd *ecmd);
520 int (*set_settings) (struct efx_nic *efx,
521 struct ethtool_cmd *ecmd);
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000522 void (*set_npage_adv) (struct efx_nic *efx, u32);
Ben Hutchings4f16c072010-02-03 09:30:50 +0000523 int (*test_alive) (struct efx_nic *efx);
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000524 const char *(*test_name) (struct efx_nic *efx, unsigned int index);
Ben Hutchings17967212008-12-26 13:47:25 -0800525 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100526};
527
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100528/**
529 * @enum efx_phy_mode - PHY operating mode flags
530 * @PHY_MODE_NORMAL: on and should pass traffic
531 * @PHY_MODE_TX_DISABLED: on with TX disabled
Ben Hutchings3e133c42008-11-04 20:34:56 +0000532 * @PHY_MODE_LOW_POWER: set to low power through MDIO
533 * @PHY_MODE_OFF: switched off through external control
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100534 * @PHY_MODE_SPECIAL: on but will not pass traffic
535 */
536enum efx_phy_mode {
537 PHY_MODE_NORMAL = 0,
538 PHY_MODE_TX_DISABLED = 1,
Ben Hutchings3e133c42008-11-04 20:34:56 +0000539 PHY_MODE_LOW_POWER = 2,
540 PHY_MODE_OFF = 4,
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100541 PHY_MODE_SPECIAL = 8,
542};
543
544static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
545{
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100546 return !!(mode & ~PHY_MODE_TX_DISABLED);
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100547}
548
Ben Hutchings8ceee662008-04-27 12:55:59 +0100549/*
550 * Efx extended statistics
551 *
552 * Not all statistics are provided by all supported MACs. The purpose
553 * is this structure is to contain the raw statistics provided by each
554 * MAC.
555 */
556struct efx_mac_stats {
557 u64 tx_bytes;
558 u64 tx_good_bytes;
559 u64 tx_bad_bytes;
560 unsigned long tx_packets;
561 unsigned long tx_bad;
562 unsigned long tx_pause;
563 unsigned long tx_control;
564 unsigned long tx_unicast;
565 unsigned long tx_multicast;
566 unsigned long tx_broadcast;
567 unsigned long tx_lt64;
568 unsigned long tx_64;
569 unsigned long tx_65_to_127;
570 unsigned long tx_128_to_255;
571 unsigned long tx_256_to_511;
572 unsigned long tx_512_to_1023;
573 unsigned long tx_1024_to_15xx;
574 unsigned long tx_15xx_to_jumbo;
575 unsigned long tx_gtjumbo;
576 unsigned long tx_collision;
577 unsigned long tx_single_collision;
578 unsigned long tx_multiple_collision;
579 unsigned long tx_excessive_collision;
580 unsigned long tx_deferred;
581 unsigned long tx_late_collision;
582 unsigned long tx_excessive_deferred;
583 unsigned long tx_non_tcpudp;
584 unsigned long tx_mac_src_error;
585 unsigned long tx_ip_src_error;
586 u64 rx_bytes;
587 u64 rx_good_bytes;
588 u64 rx_bad_bytes;
589 unsigned long rx_packets;
590 unsigned long rx_good;
591 unsigned long rx_bad;
592 unsigned long rx_pause;
593 unsigned long rx_control;
594 unsigned long rx_unicast;
595 unsigned long rx_multicast;
596 unsigned long rx_broadcast;
597 unsigned long rx_lt64;
598 unsigned long rx_64;
599 unsigned long rx_65_to_127;
600 unsigned long rx_128_to_255;
601 unsigned long rx_256_to_511;
602 unsigned long rx_512_to_1023;
603 unsigned long rx_1024_to_15xx;
604 unsigned long rx_15xx_to_jumbo;
605 unsigned long rx_gtjumbo;
606 unsigned long rx_bad_lt64;
607 unsigned long rx_bad_64_to_15xx;
608 unsigned long rx_bad_15xx_to_jumbo;
609 unsigned long rx_bad_gtjumbo;
610 unsigned long rx_overflow;
611 unsigned long rx_missed;
612 unsigned long rx_false_carrier;
613 unsigned long rx_symbol_error;
614 unsigned long rx_align_error;
615 unsigned long rx_length_error;
616 unsigned long rx_internal_error;
617 unsigned long rx_good_lt64;
618};
619
620/* Number of bits used in a multicast filter hash address */
621#define EFX_MCAST_HASH_BITS 8
622
623/* Number of (single-bit) entries in a multicast filter hash */
624#define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
625
626/* An Efx multicast filter hash */
627union efx_multicast_hash {
628 u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
629 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
630};
631
Ben Hutchings64eebcf2010-09-20 08:43:07 +0000632struct efx_filter_state;
633
Ben Hutchings8ceee662008-04-27 12:55:59 +0100634/**
635 * struct efx_nic - an Efx NIC
636 * @name: Device name (net device name or bus id before net device registered)
637 * @pci_dev: The PCI device
638 * @type: Controller type attributes
639 * @legacy_irq: IRQ number
Ben Hutchings94dec6a2010-12-07 19:24:45 +0000640 * @legacy_irq_enabled: Are IRQs enabled on NIC (INT_EN_KER register)?
Ben Hutchings8d9853d2008-07-18 19:01:20 +0100641 * @workqueue: Workqueue for port reconfigures and the HW monitor.
642 * Work items do not hold and must not acquire RTNL.
Ben Hutchings6977dc62008-12-26 13:44:39 -0800643 * @workqueue_name: Name of workqueue
Ben Hutchings8ceee662008-04-27 12:55:59 +0100644 * @reset_work: Scheduled reset workitem
Ben Hutchings8ceee662008-04-27 12:55:59 +0100645 * @membase_phys: Memory BAR value as physical address
646 * @membase: Memory BAR value
Ben Hutchings8ceee662008-04-27 12:55:59 +0100647 * @interrupt_mode: Interrupt mode
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000648 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
649 * @irq_rx_moderation: IRQ moderation time for RX event queues
Ben Hutchings62776d02010-06-23 11:30:07 +0000650 * @msg_enable: Log message enable flags
Ben Hutchings8ceee662008-04-27 12:55:59 +0100651 * @state: Device state flag. Serialised by the rtnl_lock.
652 * @reset_pending: Pending reset method (normally RESET_TYPE_NONE)
653 * @tx_queue: TX DMA queues
654 * @rx_queue: RX DMA queues
655 * @channel: Channels
Ben Hutchings46426102010-09-10 06:42:33 +0000656 * @channel_name: Names for channels and their IRQs
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000657 * @rxq_entries: Size of receive queues requested by user.
658 * @txq_entries: Size of transmit queues requested by user.
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000659 * @next_buffer_table: First available buffer table id
Neil Turton28b581a2008-12-12 21:41:06 -0800660 * @n_channels: Number of channels in use
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000661 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
662 * @n_tx_channels: Number of channels used for TX
Ben Hutchings8ceee662008-04-27 12:55:59 +0100663 * @rx_buffer_len: RX buffer length
664 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
Ben Hutchings78d41892010-12-02 13:47:56 +0000665 * @rx_hash_key: Toeplitz hash key for RSS
Ben Hutchings765c9f42010-06-30 05:06:28 +0000666 * @rx_indir_table: Indirection table for RSS
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000667 * @int_error_count: Number of internal errors seen recently
668 * @int_error_expire: Time at which error count will be expired
Ben Hutchings8ceee662008-04-27 12:55:59 +0100669 * @irq_status: Interrupt status buffer
Ben Hutchingsc28884c2010-04-28 09:30:00 +0000670 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
Steve Hodgson63695452010-04-28 09:27:36 +0000671 * @fatal_irq_level: IRQ level (bit number) used for serious errors
Ben Hutchings76884832009-11-29 15:10:44 +0000672 * @mtd_list: List of MTDs attached to the NIC
Ben Hutchings8ceee662008-04-27 12:55:59 +0100673 * @nic_data: Hardware dependant state
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100674 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
675 * @port_inhibited, efx_monitor() and efx_reconfigure_port()
Ben Hutchings8ceee662008-04-27 12:55:59 +0100676 * @port_enabled: Port enabled indicator.
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000677 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
678 * efx_mac_work() with kernel interfaces. Safe to read under any
679 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
680 * be held to modify it.
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100681 * @port_inhibited: If set, the netif_carrier is always off. Hold the mac_lock
Ben Hutchings8ceee662008-04-27 12:55:59 +0100682 * @port_initialized: Port initialized?
683 * @net_dev: Operating system network device. Consider holding the rtnl lock
684 * @rx_checksum_enabled: RX checksumming enabled
Ben Hutchings8ceee662008-04-27 12:55:59 +0100685 * @stats_buffer: DMA buffer for statistics
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800686 * @mac_op: MAC interface
Ben Hutchings8ceee662008-04-27 12:55:59 +0100687 * @phy_type: PHY type
Ben Hutchings8ceee662008-04-27 12:55:59 +0100688 * @phy_op: PHY interface
689 * @phy_data: PHY private data (including PHY-specific stats)
Ben Hutchings68e7f452009-04-29 08:05:08 +0000690 * @mdio: PHY MDIO interface
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000691 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100692 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000693 * @link_advertising: Autonegotiation advertising flags
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000694 * @link_state: Current state of the link
Ben Hutchings8ceee662008-04-27 12:55:59 +0100695 * @n_link_state_changes: Number of times the link has changed state
696 * @promiscuous: Promiscuous flag. Protected by netif_tx_lock.
697 * @multicast_hash: Multicast hash table
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800698 * @wanted_fc: Wanted flow control flags
Ben Hutchings8be4f3e2009-11-25 16:12:16 +0000699 * @mac_work: Work item for changing MAC promiscuity and multicast hash
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100700 * @loopback_mode: Loopback status
701 * @loopback_modes: Supported loopback mode bitmask
702 * @loopback_selftest: Offline self-test private state
Ben Hutchingsab28c122010-12-06 22:53:15 +0000703 * @monitor_work: Hardware monitor workitem
704 * @biu_lock: BIU (bus interface unit) lock
705 * @last_irq_cpu: Last CPU to handle interrupt.
706 * This register is written with the SMP processor ID whenever an
707 * interrupt is handled. It is used by efx_nic_test_interrupt()
708 * to verify that an interrupt has occurred.
709 * @n_rx_nodesc_drop_cnt: RX no descriptor drop count
710 * @mac_stats: MAC statistics. These include all statistics the MACs
711 * can provide. Generic code converts these into a standard
712 * &struct net_device_stats.
713 * @stats_lock: Statistics update lock. Serialises statistics fetches
Ben Hutchings8ceee662008-04-27 12:55:59 +0100714 *
Ben Hutchings754c6532010-02-03 09:31:57 +0000715 * This is stored in the private area of the &struct net_device.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100716 */
717struct efx_nic {
Ben Hutchingsab28c122010-12-06 22:53:15 +0000718 /* The following fields should be written very rarely */
719
Ben Hutchings8ceee662008-04-27 12:55:59 +0100720 char name[IFNAMSIZ];
721 struct pci_dev *pci_dev;
722 const struct efx_nic_type *type;
723 int legacy_irq;
Ben Hutchings94dec6a2010-12-07 19:24:45 +0000724 bool legacy_irq_enabled;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100725 struct workqueue_struct *workqueue;
Ben Hutchings6977dc62008-12-26 13:44:39 -0800726 char workqueue_name[16];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100727 struct work_struct reset_work;
Ben Hutchings086ea352008-05-16 21:17:06 +0100728 resource_size_t membase_phys;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100729 void __iomem *membase;
Ben Hutchingsab28c122010-12-06 22:53:15 +0000730
Ben Hutchings8ceee662008-04-27 12:55:59 +0100731 enum efx_int_mode interrupt_mode;
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000732 bool irq_rx_adaptive;
733 unsigned int irq_rx_moderation;
Ben Hutchings62776d02010-06-23 11:30:07 +0000734 u32 msg_enable;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100735
Ben Hutchings8ceee662008-04-27 12:55:59 +0100736 enum nic_state state;
737 enum reset_type reset_pending;
738
Ben Hutchings8313aca2010-09-10 06:41:57 +0000739 struct efx_channel *channel[EFX_MAX_CHANNELS];
Ben Hutchingsefbc2d72010-09-13 04:14:49 +0000740 char channel_name[EFX_MAX_CHANNELS][IFNAMSIZ + 6];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100741
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000742 unsigned rxq_entries;
743 unsigned txq_entries;
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000744 unsigned next_buffer_table;
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000745 unsigned n_channels;
746 unsigned n_rx_channels;
Ben Hutchings97653432011-01-12 18:26:56 +0000747 unsigned tx_channel_offset;
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000748 unsigned n_tx_channels;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100749 unsigned int rx_buffer_len;
750 unsigned int rx_buffer_order;
Ben Hutchings5d3a6fc2010-06-25 07:05:43 +0000751 u8 rx_hash_key[40];
Ben Hutchings765c9f42010-06-30 05:06:28 +0000752 u32 rx_indir_table[128];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100753
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000754 unsigned int_error_count;
755 unsigned long int_error_expire;
756
Ben Hutchings8ceee662008-04-27 12:55:59 +0100757 struct efx_buffer irq_status;
Ben Hutchingsc28884c2010-04-28 09:30:00 +0000758 unsigned irq_zero_count;
Steve Hodgson63695452010-04-28 09:27:36 +0000759 unsigned fatal_irq_level;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100760
Ben Hutchings76884832009-11-29 15:10:44 +0000761#ifdef CONFIG_SFC_MTD
762 struct list_head mtd_list;
763#endif
Ben Hutchings4a5b5042008-09-01 12:47:16 +0100764
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000765 void *nic_data;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100766
767 struct mutex mac_lock;
Ben Hutchings766ca0f2008-12-12 21:59:24 -0800768 struct work_struct mac_work;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100769 bool port_enabled;
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100770 bool port_inhibited;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100771
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100772 bool port_initialized;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100773 struct net_device *net_dev;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100774 bool rx_checksum_enabled;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100775
Ben Hutchings8ceee662008-04-27 12:55:59 +0100776 struct efx_buffer stats_buffer;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100777
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800778 struct efx_mac_operations *mac_op;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100779
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000780 unsigned int phy_type;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100781 struct efx_phy_operations *phy_op;
782 void *phy_data;
Ben Hutchings68e7f452009-04-29 08:05:08 +0000783 struct mdio_if_info mdio;
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000784 unsigned int mdio_bus;
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100785 enum efx_phy_mode phy_mode;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100786
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000787 u32 link_advertising;
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000788 struct efx_link_state link_state;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100789 unsigned int n_link_state_changes;
790
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100791 bool promiscuous;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100792 union efx_multicast_hash multicast_hash;
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800793 enum efx_fc_type wanted_fc;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100794
795 atomic_t rx_reset;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100796 enum efx_loopback_mode loopback_mode;
Ben Hutchingse58f69f2009-11-29 15:08:41 +0000797 u64 loopback_modes;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100798
799 void *loopback_selftest;
Ben Hutchings64eebcf2010-09-20 08:43:07 +0000800
801 struct efx_filter_state *filter_state;
Ben Hutchingsab28c122010-12-06 22:53:15 +0000802
803 /* The following fields may be written more often */
804
805 struct delayed_work monitor_work ____cacheline_aligned_in_smp;
806 spinlock_t biu_lock;
807 volatile signed int last_irq_cpu;
808 unsigned n_rx_nodesc_drop_cnt;
809 struct efx_mac_stats mac_stats;
810 spinlock_t stats_lock;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100811};
812
Ben Hutchings55668612008-05-16 21:16:10 +0100813static inline int efx_dev_registered(struct efx_nic *efx)
814{
815 return efx->net_dev->reg_state == NETREG_REGISTERED;
816}
817
818/* Net device name, for inclusion in log messages if it has been registered.
819 * Use efx->name not efx->net_dev->name so that races with (un)registration
820 * are harmless.
821 */
822static inline const char *efx_dev_name(struct efx_nic *efx)
823{
824 return efx_dev_registered(efx) ? efx->name : "";
825}
826
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000827static inline unsigned int efx_port_num(struct efx_nic *efx)
828{
Ben Hutchings3df95ce2010-06-02 10:39:56 +0000829 return efx->net_dev->dev_id;
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000830}
831
Ben Hutchings8ceee662008-04-27 12:55:59 +0100832/**
833 * struct efx_nic_type - Efx device type definition
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000834 * @probe: Probe the controller
835 * @remove: Free resources allocated by probe()
836 * @init: Initialise the controller
837 * @fini: Shut down the controller
838 * @monitor: Periodic function for polling link state and hardware monitor
839 * @reset: Reset the controller hardware and possibly the PHY. This will
840 * be called while the controller is uninitialised.
841 * @probe_port: Probe the MAC and PHY
842 * @remove_port: Free resources allocated by probe_port()
Ben Hutchings40641ed2010-12-02 13:47:45 +0000843 * @handle_global_event: Handle a "global" event (may be %NULL)
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000844 * @prepare_flush: Prepare the hardware for flushing the DMA queues
845 * @update_stats: Update statistics not provided by event handling
846 * @start_stats: Start the regular fetching of statistics
847 * @stop_stats: Stop the regular fetching of statistics
Ben Hutchings06629f02009-11-29 03:43:43 +0000848 * @set_id_led: Set state of identifying LED or revert to automatic function
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000849 * @push_irq_moderation: Apply interrupt moderation value
850 * @push_multicast_hash: Apply multicast hash table
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000851 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
Ben Hutchings89c758f2009-11-29 03:43:07 +0000852 * @get_wol: Get WoL configuration from driver state
853 * @set_wol: Push WoL configuration to the NIC
854 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
Ben Hutchings9bfc4bb2009-11-29 03:43:23 +0000855 * @test_registers: Test read/write functionality of control registers
Ben Hutchings0aa3fba2009-11-29 03:43:33 +0000856 * @test_nvram: Test validity of NVRAM contents
Steve Hodgsonb895d732009-11-28 05:35:00 +0000857 * @default_mac_ops: efx_mac_operations to set at startup
Ben Hutchingsdaeda632009-11-28 05:36:04 +0000858 * @revision: Hardware architecture revision
Ben Hutchings8ceee662008-04-27 12:55:59 +0100859 * @mem_map_size: Memory BAR mapped size
860 * @txd_ptr_tbl_base: TX descriptor ring base address
861 * @rxd_ptr_tbl_base: RX descriptor ring base address
862 * @buf_tbl_base: Buffer table base address
863 * @evq_ptr_tbl_base: Event queue pointer table base address
864 * @evq_rptr_tbl_base: Event queue read-pointer table base address
Ben Hutchings8ceee662008-04-27 12:55:59 +0100865 * @max_dma_mask: Maximum possible DMA mask
Ben Hutchings39c9cf02010-06-23 11:31:28 +0000866 * @rx_buffer_hash_size: Size of hash at start of RX buffer
867 * @rx_buffer_padding: Size of padding at end of RX buffer
Ben Hutchings8ceee662008-04-27 12:55:59 +0100868 * @max_interrupt_mode: Highest capability interrupt mode supported
869 * from &enum efx_init_mode.
870 * @phys_addr_channels: Number of channels with physically addressed
871 * descriptors
Ben Hutchings0228f5cdb02009-11-28 05:36:12 +0000872 * @tx_dc_base: Base address in SRAM of TX queue descriptor caches
873 * @rx_dc_base: Base address in SRAM of RX queue descriptor caches
Ben Hutchingsc383b532009-11-29 15:11:02 +0000874 * @offload_features: net_device feature flags for protocol offload
875 * features implemented in hardware
Ben Hutchingseb9f6742009-11-29 03:43:15 +0000876 * @reset_world_flags: Flags for additional components covered by
877 * reset method RESET_TYPE_WORLD
Ben Hutchings8ceee662008-04-27 12:55:59 +0100878 */
879struct efx_nic_type {
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000880 int (*probe)(struct efx_nic *efx);
881 void (*remove)(struct efx_nic *efx);
882 int (*init)(struct efx_nic *efx);
883 void (*fini)(struct efx_nic *efx);
884 void (*monitor)(struct efx_nic *efx);
885 int (*reset)(struct efx_nic *efx, enum reset_type method);
886 int (*probe_port)(struct efx_nic *efx);
887 void (*remove_port)(struct efx_nic *efx);
Ben Hutchings40641ed2010-12-02 13:47:45 +0000888 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000889 void (*prepare_flush)(struct efx_nic *efx);
890 void (*update_stats)(struct efx_nic *efx);
891 void (*start_stats)(struct efx_nic *efx);
892 void (*stop_stats)(struct efx_nic *efx);
Ben Hutchings06629f02009-11-29 03:43:43 +0000893 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +0000894 void (*push_irq_moderation)(struct efx_channel *channel);
895 void (*push_multicast_hash)(struct efx_nic *efx);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000896 int (*reconfigure_port)(struct efx_nic *efx);
Ben Hutchings89c758f2009-11-29 03:43:07 +0000897 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
898 int (*set_wol)(struct efx_nic *efx, u32 type);
899 void (*resume_wol)(struct efx_nic *efx);
Ben Hutchings9bfc4bb2009-11-29 03:43:23 +0000900 int (*test_registers)(struct efx_nic *efx);
Ben Hutchings0aa3fba2009-11-29 03:43:33 +0000901 int (*test_nvram)(struct efx_nic *efx);
Steve Hodgsonb895d732009-11-28 05:35:00 +0000902 struct efx_mac_operations *default_mac_ops;
903
Ben Hutchingsdaeda632009-11-28 05:36:04 +0000904 int revision;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100905 unsigned int mem_map_size;
906 unsigned int txd_ptr_tbl_base;
907 unsigned int rxd_ptr_tbl_base;
908 unsigned int buf_tbl_base;
909 unsigned int evq_ptr_tbl_base;
910 unsigned int evq_rptr_tbl_base;
Ben Hutchings9bbd7d92008-05-16 21:18:48 +0100911 u64 max_dma_mask;
Ben Hutchings39c9cf02010-06-23 11:31:28 +0000912 unsigned int rx_buffer_hash_size;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100913 unsigned int rx_buffer_padding;
914 unsigned int max_interrupt_mode;
915 unsigned int phys_addr_channels;
Ben Hutchings0228f5cdb02009-11-28 05:36:12 +0000916 unsigned int tx_dc_base;
917 unsigned int rx_dc_base;
Michał Mirosław04ed3e72011-01-24 15:32:47 -0800918 u32 offload_features;
Ben Hutchingseb9f6742009-11-29 03:43:15 +0000919 u32 reset_world_flags;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100920};
921
922/**************************************************************************
923 *
924 * Prototypes and inline functions
925 *
926 *************************************************************************/
927
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +0000928static inline struct efx_channel *
929efx_get_channel(struct efx_nic *efx, unsigned index)
930{
931 EFX_BUG_ON_PARANOID(index >= efx->n_channels);
Ben Hutchings8313aca2010-09-10 06:41:57 +0000932 return efx->channel[index];
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +0000933}
934
Ben Hutchings8ceee662008-04-27 12:55:59 +0100935/* Iterate over all used channels */
936#define efx_for_each_channel(_channel, _efx) \
Ben Hutchings8313aca2010-09-10 06:41:57 +0000937 for (_channel = (_efx)->channel[0]; \
938 _channel; \
939 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
940 (_efx)->channel[_channel->channel + 1] : NULL)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100941
Ben Hutchings97653432011-01-12 18:26:56 +0000942static inline struct efx_tx_queue *
943efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
944{
945 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
946 type >= EFX_TXQ_TYPES);
947 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type];
948}
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +0000949
Ben Hutchings525da902011-02-07 23:04:38 +0000950static inline bool efx_channel_has_tx_queues(struct efx_channel *channel)
951{
952 return channel->channel - channel->efx->tx_channel_offset <
953 channel->efx->n_tx_channels;
954}
955
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +0000956static inline struct efx_tx_queue *
957efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type)
958{
Ben Hutchings525da902011-02-07 23:04:38 +0000959 EFX_BUG_ON_PARANOID(!efx_channel_has_tx_queues(channel) ||
960 type >= EFX_TXQ_TYPES);
961 return &channel->tx_queue[type];
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +0000962}
Ben Hutchings8ceee662008-04-27 12:55:59 +0100963
Ben Hutchings94b274b2011-01-10 21:18:20 +0000964static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue)
965{
966 return !(tx_queue->efx->net_dev->num_tc < 2 &&
967 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI);
968}
969
Ben Hutchings8ceee662008-04-27 12:55:59 +0100970/* Iterate over all TX queues belonging to a channel */
971#define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
Ben Hutchings525da902011-02-07 23:04:38 +0000972 if (!efx_channel_has_tx_queues(_channel)) \
973 ; \
974 else \
975 for (_tx_queue = (_channel)->tx_queue; \
Ben Hutchings94b274b2011-01-10 21:18:20 +0000976 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
977 efx_tx_queue_used(_tx_queue); \
Ben Hutchings525da902011-02-07 23:04:38 +0000978 _tx_queue++)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100979
Ben Hutchings94b274b2011-01-10 21:18:20 +0000980/* Iterate over all possible TX queues belonging to a channel */
981#define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
982 for (_tx_queue = (_channel)->tx_queue; \
983 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
984 _tx_queue++)
985
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +0000986static inline struct efx_rx_queue *
987efx_get_rx_queue(struct efx_nic *efx, unsigned index)
988{
989 EFX_BUG_ON_PARANOID(index >= efx->n_rx_channels);
Ben Hutchings8313aca2010-09-10 06:41:57 +0000990 return &efx->channel[index]->rx_queue;
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +0000991}
992
Ben Hutchings525da902011-02-07 23:04:38 +0000993static inline bool efx_channel_has_rx_queue(struct efx_channel *channel)
994{
995 return channel->channel < channel->efx->n_rx_channels;
996}
997
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +0000998static inline struct efx_rx_queue *
999efx_channel_get_rx_queue(struct efx_channel *channel)
1000{
Ben Hutchings525da902011-02-07 23:04:38 +00001001 EFX_BUG_ON_PARANOID(!efx_channel_has_rx_queue(channel));
1002 return &channel->rx_queue;
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001003}
1004
Ben Hutchings8ceee662008-04-27 12:55:59 +01001005/* Iterate over all RX queues belonging to a channel */
1006#define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
Ben Hutchings525da902011-02-07 23:04:38 +00001007 if (!efx_channel_has_rx_queue(_channel)) \
1008 ; \
1009 else \
1010 for (_rx_queue = &(_channel)->rx_queue; \
1011 _rx_queue; \
1012 _rx_queue = NULL)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001013
Ben Hutchingsba1e8a32010-09-10 06:41:36 +00001014static inline struct efx_channel *
1015efx_rx_queue_channel(struct efx_rx_queue *rx_queue)
1016{
Ben Hutchings8313aca2010-09-10 06:41:57 +00001017 return container_of(rx_queue, struct efx_channel, rx_queue);
Ben Hutchingsba1e8a32010-09-10 06:41:36 +00001018}
1019
1020static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue)
1021{
Ben Hutchings8313aca2010-09-10 06:41:57 +00001022 return efx_rx_queue_channel(rx_queue)->channel;
Ben Hutchingsba1e8a32010-09-10 06:41:36 +00001023}
1024
Ben Hutchings8ceee662008-04-27 12:55:59 +01001025/* Returns a pointer to the specified receive buffer in the RX
1026 * descriptor queue.
1027 */
1028static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
1029 unsigned int index)
1030{
Eric Dumazet807540b2010-09-23 05:40:09 +00001031 return &rx_queue->buffer[index];
Ben Hutchings8ceee662008-04-27 12:55:59 +01001032}
1033
1034/* Set bit in a little-endian bitfield */
Ben Hutchings18c2fc02008-09-01 12:43:39 +01001035static inline void set_bit_le(unsigned nr, unsigned char *addr)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001036{
1037 addr[nr / 8] |= (1 << (nr % 8));
1038}
1039
1040/* Clear bit in a little-endian bitfield */
Ben Hutchings18c2fc02008-09-01 12:43:39 +01001041static inline void clear_bit_le(unsigned nr, unsigned char *addr)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001042{
1043 addr[nr / 8] &= ~(1 << (nr % 8));
1044}
1045
1046
1047/**
1048 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1049 *
1050 * This calculates the maximum frame length that will be used for a
1051 * given MTU. The frame length will be equal to the MTU plus a
1052 * constant amount of header space and padding. This is the quantity
1053 * that the net driver will program into the MAC as the maximum frame
1054 * length.
1055 *
Ben Hutchings754c6532010-02-03 09:31:57 +00001056 * The 10G MAC requires 8-byte alignment on the frame
Ben Hutchings8ceee662008-04-27 12:55:59 +01001057 * length, so we round up to the nearest 8.
Ben Hutchingscc117632009-08-26 08:17:59 +00001058 *
1059 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1060 * XGMII cycle). If the frame length reaches the maximum value in the
1061 * same cycle, the XMAC can miss the IPG altogether. We work around
1062 * this by adding a further 16 bytes.
Ben Hutchings8ceee662008-04-27 12:55:59 +01001063 */
1064#define EFX_MAX_FRAME_LEN(mtu) \
Ben Hutchingscc117632009-08-26 08:17:59 +00001065 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001066
1067
1068#endif /* EFX_NET_DRIVER_H */