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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __irq_h
2#define __irq_h
3
4/*
5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
7 * within this file.
8 *
9 * Thanks. --rmk
10 */
11
12#include <linux/config.h>
Adrian Bunk23f9b312005-12-21 02:27:50 +010013#include <linux/smp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
Martin Schwidefsky347a8dc2006-01-06 00:19:28 -080015#if !defined(CONFIG_S390)
Linus Torvalds1da177e2005-04-16 15:20:36 -070016
17#include <linux/linkage.h>
18#include <linux/cache.h>
19#include <linux/spinlock.h>
20#include <linux/cpumask.h>
21
22#include <asm/irq.h>
23#include <asm/ptrace.h>
24
25/*
26 * IRQ line status.
27 */
28#define IRQ_INPROGRESS 1 /* IRQ handler active - do not enter! */
29#define IRQ_DISABLED 2 /* IRQ disabled - do not enter! */
30#define IRQ_PENDING 4 /* IRQ pending - replay on enable */
31#define IRQ_REPLAY 8 /* IRQ has been replayed but not acked yet */
32#define IRQ_AUTODETECT 16 /* IRQ is being autodetected */
33#define IRQ_WAITING 32 /* IRQ not yet seen - for autodetection */
34#define IRQ_LEVEL 64 /* IRQ level triggered */
35#define IRQ_MASKED 128 /* IRQ masked - shouldn't be seen again */
Karsten Wiesef26fdd52005-09-06 15:17:25 -070036#if defined(ARCH_HAS_IRQ_PER_CPU)
37# define IRQ_PER_CPU 256 /* IRQ is per CPU */
38# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
39#else
40# define CHECK_IRQ_PER_CPU(var) 0
41#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070042
43/*
44 * Interrupt controller descriptor. This is all we need
45 * to describe about the low-level hardware.
46 */
47struct hw_interrupt_type {
48 const char * typename;
49 unsigned int (*startup)(unsigned int irq);
50 void (*shutdown)(unsigned int irq);
51 void (*enable)(unsigned int irq);
52 void (*disable)(unsigned int irq);
53 void (*ack)(unsigned int irq);
54 void (*end)(unsigned int irq);
55 void (*set_affinity)(unsigned int irq, cpumask_t dest);
Paolo 'Blaisorblade' Giarrussob77d6ad2005-06-21 17:16:24 -070056 /* Currently used only by UML, might disappear one day.*/
57#ifdef CONFIG_IRQ_RELEASE_METHOD
Paolo 'Blaisorblade' Giarrussodbce7062005-06-21 17:16:19 -070058 void (*release)(unsigned int irq, void *dev_id);
Paolo 'Blaisorblade' Giarrussob77d6ad2005-06-21 17:16:24 -070059#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070060};
61
62typedef struct hw_interrupt_type hw_irq_controller;
63
64/*
65 * This is the "IRQ descriptor", which contains various information
66 * about the irq, including what kind of hardware handling it has,
67 * whether it is disabled etc etc.
68 *
69 * Pad this out to 32 bytes for cache and indexing reasons.
70 */
71typedef struct irq_desc {
72 hw_irq_controller *handler;
73 void *handler_data;
74 struct irqaction *action; /* IRQ action list */
75 unsigned int status; /* IRQ status */
76 unsigned int depth; /* nested irq disables */
77 unsigned int irq_count; /* For detecting broken interrupts */
78 unsigned int irqs_unhandled;
79 spinlock_t lock;
Ashok Raj54d5d422005-09-06 15:16:15 -070080#if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE)
81 unsigned int move_irq; /* Flag need to re-target intr dest*/
82#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070083} ____cacheline_aligned irq_desc_t;
84
85extern irq_desc_t irq_desc [NR_IRQS];
86
Ashok Raj54d5d422005-09-06 15:16:15 -070087/* Return a pointer to the irq descriptor for IRQ. */
88static inline irq_desc_t *
89irq_descp (int irq)
90{
91 return irq_desc + irq;
92}
93
Linus Torvalds1da177e2005-04-16 15:20:36 -070094#include <asm/hw_irq.h> /* the arch dependent stuff */
95
96extern int setup_irq(unsigned int irq, struct irqaction * new);
97
98#ifdef CONFIG_GENERIC_HARDIRQS
99extern cpumask_t irq_affinity[NR_IRQS];
Ashok Raj54d5d422005-09-06 15:16:15 -0700100
101#ifdef CONFIG_SMP
102static inline void set_native_irq_info(int irq, cpumask_t mask)
103{
104 irq_affinity[irq] = mask;
105}
106#else
107static inline void set_native_irq_info(int irq, cpumask_t mask)
108{
109}
110#endif
111
112#ifdef CONFIG_SMP
113
114#if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE)
115extern cpumask_t pending_irq_cpumask[NR_IRQS];
116
117static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
118{
119 irq_desc_t *desc = irq_desc + irq;
120 unsigned long flags;
121
122 spin_lock_irqsave(&desc->lock, flags);
123 desc->move_irq = 1;
124 pending_irq_cpumask[irq] = mask;
125 spin_unlock_irqrestore(&desc->lock, flags);
126}
127
128static inline void
129move_native_irq(int irq)
130{
131 cpumask_t tmp;
132 irq_desc_t *desc = irq_descp(irq);
133
134 if (likely (!desc->move_irq))
135 return;
136
137 desc->move_irq = 0;
138
139 if (likely(cpus_empty(pending_irq_cpumask[irq])))
140 return;
141
142 if (!desc->handler->set_affinity)
143 return;
144
145 /* note - we hold the desc->lock */
146 cpus_and(tmp, pending_irq_cpumask[irq], cpu_online_map);
147
148 /*
149 * If there was a valid mask to work with, please
150 * do the disable, re-program, enable sequence.
151 * This is *not* particularly important for level triggered
152 * but in a edge trigger case, we might be setting rte
153 * when an active trigger is comming in. This could
154 * cause some ioapics to mal-function.
155 * Being paranoid i guess!
156 */
157 if (unlikely(!cpus_empty(tmp))) {
158 desc->handler->disable(irq);
159 desc->handler->set_affinity(irq,tmp);
160 desc->handler->enable(irq);
161 }
162 cpus_clear(pending_irq_cpumask[irq]);
163}
164
165#ifdef CONFIG_PCI_MSI
166/*
167 * Wonder why these are dummies?
168 * For e.g the set_ioapic_affinity_vector() calls the set_ioapic_affinity_irq()
169 * counter part after translating the vector to irq info. We need to perform
170 * this operation on the real irq, when we dont use vector, i.e when
171 * pci_use_vector() is false.
172 */
173static inline void move_irq(int irq)
174{
175}
176
177static inline void set_irq_info(int irq, cpumask_t mask)
178{
179}
180
181#else // CONFIG_PCI_MSI
182
183static inline void move_irq(int irq)
184{
185 move_native_irq(irq);
186}
187
188static inline void set_irq_info(int irq, cpumask_t mask)
189{
190 set_native_irq_info(irq, mask);
191}
192#endif // CONFIG_PCI_MSI
193
194#else // CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE
195
196#define move_irq(x)
197#define move_native_irq(x)
198#define set_pending_irq(x,y)
199static inline void set_irq_info(int irq, cpumask_t mask)
200{
201 set_native_irq_info(irq, mask);
202}
203
204#endif // CONFIG_GENERIC_PENDING_IRQ
205
206#else // CONFIG_SMP
207
208#define move_irq(x)
209#define move_native_irq(x)
210
211#endif // CONFIG_SMP
212
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213extern int no_irq_affinity;
214extern int noirqdebug_setup(char *str);
215
216extern fastcall int handle_IRQ_event(unsigned int irq, struct pt_regs *regs,
Alan Cox200803d2005-06-28 20:45:18 -0700217 struct irqaction *action);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs);
Alan Cox200803d2005-06-28 20:45:18 -0700219extern void note_interrupt(unsigned int irq, irq_desc_t *desc,
220 int action_ret, struct pt_regs *regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221extern int can_request_irq(unsigned int irq, unsigned long irqflags);
222
223extern void init_irq_proc(void);
Ivan Kokshayskyeee45262006-01-06 00:12:21 -0800224
225#ifdef CONFIG_AUTO_IRQ_AFFINITY
226extern int select_smp_affinity(unsigned int irq);
227#else
228static inline int
229select_smp_affinity(unsigned int irq)
230{
231 return 1;
232}
233#endif
234
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235#endif
236
237extern hw_irq_controller no_irq_type; /* needed in every arch ? */
238
239#endif
240
241#endif /* __irq_h */