Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 3 | * copy of this software and associated documentation files (the "Software"), |
| 4 | * to deal in the Software without restriction, including without limitation |
| 5 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 6 | * and/or sell copies of the Software, and to permit persons to whom the |
| 7 | * Software is furnished to do so, subject to the following conditions: |
| 8 | * |
| 9 | * The above copyright notice and this permission notice shall be included in |
| 10 | * all copies or substantial portions of the Software. |
| 11 | * |
| 12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 13 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 14 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 15 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 16 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 17 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 18 | * OTHER DEALINGS IN THE SOFTWARE. |
| 19 | * |
| 20 | * Authors: Rafał Miłecki <zajec5@gmail.com> |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 21 | * Alex Deucher <alexdeucher@gmail.com> |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 22 | */ |
| 23 | #include "drmP.h" |
| 24 | #include "radeon.h" |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 25 | #include "avivod.h" |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 26 | #ifdef CONFIG_ACPI |
| 27 | #include <linux/acpi.h> |
| 28 | #endif |
| 29 | #include <linux/power_supply.h> |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 30 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 31 | #define RADEON_IDLE_LOOP_MS 100 |
| 32 | #define RADEON_RECLOCK_DELAY_MS 200 |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 33 | #define RADEON_WAIT_VBLANK_TIMEOUT 200 |
Alex Deucher | 2031f77 | 2010-04-22 12:52:11 -0400 | [diff] [blame] | 34 | #define RADEON_WAIT_IDLE_TIMEOUT 200 |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 35 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 36 | static void radeon_dynpm_idle_work_handler(struct work_struct *work); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 37 | static int radeon_debugfs_pm_init(struct radeon_device *rdev); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 38 | static bool radeon_pm_in_vbl(struct radeon_device *rdev); |
| 39 | static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish); |
| 40 | static void radeon_pm_update_profile(struct radeon_device *rdev); |
| 41 | static void radeon_pm_set_clocks(struct radeon_device *rdev); |
| 42 | |
| 43 | #define ACPI_AC_CLASS "ac_adapter" |
| 44 | |
| 45 | #ifdef CONFIG_ACPI |
| 46 | static int radeon_acpi_event(struct notifier_block *nb, |
| 47 | unsigned long val, |
| 48 | void *data) |
| 49 | { |
| 50 | struct radeon_device *rdev = container_of(nb, struct radeon_device, acpi_nb); |
| 51 | struct acpi_bus_event *entry = (struct acpi_bus_event *)data; |
| 52 | |
| 53 | if (strcmp(entry->device_class, ACPI_AC_CLASS) == 0) { |
| 54 | if (power_supply_is_system_supplied() > 0) |
Alex Deucher | ce8a3eb | 2010-05-07 16:58:27 -0400 | [diff] [blame] | 55 | DRM_DEBUG("pm: AC\n"); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 56 | else |
Alex Deucher | ce8a3eb | 2010-05-07 16:58:27 -0400 | [diff] [blame] | 57 | DRM_DEBUG("pm: DC\n"); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 58 | |
| 59 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
| 60 | if (rdev->pm.profile == PM_PROFILE_AUTO) { |
| 61 | mutex_lock(&rdev->pm.mutex); |
| 62 | radeon_pm_update_profile(rdev); |
| 63 | radeon_pm_set_clocks(rdev); |
| 64 | mutex_unlock(&rdev->pm.mutex); |
| 65 | } |
| 66 | } |
| 67 | } |
| 68 | |
| 69 | return NOTIFY_OK; |
| 70 | } |
| 71 | #endif |
| 72 | |
| 73 | static void radeon_pm_update_profile(struct radeon_device *rdev) |
| 74 | { |
| 75 | switch (rdev->pm.profile) { |
| 76 | case PM_PROFILE_DEFAULT: |
| 77 | rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX; |
| 78 | break; |
| 79 | case PM_PROFILE_AUTO: |
| 80 | if (power_supply_is_system_supplied() > 0) { |
| 81 | if (rdev->pm.active_crtc_count > 1) |
| 82 | rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; |
| 83 | else |
| 84 | rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; |
| 85 | } else { |
| 86 | if (rdev->pm.active_crtc_count > 1) |
| 87 | rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; |
| 88 | else |
| 89 | rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; |
| 90 | } |
| 91 | break; |
| 92 | case PM_PROFILE_LOW: |
| 93 | if (rdev->pm.active_crtc_count > 1) |
| 94 | rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; |
| 95 | else |
| 96 | rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; |
| 97 | break; |
| 98 | case PM_PROFILE_HIGH: |
| 99 | if (rdev->pm.active_crtc_count > 1) |
| 100 | rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; |
| 101 | else |
| 102 | rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; |
| 103 | break; |
| 104 | } |
| 105 | |
| 106 | if (rdev->pm.active_crtc_count == 0) { |
| 107 | rdev->pm.requested_power_state_index = |
| 108 | rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx; |
| 109 | rdev->pm.requested_clock_mode_index = |
| 110 | rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx; |
| 111 | } else { |
| 112 | rdev->pm.requested_power_state_index = |
| 113 | rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx; |
| 114 | rdev->pm.requested_clock_mode_index = |
| 115 | rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx; |
| 116 | } |
| 117 | } |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 118 | |
Matthew Garrett | 5876dd2 | 2010-04-26 15:52:20 -0400 | [diff] [blame] | 119 | static void radeon_unmap_vram_bos(struct radeon_device *rdev) |
| 120 | { |
| 121 | struct radeon_bo *bo, *n; |
| 122 | |
| 123 | if (list_empty(&rdev->gem.objects)) |
| 124 | return; |
| 125 | |
| 126 | list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) { |
| 127 | if (bo->tbo.mem.mem_type == TTM_PL_VRAM) |
| 128 | ttm_bo_unmap_virtual(&bo->tbo); |
| 129 | } |
| 130 | |
| 131 | if (rdev->gart.table.vram.robj) |
| 132 | ttm_bo_unmap_virtual(&rdev->gart.table.vram.robj->tbo); |
| 133 | |
| 134 | if (rdev->stollen_vga_memory) |
| 135 | ttm_bo_unmap_virtual(&rdev->stollen_vga_memory->tbo); |
| 136 | |
| 137 | if (rdev->r600_blit.shader_obj) |
| 138 | ttm_bo_unmap_virtual(&rdev->r600_blit.shader_obj->tbo); |
| 139 | } |
| 140 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 141 | static void radeon_sync_with_vblank(struct radeon_device *rdev) |
| 142 | { |
| 143 | if (rdev->pm.active_crtcs) { |
| 144 | rdev->pm.vblank_sync = false; |
| 145 | wait_event_timeout( |
| 146 | rdev->irq.vblank_queue, rdev->pm.vblank_sync, |
| 147 | msecs_to_jiffies(RADEON_WAIT_VBLANK_TIMEOUT)); |
| 148 | } |
| 149 | } |
| 150 | |
| 151 | static void radeon_set_power_state(struct radeon_device *rdev) |
| 152 | { |
| 153 | u32 sclk, mclk; |
| 154 | |
| 155 | if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && |
| 156 | (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) |
| 157 | return; |
| 158 | |
| 159 | if (radeon_gui_idle(rdev)) { |
| 160 | sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. |
| 161 | clock_info[rdev->pm.requested_clock_mode_index].sclk; |
| 162 | if (sclk > rdev->clock.default_sclk) |
| 163 | sclk = rdev->clock.default_sclk; |
| 164 | |
| 165 | mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. |
| 166 | clock_info[rdev->pm.requested_clock_mode_index].mclk; |
| 167 | if (mclk > rdev->clock.default_mclk) |
| 168 | mclk = rdev->clock.default_mclk; |
| 169 | |
| 170 | /* voltage, pcie lanes, etc.*/ |
| 171 | radeon_pm_misc(rdev); |
| 172 | |
| 173 | if (rdev->pm.pm_method == PM_METHOD_DYNPM) { |
| 174 | radeon_sync_with_vblank(rdev); |
| 175 | |
| 176 | if (!radeon_pm_in_vbl(rdev)) |
| 177 | return; |
| 178 | |
| 179 | radeon_pm_prepare(rdev); |
| 180 | /* set engine clock */ |
| 181 | if (sclk != rdev->pm.current_sclk) { |
| 182 | radeon_pm_debug_check_in_vbl(rdev, false); |
| 183 | radeon_set_engine_clock(rdev, sclk); |
| 184 | radeon_pm_debug_check_in_vbl(rdev, true); |
| 185 | rdev->pm.current_sclk = sclk; |
Alex Deucher | ce8a3eb | 2010-05-07 16:58:27 -0400 | [diff] [blame] | 186 | DRM_DEBUG("Setting: e: %d\n", sclk); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 187 | } |
| 188 | |
| 189 | /* set memory clock */ |
| 190 | if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) { |
| 191 | radeon_pm_debug_check_in_vbl(rdev, false); |
| 192 | radeon_set_memory_clock(rdev, mclk); |
| 193 | radeon_pm_debug_check_in_vbl(rdev, true); |
| 194 | rdev->pm.current_mclk = mclk; |
Alex Deucher | ce8a3eb | 2010-05-07 16:58:27 -0400 | [diff] [blame] | 195 | DRM_DEBUG("Setting: m: %d\n", mclk); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 196 | } |
| 197 | radeon_pm_finish(rdev); |
| 198 | } else { |
| 199 | /* set engine clock */ |
| 200 | if (sclk != rdev->pm.current_sclk) { |
| 201 | radeon_sync_with_vblank(rdev); |
| 202 | radeon_pm_prepare(rdev); |
| 203 | radeon_set_engine_clock(rdev, sclk); |
| 204 | radeon_pm_finish(rdev); |
| 205 | rdev->pm.current_sclk = sclk; |
Alex Deucher | ce8a3eb | 2010-05-07 16:58:27 -0400 | [diff] [blame] | 206 | DRM_DEBUG("Setting: e: %d\n", sclk); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 207 | } |
| 208 | /* set memory clock */ |
| 209 | if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) { |
| 210 | radeon_sync_with_vblank(rdev); |
| 211 | radeon_pm_prepare(rdev); |
| 212 | radeon_set_memory_clock(rdev, mclk); |
| 213 | radeon_pm_finish(rdev); |
| 214 | rdev->pm.current_mclk = mclk; |
Alex Deucher | ce8a3eb | 2010-05-07 16:58:27 -0400 | [diff] [blame] | 215 | DRM_DEBUG("Setting: m: %d\n", mclk); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 216 | } |
| 217 | } |
| 218 | |
| 219 | rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; |
| 220 | rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; |
| 221 | } else |
Alex Deucher | ce8a3eb | 2010-05-07 16:58:27 -0400 | [diff] [blame] | 222 | DRM_DEBUG("pm: GUI not idle!!!\n"); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 223 | } |
| 224 | |
| 225 | static void radeon_pm_set_clocks(struct radeon_device *rdev) |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 226 | { |
Matthew Garrett | 2aba631 | 2010-04-26 15:45:23 -0400 | [diff] [blame] | 227 | int i; |
| 228 | |
Matthew Garrett | 612e06c | 2010-04-27 17:16:58 -0400 | [diff] [blame] | 229 | mutex_lock(&rdev->ddev->struct_mutex); |
| 230 | mutex_lock(&rdev->vram_mutex); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 231 | mutex_lock(&rdev->cp.mutex); |
Alex Deucher | 4f3218c | 2010-04-29 16:14:02 -0400 | [diff] [blame] | 232 | |
| 233 | /* gui idle int has issues on older chips it seems */ |
| 234 | if (rdev->family >= CHIP_R600) { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 235 | if (rdev->irq.installed) { |
| 236 | /* wait for GPU idle */ |
| 237 | rdev->pm.gui_idle = false; |
| 238 | rdev->irq.gui_idle = true; |
| 239 | radeon_irq_set(rdev); |
| 240 | wait_event_interruptible_timeout( |
| 241 | rdev->irq.idle_queue, rdev->pm.gui_idle, |
| 242 | msecs_to_jiffies(RADEON_WAIT_IDLE_TIMEOUT)); |
| 243 | rdev->irq.gui_idle = false; |
| 244 | radeon_irq_set(rdev); |
| 245 | } |
Matthew Garrett | 01434b4 | 2010-04-30 15:48:23 -0400 | [diff] [blame] | 246 | } else { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 247 | if (rdev->cp.ready) { |
| 248 | struct radeon_fence *fence; |
| 249 | radeon_ring_alloc(rdev, 64); |
| 250 | radeon_fence_create(rdev, &fence); |
| 251 | radeon_fence_emit(rdev, fence); |
| 252 | radeon_ring_commit(rdev); |
| 253 | radeon_fence_wait(fence, false); |
| 254 | radeon_fence_unref(&fence); |
| 255 | } |
Alex Deucher | 4f3218c | 2010-04-29 16:14:02 -0400 | [diff] [blame] | 256 | } |
Matthew Garrett | 5876dd2 | 2010-04-26 15:52:20 -0400 | [diff] [blame] | 257 | radeon_unmap_vram_bos(rdev); |
| 258 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 259 | if (rdev->irq.installed) { |
Matthew Garrett | 2aba631 | 2010-04-26 15:45:23 -0400 | [diff] [blame] | 260 | for (i = 0; i < rdev->num_crtc; i++) { |
| 261 | if (rdev->pm.active_crtcs & (1 << i)) { |
| 262 | rdev->pm.req_vblank |= (1 << i); |
| 263 | drm_vblank_get(rdev->ddev, i); |
| 264 | } |
| 265 | } |
| 266 | } |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 267 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 268 | radeon_set_power_state(rdev); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 269 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 270 | if (rdev->irq.installed) { |
Matthew Garrett | 2aba631 | 2010-04-26 15:45:23 -0400 | [diff] [blame] | 271 | for (i = 0; i < rdev->num_crtc; i++) { |
| 272 | if (rdev->pm.req_vblank & (1 << i)) { |
| 273 | rdev->pm.req_vblank &= ~(1 << i); |
| 274 | drm_vblank_put(rdev->ddev, i); |
| 275 | } |
| 276 | } |
| 277 | } |
Matthew Garrett | 5876dd2 | 2010-04-26 15:52:20 -0400 | [diff] [blame] | 278 | |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 279 | /* update display watermarks based on new power state */ |
| 280 | radeon_update_bandwidth_info(rdev); |
| 281 | if (rdev->pm.active_crtc_count) |
| 282 | radeon_bandwidth_update(rdev); |
| 283 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 284 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; |
Matthew Garrett | 2aba631 | 2010-04-26 15:45:23 -0400 | [diff] [blame] | 285 | |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 286 | mutex_unlock(&rdev->cp.mutex); |
Matthew Garrett | 612e06c | 2010-04-27 17:16:58 -0400 | [diff] [blame] | 287 | mutex_unlock(&rdev->vram_mutex); |
| 288 | mutex_unlock(&rdev->ddev->struct_mutex); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 289 | } |
| 290 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 291 | static ssize_t radeon_get_pm_profile(struct device *dev, |
| 292 | struct device_attribute *attr, |
| 293 | char *buf) |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 294 | { |
| 295 | struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); |
| 296 | struct radeon_device *rdev = ddev->dev_private; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 297 | int cp = rdev->pm.profile; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 298 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 299 | return snprintf(buf, PAGE_SIZE, "%s\n", |
| 300 | (cp == PM_PROFILE_AUTO) ? "auto" : |
| 301 | (cp == PM_PROFILE_LOW) ? "low" : |
| 302 | (cp == PM_PROFILE_HIGH) ? "high" : "default"); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 303 | } |
| 304 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 305 | static ssize_t radeon_set_pm_profile(struct device *dev, |
| 306 | struct device_attribute *attr, |
| 307 | const char *buf, |
| 308 | size_t count) |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 309 | { |
| 310 | struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); |
| 311 | struct radeon_device *rdev = ddev->dev_private; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 312 | |
| 313 | mutex_lock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 314 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
| 315 | if (strncmp("default", buf, strlen("default")) == 0) |
| 316 | rdev->pm.profile = PM_PROFILE_DEFAULT; |
| 317 | else if (strncmp("auto", buf, strlen("auto")) == 0) |
| 318 | rdev->pm.profile = PM_PROFILE_AUTO; |
| 319 | else if (strncmp("low", buf, strlen("low")) == 0) |
| 320 | rdev->pm.profile = PM_PROFILE_LOW; |
| 321 | else if (strncmp("high", buf, strlen("high")) == 0) |
| 322 | rdev->pm.profile = PM_PROFILE_HIGH; |
| 323 | else { |
| 324 | DRM_ERROR("invalid power profile!\n"); |
| 325 | goto fail; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 326 | } |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 327 | radeon_pm_update_profile(rdev); |
| 328 | radeon_pm_set_clocks(rdev); |
| 329 | } |
| 330 | fail: |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 331 | mutex_unlock(&rdev->pm.mutex); |
| 332 | |
| 333 | return count; |
| 334 | } |
| 335 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 336 | static ssize_t radeon_get_pm_method(struct device *dev, |
| 337 | struct device_attribute *attr, |
| 338 | char *buf) |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 339 | { |
| 340 | struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); |
| 341 | struct radeon_device *rdev = ddev->dev_private; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 342 | int pm = rdev->pm.pm_method; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 343 | |
| 344 | return snprintf(buf, PAGE_SIZE, "%s\n", |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 345 | (pm == PM_METHOD_DYNPM) ? "dynpm" : "profile"); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 346 | } |
| 347 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 348 | static ssize_t radeon_set_pm_method(struct device *dev, |
| 349 | struct device_attribute *attr, |
| 350 | const char *buf, |
| 351 | size_t count) |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 352 | { |
| 353 | struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); |
| 354 | struct radeon_device *rdev = ddev->dev_private; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 355 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 356 | |
| 357 | if (strncmp("dynpm", buf, strlen("dynpm")) == 0) { |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 358 | mutex_lock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 359 | rdev->pm.pm_method = PM_METHOD_DYNPM; |
| 360 | rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; |
| 361 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 362 | mutex_unlock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 363 | } else if (strncmp("profile", buf, strlen("profile")) == 0) { |
| 364 | mutex_lock(&rdev->pm.mutex); |
| 365 | rdev->pm.pm_method = PM_METHOD_PROFILE; |
| 366 | /* disable dynpm */ |
| 367 | rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; |
| 368 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; |
| 369 | cancel_delayed_work(&rdev->pm.dynpm_idle_work); |
| 370 | mutex_unlock(&rdev->pm.mutex); |
| 371 | } else { |
| 372 | DRM_ERROR("invalid power method!\n"); |
| 373 | goto fail; |
| 374 | } |
| 375 | radeon_pm_compute_clocks(rdev); |
| 376 | fail: |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 377 | return count; |
| 378 | } |
| 379 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 380 | static DEVICE_ATTR(power_profile, S_IRUGO | S_IWUSR, radeon_get_pm_profile, radeon_set_pm_profile); |
| 381 | static DEVICE_ATTR(power_method, S_IRUGO | S_IWUSR, radeon_get_pm_method, radeon_set_pm_method); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 382 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 383 | void radeon_pm_suspend(struct radeon_device *rdev) |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 384 | { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 385 | mutex_lock(&rdev->pm.mutex); |
| 386 | cancel_delayed_work(&rdev->pm.dynpm_idle_work); |
| 387 | rdev->pm.current_power_state_index = -1; |
| 388 | rdev->pm.current_clock_mode_index = -1; |
| 389 | rdev->pm.current_sclk = 0; |
| 390 | rdev->pm.current_mclk = 0; |
| 391 | mutex_unlock(&rdev->pm.mutex); |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 392 | } |
| 393 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 394 | void radeon_pm_resume(struct radeon_device *rdev) |
Rafał Miłecki | d0d6cb8 | 2010-03-02 22:06:52 +0100 | [diff] [blame] | 395 | { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 396 | radeon_pm_compute_clocks(rdev); |
Rafał Miłecki | d0d6cb8 | 2010-03-02 22:06:52 +0100 | [diff] [blame] | 397 | } |
| 398 | |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 399 | int radeon_pm_init(struct radeon_device *rdev) |
| 400 | { |
Dave Airlie | 26481fb | 2010-05-18 19:00:14 +1000 | [diff] [blame^] | 401 | int ret; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 402 | /* default to profile method */ |
| 403 | rdev->pm.pm_method = PM_METHOD_PROFILE; |
| 404 | rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; |
| 405 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; |
| 406 | rdev->pm.dynpm_can_upclock = true; |
| 407 | rdev->pm.dynpm_can_downclock = true; |
| 408 | rdev->pm.current_sclk = 0; |
| 409 | rdev->pm.current_mclk = 0; |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 410 | |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 411 | if (rdev->bios) { |
| 412 | if (rdev->is_atom_bios) |
| 413 | radeon_atombios_get_power_modes(rdev); |
| 414 | else |
| 415 | radeon_combios_get_power_modes(rdev); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 416 | radeon_pm_init_profile(rdev); |
| 417 | rdev->pm.current_power_state_index = -1; |
| 418 | rdev->pm.current_clock_mode_index = -1; |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 419 | } |
| 420 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 421 | if (rdev->pm.num_power_states > 1) { |
| 422 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
| 423 | mutex_lock(&rdev->pm.mutex); |
| 424 | rdev->pm.profile = PM_PROFILE_DEFAULT; |
| 425 | radeon_pm_update_profile(rdev); |
| 426 | radeon_pm_set_clocks(rdev); |
| 427 | mutex_unlock(&rdev->pm.mutex); |
| 428 | } |
| 429 | |
| 430 | /* where's the best place to put these? */ |
Dave Airlie | 26481fb | 2010-05-18 19:00:14 +1000 | [diff] [blame^] | 431 | ret = device_create_file(rdev->dev, &dev_attr_power_profile); |
| 432 | if (ret) |
| 433 | DRM_ERROR("failed to create device file for power profile\n"); |
| 434 | ret = device_create_file(rdev->dev, &dev_attr_power_method); |
| 435 | if (ret) |
| 436 | DRM_ERROR("failed to create device file for power method\n"); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 437 | |
| 438 | #ifdef CONFIG_ACPI |
| 439 | rdev->acpi_nb.notifier_call = radeon_acpi_event; |
| 440 | register_acpi_notifier(&rdev->acpi_nb); |
| 441 | #endif |
| 442 | INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); |
| 443 | |
| 444 | if (radeon_debugfs_pm_init(rdev)) { |
| 445 | DRM_ERROR("Failed to register debugfs file for PM!\n"); |
| 446 | } |
| 447 | |
| 448 | DRM_INFO("radeon: power management initialized\n"); |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 449 | } |
| 450 | |
| 451 | return 0; |
| 452 | } |
| 453 | |
Alex Deucher | 29fb52c | 2010-03-11 10:01:17 -0500 | [diff] [blame] | 454 | void radeon_pm_fini(struct radeon_device *rdev) |
| 455 | { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 456 | if (rdev->pm.num_power_states > 1) { |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 457 | mutex_lock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 458 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
| 459 | rdev->pm.profile = PM_PROFILE_DEFAULT; |
| 460 | radeon_pm_update_profile(rdev); |
| 461 | radeon_pm_set_clocks(rdev); |
| 462 | } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { |
| 463 | /* cancel work */ |
| 464 | cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); |
| 465 | /* reset default clocks */ |
| 466 | rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; |
| 467 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; |
| 468 | radeon_pm_set_clocks(rdev); |
| 469 | } |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 470 | mutex_unlock(&rdev->pm.mutex); |
Alex Deucher | 58e21df | 2010-03-22 13:31:08 -0400 | [diff] [blame] | 471 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 472 | device_remove_file(rdev->dev, &dev_attr_power_profile); |
| 473 | device_remove_file(rdev->dev, &dev_attr_power_method); |
| 474 | #ifdef CONFIG_ACPI |
| 475 | unregister_acpi_notifier(&rdev->acpi_nb); |
| 476 | #endif |
| 477 | } |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 478 | |
Alex Deucher | 29fb52c | 2010-03-11 10:01:17 -0500 | [diff] [blame] | 479 | if (rdev->pm.i2c_bus) |
| 480 | radeon_i2c_destroy(rdev->pm.i2c_bus); |
| 481 | } |
| 482 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 483 | void radeon_pm_compute_clocks(struct radeon_device *rdev) |
| 484 | { |
| 485 | struct drm_device *ddev = rdev->ddev; |
Alex Deucher | a48b9b4 | 2010-04-22 14:03:55 -0400 | [diff] [blame] | 486 | struct drm_crtc *crtc; |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 487 | struct radeon_crtc *radeon_crtc; |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 488 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 489 | if (rdev->pm.num_power_states < 2) |
| 490 | return; |
| 491 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 492 | mutex_lock(&rdev->pm.mutex); |
| 493 | |
| 494 | rdev->pm.active_crtcs = 0; |
Alex Deucher | a48b9b4 | 2010-04-22 14:03:55 -0400 | [diff] [blame] | 495 | rdev->pm.active_crtc_count = 0; |
| 496 | list_for_each_entry(crtc, |
| 497 | &ddev->mode_config.crtc_list, head) { |
| 498 | radeon_crtc = to_radeon_crtc(crtc); |
| 499 | if (radeon_crtc->enabled) { |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 500 | rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); |
Alex Deucher | a48b9b4 | 2010-04-22 14:03:55 -0400 | [diff] [blame] | 501 | rdev->pm.active_crtc_count++; |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 502 | } |
| 503 | } |
| 504 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 505 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
| 506 | radeon_pm_update_profile(rdev); |
| 507 | radeon_pm_set_clocks(rdev); |
| 508 | } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { |
| 509 | if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) { |
| 510 | if (rdev->pm.active_crtc_count > 1) { |
| 511 | if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { |
| 512 | cancel_delayed_work(&rdev->pm.dynpm_idle_work); |
Alex Deucher | d731117 | 2010-05-03 01:13:14 -0400 | [diff] [blame] | 513 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 514 | rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; |
| 515 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; |
| 516 | radeon_pm_get_dynpm_state(rdev); |
| 517 | radeon_pm_set_clocks(rdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 518 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 519 | DRM_DEBUG("radeon: dynamic power management deactivated\n"); |
| 520 | } |
| 521 | } else if (rdev->pm.active_crtc_count == 1) { |
| 522 | /* TODO: Increase clocks if needed for current mode */ |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 523 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 524 | if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) { |
| 525 | rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; |
| 526 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK; |
| 527 | radeon_pm_get_dynpm_state(rdev); |
| 528 | radeon_pm_set_clocks(rdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 529 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 530 | queue_delayed_work(rdev->wq, &rdev->pm.dynpm_idle_work, |
| 531 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); |
| 532 | } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) { |
| 533 | rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; |
| 534 | queue_delayed_work(rdev->wq, &rdev->pm.dynpm_idle_work, |
| 535 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); |
| 536 | DRM_DEBUG("radeon: dynamic power management activated\n"); |
| 537 | } |
| 538 | } else { /* count == 0 */ |
| 539 | if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { |
| 540 | cancel_delayed_work(&rdev->pm.dynpm_idle_work); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 541 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 542 | rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM; |
| 543 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM; |
| 544 | radeon_pm_get_dynpm_state(rdev); |
| 545 | radeon_pm_set_clocks(rdev); |
| 546 | } |
| 547 | } |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 548 | } |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 549 | } |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 550 | |
| 551 | mutex_unlock(&rdev->pm.mutex); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 552 | } |
| 553 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 554 | static bool radeon_pm_in_vbl(struct radeon_device *rdev) |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 555 | { |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 556 | u32 stat_crtc = 0, vbl = 0, position = 0; |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 557 | bool in_vbl = true; |
| 558 | |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 559 | if (ASIC_IS_DCE4(rdev)) { |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 560 | if (rdev->pm.active_crtcs & (1 << 0)) { |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 561 | vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + |
| 562 | EVERGREEN_CRTC0_REGISTER_OFFSET) & 0xfff; |
| 563 | position = RREG32(EVERGREEN_CRTC_STATUS_POSITION + |
| 564 | EVERGREEN_CRTC0_REGISTER_OFFSET) & 0xfff; |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 565 | } |
| 566 | if (rdev->pm.active_crtcs & (1 << 1)) { |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 567 | vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + |
| 568 | EVERGREEN_CRTC1_REGISTER_OFFSET) & 0xfff; |
| 569 | position = RREG32(EVERGREEN_CRTC_STATUS_POSITION + |
| 570 | EVERGREEN_CRTC1_REGISTER_OFFSET) & 0xfff; |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 571 | } |
| 572 | if (rdev->pm.active_crtcs & (1 << 2)) { |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 573 | vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + |
| 574 | EVERGREEN_CRTC2_REGISTER_OFFSET) & 0xfff; |
| 575 | position = RREG32(EVERGREEN_CRTC_STATUS_POSITION + |
| 576 | EVERGREEN_CRTC2_REGISTER_OFFSET) & 0xfff; |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 577 | } |
| 578 | if (rdev->pm.active_crtcs & (1 << 3)) { |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 579 | vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + |
| 580 | EVERGREEN_CRTC3_REGISTER_OFFSET) & 0xfff; |
| 581 | position = RREG32(EVERGREEN_CRTC_STATUS_POSITION + |
| 582 | EVERGREEN_CRTC3_REGISTER_OFFSET) & 0xfff; |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 583 | } |
| 584 | if (rdev->pm.active_crtcs & (1 << 4)) { |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 585 | vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + |
| 586 | EVERGREEN_CRTC4_REGISTER_OFFSET) & 0xfff; |
| 587 | position = RREG32(EVERGREEN_CRTC_STATUS_POSITION + |
| 588 | EVERGREEN_CRTC4_REGISTER_OFFSET) & 0xfff; |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 589 | } |
| 590 | if (rdev->pm.active_crtcs & (1 << 5)) { |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 591 | vbl = RREG32(EVERGREEN_CRTC_V_BLANK_START_END + |
| 592 | EVERGREEN_CRTC5_REGISTER_OFFSET) & 0xfff; |
| 593 | position = RREG32(EVERGREEN_CRTC_STATUS_POSITION + |
| 594 | EVERGREEN_CRTC5_REGISTER_OFFSET) & 0xfff; |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 595 | } |
| 596 | } else if (ASIC_IS_AVIVO(rdev)) { |
| 597 | if (rdev->pm.active_crtcs & (1 << 0)) { |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 598 | vbl = RREG32(AVIVO_D1CRTC_V_BLANK_START_END) & 0xfff; |
| 599 | position = RREG32(AVIVO_D1CRTC_STATUS_POSITION) & 0xfff; |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 600 | } |
| 601 | if (rdev->pm.active_crtcs & (1 << 1)) { |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 602 | vbl = RREG32(AVIVO_D2CRTC_V_BLANK_START_END) & 0xfff; |
| 603 | position = RREG32(AVIVO_D2CRTC_STATUS_POSITION) & 0xfff; |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 604 | } |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 605 | if (position < vbl && position > 1) |
| 606 | in_vbl = false; |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 607 | } else { |
| 608 | if (rdev->pm.active_crtcs & (1 << 0)) { |
| 609 | stat_crtc = RREG32(RADEON_CRTC_STATUS); |
| 610 | if (!(stat_crtc & 1)) |
| 611 | in_vbl = false; |
| 612 | } |
| 613 | if (rdev->pm.active_crtcs & (1 << 1)) { |
| 614 | stat_crtc = RREG32(RADEON_CRTC2_STATUS); |
| 615 | if (!(stat_crtc & 1)) |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 616 | in_vbl = false; |
| 617 | } |
| 618 | } |
Matthew Garrett | f81f202 | 2010-04-28 12:13:06 -0400 | [diff] [blame] | 619 | |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 620 | if (position < vbl && position > 1) |
| 621 | in_vbl = false; |
| 622 | |
Matthew Garrett | f81f202 | 2010-04-28 12:13:06 -0400 | [diff] [blame] | 623 | return in_vbl; |
| 624 | } |
| 625 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 626 | static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish) |
Matthew Garrett | f81f202 | 2010-04-28 12:13:06 -0400 | [diff] [blame] | 627 | { |
| 628 | u32 stat_crtc = 0; |
| 629 | bool in_vbl = radeon_pm_in_vbl(rdev); |
| 630 | |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 631 | if (in_vbl == false) |
Alex Deucher | ce8a3eb | 2010-05-07 16:58:27 -0400 | [diff] [blame] | 632 | DRM_DEBUG("not in vbl for pm change %08x at %s\n", stat_crtc, |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 633 | finish ? "exit" : "entry"); |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 634 | return in_vbl; |
| 635 | } |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 636 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 637 | static void radeon_dynpm_idle_work_handler(struct work_struct *work) |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 638 | { |
| 639 | struct radeon_device *rdev; |
Matthew Garrett | d9932a3 | 2010-04-26 16:02:26 -0400 | [diff] [blame] | 640 | int resched; |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 641 | rdev = container_of(work, struct radeon_device, |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 642 | pm.dynpm_idle_work.work); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 643 | |
Matthew Garrett | d9932a3 | 2010-04-26 16:02:26 -0400 | [diff] [blame] | 644 | resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 645 | mutex_lock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 646 | if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 647 | unsigned long irq_flags; |
| 648 | int not_processed = 0; |
| 649 | |
| 650 | read_lock_irqsave(&rdev->fence_drv.lock, irq_flags); |
| 651 | if (!list_empty(&rdev->fence_drv.emited)) { |
| 652 | struct list_head *ptr; |
| 653 | list_for_each(ptr, &rdev->fence_drv.emited) { |
| 654 | /* count up to 3, that's enought info */ |
| 655 | if (++not_processed >= 3) |
| 656 | break; |
| 657 | } |
| 658 | } |
| 659 | read_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); |
| 660 | |
| 661 | if (not_processed >= 3) { /* should upclock */ |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 662 | if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) { |
| 663 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; |
| 664 | } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && |
| 665 | rdev->pm.dynpm_can_upclock) { |
| 666 | rdev->pm.dynpm_planned_action = |
| 667 | DYNPM_ACTION_UPCLOCK; |
| 668 | rdev->pm.dynpm_action_timeout = jiffies + |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 669 | msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS); |
| 670 | } |
| 671 | } else if (not_processed == 0) { /* should downclock */ |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 672 | if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) { |
| 673 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; |
| 674 | } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && |
| 675 | rdev->pm.dynpm_can_downclock) { |
| 676 | rdev->pm.dynpm_planned_action = |
| 677 | DYNPM_ACTION_DOWNCLOCK; |
| 678 | rdev->pm.dynpm_action_timeout = jiffies + |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 679 | msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS); |
| 680 | } |
| 681 | } |
| 682 | |
Alex Deucher | d731117 | 2010-05-03 01:13:14 -0400 | [diff] [blame] | 683 | /* Note, radeon_pm_set_clocks is called with static_switch set |
| 684 | * to false since we want to wait for vbl to avoid flicker. |
| 685 | */ |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 686 | if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE && |
| 687 | jiffies > rdev->pm.dynpm_action_timeout) { |
| 688 | radeon_pm_get_dynpm_state(rdev); |
| 689 | radeon_pm_set_clocks(rdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 690 | } |
| 691 | } |
| 692 | mutex_unlock(&rdev->pm.mutex); |
Matthew Garrett | d9932a3 | 2010-04-26 16:02:26 -0400 | [diff] [blame] | 693 | ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 694 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 695 | queue_delayed_work(rdev->wq, &rdev->pm.dynpm_idle_work, |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 696 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); |
| 697 | } |
| 698 | |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 699 | /* |
| 700 | * Debugfs info |
| 701 | */ |
| 702 | #if defined(CONFIG_DEBUG_FS) |
| 703 | |
| 704 | static int radeon_debugfs_pm_info(struct seq_file *m, void *data) |
| 705 | { |
| 706 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 707 | struct drm_device *dev = node->minor->dev; |
| 708 | struct radeon_device *rdev = dev->dev_private; |
| 709 | |
Rafał Miłecki | 6234077 | 2009-12-15 21:46:58 +0100 | [diff] [blame] | 710 | seq_printf(m, "default engine clock: %u0 kHz\n", rdev->clock.default_sclk); |
| 711 | seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); |
| 712 | seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk); |
| 713 | if (rdev->asic->get_memory_clock) |
| 714 | seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); |
Rafał Miłecki | aa5120d | 2010-02-18 20:24:28 +0000 | [diff] [blame] | 715 | if (rdev->asic->get_pcie_lanes) |
| 716 | seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev)); |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 717 | |
| 718 | return 0; |
| 719 | } |
| 720 | |
| 721 | static struct drm_info_list radeon_pm_info_list[] = { |
| 722 | {"radeon_pm_info", radeon_debugfs_pm_info, 0, NULL}, |
| 723 | }; |
| 724 | #endif |
| 725 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 726 | static int radeon_debugfs_pm_init(struct radeon_device *rdev) |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 727 | { |
| 728 | #if defined(CONFIG_DEBUG_FS) |
| 729 | return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list)); |
| 730 | #else |
| 731 | return 0; |
| 732 | #endif |
| 733 | } |