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Linus Walleije8689e62010-09-28 15:57:37 +02001/*
2 * Copyright (c) 2006 ARM Ltd.
3 * Copyright (c) 2010 ST-Ericsson SA
4 *
5 * Author: Peter Pearse <peter.pearse@arm.com>
6 * Author: Linus Walleij <linus.walleij@stericsson.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the Free
10 * Software Foundation; either version 2 of the License, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * more details.
17 *
18 * You should have received a copy of the GNU General Public License along with
19 * this program; if not, write to the Free Software Foundation, Inc., 59
20 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 *
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +000022 * The full GNU General Public License is in this distribution in the file
23 * called COPYING.
Linus Walleije8689e62010-09-28 15:57:37 +020024 *
25 * Documentation: ARM DDI 0196G == PL080
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +000026 * Documentation: ARM DDI 0218E == PL081
Linus Walleije8689e62010-09-28 15:57:37 +020027 *
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +000028 * PL080 & PL081 both have 16 sets of DMA signals that can be routed to any
29 * channel.
Linus Walleije8689e62010-09-28 15:57:37 +020030 *
31 * The PL080 has 8 channels available for simultaneous use, and the PL081
32 * has only two channels. So on these DMA controllers the number of channels
33 * and the number of incoming DMA signals are two totally different things.
34 * It is usually not possible to theoretically handle all physical signals,
35 * so a multiplexing scheme with possible denial of use is necessary.
36 *
37 * The PL080 has a dual bus master, PL081 has a single master.
38 *
39 * Memory to peripheral transfer may be visualized as
40 * Get data from memory to DMAC
41 * Until no data left
42 * On burst request from peripheral
43 * Destination burst from DMAC to peripheral
44 * Clear burst request
45 * Raise terminal count interrupt
46 *
47 * For peripherals with a FIFO:
48 * Source burst size == half the depth of the peripheral FIFO
49 * Destination burst size == the depth of the peripheral FIFO
50 *
51 * (Bursts are irrelevant for mem to mem transfers - there are no burst
52 * signals, the DMA controller will simply facilitate its AHB master.)
53 *
54 * ASSUMES default (little) endianness for DMA transfers
55 *
Russell King - ARM Linux9dc2c202011-01-03 22:33:06 +000056 * The PL08x has two flow control settings:
57 * - DMAC flow control: the transfer size defines the number of transfers
58 * which occur for the current LLI entry, and the DMAC raises TC at the
59 * end of every LLI entry. Observed behaviour shows the DMAC listening
60 * to both the BREQ and SREQ signals (contrary to documented),
61 * transferring data if either is active. The LBREQ and LSREQ signals
62 * are ignored.
63 *
64 * - Peripheral flow control: the transfer size is ignored (and should be
65 * zero). The data is transferred from the current LLI entry, until
66 * after the final transfer signalled by LBREQ or LSREQ. The DMAC
67 * will then move to the next LLI entry.
68 *
69 * Only the former works sanely with scatter lists, so we only implement
70 * the DMAC flow control method. However, peripherals which use the LBREQ
71 * and LSREQ signals (eg, MMCI) are unable to use this mode, which through
72 * these hardware restrictions prevents them from using scatter DMA.
Linus Walleije8689e62010-09-28 15:57:37 +020073 *
74 * Global TODO:
75 * - Break out common code from arch/arm/mach-s3c64xx and share
76 */
Russell King - ARM Linux730404a2011-01-03 22:34:07 +000077#include <linux/amba/bus.h>
Linus Walleije8689e62010-09-28 15:57:37 +020078#include <linux/amba/pl08x.h>
79#include <linux/debugfs.h>
Viresh Kumar0c38d702011-08-05 15:32:28 +053080#include <linux/delay.h>
81#include <linux/device.h>
82#include <linux/dmaengine.h>
83#include <linux/dmapool.h>
84#include <linux/init.h>
85#include <linux/interrupt.h>
86#include <linux/module.h>
Viresh Kumarb7b60182011-08-05 15:32:33 +053087#include <linux/pm_runtime.h>
Linus Walleije8689e62010-09-28 15:57:37 +020088#include <linux/seq_file.h>
Viresh Kumar0c38d702011-08-05 15:32:28 +053089#include <linux/slab.h>
Linus Walleije8689e62010-09-28 15:57:37 +020090#include <asm/hardware/pl080.h>
Linus Walleije8689e62010-09-28 15:57:37 +020091
92#define DRIVER_NAME "pl08xdmac"
93
94/**
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +000095 * struct vendor_data - vendor-specific config parameters for PL08x derivatives
Linus Walleije8689e62010-09-28 15:57:37 +020096 * @channels: the number of channels available in this variant
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +000097 * @dualmaster: whether this version supports dual AHB masters or not.
Linus Walleije8689e62010-09-28 15:57:37 +020098 */
99struct vendor_data {
Linus Walleije8689e62010-09-28 15:57:37 +0200100 u8 channels;
101 bool dualmaster;
102};
103
104/*
105 * PL08X private data structures
Russell King - ARM Linuxe8b5e112011-01-03 22:30:24 +0000106 * An LLI struct - see PL08x TRM. Note that next uses bit[0] as a bus bit,
Russell King - ARM Linuxe25761d2011-01-03 22:37:52 +0000107 * start & end do not - their bus bit info is in cctl. Also note that these
108 * are fixed 32-bit quantities.
Linus Walleije8689e62010-09-28 15:57:37 +0200109 */
Russell King - ARM Linux7cb72ad2011-01-03 22:35:28 +0000110struct pl08x_lli {
Russell King - ARM Linuxe25761d2011-01-03 22:37:52 +0000111 u32 src;
112 u32 dst;
Russell King - ARM Linuxbfddfb42011-01-03 22:38:12 +0000113 u32 lli;
Linus Walleije8689e62010-09-28 15:57:37 +0200114 u32 cctl;
115};
116
117/**
118 * struct pl08x_driver_data - the local state holder for the PL08x
119 * @slave: slave engine for this instance
120 * @memcpy: memcpy engine for this instance
121 * @base: virtual memory base (remapped) for the PL08x
122 * @adev: the corresponding AMBA (PrimeCell) bus entry
123 * @vd: vendor data for this PL08x variant
124 * @pd: platform data passed in from the platform/machine
125 * @phy_chans: array of data for the physical channels
126 * @pool: a pool for the LLI descriptors
127 * @pool_ctr: counter of LLIs in the pool
Viresh Kumar3e27ee82011-08-05 15:32:27 +0530128 * @lli_buses: bitmask to or in to LLI pointer selecting AHB port for LLI
129 * fetches
Russell King - ARM Linux30749cb2011-01-03 22:41:13 +0000130 * @mem_buses: set to indicate memory transfers on AHB2.
Linus Walleije8689e62010-09-28 15:57:37 +0200131 * @lock: a spinlock for this struct
132 */
133struct pl08x_driver_data {
134 struct dma_device slave;
135 struct dma_device memcpy;
136 void __iomem *base;
137 struct amba_device *adev;
Russell King - ARM Linuxf96ca9ec2011-01-03 22:35:08 +0000138 const struct vendor_data *vd;
Linus Walleije8689e62010-09-28 15:57:37 +0200139 struct pl08x_platform_data *pd;
140 struct pl08x_phy_chan *phy_chans;
141 struct dma_pool *pool;
142 int pool_ctr;
Russell King - ARM Linux30749cb2011-01-03 22:41:13 +0000143 u8 lli_buses;
144 u8 mem_buses;
Linus Walleije8689e62010-09-28 15:57:37 +0200145 spinlock_t lock;
146};
147
148/*
149 * PL08X specific defines
150 */
151
152/*
153 * Memory boundaries: the manual for PL08x says that the controller
154 * cannot read past a 1KiB boundary, so these defines are used to
155 * create transfer LLIs that do not cross such boundaries.
156 */
157#define PL08X_BOUNDARY_SHIFT (10) /* 1KB 0x400 */
158#define PL08X_BOUNDARY_SIZE (1 << PL08X_BOUNDARY_SHIFT)
159
Linus Walleije8689e62010-09-28 15:57:37 +0200160/* Size (bytes) of each LLI buffer allocated for one transfer */
161# define PL08X_LLI_TSFR_SIZE 0x2000
162
Russell King - ARM Linuxe8b5e112011-01-03 22:30:24 +0000163/* Maximum times we call dma_pool_alloc on this pool without freeing */
Russell King - ARM Linux7cb72ad2011-01-03 22:35:28 +0000164#define MAX_NUM_TSFR_LLIS (PL08X_LLI_TSFR_SIZE/sizeof(struct pl08x_lli))
Linus Walleije8689e62010-09-28 15:57:37 +0200165#define PL08X_ALIGN 8
166
167static inline struct pl08x_dma_chan *to_pl08x_chan(struct dma_chan *chan)
168{
169 return container_of(chan, struct pl08x_dma_chan, chan);
170}
171
Russell King - ARM Linux501e67e2011-01-03 22:44:57 +0000172static inline struct pl08x_txd *to_pl08x_txd(struct dma_async_tx_descriptor *tx)
173{
174 return container_of(tx, struct pl08x_txd, tx);
175}
176
Linus Walleije8689e62010-09-28 15:57:37 +0200177/*
178 * Physical channel handling
179 */
180
181/* Whether a certain channel is busy or not */
182static int pl08x_phy_channel_busy(struct pl08x_phy_chan *ch)
183{
184 unsigned int val;
185
186 val = readl(ch->base + PL080_CH_CONFIG);
187 return val & PL080_CONFIG_ACTIVE;
188}
189
190/*
191 * Set the initial DMA register values i.e. those for the first LLI
Russell King - ARM Linuxe8b5e112011-01-03 22:30:24 +0000192 * The next LLI pointer and the configuration interrupt bit have
Russell King - ARM Linuxc885bee2011-01-03 22:38:52 +0000193 * been set when the LLIs were constructed. Poke them into the hardware
194 * and start the transfer.
Linus Walleije8689e62010-09-28 15:57:37 +0200195 */
Russell King - ARM Linuxc885bee2011-01-03 22:38:52 +0000196static void pl08x_start_txd(struct pl08x_dma_chan *plchan,
197 struct pl08x_txd *txd)
Linus Walleije8689e62010-09-28 15:57:37 +0200198{
Russell King - ARM Linuxc885bee2011-01-03 22:38:52 +0000199 struct pl08x_driver_data *pl08x = plchan->host;
Linus Walleije8689e62010-09-28 15:57:37 +0200200 struct pl08x_phy_chan *phychan = plchan->phychan;
Russell King - ARM Linux19524d72011-01-03 22:39:13 +0000201 struct pl08x_lli *lli = &txd->llis_va[0];
Russell King - ARM Linux09b3c322011-01-03 22:39:53 +0000202 u32 val;
Russell King - ARM Linuxc885bee2011-01-03 22:38:52 +0000203
204 plchan->at = txd;
Linus Walleije8689e62010-09-28 15:57:37 +0200205
Russell King - ARM Linuxc885bee2011-01-03 22:38:52 +0000206 /* Wait for channel inactive */
207 while (pl08x_phy_channel_busy(phychan))
Russell King - ARM Linux19386b322011-01-03 22:36:29 +0000208 cpu_relax();
Linus Walleije8689e62010-09-28 15:57:37 +0200209
Russell King - ARM Linuxc885bee2011-01-03 22:38:52 +0000210 dev_vdbg(&pl08x->adev->dev,
211 "WRITE channel %d: csrc=0x%08x, cdst=0x%08x, "
Russell King - ARM Linux19524d72011-01-03 22:39:13 +0000212 "clli=0x%08x, cctl=0x%08x, ccfg=0x%08x\n",
213 phychan->id, lli->src, lli->dst, lli->lli, lli->cctl,
Russell King - ARM Linux09b3c322011-01-03 22:39:53 +0000214 txd->ccfg);
Linus Walleije8689e62010-09-28 15:57:37 +0200215
Russell King - ARM Linux19524d72011-01-03 22:39:13 +0000216 writel(lli->src, phychan->base + PL080_CH_SRC_ADDR);
217 writel(lli->dst, phychan->base + PL080_CH_DST_ADDR);
218 writel(lli->lli, phychan->base + PL080_CH_LLI);
219 writel(lli->cctl, phychan->base + PL080_CH_CONTROL);
Russell King - ARM Linux09b3c322011-01-03 22:39:53 +0000220 writel(txd->ccfg, phychan->base + PL080_CH_CONFIG);
Russell King - ARM Linuxc885bee2011-01-03 22:38:52 +0000221
222 /* Enable the DMA channel */
223 /* Do not access config register until channel shows as disabled */
224 while (readl(pl08x->base + PL080_EN_CHAN) & (1 << phychan->id))
225 cpu_relax();
226
227 /* Do not access config register until channel shows as inactive */
228 val = readl(phychan->base + PL080_CH_CONFIG);
229 while ((val & PL080_CONFIG_ACTIVE) || (val & PL080_CONFIG_ENABLE))
230 val = readl(phychan->base + PL080_CH_CONFIG);
231
232 writel(val | PL080_CONFIG_ENABLE, phychan->base + PL080_CH_CONFIG);
Linus Walleije8689e62010-09-28 15:57:37 +0200233}
234
235/*
Russell King - ARM Linux81796612011-01-27 12:37:44 +0000236 * Pause the channel by setting the HALT bit.
Linus Walleije8689e62010-09-28 15:57:37 +0200237 *
Russell King - ARM Linux81796612011-01-27 12:37:44 +0000238 * For M->P transfers, pause the DMAC first and then stop the peripheral -
239 * the FIFO can only drain if the peripheral is still requesting data.
240 * (note: this can still timeout if the DMAC FIFO never drains of data.)
Linus Walleije8689e62010-09-28 15:57:37 +0200241 *
Russell King - ARM Linux81796612011-01-27 12:37:44 +0000242 * For P->M transfers, disable the peripheral first to stop it filling
243 * the DMAC FIFO, and then pause the DMAC.
Linus Walleije8689e62010-09-28 15:57:37 +0200244 */
245static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch)
246{
247 u32 val;
Russell King - ARM Linux81796612011-01-27 12:37:44 +0000248 int timeout;
Linus Walleije8689e62010-09-28 15:57:37 +0200249
250 /* Set the HALT bit and wait for the FIFO to drain */
251 val = readl(ch->base + PL080_CH_CONFIG);
252 val |= PL080_CONFIG_HALT;
253 writel(val, ch->base + PL080_CH_CONFIG);
254
255 /* Wait for channel inactive */
Russell King - ARM Linux81796612011-01-27 12:37:44 +0000256 for (timeout = 1000; timeout; timeout--) {
257 if (!pl08x_phy_channel_busy(ch))
258 break;
259 udelay(1);
260 }
261 if (pl08x_phy_channel_busy(ch))
262 pr_err("pl08x: channel%u timeout waiting for pause\n", ch->id);
Linus Walleije8689e62010-09-28 15:57:37 +0200263}
264
265static void pl08x_resume_phy_chan(struct pl08x_phy_chan *ch)
266{
267 u32 val;
268
269 /* Clear the HALT bit */
270 val = readl(ch->base + PL080_CH_CONFIG);
271 val &= ~PL080_CONFIG_HALT;
272 writel(val, ch->base + PL080_CH_CONFIG);
273}
274
Russell King - ARM Linuxfb526212011-01-27 12:32:53 +0000275/*
276 * pl08x_terminate_phy_chan() stops the channel, clears the FIFO and
277 * clears any pending interrupt status. This should not be used for
278 * an on-going transfer, but as a method of shutting down a channel
279 * (eg, when it's no longer used) or terminating a transfer.
280 */
281static void pl08x_terminate_phy_chan(struct pl08x_driver_data *pl08x,
282 struct pl08x_phy_chan *ch)
Linus Walleije8689e62010-09-28 15:57:37 +0200283{
Russell King - ARM Linuxfb526212011-01-27 12:32:53 +0000284 u32 val = readl(ch->base + PL080_CH_CONFIG);
Linus Walleije8689e62010-09-28 15:57:37 +0200285
Russell King - ARM Linuxfb526212011-01-27 12:32:53 +0000286 val &= ~(PL080_CONFIG_ENABLE | PL080_CONFIG_ERR_IRQ_MASK |
287 PL080_CONFIG_TC_IRQ_MASK);
Linus Walleije8689e62010-09-28 15:57:37 +0200288
Linus Walleije8689e62010-09-28 15:57:37 +0200289 writel(val, ch->base + PL080_CH_CONFIG);
Russell King - ARM Linuxfb526212011-01-27 12:32:53 +0000290
291 writel(1 << ch->id, pl08x->base + PL080_ERR_CLEAR);
292 writel(1 << ch->id, pl08x->base + PL080_TC_CLEAR);
Linus Walleije8689e62010-09-28 15:57:37 +0200293}
294
295static inline u32 get_bytes_in_cctl(u32 cctl)
296{
297 /* The source width defines the number of bytes */
298 u32 bytes = cctl & PL080_CONTROL_TRANSFER_SIZE_MASK;
299
300 switch (cctl >> PL080_CONTROL_SWIDTH_SHIFT) {
301 case PL080_WIDTH_8BIT:
302 break;
303 case PL080_WIDTH_16BIT:
304 bytes *= 2;
305 break;
306 case PL080_WIDTH_32BIT:
307 bytes *= 4;
308 break;
309 }
310 return bytes;
311}
312
313/* The channel should be paused when calling this */
314static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan)
315{
316 struct pl08x_phy_chan *ch;
Linus Walleije8689e62010-09-28 15:57:37 +0200317 struct pl08x_txd *txd;
318 unsigned long flags;
Russell King - ARM Linuxcace6582011-01-03 22:37:31 +0000319 size_t bytes = 0;
Linus Walleije8689e62010-09-28 15:57:37 +0200320
321 spin_lock_irqsave(&plchan->lock, flags);
Linus Walleije8689e62010-09-28 15:57:37 +0200322 ch = plchan->phychan;
323 txd = plchan->at;
324
325 /*
Russell King - ARM Linuxdb9f1362011-01-03 22:38:32 +0000326 * Follow the LLIs to get the number of remaining
327 * bytes in the currently active transaction.
Linus Walleije8689e62010-09-28 15:57:37 +0200328 */
329 if (ch && txd) {
Russell King - ARM Linux4c0df6a2011-01-03 22:36:50 +0000330 u32 clli = readl(ch->base + PL080_CH_LLI) & ~PL080_LLI_LM_AHB2;
Linus Walleije8689e62010-09-28 15:57:37 +0200331
Russell King - ARM Linuxdb9f1362011-01-03 22:38:32 +0000332 /* First get the remaining bytes in the active transfer */
Linus Walleije8689e62010-09-28 15:57:37 +0200333 bytes = get_bytes_in_cctl(readl(ch->base + PL080_CH_CONTROL));
334
335 if (clli) {
Russell King - ARM Linuxdb9f1362011-01-03 22:38:32 +0000336 struct pl08x_lli *llis_va = txd->llis_va;
337 dma_addr_t llis_bus = txd->llis_bus;
338 int index;
Linus Walleije8689e62010-09-28 15:57:37 +0200339
Russell King - ARM Linuxdb9f1362011-01-03 22:38:32 +0000340 BUG_ON(clli < llis_bus || clli >= llis_bus +
341 sizeof(struct pl08x_lli) * MAX_NUM_TSFR_LLIS);
Linus Walleije8689e62010-09-28 15:57:37 +0200342
Russell King - ARM Linuxdb9f1362011-01-03 22:38:32 +0000343 /*
344 * Locate the next LLI - as this is an array,
345 * it's simple maths to find.
346 */
347 index = (clli - llis_bus) / sizeof(struct pl08x_lli);
348
349 for (; index < MAX_NUM_TSFR_LLIS; index++) {
350 bytes += get_bytes_in_cctl(llis_va[index].cctl);
351
Linus Walleije8689e62010-09-28 15:57:37 +0200352 /*
Russell King - ARM Linuxe8b5e112011-01-03 22:30:24 +0000353 * A LLI pointer of 0 terminates the LLI list
Linus Walleije8689e62010-09-28 15:57:37 +0200354 */
Russell King - ARM Linuxdb9f1362011-01-03 22:38:32 +0000355 if (!llis_va[index].lli)
356 break;
Linus Walleije8689e62010-09-28 15:57:37 +0200357 }
358 }
359 }
360
361 /* Sum up all queued transactions */
Russell King - ARM Linux15c17232011-01-03 22:44:36 +0000362 if (!list_empty(&plchan->pend_list)) {
Russell King - ARM Linuxdb9f1362011-01-03 22:38:32 +0000363 struct pl08x_txd *txdi;
Russell King - ARM Linux15c17232011-01-03 22:44:36 +0000364 list_for_each_entry(txdi, &plchan->pend_list, node) {
Linus Walleije8689e62010-09-28 15:57:37 +0200365 bytes += txdi->len;
366 }
Linus Walleije8689e62010-09-28 15:57:37 +0200367 }
368
369 spin_unlock_irqrestore(&plchan->lock, flags);
370
371 return bytes;
372}
373
374/*
375 * Allocate a physical channel for a virtual channel
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +0000376 *
377 * Try to locate a physical channel to be used for this transfer. If all
378 * are taken return NULL and the requester will have to cope by using
379 * some fallback PIO mode or retrying later.
Linus Walleije8689e62010-09-28 15:57:37 +0200380 */
381static struct pl08x_phy_chan *
382pl08x_get_phy_channel(struct pl08x_driver_data *pl08x,
383 struct pl08x_dma_chan *virt_chan)
384{
385 struct pl08x_phy_chan *ch = NULL;
386 unsigned long flags;
387 int i;
388
Linus Walleije8689e62010-09-28 15:57:37 +0200389 for (i = 0; i < pl08x->vd->channels; i++) {
390 ch = &pl08x->phy_chans[i];
391
392 spin_lock_irqsave(&ch->lock, flags);
393
394 if (!ch->serving) {
395 ch->serving = virt_chan;
396 ch->signal = -1;
397 spin_unlock_irqrestore(&ch->lock, flags);
398 break;
399 }
400
401 spin_unlock_irqrestore(&ch->lock, flags);
402 }
403
404 if (i == pl08x->vd->channels) {
405 /* No physical channel available, cope with it */
406 return NULL;
407 }
408
Viresh Kumarb7b60182011-08-05 15:32:33 +0530409 pm_runtime_get_sync(&pl08x->adev->dev);
Linus Walleije8689e62010-09-28 15:57:37 +0200410 return ch;
411}
412
413static inline void pl08x_put_phy_channel(struct pl08x_driver_data *pl08x,
414 struct pl08x_phy_chan *ch)
415{
416 unsigned long flags;
417
Russell King - ARM Linuxfb526212011-01-27 12:32:53 +0000418 spin_lock_irqsave(&ch->lock, flags);
419
Linus Walleije8689e62010-09-28 15:57:37 +0200420 /* Stop the channel and clear its interrupts */
Russell King - ARM Linuxfb526212011-01-27 12:32:53 +0000421 pl08x_terminate_phy_chan(pl08x, ch);
Linus Walleije8689e62010-09-28 15:57:37 +0200422
Viresh Kumarb7b60182011-08-05 15:32:33 +0530423 pm_runtime_put(&pl08x->adev->dev);
424
Linus Walleije8689e62010-09-28 15:57:37 +0200425 /* Mark it as free */
Linus Walleije8689e62010-09-28 15:57:37 +0200426 ch->serving = NULL;
427 spin_unlock_irqrestore(&ch->lock, flags);
428}
429
430/*
431 * LLI handling
432 */
433
434static inline unsigned int pl08x_get_bytes_for_cctl(unsigned int coded)
435{
436 switch (coded) {
437 case PL080_WIDTH_8BIT:
438 return 1;
439 case PL080_WIDTH_16BIT:
440 return 2;
441 case PL080_WIDTH_32BIT:
442 return 4;
443 default:
444 break;
445 }
446 BUG();
447 return 0;
448}
449
450static inline u32 pl08x_cctl_bits(u32 cctl, u8 srcwidth, u8 dstwidth,
Russell King - ARM Linuxcace6582011-01-03 22:37:31 +0000451 size_t tsize)
Linus Walleije8689e62010-09-28 15:57:37 +0200452{
453 u32 retbits = cctl;
454
Russell King - ARM Linuxe8b5e112011-01-03 22:30:24 +0000455 /* Remove all src, dst and transfer size bits */
Linus Walleije8689e62010-09-28 15:57:37 +0200456 retbits &= ~PL080_CONTROL_DWIDTH_MASK;
457 retbits &= ~PL080_CONTROL_SWIDTH_MASK;
458 retbits &= ~PL080_CONTROL_TRANSFER_SIZE_MASK;
459
460 /* Then set the bits according to the parameters */
461 switch (srcwidth) {
462 case 1:
463 retbits |= PL080_WIDTH_8BIT << PL080_CONTROL_SWIDTH_SHIFT;
464 break;
465 case 2:
466 retbits |= PL080_WIDTH_16BIT << PL080_CONTROL_SWIDTH_SHIFT;
467 break;
468 case 4:
469 retbits |= PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT;
470 break;
471 default:
472 BUG();
473 break;
474 }
475
476 switch (dstwidth) {
477 case 1:
478 retbits |= PL080_WIDTH_8BIT << PL080_CONTROL_DWIDTH_SHIFT;
479 break;
480 case 2:
481 retbits |= PL080_WIDTH_16BIT << PL080_CONTROL_DWIDTH_SHIFT;
482 break;
483 case 4:
484 retbits |= PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT;
485 break;
486 default:
487 BUG();
488 break;
489 }
490
491 retbits |= tsize << PL080_CONTROL_TRANSFER_SIZE_SHIFT;
492 return retbits;
493}
494
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000495struct pl08x_lli_build_data {
496 struct pl08x_txd *txd;
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000497 struct pl08x_bus_data srcbus;
498 struct pl08x_bus_data dstbus;
499 size_t remainder;
Russell King - ARM Linux25c94f72011-07-21 17:11:46 +0100500 u32 lli_bus;
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000501};
502
Linus Walleije8689e62010-09-28 15:57:37 +0200503/*
Viresh Kumar0532e6f2011-08-05 15:32:31 +0530504 * Autoselect a master bus to use for the transfer. Slave will be the chosen as
505 * victim in case src & dest are not similarly aligned. i.e. If after aligning
506 * masters address with width requirements of transfer (by sending few byte by
507 * byte data), slave is still not aligned, then its width will be reduced to
508 * BYTE.
509 * - prefers the destination bus if both available
510 * - if fixed address on one bus the other will be chosen
Linus Walleije8689e62010-09-28 15:57:37 +0200511 */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000512static void pl08x_choose_master_bus(struct pl08x_lli_build_data *bd,
513 struct pl08x_bus_data **mbus, struct pl08x_bus_data **sbus, u32 cctl)
Linus Walleije8689e62010-09-28 15:57:37 +0200514{
515 if (!(cctl & PL080_CONTROL_DST_INCR)) {
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000516 *mbus = &bd->srcbus;
517 *sbus = &bd->dstbus;
Linus Walleije8689e62010-09-28 15:57:37 +0200518 } else if (!(cctl & PL080_CONTROL_SRC_INCR)) {
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000519 *mbus = &bd->dstbus;
520 *sbus = &bd->srcbus;
Linus Walleije8689e62010-09-28 15:57:37 +0200521 } else {
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000522 if (bd->dstbus.buswidth == 4) {
523 *mbus = &bd->dstbus;
524 *sbus = &bd->srcbus;
525 } else if (bd->srcbus.buswidth == 4) {
526 *mbus = &bd->srcbus;
527 *sbus = &bd->dstbus;
528 } else if (bd->dstbus.buswidth == 2) {
529 *mbus = &bd->dstbus;
530 *sbus = &bd->srcbus;
531 } else if (bd->srcbus.buswidth == 2) {
532 *mbus = &bd->srcbus;
533 *sbus = &bd->dstbus;
Linus Walleije8689e62010-09-28 15:57:37 +0200534 } else {
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000535 /* bd->srcbus.buswidth == 1 */
536 *mbus = &bd->dstbus;
537 *sbus = &bd->srcbus;
Linus Walleije8689e62010-09-28 15:57:37 +0200538 }
539 }
540}
541
542/*
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +0000543 * Fills in one LLI for a certain transfer descriptor and advance the counter
Linus Walleije8689e62010-09-28 15:57:37 +0200544 */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000545static void pl08x_fill_lli_for_desc(struct pl08x_lli_build_data *bd,
546 int num_llis, int len, u32 cctl)
Linus Walleije8689e62010-09-28 15:57:37 +0200547{
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000548 struct pl08x_lli *llis_va = bd->txd->llis_va;
549 dma_addr_t llis_bus = bd->txd->llis_bus;
Linus Walleije8689e62010-09-28 15:57:37 +0200550
551 BUG_ON(num_llis >= MAX_NUM_TSFR_LLIS);
552
Russell King - ARM Linux30749cb2011-01-03 22:41:13 +0000553 llis_va[num_llis].cctl = cctl;
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000554 llis_va[num_llis].src = bd->srcbus.addr;
555 llis_va[num_llis].dst = bd->dstbus.addr;
Viresh Kumar3e27ee82011-08-05 15:32:27 +0530556 llis_va[num_llis].lli = llis_bus + (num_llis + 1) *
557 sizeof(struct pl08x_lli);
Russell King - ARM Linux25c94f72011-07-21 17:11:46 +0100558 llis_va[num_llis].lli |= bd->lli_bus;
Linus Walleije8689e62010-09-28 15:57:37 +0200559
560 if (cctl & PL080_CONTROL_SRC_INCR)
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000561 bd->srcbus.addr += len;
Linus Walleije8689e62010-09-28 15:57:37 +0200562 if (cctl & PL080_CONTROL_DST_INCR)
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000563 bd->dstbus.addr += len;
Linus Walleije8689e62010-09-28 15:57:37 +0200564
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000565 BUG_ON(bd->remainder < len);
Russell King - ARM Linuxcace6582011-01-03 22:37:31 +0000566
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000567 bd->remainder -= len;
Linus Walleije8689e62010-09-28 15:57:37 +0200568}
569
570/*
Russell King - ARM Linuxb61be8d2011-01-03 22:42:14 +0000571 * Return number of bytes to fill to boundary, or len.
572 * This calculation works for any value of addr.
Linus Walleije8689e62010-09-28 15:57:37 +0200573 */
Russell King - ARM Linuxcace6582011-01-03 22:37:31 +0000574static inline size_t pl08x_pre_boundary(u32 addr, size_t len)
Linus Walleije8689e62010-09-28 15:57:37 +0200575{
Russell King - ARM Linuxb61be8d2011-01-03 22:42:14 +0000576 size_t boundary_len = PL08X_BOUNDARY_SIZE -
577 (addr & (PL08X_BOUNDARY_SIZE - 1));
Linus Walleije8689e62010-09-28 15:57:37 +0200578
Russell King - ARM Linuxb61be8d2011-01-03 22:42:14 +0000579 return min(boundary_len, len);
Linus Walleije8689e62010-09-28 15:57:37 +0200580}
581
582/*
583 * This fills in the table of LLIs for the transfer descriptor
584 * Note that we assume we never have to change the burst sizes
585 * Return 0 for error
586 */
587static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
588 struct pl08x_txd *txd)
589{
Linus Walleije8689e62010-09-28 15:57:37 +0200590 struct pl08x_bus_data *mbus, *sbus;
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000591 struct pl08x_lli_build_data bd;
Linus Walleije8689e62010-09-28 15:57:37 +0200592 int num_llis = 0;
593 u32 cctl;
Viresh Kumar3e27ee82011-08-05 15:32:27 +0530594 size_t max_bytes_per_lli, total_bytes = 0;
Russell King - ARM Linux7cb72ad2011-01-03 22:35:28 +0000595 struct pl08x_lli *llis_va;
Linus Walleije8689e62010-09-28 15:57:37 +0200596
Viresh Kumar3e27ee82011-08-05 15:32:27 +0530597 txd->llis_va = dma_pool_alloc(pl08x->pool, GFP_NOWAIT, &txd->llis_bus);
Linus Walleije8689e62010-09-28 15:57:37 +0200598 if (!txd->llis_va) {
599 dev_err(&pl08x->adev->dev, "%s no memory for llis\n", __func__);
600 return 0;
601 }
602
603 pl08x->pool_ctr++;
604
Russell King - ARM Linux70b5ed62011-01-03 22:40:13 +0000605 /* Get the default CCTL */
606 cctl = txd->cctl;
Linus Walleije8689e62010-09-28 15:57:37 +0200607
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000608 bd.txd = txd;
Russell King - ARM Linuxd7244e92011-01-03 22:43:35 +0000609 bd.srcbus.addr = txd->src_addr;
610 bd.dstbus.addr = txd->dst_addr;
Russell King - ARM Linux25c94f72011-07-21 17:11:46 +0100611 bd.lli_bus = (pl08x->lli_buses & PL08X_AHB2) ? PL080_LLI_LM_AHB2 : 0;
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000612
Linus Walleije8689e62010-09-28 15:57:37 +0200613 /* Find maximum width of the source bus */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000614 bd.srcbus.maxwidth =
Linus Walleije8689e62010-09-28 15:57:37 +0200615 pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_SWIDTH_MASK) >>
616 PL080_CONTROL_SWIDTH_SHIFT);
617
618 /* Find maximum width of the destination bus */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000619 bd.dstbus.maxwidth =
Linus Walleije8689e62010-09-28 15:57:37 +0200620 pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_DWIDTH_MASK) >>
621 PL080_CONTROL_DWIDTH_SHIFT);
622
623 /* Set up the bus widths to the maximum */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000624 bd.srcbus.buswidth = bd.srcbus.maxwidth;
625 bd.dstbus.buswidth = bd.dstbus.maxwidth;
Linus Walleije8689e62010-09-28 15:57:37 +0200626
627 /*
628 * Bytes transferred == tsize * MIN(buswidths), not max(buswidths)
629 */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000630 max_bytes_per_lli = min(bd.srcbus.buswidth, bd.dstbus.buswidth) *
Linus Walleije8689e62010-09-28 15:57:37 +0200631 PL080_CONTROL_TRANSFER_SIZE_MASK;
Linus Walleije8689e62010-09-28 15:57:37 +0200632
633 /* We need to count this down to zero */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000634 bd.remainder = txd->len;
Linus Walleije8689e62010-09-28 15:57:37 +0200635
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000636 pl08x_choose_master_bus(&bd, &mbus, &sbus, cctl);
Linus Walleije8689e62010-09-28 15:57:37 +0200637
Russell King - ARM Linuxfc74eb72011-07-21 17:12:06 +0100638 dev_vdbg(&pl08x->adev->dev, "src=0x%08x%s/%u dst=0x%08x%s/%u len=%zu llimax=%zu\n",
639 bd.srcbus.addr, cctl & PL080_CONTROL_SRC_INCR ? "+" : "",
640 bd.srcbus.buswidth,
641 bd.dstbus.addr, cctl & PL080_CONTROL_DST_INCR ? "+" : "",
642 bd.dstbus.buswidth,
643 bd.remainder, max_bytes_per_lli);
644 dev_vdbg(&pl08x->adev->dev, "mbus=%s sbus=%s\n",
645 mbus == &bd.srcbus ? "src" : "dst",
646 sbus == &bd.srcbus ? "src" : "dst");
647
Linus Walleije8689e62010-09-28 15:57:37 +0200648 if (txd->len < mbus->buswidth) {
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +0000649 /* Less than a bus width available - send as single bytes */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000650 while (bd.remainder) {
Linus Walleije8689e62010-09-28 15:57:37 +0200651 dev_vdbg(&pl08x->adev->dev,
652 "%s single byte LLIs for a transfer of "
Russell King - ARM Linux9c132992011-01-03 22:33:47 +0000653 "less than a bus width (remain 0x%08x)\n",
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000654 __func__, bd.remainder);
Linus Walleije8689e62010-09-28 15:57:37 +0200655 cctl = pl08x_cctl_bits(cctl, 1, 1, 1);
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000656 pl08x_fill_lli_for_desc(&bd, num_llis++, 1, cctl);
Linus Walleije8689e62010-09-28 15:57:37 +0200657 total_bytes++;
658 }
659 } else {
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +0000660 /* Make one byte LLIs until master bus is aligned */
Linus Walleije8689e62010-09-28 15:57:37 +0200661 while ((mbus->addr) % (mbus->buswidth)) {
662 dev_vdbg(&pl08x->adev->dev,
663 "%s adjustment lli for less than bus width "
Russell King - ARM Linux9c132992011-01-03 22:33:47 +0000664 "(remain 0x%08x)\n",
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000665 __func__, bd.remainder);
Linus Walleije8689e62010-09-28 15:57:37 +0200666 cctl = pl08x_cctl_bits(cctl, 1, 1, 1);
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000667 pl08x_fill_lli_for_desc(&bd, num_llis++, 1, cctl);
Linus Walleije8689e62010-09-28 15:57:37 +0200668 total_bytes++;
669 }
670
671 /*
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +0000672 * Master now aligned
Linus Walleije8689e62010-09-28 15:57:37 +0200673 * - if slave is not then we must set its width down
674 */
675 if (sbus->addr % sbus->buswidth) {
676 dev_dbg(&pl08x->adev->dev,
677 "%s set down bus width to one byte\n",
678 __func__);
679
680 sbus->buswidth = 1;
681 }
682
683 /*
684 * Make largest possible LLIs until less than one bus
685 * width left
686 */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000687 while (bd.remainder > (mbus->buswidth - 1)) {
Russell King - ARM Linuxcace6582011-01-03 22:37:31 +0000688 size_t lli_len, target_len, tsize, odd_bytes;
Linus Walleije8689e62010-09-28 15:57:37 +0200689
690 /*
691 * If enough left try to send max possible,
692 * otherwise try to send the remainder
693 */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000694 target_len = min(bd.remainder, max_bytes_per_lli);
Linus Walleije8689e62010-09-28 15:57:37 +0200695
696 /*
Russell King - ARM Linux5f638b42011-01-03 22:42:55 +0000697 * Set bus lengths for incrementing buses to the
698 * number of bytes which fill to next memory boundary,
699 * limiting on the target length calculated above.
Linus Walleije8689e62010-09-28 15:57:37 +0200700 */
701 if (cctl & PL080_CONTROL_SRC_INCR)
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000702 bd.srcbus.fill_bytes =
703 pl08x_pre_boundary(bd.srcbus.addr,
Russell King - ARM Linux5f638b42011-01-03 22:42:55 +0000704 target_len);
Linus Walleije8689e62010-09-28 15:57:37 +0200705 else
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000706 bd.srcbus.fill_bytes = target_len;
Linus Walleije8689e62010-09-28 15:57:37 +0200707
708 if (cctl & PL080_CONTROL_DST_INCR)
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000709 bd.dstbus.fill_bytes =
710 pl08x_pre_boundary(bd.dstbus.addr,
Russell King - ARM Linux5f638b42011-01-03 22:42:55 +0000711 target_len);
Linus Walleije8689e62010-09-28 15:57:37 +0200712 else
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000713 bd.dstbus.fill_bytes = target_len;
Linus Walleije8689e62010-09-28 15:57:37 +0200714
Russell King - ARM Linux5f638b42011-01-03 22:42:55 +0000715 /* Find the nearest */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000716 lli_len = min(bd.srcbus.fill_bytes,
717 bd.dstbus.fill_bytes);
Linus Walleije8689e62010-09-28 15:57:37 +0200718
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000719 BUG_ON(lli_len > bd.remainder);
Linus Walleije8689e62010-09-28 15:57:37 +0200720
721 if (lli_len <= 0) {
722 dev_err(&pl08x->adev->dev,
Russell King - ARM Linuxcace6582011-01-03 22:37:31 +0000723 "%s lli_len is %zu, <= 0\n",
Linus Walleije8689e62010-09-28 15:57:37 +0200724 __func__, lli_len);
725 return 0;
726 }
727
728 if (lli_len == target_len) {
729 /*
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +0000730 * Can send what we wanted.
731 * Maintain alignment
Linus Walleije8689e62010-09-28 15:57:37 +0200732 */
733 lli_len = (lli_len/mbus->buswidth) *
734 mbus->buswidth;
735 odd_bytes = 0;
736 } else {
737 /*
738 * So now we know how many bytes to transfer
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +0000739 * to get to the nearest boundary. The next
740 * LLI will past the boundary. However, we
741 * may be working to a boundary on the slave
742 * bus. We need to ensure the master stays
743 * aligned, and that we are working in
744 * multiples of the bus widths.
Linus Walleije8689e62010-09-28 15:57:37 +0200745 */
746 odd_bytes = lli_len % mbus->buswidth;
Linus Walleije8689e62010-09-28 15:57:37 +0200747 lli_len -= odd_bytes;
748
749 }
750
751 if (lli_len) {
752 /*
753 * Check against minimum bus alignment:
754 * Calculate actual transfer size in relation
755 * to bus width an get a maximum remainder of
756 * the smallest bus width - 1
757 */
758 /* FIXME: use round_down()? */
759 tsize = lli_len / min(mbus->buswidth,
760 sbus->buswidth);
761 lli_len = tsize * min(mbus->buswidth,
762 sbus->buswidth);
763
764 if (target_len != lli_len) {
765 dev_vdbg(&pl08x->adev->dev,
Russell King - ARM Linuxcace6582011-01-03 22:37:31 +0000766 "%s can't send what we want. Desired 0x%08zx, lli of 0x%08zx bytes in txd of 0x%08zx\n",
Linus Walleije8689e62010-09-28 15:57:37 +0200767 __func__, target_len, lli_len, txd->len);
768 }
769
770 cctl = pl08x_cctl_bits(cctl,
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000771 bd.srcbus.buswidth,
772 bd.dstbus.buswidth,
Linus Walleije8689e62010-09-28 15:57:37 +0200773 tsize);
774
775 dev_vdbg(&pl08x->adev->dev,
Russell King - ARM Linuxcace6582011-01-03 22:37:31 +0000776 "%s fill lli with single lli chunk of size 0x%08zx (remainder 0x%08zx)\n",
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000777 __func__, lli_len, bd.remainder);
778 pl08x_fill_lli_for_desc(&bd, num_llis++,
779 lli_len, cctl);
Linus Walleije8689e62010-09-28 15:57:37 +0200780 total_bytes += lli_len;
781 }
782
Linus Walleije8689e62010-09-28 15:57:37 +0200783 if (odd_bytes) {
784 /*
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +0000785 * Creep past the boundary, maintaining
786 * master alignment
Linus Walleije8689e62010-09-28 15:57:37 +0200787 */
788 int j;
789 for (j = 0; (j < mbus->buswidth)
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000790 && (bd.remainder); j++) {
Linus Walleije8689e62010-09-28 15:57:37 +0200791 cctl = pl08x_cctl_bits(cctl, 1, 1, 1);
792 dev_vdbg(&pl08x->adev->dev,
Russell King - ARM Linuxcace6582011-01-03 22:37:31 +0000793 "%s align with boundary, single byte (remain 0x%08zx)\n",
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000794 __func__, bd.remainder);
795 pl08x_fill_lli_for_desc(&bd,
796 num_llis++, 1, cctl);
Linus Walleije8689e62010-09-28 15:57:37 +0200797 total_bytes++;
798 }
799 }
800 }
801
802 /*
803 * Send any odd bytes
804 */
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000805 while (bd.remainder) {
Linus Walleije8689e62010-09-28 15:57:37 +0200806 cctl = pl08x_cctl_bits(cctl, 1, 1, 1);
807 dev_vdbg(&pl08x->adev->dev,
Russell King - ARM Linuxcace6582011-01-03 22:37:31 +0000808 "%s align with boundary, single odd byte (remain %zu)\n",
Russell King - ARM Linux542361f2011-01-03 22:43:15 +0000809 __func__, bd.remainder);
810 pl08x_fill_lli_for_desc(&bd, num_llis++, 1, cctl);
Linus Walleije8689e62010-09-28 15:57:37 +0200811 total_bytes++;
812 }
813 }
814 if (total_bytes != txd->len) {
815 dev_err(&pl08x->adev->dev,
Russell King - ARM Linuxcace6582011-01-03 22:37:31 +0000816 "%s size of encoded lli:s don't match total txd, transferred 0x%08zx from size 0x%08zx\n",
Linus Walleije8689e62010-09-28 15:57:37 +0200817 __func__, total_bytes, txd->len);
818 return 0;
819 }
820
821 if (num_llis >= MAX_NUM_TSFR_LLIS) {
822 dev_err(&pl08x->adev->dev,
823 "%s need to increase MAX_NUM_TSFR_LLIS from 0x%08x\n",
824 __func__, (u32) MAX_NUM_TSFR_LLIS);
825 return 0;
826 }
Linus Walleije8689e62010-09-28 15:57:37 +0200827
Russell King - ARM Linuxb58b6b52011-01-03 22:34:48 +0000828 llis_va = txd->llis_va;
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +0000829 /* The final LLI terminates the LLI. */
Russell King - ARM Linuxbfddfb42011-01-03 22:38:12 +0000830 llis_va[num_llis - 1].lli = 0;
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +0000831 /* The final LLI element shall also fire an interrupt. */
Russell King - ARM Linuxb58b6b52011-01-03 22:34:48 +0000832 llis_va[num_llis - 1].cctl |= PL080_CONTROL_TC_IRQ_EN;
Linus Walleije8689e62010-09-28 15:57:37 +0200833
Linus Walleije8689e62010-09-28 15:57:37 +0200834#ifdef VERBOSE_DEBUG
835 {
836 int i;
837
Russell King - ARM Linuxfc74eb72011-07-21 17:12:06 +0100838 dev_vdbg(&pl08x->adev->dev,
839 "%-3s %-9s %-10s %-10s %-10s %s\n",
840 "lli", "", "csrc", "cdst", "clli", "cctl");
Linus Walleije8689e62010-09-28 15:57:37 +0200841 for (i = 0; i < num_llis; i++) {
842 dev_vdbg(&pl08x->adev->dev,
Russell King - ARM Linuxfc74eb72011-07-21 17:12:06 +0100843 "%3d @%p: 0x%08x 0x%08x 0x%08x 0x%08x\n",
844 i, &llis_va[i], llis_va[i].src,
845 llis_va[i].dst, llis_va[i].lli, llis_va[i].cctl
Linus Walleije8689e62010-09-28 15:57:37 +0200846 );
847 }
848 }
849#endif
850
851 return num_llis;
852}
853
854/* You should call this with the struct pl08x lock held */
855static void pl08x_free_txd(struct pl08x_driver_data *pl08x,
856 struct pl08x_txd *txd)
857{
Linus Walleije8689e62010-09-28 15:57:37 +0200858 /* Free the LLI */
Russell King - ARM Linux56b61882011-01-03 22:37:10 +0000859 dma_pool_free(pl08x->pool, txd->llis_va, txd->llis_bus);
Linus Walleije8689e62010-09-28 15:57:37 +0200860
861 pl08x->pool_ctr--;
862
863 kfree(txd);
864}
865
866static void pl08x_free_txd_list(struct pl08x_driver_data *pl08x,
867 struct pl08x_dma_chan *plchan)
868{
869 struct pl08x_txd *txdi = NULL;
870 struct pl08x_txd *next;
871
Russell King - ARM Linux15c17232011-01-03 22:44:36 +0000872 if (!list_empty(&plchan->pend_list)) {
Linus Walleije8689e62010-09-28 15:57:37 +0200873 list_for_each_entry_safe(txdi,
Russell King - ARM Linux15c17232011-01-03 22:44:36 +0000874 next, &plchan->pend_list, node) {
Linus Walleije8689e62010-09-28 15:57:37 +0200875 list_del(&txdi->node);
876 pl08x_free_txd(pl08x, txdi);
877 }
Linus Walleije8689e62010-09-28 15:57:37 +0200878 }
879}
880
881/*
882 * The DMA ENGINE API
883 */
884static int pl08x_alloc_chan_resources(struct dma_chan *chan)
885{
886 return 0;
887}
888
889static void pl08x_free_chan_resources(struct dma_chan *chan)
890{
891}
892
893/*
894 * This should be called with the channel plchan->lock held
895 */
896static int prep_phy_channel(struct pl08x_dma_chan *plchan,
897 struct pl08x_txd *txd)
898{
899 struct pl08x_driver_data *pl08x = plchan->host;
900 struct pl08x_phy_chan *ch;
901 int ret;
902
903 /* Check if we already have a channel */
904 if (plchan->phychan)
905 return 0;
906
907 ch = pl08x_get_phy_channel(pl08x, plchan);
908 if (!ch) {
909 /* No physical channel available, cope with it */
910 dev_dbg(&pl08x->adev->dev, "no physical channel available for xfer on %s\n", plchan->name);
911 return -EBUSY;
912 }
913
914 /*
915 * OK we have a physical channel: for memcpy() this is all we
916 * need, but for slaves the physical signals may be muxed!
917 * Can the platform allow us to use this channel?
918 */
Viresh Kumar16ca8102011-08-05 15:32:35 +0530919 if (plchan->slave && pl08x->pd->get_signal) {
Linus Walleije8689e62010-09-28 15:57:37 +0200920 ret = pl08x->pd->get_signal(plchan);
921 if (ret < 0) {
922 dev_dbg(&pl08x->adev->dev,
923 "unable to use physical channel %d for transfer on %s due to platform restrictions\n",
924 ch->id, plchan->name);
925 /* Release physical channel & return */
926 pl08x_put_phy_channel(pl08x, ch);
927 return -EBUSY;
928 }
929 ch->signal = ret;
Russell King - ARM Linux09b3c322011-01-03 22:39:53 +0000930
931 /* Assign the flow control signal to this channel */
932 if (txd->direction == DMA_TO_DEVICE)
933 txd->ccfg |= ch->signal << PL080_CONFIG_DST_SEL_SHIFT;
934 else if (txd->direction == DMA_FROM_DEVICE)
935 txd->ccfg |= ch->signal << PL080_CONFIG_SRC_SEL_SHIFT;
Linus Walleije8689e62010-09-28 15:57:37 +0200936 }
937
938 dev_dbg(&pl08x->adev->dev, "allocated physical channel %d and signal %d for xfer on %s\n",
939 ch->id,
940 ch->signal,
941 plchan->name);
942
Russell King - ARM Linux8087aac2011-01-03 22:45:17 +0000943 plchan->phychan_hold++;
Linus Walleije8689e62010-09-28 15:57:37 +0200944 plchan->phychan = ch;
945
946 return 0;
947}
948
Russell King - ARM Linux8c8cc2b2011-01-03 22:36:09 +0000949static void release_phy_channel(struct pl08x_dma_chan *plchan)
950{
951 struct pl08x_driver_data *pl08x = plchan->host;
952
953 if ((plchan->phychan->signal >= 0) && pl08x->pd->put_signal) {
954 pl08x->pd->put_signal(plchan);
955 plchan->phychan->signal = -1;
956 }
957 pl08x_put_phy_channel(pl08x, plchan->phychan);
958 plchan->phychan = NULL;
959}
960
Linus Walleije8689e62010-09-28 15:57:37 +0200961static dma_cookie_t pl08x_tx_submit(struct dma_async_tx_descriptor *tx)
962{
963 struct pl08x_dma_chan *plchan = to_pl08x_chan(tx->chan);
Russell King - ARM Linux501e67e2011-01-03 22:44:57 +0000964 struct pl08x_txd *txd = to_pl08x_txd(tx);
Russell King - ARM Linuxc370e592011-01-03 22:45:37 +0000965 unsigned long flags;
966
967 spin_lock_irqsave(&plchan->lock, flags);
Linus Walleije8689e62010-09-28 15:57:37 +0200968
Russell King - ARM Linux91aa5fa2011-01-03 22:31:04 +0000969 plchan->chan.cookie += 1;
970 if (plchan->chan.cookie < 0)
971 plchan->chan.cookie = 1;
972 tx->cookie = plchan->chan.cookie;
Russell King - ARM Linux501e67e2011-01-03 22:44:57 +0000973
974 /* Put this onto the pending list */
975 list_add_tail(&txd->node, &plchan->pend_list);
976
977 /*
978 * If there was no physical channel available for this memcpy,
979 * stack the request up and indicate that the channel is waiting
980 * for a free physical channel.
981 */
982 if (!plchan->slave && !plchan->phychan) {
983 /* Do this memcpy whenever there is a channel ready */
984 plchan->state = PL08X_CHAN_WAITING;
985 plchan->waiting = txd;
Russell King - ARM Linux8087aac2011-01-03 22:45:17 +0000986 } else {
987 plchan->phychan_hold--;
Russell King - ARM Linux501e67e2011-01-03 22:44:57 +0000988 }
989
Russell King - ARM Linuxc370e592011-01-03 22:45:37 +0000990 spin_unlock_irqrestore(&plchan->lock, flags);
Linus Walleije8689e62010-09-28 15:57:37 +0200991
992 return tx->cookie;
993}
994
995static struct dma_async_tx_descriptor *pl08x_prep_dma_interrupt(
996 struct dma_chan *chan, unsigned long flags)
997{
998 struct dma_async_tx_descriptor *retval = NULL;
999
1000 return retval;
1001}
1002
1003/*
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +00001004 * Code accessing dma_async_is_complete() in a tight loop may give problems.
1005 * If slaves are relying on interrupts to signal completion this function
1006 * must not be called with interrupts disabled.
Linus Walleije8689e62010-09-28 15:57:37 +02001007 */
Viresh Kumar3e27ee82011-08-05 15:32:27 +05301008static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan,
1009 dma_cookie_t cookie, struct dma_tx_state *txstate)
Linus Walleije8689e62010-09-28 15:57:37 +02001010{
1011 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1012 dma_cookie_t last_used;
1013 dma_cookie_t last_complete;
1014 enum dma_status ret;
1015 u32 bytesleft = 0;
1016
Russell King - ARM Linux91aa5fa2011-01-03 22:31:04 +00001017 last_used = plchan->chan.cookie;
Linus Walleije8689e62010-09-28 15:57:37 +02001018 last_complete = plchan->lc;
1019
1020 ret = dma_async_is_complete(cookie, last_complete, last_used);
1021 if (ret == DMA_SUCCESS) {
1022 dma_set_tx_state(txstate, last_complete, last_used, 0);
1023 return ret;
1024 }
1025
1026 /*
Linus Walleije8689e62010-09-28 15:57:37 +02001027 * This cookie not complete yet
1028 */
Russell King - ARM Linux91aa5fa2011-01-03 22:31:04 +00001029 last_used = plchan->chan.cookie;
Linus Walleije8689e62010-09-28 15:57:37 +02001030 last_complete = plchan->lc;
1031
1032 /* Get number of bytes left in the active transactions and queue */
1033 bytesleft = pl08x_getbytes_chan(plchan);
1034
1035 dma_set_tx_state(txstate, last_complete, last_used,
1036 bytesleft);
1037
1038 if (plchan->state == PL08X_CHAN_PAUSED)
1039 return DMA_PAUSED;
1040
1041 /* Whether waiting or running, we're in progress */
1042 return DMA_IN_PROGRESS;
1043}
1044
1045/* PrimeCell DMA extension */
1046struct burst_table {
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001047 u32 burstwords;
Linus Walleije8689e62010-09-28 15:57:37 +02001048 u32 reg;
1049};
1050
1051static const struct burst_table burst_sizes[] = {
1052 {
1053 .burstwords = 256,
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001054 .reg = PL080_BSIZE_256,
Linus Walleije8689e62010-09-28 15:57:37 +02001055 },
1056 {
1057 .burstwords = 128,
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001058 .reg = PL080_BSIZE_128,
Linus Walleije8689e62010-09-28 15:57:37 +02001059 },
1060 {
1061 .burstwords = 64,
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001062 .reg = PL080_BSIZE_64,
Linus Walleije8689e62010-09-28 15:57:37 +02001063 },
1064 {
1065 .burstwords = 32,
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001066 .reg = PL080_BSIZE_32,
Linus Walleije8689e62010-09-28 15:57:37 +02001067 },
1068 {
1069 .burstwords = 16,
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001070 .reg = PL080_BSIZE_16,
Linus Walleije8689e62010-09-28 15:57:37 +02001071 },
1072 {
1073 .burstwords = 8,
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001074 .reg = PL080_BSIZE_8,
Linus Walleije8689e62010-09-28 15:57:37 +02001075 },
1076 {
1077 .burstwords = 4,
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001078 .reg = PL080_BSIZE_4,
Linus Walleije8689e62010-09-28 15:57:37 +02001079 },
1080 {
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001081 .burstwords = 0,
1082 .reg = PL080_BSIZE_1,
Linus Walleije8689e62010-09-28 15:57:37 +02001083 },
1084};
1085
Russell King - ARM Linux121c8472011-07-21 17:13:48 +01001086/*
1087 * Given the source and destination available bus masks, select which
1088 * will be routed to each port. We try to have source and destination
1089 * on separate ports, but always respect the allowable settings.
1090 */
1091static u32 pl08x_select_bus(u8 src, u8 dst)
1092{
1093 u32 cctl = 0;
1094
1095 if (!(dst & PL08X_AHB1) || ((dst & PL08X_AHB2) && (src & PL08X_AHB1)))
1096 cctl |= PL080_CONTROL_DST_AHB2;
1097 if (!(src & PL08X_AHB1) || ((src & PL08X_AHB2) && !(dst & PL08X_AHB2)))
1098 cctl |= PL080_CONTROL_SRC_AHB2;
1099
1100 return cctl;
1101}
1102
Russell King - ARM Linuxf14c4262011-07-21 17:12:47 +01001103static u32 pl08x_cctl(u32 cctl)
1104{
1105 cctl &= ~(PL080_CONTROL_SRC_AHB2 | PL080_CONTROL_DST_AHB2 |
1106 PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR |
1107 PL080_CONTROL_PROT_MASK);
1108
1109 /* Access the cell in privileged mode, non-bufferable, non-cacheable */
1110 return cctl | PL080_CONTROL_PROT_SYS;
1111}
1112
Russell King - ARM Linuxaa88cda2011-07-21 17:13:28 +01001113static u32 pl08x_width(enum dma_slave_buswidth width)
1114{
1115 switch (width) {
1116 case DMA_SLAVE_BUSWIDTH_1_BYTE:
1117 return PL080_WIDTH_8BIT;
1118 case DMA_SLAVE_BUSWIDTH_2_BYTES:
1119 return PL080_WIDTH_16BIT;
1120 case DMA_SLAVE_BUSWIDTH_4_BYTES:
1121 return PL080_WIDTH_32BIT;
Vinod Koulf32807f2011-07-25 19:22:01 +05301122 default:
1123 return ~0;
Russell King - ARM Linuxaa88cda2011-07-21 17:13:28 +01001124 }
Russell King - ARM Linuxaa88cda2011-07-21 17:13:28 +01001125}
1126
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001127static u32 pl08x_burst(u32 maxburst)
1128{
1129 int i;
1130
1131 for (i = 0; i < ARRAY_SIZE(burst_sizes); i++)
1132 if (burst_sizes[i].burstwords <= maxburst)
1133 break;
1134
1135 return burst_sizes[i].reg;
1136}
1137
Russell King - ARM Linuxf0fd9442011-01-03 22:45:57 +00001138static int dma_set_runtime_config(struct dma_chan *chan,
1139 struct dma_slave_config *config)
Linus Walleije8689e62010-09-28 15:57:37 +02001140{
1141 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1142 struct pl08x_driver_data *pl08x = plchan->host;
Linus Walleije8689e62010-09-28 15:57:37 +02001143 enum dma_slave_buswidth addr_width;
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001144 u32 width, burst, maxburst;
Linus Walleije8689e62010-09-28 15:57:37 +02001145 u32 cctl = 0;
Linus Walleije8689e62010-09-28 15:57:37 +02001146
Russell King - ARM Linuxb7f75862011-01-03 22:46:17 +00001147 if (!plchan->slave)
1148 return -EINVAL;
1149
Linus Walleije8689e62010-09-28 15:57:37 +02001150 /* Transfer direction */
1151 plchan->runtime_direction = config->direction;
1152 if (config->direction == DMA_TO_DEVICE) {
Linus Walleije8689e62010-09-28 15:57:37 +02001153 addr_width = config->dst_addr_width;
1154 maxburst = config->dst_maxburst;
1155 } else if (config->direction == DMA_FROM_DEVICE) {
Linus Walleije8689e62010-09-28 15:57:37 +02001156 addr_width = config->src_addr_width;
1157 maxburst = config->src_maxburst;
1158 } else {
1159 dev_err(&pl08x->adev->dev,
1160 "bad runtime_config: alien transfer direction\n");
Russell King - ARM Linuxf0fd9442011-01-03 22:45:57 +00001161 return -EINVAL;
Linus Walleije8689e62010-09-28 15:57:37 +02001162 }
1163
Russell King - ARM Linuxaa88cda2011-07-21 17:13:28 +01001164 width = pl08x_width(addr_width);
1165 if (width == ~0) {
Linus Walleije8689e62010-09-28 15:57:37 +02001166 dev_err(&pl08x->adev->dev,
1167 "bad runtime_config: alien address width\n");
Russell King - ARM Linuxf0fd9442011-01-03 22:45:57 +00001168 return -EINVAL;
Linus Walleije8689e62010-09-28 15:57:37 +02001169 }
1170
Russell King - ARM Linuxaa88cda2011-07-21 17:13:28 +01001171 cctl |= width << PL080_CONTROL_SWIDTH_SHIFT;
1172 cctl |= width << PL080_CONTROL_DWIDTH_SHIFT;
1173
Linus Walleije8689e62010-09-28 15:57:37 +02001174 /*
Russell King - ARM Linux4440aac2011-01-03 22:30:44 +00001175 * If this channel will only request single transfers, set this
1176 * down to ONE element. Also select one element if no maxburst
1177 * is specified.
Linus Walleije8689e62010-09-28 15:57:37 +02001178 */
Russell King - ARM Linux760596c62011-07-21 17:14:08 +01001179 if (plchan->cd->single)
1180 maxburst = 1;
1181
1182 burst = pl08x_burst(maxburst);
1183 cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT;
1184 cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT;
Linus Walleije8689e62010-09-28 15:57:37 +02001185
Russell King - ARM Linuxb207b4d2011-07-21 17:12:27 +01001186 if (plchan->runtime_direction == DMA_FROM_DEVICE) {
1187 plchan->src_addr = config->src_addr;
Russell King - ARM Linux121c8472011-07-21 17:13:48 +01001188 plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR |
1189 pl08x_select_bus(plchan->cd->periph_buses,
1190 pl08x->mem_buses);
Russell King - ARM Linuxb207b4d2011-07-21 17:12:27 +01001191 } else {
1192 plchan->dst_addr = config->dst_addr;
Russell King - ARM Linux121c8472011-07-21 17:13:48 +01001193 plchan->dst_cctl = pl08x_cctl(cctl) | PL080_CONTROL_SRC_INCR |
1194 pl08x_select_bus(pl08x->mem_buses,
1195 plchan->cd->periph_buses);
Russell King - ARM Linuxb207b4d2011-07-21 17:12:27 +01001196 }
Russell King - ARM Linuxf0fd9442011-01-03 22:45:57 +00001197
Linus Walleije8689e62010-09-28 15:57:37 +02001198 dev_dbg(&pl08x->adev->dev,
1199 "configured channel %s (%s) for %s, data width %d, "
Russell King - ARM Linux4983a042011-01-03 22:39:33 +00001200 "maxburst %d words, LE, CCTL=0x%08x\n",
Linus Walleije8689e62010-09-28 15:57:37 +02001201 dma_chan_name(chan), plchan->name,
1202 (config->direction == DMA_FROM_DEVICE) ? "RX" : "TX",
1203 addr_width,
1204 maxburst,
Russell King - ARM Linux4983a042011-01-03 22:39:33 +00001205 cctl);
Russell King - ARM Linuxf0fd9442011-01-03 22:45:57 +00001206
1207 return 0;
Linus Walleije8689e62010-09-28 15:57:37 +02001208}
1209
1210/*
1211 * Slave transactions callback to the slave device to allow
1212 * synchronization of slave DMA signals with the DMAC enable
1213 */
1214static void pl08x_issue_pending(struct dma_chan *chan)
1215{
1216 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
Linus Walleije8689e62010-09-28 15:57:37 +02001217 unsigned long flags;
1218
1219 spin_lock_irqsave(&plchan->lock, flags);
Russell King - ARM Linux9c0bb432011-01-03 22:32:05 +00001220 /* Something is already active, or we're waiting for a channel... */
1221 if (plchan->at || plchan->state == PL08X_CHAN_WAITING) {
1222 spin_unlock_irqrestore(&plchan->lock, flags);
Linus Walleije8689e62010-09-28 15:57:37 +02001223 return;
Russell King - ARM Linux9c0bb432011-01-03 22:32:05 +00001224 }
Linus Walleije8689e62010-09-28 15:57:37 +02001225
1226 /* Take the first element in the queue and execute it */
Russell King - ARM Linux15c17232011-01-03 22:44:36 +00001227 if (!list_empty(&plchan->pend_list)) {
Linus Walleije8689e62010-09-28 15:57:37 +02001228 struct pl08x_txd *next;
1229
Russell King - ARM Linux15c17232011-01-03 22:44:36 +00001230 next = list_first_entry(&plchan->pend_list,
Linus Walleije8689e62010-09-28 15:57:37 +02001231 struct pl08x_txd,
1232 node);
1233 list_del(&next->node);
Linus Walleije8689e62010-09-28 15:57:37 +02001234 plchan->state = PL08X_CHAN_RUNNING;
1235
Russell King - ARM Linuxc885bee2011-01-03 22:38:52 +00001236 pl08x_start_txd(plchan, next);
Linus Walleije8689e62010-09-28 15:57:37 +02001237 }
1238
1239 spin_unlock_irqrestore(&plchan->lock, flags);
1240}
1241
1242static int pl08x_prep_channel_resources(struct pl08x_dma_chan *plchan,
1243 struct pl08x_txd *txd)
1244{
Linus Walleije8689e62010-09-28 15:57:37 +02001245 struct pl08x_driver_data *pl08x = plchan->host;
Russell King - ARM Linuxc370e592011-01-03 22:45:37 +00001246 unsigned long flags;
1247 int num_llis, ret;
Linus Walleije8689e62010-09-28 15:57:37 +02001248
1249 num_llis = pl08x_fill_llis_for_desc(pl08x, txd);
Russell King - ARM Linuxdafa7312011-01-03 22:31:45 +00001250 if (!num_llis) {
1251 kfree(txd);
Linus Walleije8689e62010-09-28 15:57:37 +02001252 return -EINVAL;
Russell King - ARM Linuxdafa7312011-01-03 22:31:45 +00001253 }
Linus Walleije8689e62010-09-28 15:57:37 +02001254
Russell King - ARM Linuxc370e592011-01-03 22:45:37 +00001255 spin_lock_irqsave(&plchan->lock, flags);
Linus Walleije8689e62010-09-28 15:57:37 +02001256
Linus Walleije8689e62010-09-28 15:57:37 +02001257 /*
1258 * See if we already have a physical channel allocated,
1259 * else this is the time to try to get one.
1260 */
1261 ret = prep_phy_channel(plchan, txd);
1262 if (ret) {
1263 /*
Russell King - ARM Linux501e67e2011-01-03 22:44:57 +00001264 * No physical channel was available.
1265 *
1266 * memcpy transfers can be sorted out at submission time.
1267 *
1268 * Slave transfers may have been denied due to platform
1269 * channel muxing restrictions. Since there is no guarantee
1270 * that this will ever be resolved, and the signal must be
1271 * acquired AFTER acquiring the physical channel, we will let
1272 * them be NACK:ed with -EBUSY here. The drivers can retry
1273 * the prep() call if they are eager on doing this using DMA.
Linus Walleije8689e62010-09-28 15:57:37 +02001274 */
1275 if (plchan->slave) {
1276 pl08x_free_txd_list(pl08x, plchan);
Russell King - ARM Linux501e67e2011-01-03 22:44:57 +00001277 pl08x_free_txd(pl08x, txd);
Russell King - ARM Linuxc370e592011-01-03 22:45:37 +00001278 spin_unlock_irqrestore(&plchan->lock, flags);
Linus Walleije8689e62010-09-28 15:57:37 +02001279 return -EBUSY;
1280 }
Linus Walleije8689e62010-09-28 15:57:37 +02001281 } else
1282 /*
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +00001283 * Else we're all set, paused and ready to roll, status
1284 * will switch to PL08X_CHAN_RUNNING when we call
1285 * issue_pending(). If there is something running on the
1286 * channel already we don't change its state.
Linus Walleije8689e62010-09-28 15:57:37 +02001287 */
1288 if (plchan->state == PL08X_CHAN_IDLE)
1289 plchan->state = PL08X_CHAN_PAUSED;
1290
Russell King - ARM Linuxc370e592011-01-03 22:45:37 +00001291 spin_unlock_irqrestore(&plchan->lock, flags);
Linus Walleije8689e62010-09-28 15:57:37 +02001292
1293 return 0;
1294}
1295
Russell King - ARM Linuxc0428792011-01-03 22:43:56 +00001296static struct pl08x_txd *pl08x_get_txd(struct pl08x_dma_chan *plchan,
1297 unsigned long flags)
Russell King - ARM Linuxac3cd202011-01-03 22:35:49 +00001298{
Viresh Kumarb201c112011-08-05 15:32:29 +05301299 struct pl08x_txd *txd = kzalloc(sizeof(*txd), GFP_NOWAIT);
Russell King - ARM Linuxac3cd202011-01-03 22:35:49 +00001300
1301 if (txd) {
1302 dma_async_tx_descriptor_init(&txd->tx, &plchan->chan);
Russell King - ARM Linuxc0428792011-01-03 22:43:56 +00001303 txd->tx.flags = flags;
Russell King - ARM Linuxac3cd202011-01-03 22:35:49 +00001304 txd->tx.tx_submit = pl08x_tx_submit;
1305 INIT_LIST_HEAD(&txd->node);
Russell King - ARM Linux4983a042011-01-03 22:39:33 +00001306
1307 /* Always enable error and terminal interrupts */
1308 txd->ccfg = PL080_CONFIG_ERR_IRQ_MASK |
1309 PL080_CONFIG_TC_IRQ_MASK;
Russell King - ARM Linuxac3cd202011-01-03 22:35:49 +00001310 }
1311 return txd;
1312}
1313
Linus Walleije8689e62010-09-28 15:57:37 +02001314/*
1315 * Initialize a descriptor to be used by memcpy submit
1316 */
1317static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy(
1318 struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
1319 size_t len, unsigned long flags)
1320{
1321 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1322 struct pl08x_driver_data *pl08x = plchan->host;
1323 struct pl08x_txd *txd;
1324 int ret;
1325
Russell King - ARM Linuxc0428792011-01-03 22:43:56 +00001326 txd = pl08x_get_txd(plchan, flags);
Linus Walleije8689e62010-09-28 15:57:37 +02001327 if (!txd) {
1328 dev_err(&pl08x->adev->dev,
1329 "%s no memory for descriptor\n", __func__);
1330 return NULL;
1331 }
1332
Linus Walleije8689e62010-09-28 15:57:37 +02001333 txd->direction = DMA_NONE;
Russell King - ARM Linuxd7244e92011-01-03 22:43:35 +00001334 txd->src_addr = src;
1335 txd->dst_addr = dest;
Russell King - ARM Linuxc7da9a52011-01-03 22:40:53 +00001336 txd->len = len;
Linus Walleije8689e62010-09-28 15:57:37 +02001337
1338 /* Set platform data for m2m */
Russell King - ARM Linux4983a042011-01-03 22:39:33 +00001339 txd->ccfg |= PL080_FLOW_MEM2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT;
Russell King - ARM Linuxc7da9a52011-01-03 22:40:53 +00001340 txd->cctl = pl08x->pd->memcpy_channel.cctl &
1341 ~(PL080_CONTROL_DST_AHB2 | PL080_CONTROL_SRC_AHB2);
Russell King - ARM Linux4983a042011-01-03 22:39:33 +00001342
Linus Walleije8689e62010-09-28 15:57:37 +02001343 /* Both to be incremented or the code will break */
Russell King - ARM Linux70b5ed62011-01-03 22:40:13 +00001344 txd->cctl |= PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR;
Russell King - ARM Linuxc7da9a52011-01-03 22:40:53 +00001345
Russell King - ARM Linuxc7da9a52011-01-03 22:40:53 +00001346 if (pl08x->vd->dualmaster)
Russell King - ARM Linux121c8472011-07-21 17:13:48 +01001347 txd->cctl |= pl08x_select_bus(pl08x->mem_buses,
1348 pl08x->mem_buses);
Linus Walleije8689e62010-09-28 15:57:37 +02001349
Linus Walleije8689e62010-09-28 15:57:37 +02001350 ret = pl08x_prep_channel_resources(plchan, txd);
1351 if (ret)
1352 return NULL;
Linus Walleije8689e62010-09-28 15:57:37 +02001353
1354 return &txd->tx;
1355}
1356
Russell King - ARM Linux3e2a0372011-01-03 22:32:46 +00001357static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
Linus Walleije8689e62010-09-28 15:57:37 +02001358 struct dma_chan *chan, struct scatterlist *sgl,
1359 unsigned int sg_len, enum dma_data_direction direction,
1360 unsigned long flags)
1361{
1362 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1363 struct pl08x_driver_data *pl08x = plchan->host;
1364 struct pl08x_txd *txd;
1365 int ret;
1366
1367 /*
1368 * Current implementation ASSUMES only one sg
1369 */
1370 if (sg_len != 1) {
1371 dev_err(&pl08x->adev->dev, "%s prepared too long sglist\n",
1372 __func__);
1373 BUG();
1374 }
1375
1376 dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n",
1377 __func__, sgl->length, plchan->name);
1378
Russell King - ARM Linuxc0428792011-01-03 22:43:56 +00001379 txd = pl08x_get_txd(plchan, flags);
Linus Walleije8689e62010-09-28 15:57:37 +02001380 if (!txd) {
1381 dev_err(&pl08x->adev->dev, "%s no txd\n", __func__);
1382 return NULL;
1383 }
1384
Linus Walleije8689e62010-09-28 15:57:37 +02001385 if (direction != plchan->runtime_direction)
1386 dev_err(&pl08x->adev->dev, "%s DMA setup does not match "
1387 "the direction configured for the PrimeCell\n",
1388 __func__);
1389
1390 /*
1391 * Set up addresses, the PrimeCell configured address
1392 * will take precedence since this may configure the
1393 * channel target address dynamically at runtime.
1394 */
1395 txd->direction = direction;
Russell King - ARM Linuxc7da9a52011-01-03 22:40:53 +00001396 txd->len = sgl->length;
1397
Linus Walleije8689e62010-09-28 15:57:37 +02001398 if (direction == DMA_TO_DEVICE) {
Russell King - ARM Linux4983a042011-01-03 22:39:33 +00001399 txd->ccfg |= PL080_FLOW_MEM2PER << PL080_CONFIG_FLOW_CONTROL_SHIFT;
Russell King - ARM Linux121c8472011-07-21 17:13:48 +01001400 txd->cctl = plchan->dst_cctl;
Russell King - ARM Linuxd7244e92011-01-03 22:43:35 +00001401 txd->src_addr = sgl->dma_address;
Russell King - ARM Linuxb207b4d2011-07-21 17:12:27 +01001402 txd->dst_addr = plchan->dst_addr;
Linus Walleije8689e62010-09-28 15:57:37 +02001403 } else if (direction == DMA_FROM_DEVICE) {
Russell King - ARM Linux4983a042011-01-03 22:39:33 +00001404 txd->ccfg |= PL080_FLOW_PER2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT;
Russell King - ARM Linux121c8472011-07-21 17:13:48 +01001405 txd->cctl = plchan->src_cctl;
Russell King - ARM Linuxb207b4d2011-07-21 17:12:27 +01001406 txd->src_addr = plchan->src_addr;
Russell King - ARM Linuxd7244e92011-01-03 22:43:35 +00001407 txd->dst_addr = sgl->dma_address;
Linus Walleije8689e62010-09-28 15:57:37 +02001408 } else {
1409 dev_err(&pl08x->adev->dev,
1410 "%s direction unsupported\n", __func__);
1411 return NULL;
1412 }
Linus Walleije8689e62010-09-28 15:57:37 +02001413
1414 ret = pl08x_prep_channel_resources(plchan, txd);
1415 if (ret)
1416 return NULL;
Linus Walleije8689e62010-09-28 15:57:37 +02001417
1418 return &txd->tx;
1419}
1420
1421static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
1422 unsigned long arg)
1423{
1424 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1425 struct pl08x_driver_data *pl08x = plchan->host;
1426 unsigned long flags;
1427 int ret = 0;
1428
1429 /* Controls applicable to inactive channels */
1430 if (cmd == DMA_SLAVE_CONFIG) {
Russell King - ARM Linuxf0fd9442011-01-03 22:45:57 +00001431 return dma_set_runtime_config(chan,
1432 (struct dma_slave_config *)arg);
Linus Walleije8689e62010-09-28 15:57:37 +02001433 }
1434
1435 /*
1436 * Anything succeeds on channels with no physical allocation and
1437 * no queued transfers.
1438 */
1439 spin_lock_irqsave(&plchan->lock, flags);
1440 if (!plchan->phychan && !plchan->at) {
1441 spin_unlock_irqrestore(&plchan->lock, flags);
1442 return 0;
1443 }
1444
1445 switch (cmd) {
1446 case DMA_TERMINATE_ALL:
1447 plchan->state = PL08X_CHAN_IDLE;
1448
1449 if (plchan->phychan) {
Russell King - ARM Linuxfb526212011-01-27 12:32:53 +00001450 pl08x_terminate_phy_chan(pl08x, plchan->phychan);
Linus Walleije8689e62010-09-28 15:57:37 +02001451
1452 /*
1453 * Mark physical channel as free and free any slave
1454 * signal
1455 */
Russell King - ARM Linux8c8cc2b2011-01-03 22:36:09 +00001456 release_phy_channel(plchan);
Linus Walleije8689e62010-09-28 15:57:37 +02001457 }
Linus Walleije8689e62010-09-28 15:57:37 +02001458 /* Dequeue jobs and free LLIs */
1459 if (plchan->at) {
1460 pl08x_free_txd(pl08x, plchan->at);
1461 plchan->at = NULL;
1462 }
1463 /* Dequeue jobs not yet fired as well */
1464 pl08x_free_txd_list(pl08x, plchan);
1465 break;
1466 case DMA_PAUSE:
1467 pl08x_pause_phy_chan(plchan->phychan);
1468 plchan->state = PL08X_CHAN_PAUSED;
1469 break;
1470 case DMA_RESUME:
1471 pl08x_resume_phy_chan(plchan->phychan);
1472 plchan->state = PL08X_CHAN_RUNNING;
1473 break;
1474 default:
1475 /* Unknown command */
1476 ret = -ENXIO;
1477 break;
1478 }
1479
1480 spin_unlock_irqrestore(&plchan->lock, flags);
1481
1482 return ret;
1483}
1484
1485bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
1486{
1487 struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
1488 char *name = chan_id;
1489
1490 /* Check that the channel is not taken! */
1491 if (!strcmp(plchan->name, name))
1492 return true;
1493
1494 return false;
1495}
1496
1497/*
1498 * Just check that the device is there and active
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +00001499 * TODO: turn this bit on/off depending on the number of physical channels
1500 * actually used, if it is zero... well shut it off. That will save some
1501 * power. Cut the clock at the same time.
Linus Walleije8689e62010-09-28 15:57:37 +02001502 */
1503static void pl08x_ensure_on(struct pl08x_driver_data *pl08x)
1504{
Viresh Kumar48a59ef2011-08-05 15:32:34 +05301505 writel(PL080_CONFIG_ENABLE, pl08x->base + PL080_CONFIG);
Linus Walleije8689e62010-09-28 15:57:37 +02001506}
1507
Russell King - ARM Linux3d992e12011-01-03 22:44:16 +00001508static void pl08x_unmap_buffers(struct pl08x_txd *txd)
1509{
1510 struct device *dev = txd->tx.chan->device->dev;
1511
1512 if (!(txd->tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
1513 if (txd->tx.flags & DMA_COMPL_SRC_UNMAP_SINGLE)
1514 dma_unmap_single(dev, txd->src_addr, txd->len,
1515 DMA_TO_DEVICE);
1516 else
1517 dma_unmap_page(dev, txd->src_addr, txd->len,
1518 DMA_TO_DEVICE);
1519 }
1520 if (!(txd->tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
1521 if (txd->tx.flags & DMA_COMPL_DEST_UNMAP_SINGLE)
1522 dma_unmap_single(dev, txd->dst_addr, txd->len,
1523 DMA_FROM_DEVICE);
1524 else
1525 dma_unmap_page(dev, txd->dst_addr, txd->len,
1526 DMA_FROM_DEVICE);
1527 }
1528}
1529
Linus Walleije8689e62010-09-28 15:57:37 +02001530static void pl08x_tasklet(unsigned long data)
1531{
1532 struct pl08x_dma_chan *plchan = (struct pl08x_dma_chan *) data;
Linus Walleije8689e62010-09-28 15:57:37 +02001533 struct pl08x_driver_data *pl08x = plchan->host;
Russell King - ARM Linux858c21c2011-01-03 22:41:34 +00001534 struct pl08x_txd *txd;
Russell King - ARM Linuxbf072af2011-01-03 22:31:24 +00001535 unsigned long flags;
Linus Walleije8689e62010-09-28 15:57:37 +02001536
Russell King - ARM Linuxbf072af2011-01-03 22:31:24 +00001537 spin_lock_irqsave(&plchan->lock, flags);
Linus Walleije8689e62010-09-28 15:57:37 +02001538
Russell King - ARM Linux858c21c2011-01-03 22:41:34 +00001539 txd = plchan->at;
1540 plchan->at = NULL;
1541
1542 if (txd) {
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +00001543 /* Update last completed */
Russell King - ARM Linux858c21c2011-01-03 22:41:34 +00001544 plchan->lc = txd->tx.cookie;
Linus Walleije8689e62010-09-28 15:57:37 +02001545 }
Russell King - ARM Linux8087aac2011-01-03 22:45:17 +00001546
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +00001547 /* If a new descriptor is queued, set it up plchan->at is NULL here */
Russell King - ARM Linux15c17232011-01-03 22:44:36 +00001548 if (!list_empty(&plchan->pend_list)) {
Linus Walleije8689e62010-09-28 15:57:37 +02001549 struct pl08x_txd *next;
1550
Russell King - ARM Linux15c17232011-01-03 22:44:36 +00001551 next = list_first_entry(&plchan->pend_list,
Linus Walleije8689e62010-09-28 15:57:37 +02001552 struct pl08x_txd,
1553 node);
1554 list_del(&next->node);
Russell King - ARM Linuxc885bee2011-01-03 22:38:52 +00001555
1556 pl08x_start_txd(plchan, next);
Russell King - ARM Linux8087aac2011-01-03 22:45:17 +00001557 } else if (plchan->phychan_hold) {
1558 /*
1559 * This channel is still in use - we have a new txd being
1560 * prepared and will soon be queued. Don't give up the
1561 * physical channel.
1562 */
Linus Walleije8689e62010-09-28 15:57:37 +02001563 } else {
1564 struct pl08x_dma_chan *waiting = NULL;
1565
1566 /*
1567 * No more jobs, so free up the physical channel
1568 * Free any allocated signal on slave transfers too
1569 */
Russell King - ARM Linux8c8cc2b2011-01-03 22:36:09 +00001570 release_phy_channel(plchan);
Linus Walleije8689e62010-09-28 15:57:37 +02001571 plchan->state = PL08X_CHAN_IDLE;
1572
1573 /*
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +00001574 * And NOW before anyone else can grab that free:d up
1575 * physical channel, see if there is some memcpy pending
1576 * that seriously needs to start because of being stacked
1577 * up while we were choking the physical channels with data.
Linus Walleije8689e62010-09-28 15:57:37 +02001578 */
1579 list_for_each_entry(waiting, &pl08x->memcpy.channels,
1580 chan.device_node) {
Viresh Kumar3e27ee82011-08-05 15:32:27 +05301581 if (waiting->state == PL08X_CHAN_WAITING &&
1582 waiting->waiting != NULL) {
Linus Walleije8689e62010-09-28 15:57:37 +02001583 int ret;
1584
1585 /* This should REALLY not fail now */
1586 ret = prep_phy_channel(waiting,
1587 waiting->waiting);
1588 BUG_ON(ret);
Russell King - ARM Linux8087aac2011-01-03 22:45:17 +00001589 waiting->phychan_hold--;
Linus Walleije8689e62010-09-28 15:57:37 +02001590 waiting->state = PL08X_CHAN_RUNNING;
1591 waiting->waiting = NULL;
1592 pl08x_issue_pending(&waiting->chan);
1593 break;
1594 }
1595 }
1596 }
1597
Russell King - ARM Linuxbf072af2011-01-03 22:31:24 +00001598 spin_unlock_irqrestore(&plchan->lock, flags);
Russell King - ARM Linux858c21c2011-01-03 22:41:34 +00001599
Russell King - ARM Linux3d992e12011-01-03 22:44:16 +00001600 if (txd) {
1601 dma_async_tx_callback callback = txd->tx.callback;
1602 void *callback_param = txd->tx.callback_param;
1603
1604 /* Don't try to unmap buffers on slave channels */
1605 if (!plchan->slave)
1606 pl08x_unmap_buffers(txd);
1607
1608 /* Free the descriptor */
1609 spin_lock_irqsave(&plchan->lock, flags);
1610 pl08x_free_txd(pl08x, txd);
1611 spin_unlock_irqrestore(&plchan->lock, flags);
1612
1613 /* Callback to signal completion */
1614 if (callback)
1615 callback(callback_param);
1616 }
Linus Walleije8689e62010-09-28 15:57:37 +02001617}
1618
1619static irqreturn_t pl08x_irq(int irq, void *dev)
1620{
1621 struct pl08x_driver_data *pl08x = dev;
Viresh Kumar28da2832011-08-05 15:32:36 +05301622 u32 mask = 0, err, tc, i;
Linus Walleije8689e62010-09-28 15:57:37 +02001623
Viresh Kumar28da2832011-08-05 15:32:36 +05301624 /* check & clear - ERR & TC interrupts */
1625 err = readl(pl08x->base + PL080_ERR_STATUS);
1626 if (err) {
1627 dev_err(&pl08x->adev->dev, "%s error interrupt, register value 0x%08x\n",
1628 __func__, err);
1629 writel(err, pl08x->base + PL080_ERR_CLEAR);
Linus Walleije8689e62010-09-28 15:57:37 +02001630 }
Viresh Kumar28da2832011-08-05 15:32:36 +05301631 tc = readl(pl08x->base + PL080_INT_STATUS);
1632 if (tc)
1633 writel(tc, pl08x->base + PL080_TC_CLEAR);
1634
1635 if (!err && !tc)
1636 return IRQ_NONE;
1637
Linus Walleije8689e62010-09-28 15:57:37 +02001638 for (i = 0; i < pl08x->vd->channels; i++) {
Viresh Kumar28da2832011-08-05 15:32:36 +05301639 if (((1 << i) & err) || ((1 << i) & tc)) {
Linus Walleije8689e62010-09-28 15:57:37 +02001640 /* Locate physical channel */
1641 struct pl08x_phy_chan *phychan = &pl08x->phy_chans[i];
1642 struct pl08x_dma_chan *plchan = phychan->serving;
1643
Viresh Kumar28da2832011-08-05 15:32:36 +05301644 if (!plchan) {
1645 dev_err(&pl08x->adev->dev,
1646 "%s Error TC interrupt on unused channel: 0x%08x\n",
1647 __func__, i);
1648 continue;
1649 }
1650
Linus Walleije8689e62010-09-28 15:57:37 +02001651 /* Schedule tasklet on this channel */
1652 tasklet_schedule(&plchan->tasklet);
Linus Walleije8689e62010-09-28 15:57:37 +02001653 mask |= (1 << i);
1654 }
1655 }
Linus Walleije8689e62010-09-28 15:57:37 +02001656
1657 return mask ? IRQ_HANDLED : IRQ_NONE;
1658}
1659
Russell King - ARM Linux121c8472011-07-21 17:13:48 +01001660static void pl08x_dma_slave_init(struct pl08x_dma_chan *chan)
1661{
1662 u32 cctl = pl08x_cctl(chan->cd->cctl);
1663
1664 chan->slave = true;
1665 chan->name = chan->cd->bus_id;
1666 chan->src_addr = chan->cd->addr;
1667 chan->dst_addr = chan->cd->addr;
1668 chan->src_cctl = cctl | PL080_CONTROL_DST_INCR |
1669 pl08x_select_bus(chan->cd->periph_buses, chan->host->mem_buses);
1670 chan->dst_cctl = cctl | PL080_CONTROL_SRC_INCR |
1671 pl08x_select_bus(chan->host->mem_buses, chan->cd->periph_buses);
1672}
1673
Linus Walleije8689e62010-09-28 15:57:37 +02001674/*
1675 * Initialise the DMAC memcpy/slave channels.
1676 * Make a local wrapper to hold required data
1677 */
1678static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x,
Viresh Kumar3e27ee82011-08-05 15:32:27 +05301679 struct dma_device *dmadev, unsigned int channels, bool slave)
Linus Walleije8689e62010-09-28 15:57:37 +02001680{
1681 struct pl08x_dma_chan *chan;
1682 int i;
1683
1684 INIT_LIST_HEAD(&dmadev->channels);
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +00001685
Linus Walleije8689e62010-09-28 15:57:37 +02001686 /*
1687 * Register as many many memcpy as we have physical channels,
1688 * we won't always be able to use all but the code will have
1689 * to cope with that situation.
1690 */
1691 for (i = 0; i < channels; i++) {
Viresh Kumarb201c112011-08-05 15:32:29 +05301692 chan = kzalloc(sizeof(*chan), GFP_KERNEL);
Linus Walleije8689e62010-09-28 15:57:37 +02001693 if (!chan) {
1694 dev_err(&pl08x->adev->dev,
1695 "%s no memory for channel\n", __func__);
1696 return -ENOMEM;
1697 }
1698
1699 chan->host = pl08x;
1700 chan->state = PL08X_CHAN_IDLE;
1701
1702 if (slave) {
Linus Walleije8689e62010-09-28 15:57:37 +02001703 chan->cd = &pl08x->pd->slave_channels[i];
Russell King - ARM Linux121c8472011-07-21 17:13:48 +01001704 pl08x_dma_slave_init(chan);
Linus Walleije8689e62010-09-28 15:57:37 +02001705 } else {
1706 chan->cd = &pl08x->pd->memcpy_channel;
1707 chan->name = kasprintf(GFP_KERNEL, "memcpy%d", i);
1708 if (!chan->name) {
1709 kfree(chan);
1710 return -ENOMEM;
1711 }
1712 }
Russell King - ARM Linuxb58b6b52011-01-03 22:34:48 +00001713 if (chan->cd->circular_buffer) {
1714 dev_err(&pl08x->adev->dev,
1715 "channel %s: circular buffers not supported\n",
1716 chan->name);
1717 kfree(chan);
1718 continue;
1719 }
Viresh Kumar175a5e62011-08-05 15:32:32 +05301720 dev_dbg(&pl08x->adev->dev,
Linus Walleije8689e62010-09-28 15:57:37 +02001721 "initialize virtual channel \"%s\"\n",
1722 chan->name);
1723
1724 chan->chan.device = dmadev;
Russell King - ARM Linux91aa5fa2011-01-03 22:31:04 +00001725 chan->chan.cookie = 0;
1726 chan->lc = 0;
Linus Walleije8689e62010-09-28 15:57:37 +02001727
1728 spin_lock_init(&chan->lock);
Russell King - ARM Linux15c17232011-01-03 22:44:36 +00001729 INIT_LIST_HEAD(&chan->pend_list);
Linus Walleije8689e62010-09-28 15:57:37 +02001730 tasklet_init(&chan->tasklet, pl08x_tasklet,
1731 (unsigned long) chan);
1732
1733 list_add_tail(&chan->chan.device_node, &dmadev->channels);
1734 }
1735 dev_info(&pl08x->adev->dev, "initialized %d virtual %s channels\n",
1736 i, slave ? "slave" : "memcpy");
1737 return i;
1738}
1739
1740static void pl08x_free_virtual_channels(struct dma_device *dmadev)
1741{
1742 struct pl08x_dma_chan *chan = NULL;
1743 struct pl08x_dma_chan *next;
1744
1745 list_for_each_entry_safe(chan,
1746 next, &dmadev->channels, chan.device_node) {
1747 list_del(&chan->chan.device_node);
1748 kfree(chan);
1749 }
1750}
1751
1752#ifdef CONFIG_DEBUG_FS
1753static const char *pl08x_state_str(enum pl08x_dma_chan_state state)
1754{
1755 switch (state) {
1756 case PL08X_CHAN_IDLE:
1757 return "idle";
1758 case PL08X_CHAN_RUNNING:
1759 return "running";
1760 case PL08X_CHAN_PAUSED:
1761 return "paused";
1762 case PL08X_CHAN_WAITING:
1763 return "waiting";
1764 default:
1765 break;
1766 }
1767 return "UNKNOWN STATE";
1768}
1769
1770static int pl08x_debugfs_show(struct seq_file *s, void *data)
1771{
1772 struct pl08x_driver_data *pl08x = s->private;
1773 struct pl08x_dma_chan *chan;
1774 struct pl08x_phy_chan *ch;
1775 unsigned long flags;
1776 int i;
1777
1778 seq_printf(s, "PL08x physical channels:\n");
1779 seq_printf(s, "CHANNEL:\tUSER:\n");
1780 seq_printf(s, "--------\t-----\n");
1781 for (i = 0; i < pl08x->vd->channels; i++) {
1782 struct pl08x_dma_chan *virt_chan;
1783
1784 ch = &pl08x->phy_chans[i];
1785
1786 spin_lock_irqsave(&ch->lock, flags);
1787 virt_chan = ch->serving;
1788
1789 seq_printf(s, "%d\t\t%s\n",
1790 ch->id, virt_chan ? virt_chan->name : "(none)");
1791
1792 spin_unlock_irqrestore(&ch->lock, flags);
1793 }
1794
1795 seq_printf(s, "\nPL08x virtual memcpy channels:\n");
1796 seq_printf(s, "CHANNEL:\tSTATE:\n");
1797 seq_printf(s, "--------\t------\n");
1798 list_for_each_entry(chan, &pl08x->memcpy.channels, chan.device_node) {
Russell King - ARM Linux3e2a0372011-01-03 22:32:46 +00001799 seq_printf(s, "%s\t\t%s\n", chan->name,
Linus Walleije8689e62010-09-28 15:57:37 +02001800 pl08x_state_str(chan->state));
1801 }
1802
1803 seq_printf(s, "\nPL08x virtual slave channels:\n");
1804 seq_printf(s, "CHANNEL:\tSTATE:\n");
1805 seq_printf(s, "--------\t------\n");
1806 list_for_each_entry(chan, &pl08x->slave.channels, chan.device_node) {
Russell King - ARM Linux3e2a0372011-01-03 22:32:46 +00001807 seq_printf(s, "%s\t\t%s\n", chan->name,
Linus Walleije8689e62010-09-28 15:57:37 +02001808 pl08x_state_str(chan->state));
1809 }
1810
1811 return 0;
1812}
1813
1814static int pl08x_debugfs_open(struct inode *inode, struct file *file)
1815{
1816 return single_open(file, pl08x_debugfs_show, inode->i_private);
1817}
1818
1819static const struct file_operations pl08x_debugfs_operations = {
1820 .open = pl08x_debugfs_open,
1821 .read = seq_read,
1822 .llseek = seq_lseek,
1823 .release = single_release,
1824};
1825
1826static void init_pl08x_debugfs(struct pl08x_driver_data *pl08x)
1827{
1828 /* Expose a simple debugfs interface to view all clocks */
Viresh Kumar3e27ee82011-08-05 15:32:27 +05301829 (void) debugfs_create_file(dev_name(&pl08x->adev->dev),
1830 S_IFREG | S_IRUGO, NULL, pl08x,
1831 &pl08x_debugfs_operations);
Linus Walleije8689e62010-09-28 15:57:37 +02001832}
1833
1834#else
1835static inline void init_pl08x_debugfs(struct pl08x_driver_data *pl08x)
1836{
1837}
1838#endif
1839
Russell Kingaa25afa2011-02-19 15:55:00 +00001840static int pl08x_probe(struct amba_device *adev, const struct amba_id *id)
Linus Walleije8689e62010-09-28 15:57:37 +02001841{
1842 struct pl08x_driver_data *pl08x;
Russell King - ARM Linuxf96ca9ec2011-01-03 22:35:08 +00001843 const struct vendor_data *vd = id->data;
Linus Walleije8689e62010-09-28 15:57:37 +02001844 int ret = 0;
1845 int i;
1846
1847 ret = amba_request_regions(adev, NULL);
1848 if (ret)
1849 return ret;
1850
1851 /* Create the driver state holder */
Viresh Kumarb201c112011-08-05 15:32:29 +05301852 pl08x = kzalloc(sizeof(*pl08x), GFP_KERNEL);
Linus Walleije8689e62010-09-28 15:57:37 +02001853 if (!pl08x) {
1854 ret = -ENOMEM;
1855 goto out_no_pl08x;
1856 }
1857
Viresh Kumarb7b60182011-08-05 15:32:33 +05301858 pm_runtime_set_active(&adev->dev);
1859 pm_runtime_enable(&adev->dev);
1860
Linus Walleije8689e62010-09-28 15:57:37 +02001861 /* Initialize memcpy engine */
1862 dma_cap_set(DMA_MEMCPY, pl08x->memcpy.cap_mask);
1863 pl08x->memcpy.dev = &adev->dev;
1864 pl08x->memcpy.device_alloc_chan_resources = pl08x_alloc_chan_resources;
1865 pl08x->memcpy.device_free_chan_resources = pl08x_free_chan_resources;
1866 pl08x->memcpy.device_prep_dma_memcpy = pl08x_prep_dma_memcpy;
1867 pl08x->memcpy.device_prep_dma_interrupt = pl08x_prep_dma_interrupt;
1868 pl08x->memcpy.device_tx_status = pl08x_dma_tx_status;
1869 pl08x->memcpy.device_issue_pending = pl08x_issue_pending;
1870 pl08x->memcpy.device_control = pl08x_control;
1871
1872 /* Initialize slave engine */
1873 dma_cap_set(DMA_SLAVE, pl08x->slave.cap_mask);
1874 pl08x->slave.dev = &adev->dev;
1875 pl08x->slave.device_alloc_chan_resources = pl08x_alloc_chan_resources;
1876 pl08x->slave.device_free_chan_resources = pl08x_free_chan_resources;
1877 pl08x->slave.device_prep_dma_interrupt = pl08x_prep_dma_interrupt;
1878 pl08x->slave.device_tx_status = pl08x_dma_tx_status;
1879 pl08x->slave.device_issue_pending = pl08x_issue_pending;
1880 pl08x->slave.device_prep_slave_sg = pl08x_prep_slave_sg;
1881 pl08x->slave.device_control = pl08x_control;
1882
1883 /* Get the platform data */
1884 pl08x->pd = dev_get_platdata(&adev->dev);
1885 if (!pl08x->pd) {
1886 dev_err(&adev->dev, "no platform data supplied\n");
1887 goto out_no_platdata;
1888 }
1889
1890 /* Assign useful pointers to the driver state */
1891 pl08x->adev = adev;
1892 pl08x->vd = vd;
1893
Russell King - ARM Linux30749cb2011-01-03 22:41:13 +00001894 /* By default, AHB1 only. If dualmaster, from platform */
1895 pl08x->lli_buses = PL08X_AHB1;
1896 pl08x->mem_buses = PL08X_AHB1;
1897 if (pl08x->vd->dualmaster) {
1898 pl08x->lli_buses = pl08x->pd->lli_buses;
1899 pl08x->mem_buses = pl08x->pd->mem_buses;
1900 }
1901
Linus Walleije8689e62010-09-28 15:57:37 +02001902 /* A DMA memory pool for LLIs, align on 1-byte boundary */
1903 pl08x->pool = dma_pool_create(DRIVER_NAME, &pl08x->adev->dev,
1904 PL08X_LLI_TSFR_SIZE, PL08X_ALIGN, 0);
1905 if (!pl08x->pool) {
1906 ret = -ENOMEM;
1907 goto out_no_lli_pool;
1908 }
1909
1910 spin_lock_init(&pl08x->lock);
1911
1912 pl08x->base = ioremap(adev->res.start, resource_size(&adev->res));
1913 if (!pl08x->base) {
1914 ret = -ENOMEM;
1915 goto out_no_ioremap;
1916 }
1917
1918 /* Turn on the PL08x */
1919 pl08x_ensure_on(pl08x);
1920
Russell King - ARM Linux94ae8522011-01-16 20:18:05 +00001921 /* Attach the interrupt handler */
Linus Walleije8689e62010-09-28 15:57:37 +02001922 writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR);
1923 writel(0x000000FF, pl08x->base + PL080_TC_CLEAR);
1924
1925 ret = request_irq(adev->irq[0], pl08x_irq, IRQF_DISABLED,
Russell King - ARM Linuxb05cd8f2011-01-03 22:33:26 +00001926 DRIVER_NAME, pl08x);
Linus Walleije8689e62010-09-28 15:57:37 +02001927 if (ret) {
1928 dev_err(&adev->dev, "%s failed to request interrupt %d\n",
1929 __func__, adev->irq[0]);
1930 goto out_no_irq;
1931 }
1932
1933 /* Initialize physical channels */
Viresh Kumarb201c112011-08-05 15:32:29 +05301934 pl08x->phy_chans = kmalloc((vd->channels * sizeof(*pl08x->phy_chans)),
Linus Walleije8689e62010-09-28 15:57:37 +02001935 GFP_KERNEL);
1936 if (!pl08x->phy_chans) {
1937 dev_err(&adev->dev, "%s failed to allocate "
1938 "physical channel holders\n",
1939 __func__);
1940 goto out_no_phychans;
1941 }
1942
1943 for (i = 0; i < vd->channels; i++) {
1944 struct pl08x_phy_chan *ch = &pl08x->phy_chans[i];
1945
1946 ch->id = i;
1947 ch->base = pl08x->base + PL080_Cx_BASE(i);
1948 spin_lock_init(&ch->lock);
1949 ch->serving = NULL;
1950 ch->signal = -1;
Viresh Kumar175a5e62011-08-05 15:32:32 +05301951 dev_dbg(&adev->dev, "physical channel %d is %s\n",
1952 i, pl08x_phy_channel_busy(ch) ? "BUSY" : "FREE");
Linus Walleije8689e62010-09-28 15:57:37 +02001953 }
1954
1955 /* Register as many memcpy channels as there are physical channels */
1956 ret = pl08x_dma_init_virtual_channels(pl08x, &pl08x->memcpy,
1957 pl08x->vd->channels, false);
1958 if (ret <= 0) {
1959 dev_warn(&pl08x->adev->dev,
1960 "%s failed to enumerate memcpy channels - %d\n",
1961 __func__, ret);
1962 goto out_no_memcpy;
1963 }
1964 pl08x->memcpy.chancnt = ret;
1965
1966 /* Register slave channels */
1967 ret = pl08x_dma_init_virtual_channels(pl08x, &pl08x->slave,
Viresh Kumar3e27ee82011-08-05 15:32:27 +05301968 pl08x->pd->num_slave_channels, true);
Linus Walleije8689e62010-09-28 15:57:37 +02001969 if (ret <= 0) {
1970 dev_warn(&pl08x->adev->dev,
1971 "%s failed to enumerate slave channels - %d\n",
1972 __func__, ret);
1973 goto out_no_slave;
1974 }
1975 pl08x->slave.chancnt = ret;
1976
1977 ret = dma_async_device_register(&pl08x->memcpy);
1978 if (ret) {
1979 dev_warn(&pl08x->adev->dev,
1980 "%s failed to register memcpy as an async device - %d\n",
1981 __func__, ret);
1982 goto out_no_memcpy_reg;
1983 }
1984
1985 ret = dma_async_device_register(&pl08x->slave);
1986 if (ret) {
1987 dev_warn(&pl08x->adev->dev,
1988 "%s failed to register slave as an async device - %d\n",
1989 __func__, ret);
1990 goto out_no_slave_reg;
1991 }
1992
1993 amba_set_drvdata(adev, pl08x);
1994 init_pl08x_debugfs(pl08x);
Russell King - ARM Linuxb05cd8f2011-01-03 22:33:26 +00001995 dev_info(&pl08x->adev->dev, "DMA: PL%03x rev%u at 0x%08llx irq %d\n",
1996 amba_part(adev), amba_rev(adev),
1997 (unsigned long long)adev->res.start, adev->irq[0]);
Viresh Kumarb7b60182011-08-05 15:32:33 +05301998
1999 pm_runtime_put(&adev->dev);
Linus Walleije8689e62010-09-28 15:57:37 +02002000 return 0;
2001
2002out_no_slave_reg:
2003 dma_async_device_unregister(&pl08x->memcpy);
2004out_no_memcpy_reg:
2005 pl08x_free_virtual_channels(&pl08x->slave);
2006out_no_slave:
2007 pl08x_free_virtual_channels(&pl08x->memcpy);
2008out_no_memcpy:
2009 kfree(pl08x->phy_chans);
2010out_no_phychans:
2011 free_irq(adev->irq[0], pl08x);
2012out_no_irq:
2013 iounmap(pl08x->base);
2014out_no_ioremap:
2015 dma_pool_destroy(pl08x->pool);
2016out_no_lli_pool:
2017out_no_platdata:
Viresh Kumarb7b60182011-08-05 15:32:33 +05302018 pm_runtime_put(&adev->dev);
2019 pm_runtime_disable(&adev->dev);
2020
Linus Walleije8689e62010-09-28 15:57:37 +02002021 kfree(pl08x);
2022out_no_pl08x:
2023 amba_release_regions(adev);
2024 return ret;
2025}
2026
2027/* PL080 has 8 channels and the PL080 have just 2 */
2028static struct vendor_data vendor_pl080 = {
Linus Walleije8689e62010-09-28 15:57:37 +02002029 .channels = 8,
2030 .dualmaster = true,
2031};
2032
2033static struct vendor_data vendor_pl081 = {
Linus Walleije8689e62010-09-28 15:57:37 +02002034 .channels = 2,
2035 .dualmaster = false,
2036};
2037
2038static struct amba_id pl08x_ids[] = {
2039 /* PL080 */
2040 {
2041 .id = 0x00041080,
2042 .mask = 0x000fffff,
2043 .data = &vendor_pl080,
2044 },
2045 /* PL081 */
2046 {
2047 .id = 0x00041081,
2048 .mask = 0x000fffff,
2049 .data = &vendor_pl081,
2050 },
2051 /* Nomadik 8815 PL080 variant */
2052 {
2053 .id = 0x00280880,
2054 .mask = 0x00ffffff,
2055 .data = &vendor_pl080,
2056 },
2057 { 0, 0 },
2058};
2059
2060static struct amba_driver pl08x_amba_driver = {
2061 .drv.name = DRIVER_NAME,
2062 .id_table = pl08x_ids,
2063 .probe = pl08x_probe,
2064};
2065
2066static int __init pl08x_init(void)
2067{
2068 int retval;
2069 retval = amba_driver_register(&pl08x_amba_driver);
2070 if (retval)
2071 printk(KERN_WARNING DRIVER_NAME
Russell King - ARM Linuxe8b5e112011-01-03 22:30:24 +00002072 "failed to register as an AMBA device (%d)\n",
Linus Walleije8689e62010-09-28 15:57:37 +02002073 retval);
2074 return retval;
2075}
2076subsys_initcall(pl08x_init);