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Andre Przywarae039ee42014-11-14 15:54:08 +00001#ifndef __ASM_ALTERNATIVE_H
2#define __ASM_ALTERNATIVE_H
3
James Morse57f49592016-02-05 14:58:48 +00004#include <asm/cpufeature.h>
5
Marc Zyngier8d883b22015-06-01 10:47:41 +01006#ifndef __ASSEMBLY__
7
Will Deaconef5e7242015-07-28 19:07:28 +01008#include <linux/init.h>
James Morse91a5cef2015-07-21 13:23:30 +01009#include <linux/kconfig.h>
Andre Przywarae039ee42014-11-14 15:54:08 +000010#include <linux/types.h>
11#include <linux/stddef.h>
12#include <linux/stringify.h>
13
14struct alt_instr {
15 s32 orig_offset; /* offset to original instruction */
16 s32 alt_offset; /* offset to replacement instruction */
17 u16 cpufeature; /* cpufeature bit set for replacement */
18 u8 orig_len; /* size of original instruction(s) */
19 u8 alt_len; /* size of new instruction(s), <= orig_len */
20};
21
Will Deaconef5e7242015-07-28 19:07:28 +010022void __init apply_alternatives_all(void);
Andre Przywara932ded42014-11-28 13:40:45 +000023void apply_alternatives(void *start, size_t length);
Andre Przywarae039ee42014-11-14 15:54:08 +000024
25#define ALTINSTR_ENTRY(feature) \
26 " .word 661b - .\n" /* label */ \
27 " .word 663f - .\n" /* new instruction */ \
28 " .hword " __stringify(feature) "\n" /* feature bit */ \
29 " .byte 662b-661b\n" /* source len */ \
30 " .byte 664f-663f\n" /* replacement len */
31
Marc Zyngiereb7c11e2015-06-01 10:47:42 +010032/*
33 * alternative assembly primitive:
34 *
35 * If any of these .org directive fail, it means that insn1 and insn2
36 * don't have the same length. This used to be written as
37 *
38 * .if ((664b-663b) != (662b-661b))
39 * .error "Alternatives instruction length mismatch"
40 * .endif
41 *
42 * but most assemblers die if insn1 or insn2 have a .inst. This should
43 * be fixed in a binutils release posterior to 2.25.51.0.2 (anything
44 * containing commit 4e4d08cf7399b606 or c1baaddf8861).
45 */
James Morse91a5cef2015-07-21 13:23:30 +010046#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled) \
47 ".if "__stringify(cfg_enabled)" == 1\n" \
Andre Przywarae039ee42014-11-14 15:54:08 +000048 "661:\n\t" \
49 oldinstr "\n" \
50 "662:\n" \
51 ".pushsection .altinstructions,\"a\"\n" \
52 ALTINSTR_ENTRY(feature) \
53 ".popsection\n" \
54 ".pushsection .altinstr_replacement, \"a\"\n" \
55 "663:\n\t" \
56 newinstr "\n" \
57 "664:\n\t" \
58 ".popsection\n\t" \
Marc Zyngiereb7c11e2015-06-01 10:47:42 +010059 ".org . - (664b-663b) + (662b-661b)\n\t" \
James Morse91a5cef2015-07-21 13:23:30 +010060 ".org . - (662b-661b) + (664b-663b)\n" \
61 ".endif\n"
62
63#define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \
64 __ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))
Andre Przywarae039ee42014-11-14 15:54:08 +000065
Marc Zyngier8d883b22015-06-01 10:47:41 +010066#else
67
James Morse57f49592016-02-05 14:58:48 +000068#include <asm/assembler.h>
69
Marc Zyngier8d883b22015-06-01 10:47:41 +010070.macro altinstruction_entry orig_offset alt_offset feature orig_len alt_len
71 .word \orig_offset - .
72 .word \alt_offset - .
73 .hword \feature
74 .byte \orig_len
75 .byte \alt_len
76.endm
77
James Morse91a5cef2015-07-21 13:23:30 +010078.macro alternative_insn insn1, insn2, cap, enable = 1
79 .if \enable
Marc Zyngier8d883b22015-06-01 10:47:41 +010080661: \insn1
81662: .pushsection .altinstructions, "a"
82 altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f
83 .popsection
84 .pushsection .altinstr_replacement, "ax"
85663: \insn2
86664: .popsection
Marc Zyngiereb7c11e2015-06-01 10:47:42 +010087 .org . - (664b-663b) + (662b-661b)
88 .org . - (662b-661b) + (664b-663b)
James Morse91a5cef2015-07-21 13:23:30 +010089 .endif
Marc Zyngier8d883b22015-06-01 10:47:41 +010090.endm
91
Daniel Thompson63e40812015-07-22 12:21:01 +010092/*
93 * Begin an alternative code sequence.
94 *
95 * The code that follows this macro will be assembled and linked as
96 * normal. There are no restrictions on this code.
97 */
Andre Przywarab82bfa42016-06-28 18:07:27 +010098.macro alternative_if_not cap
Daniel Thompson63e40812015-07-22 12:21:01 +010099 .pushsection .altinstructions, "a"
100 altinstruction_entry 661f, 663f, \cap, 662f-661f, 664f-663f
101 .popsection
102661:
103.endm
104
105/*
106 * Provide the alternative code sequence.
107 *
108 * The code that follows this macro is assembled into a special
109 * section to be used for dynamic patching. Code that follows this
110 * macro must:
111 *
112 * 1. Be exactly the same length (in bytes) as the default code
113 * sequence.
114 *
115 * 2. Not contain a branch target that is used outside of the
116 * alternative sequence it is defined in (branches into an
117 * alternative sequence are not fixed up).
118 */
Andre Przywarab82bfa42016-06-28 18:07:27 +0100119.macro alternative_else
Daniel Thompson63e40812015-07-22 12:21:01 +0100120662: .pushsection .altinstr_replacement, "ax"
121663:
122.endm
123
124/*
125 * Complete an alternative code sequence.
126 */
Andre Przywarab82bfa42016-06-28 18:07:27 +0100127.macro alternative_endif
Daniel Thompson63e40812015-07-22 12:21:01 +0100128664: .popsection
129 .org . - (664b-663b) + (662b-661b)
130 .org . - (662b-661b) + (664b-663b)
131.endm
132
James Morse91a5cef2015-07-21 13:23:30 +0100133#define _ALTERNATIVE_CFG(insn1, insn2, cap, cfg, ...) \
134 alternative_insn insn1, insn2, cap, IS_ENABLED(cfg)
135
Andre Przywara290622e2016-06-28 18:07:28 +0100136.macro user_alt, label, oldinstr, newinstr, cond
1379999: alternative_insn "\oldinstr", "\newinstr", \cond
138 _ASM_EXTABLE 9999b, \label
139.endm
James Morse91a5cef2015-07-21 13:23:30 +0100140
James Morse57f49592016-02-05 14:58:48 +0000141/*
142 * Generate the assembly for UAO alternatives with exception table entries.
143 * This is complicated as there is no post-increment or pair versions of the
144 * unprivileged instructions, and USER() only works for single instructions.
145 */
146#ifdef CONFIG_ARM64_UAO
147 .macro uao_ldp l, reg1, reg2, addr, post_inc
148 alternative_if_not ARM64_HAS_UAO
1498888: ldp \reg1, \reg2, [\addr], \post_inc;
1508889: nop;
151 nop;
152 alternative_else
153 ldtr \reg1, [\addr];
154 ldtr \reg2, [\addr, #8];
155 add \addr, \addr, \post_inc;
156 alternative_endif
157
Ard Biesheuvel6c94f272016-01-01 15:02:12 +0100158 _asm_extable 8888b,\l;
159 _asm_extable 8889b,\l;
James Morse57f49592016-02-05 14:58:48 +0000160 .endm
161
162 .macro uao_stp l, reg1, reg2, addr, post_inc
163 alternative_if_not ARM64_HAS_UAO
1648888: stp \reg1, \reg2, [\addr], \post_inc;
1658889: nop;
166 nop;
167 alternative_else
168 sttr \reg1, [\addr];
169 sttr \reg2, [\addr, #8];
170 add \addr, \addr, \post_inc;
171 alternative_endif
172
Ard Biesheuvel6c94f272016-01-01 15:02:12 +0100173 _asm_extable 8888b,\l;
174 _asm_extable 8889b,\l;
James Morse57f49592016-02-05 14:58:48 +0000175 .endm
176
177 .macro uao_user_alternative l, inst, alt_inst, reg, addr, post_inc
178 alternative_if_not ARM64_HAS_UAO
1798888: \inst \reg, [\addr], \post_inc;
180 nop;
181 alternative_else
182 \alt_inst \reg, [\addr];
183 add \addr, \addr, \post_inc;
184 alternative_endif
185
Ard Biesheuvel6c94f272016-01-01 15:02:12 +0100186 _asm_extable 8888b,\l;
James Morse57f49592016-02-05 14:58:48 +0000187 .endm
188#else
189 .macro uao_ldp l, reg1, reg2, addr, post_inc
190 USER(\l, ldp \reg1, \reg2, [\addr], \post_inc)
191 .endm
192 .macro uao_stp l, reg1, reg2, addr, post_inc
193 USER(\l, stp \reg1, \reg2, [\addr], \post_inc)
194 .endm
195 .macro uao_user_alternative l, inst, alt_inst, reg, addr, post_inc
196 USER(\l, \inst \reg, [\addr], \post_inc)
197 .endm
198#endif
199
Marc Zyngier8d883b22015-06-01 10:47:41 +0100200#endif /* __ASSEMBLY__ */
201
James Morse91a5cef2015-07-21 13:23:30 +0100202/*
203 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
204 *
205 * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
206 * N.B. If CONFIG_FOO is specified, but not selected, the whole block
207 * will be omitted, including oldinstr.
208 */
209#define ALTERNATIVE(oldinstr, newinstr, ...) \
210 _ALTERNATIVE_CFG(oldinstr, newinstr, __VA_ARGS__, 1)
211
Andre Przywarae039ee42014-11-14 15:54:08 +0000212#endif /* __ASM_ALTERNATIVE_H */