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AnilKumar Ch6a66a8b2012-06-22 15:10:50 +05301/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
Florian Vaussardeb33ef662013-06-03 16:12:22 +020010#include "am33xx.dtsi"
AnilKumar Ch6a66a8b2012-06-22 15:10:50 +053011
12/ {
13 model = "TI AM335x BeagleBone";
14 compatible = "ti,am335x-bone", "ti,am33xx";
15
AnilKumar Chefeedcf2012-08-31 15:07:20 +053016 cpus {
17 cpu@0 {
18 cpu0-supply = <&dcdc2_reg>;
19 };
20 };
21
AnilKumar Ch6a66a8b2012-06-22 15:10:50 +053022 memory {
23 device_type = "memory";
24 reg = <0x80000000 0x10000000>; /* 256 MB */
25 };
Vaibhav Hiremath53d91032012-08-15 16:53:25 +053026
AnilKumar Ch7e782c42012-11-06 19:18:33 +053027 am33xx_pinmux: pinmux@44e10800 {
28 pinctrl-names = "default";
Vaibhav Hiremath4d927572013-05-20 18:58:10 +053029 pinctrl-0 = <&clkout2_pin>;
AnilKumar Ch7e782c42012-11-06 19:18:33 +053030
31 user_leds_s0: user_leds_s0 {
32 pinctrl-single,pins = <
Florian Vaussard6a8a6b62013-06-03 16:12:25 +020033 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
34 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
35 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
36 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
AnilKumar Ch7e782c42012-11-06 19:18:33 +053037 >;
38 };
Vaibhav Hiremath3f866442013-03-26 14:14:01 +053039
40 i2c0_pins: pinmux_i2c0_pins {
41 pinctrl-single,pins = <
Florian Vaussard6a8a6b62013-06-03 16:12:25 +020042 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
43 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
Vaibhav Hiremath3f866442013-03-26 14:14:01 +053044 >;
45 };
Vaibhav Hiremath9f2fbe12013-03-27 16:31:34 +053046
47 uart0_pins: pinmux_uart0_pins {
48 pinctrl-single,pins = <
Florian Vaussard6a8a6b62013-06-03 16:12:25 +020049 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
50 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
Vaibhav Hiremath9f2fbe12013-03-27 16:31:34 +053051 >;
52 };
Vaibhav Hiremath4d927572013-05-20 18:58:10 +053053
54 clkout2_pin: pinmux_clkout2_pin {
55 pinctrl-single,pins = <
Florian Vaussard6a8a6b62013-06-03 16:12:25 +020056 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
Vaibhav Hiremath4d927572013-05-20 18:58:10 +053057 >;
58 };
Mugunthan V Nbe814fd2013-06-07 17:02:52 +053059
60 cpsw_default: cpsw_default {
61 pinctrl-single,pins = <
62 /* Slave 1 */
63 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
64 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
65 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
66 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
67 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
68 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
69 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
70 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
71 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
72 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
73 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
74 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
75 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
76 >;
77 };
78
79 cpsw_sleep: cpsw_sleep {
80 pinctrl-single,pins = <
81 /* Slave 1 reset value */
82 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
83 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
84 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
85 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
86 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
87 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
88 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
89 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
90 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
91 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
92 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
93 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
94 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
95 >;
96 };
97
98 davinci_mdio_default: davinci_mdio_default {
99 pinctrl-single,pins = <
100 /* MDIO */
101 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
102 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
103 >;
104 };
105
106 davinci_mdio_sleep: davinci_mdio_sleep {
107 pinctrl-single,pins = <
108 /* MDIO reset value */
109 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
110 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
111 >;
112 };
AnilKumar Ch7e782c42012-11-06 19:18:33 +0530113 };
114
Vaibhav Hiremath53d91032012-08-15 16:53:25 +0530115 ocp {
Vaibhav Hiremathdde3b0d2013-03-28 11:36:05 +0530116 uart0: serial@44e09000 {
Vaibhav Hiremath9f2fbe12013-03-27 16:31:34 +0530117 pinctrl-names = "default";
118 pinctrl-0 = <&uart0_pins>;
119
Vaibhav Hiremath53d91032012-08-15 16:53:25 +0530120 status = "okay";
121 };
AnilKumar Cha06ceff2012-08-21 16:47:30 +0530122
AnilKumar Chb918e2c2012-11-21 17:22:17 +0530123 i2c0: i2c@44e0b000 {
Vaibhav Hiremath3f866442013-03-26 14:14:01 +0530124 pinctrl-names = "default";
125 pinctrl-0 = <&i2c0_pins>;
126
AnilKumar Cha06ceff2012-08-21 16:47:30 +0530127 status = "okay";
128 clock-frequency = <400000>;
129
130 tps: tps@24 {
131 reg = <0x24>;
132 };
133
134 };
135 };
AnilKumar Ch5d4e1702012-11-06 19:18:34 +0530136
137 leds {
Vaibhav Hiremathb8f70c32013-03-26 15:42:15 +0530138 pinctrl-names = "default";
139 pinctrl-0 = <&user_leds_s0>;
140
AnilKumar Ch5d4e1702012-11-06 19:18:34 +0530141 compatible = "gpio-leds";
142
143 led@2 {
144 label = "beaglebone:green:heartbeat";
Florian Vaussarde94233c2013-06-03 16:12:23 +0200145 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
AnilKumar Ch5d4e1702012-11-06 19:18:34 +0530146 linux,default-trigger = "heartbeat";
147 default-state = "off";
148 };
149
150 led@3 {
151 label = "beaglebone:green:mmc0";
Florian Vaussarde94233c2013-06-03 16:12:23 +0200152 gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
AnilKumar Ch5d4e1702012-11-06 19:18:34 +0530153 linux,default-trigger = "mmc0";
154 default-state = "off";
155 };
156
157 led@4 {
158 label = "beaglebone:green:usr2";
Florian Vaussarde94233c2013-06-03 16:12:23 +0200159 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
AnilKumar Ch5d4e1702012-11-06 19:18:34 +0530160 default-state = "off";
161 };
162
163 led@5 {
164 label = "beaglebone:green:usr3";
Florian Vaussarde94233c2013-06-03 16:12:23 +0200165 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
AnilKumar Ch5d4e1702012-11-06 19:18:34 +0530166 default-state = "off";
167 };
168 };
AnilKumar Cha06ceff2012-08-21 16:47:30 +0530169};
170
171/include/ "tps65217.dtsi"
172
173&tps {
174 regulators {
175 dcdc1_reg: regulator@0 {
176 regulator-always-on;
177 };
178
179 dcdc2_reg: regulator@1 {
180 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
181 regulator-name = "vdd_mpu";
182 regulator-min-microvolt = <925000>;
183 regulator-max-microvolt = <1325000>;
184 regulator-boot-on;
185 regulator-always-on;
186 };
187
188 dcdc3_reg: regulator@2 {
189 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
190 regulator-name = "vdd_core";
191 regulator-min-microvolt = <925000>;
192 regulator-max-microvolt = <1150000>;
193 regulator-boot-on;
194 regulator-always-on;
195 };
196
197 ldo1_reg: regulator@3 {
198 regulator-always-on;
199 };
200
201 ldo2_reg: regulator@4 {
202 regulator-always-on;
203 };
204
205 ldo3_reg: regulator@5 {
206 regulator-always-on;
207 };
208
209 ldo4_reg: regulator@6 {
210 regulator-always-on;
211 };
Vaibhav Hiremath53d91032012-08-15 16:53:25 +0530212 };
AnilKumar Ch6a66a8b2012-06-22 15:10:50 +0530213};
Mugunthan V N1a39a652012-11-14 09:08:00 +0000214
215&cpsw_emac0 {
216 phy_id = <&davinci_mdio>, <0>;
217};
218
219&cpsw_emac1 {
220 phy_id = <&davinci_mdio>, <1>;
221};
Mugunthan V Nbe814fd2013-06-07 17:02:52 +0530222
223&mac {
224 pinctrl-names = "default", "sleep";
225 pinctrl-0 = <&cpsw_default>;
226 pinctrl-1 = <&cpsw_sleep>;
227
228};
229
230&davinci_mdio {
231 pinctrl-names = "default", "sleep";
232 pinctrl-0 = <&davinci_mdio_default>;
233 pinctrl-1 = <&davinci_mdio_sleep>;
234};