Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 1 | /* |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 2 | * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 3 | * |
Paul Walmsley | 78183f3 | 2011-07-09 19:14:05 -0600 | [diff] [blame] | 4 | * Copyright (C) 2009-2011 Nokia Corporation |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 5 | * Copyright (C) 2012 Texas Instruments, Inc. |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 6 | * Paul Walmsley |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | * XXX handle crossbar/shared link difference for L3? |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 13 | * XXX these should be marked initdata for multi-OMAP kernels |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 14 | */ |
Tony Lindgren | 3a8761c | 2012-10-08 09:11:22 -0700 | [diff] [blame] | 15 | |
| 16 | #include <linux/i2c-omap.h> |
Arnd Bergmann | 2203747 | 2012-08-24 15:21:06 +0200 | [diff] [blame] | 17 | #include <linux/platform_data/spi-omap2-mcspi.h> |
| 18 | |
Tony Lindgren | ce491cf | 2009-10-20 09:40:47 -0700 | [diff] [blame] | 19 | #include <plat/omap_hwmod.h> |
Lokesh Vutla | 2b6c4e7 | 2012-10-15 14:04:53 -0700 | [diff] [blame] | 20 | #include <plat-omap/dma-omap.h> |
Thara Gopinath | eddb126 | 2011-02-23 00:14:04 -0700 | [diff] [blame] | 21 | #include <plat/dmtimer.h> |
Tony Lindgren | 1e0f51a | 2012-09-20 11:42:02 -0700 | [diff] [blame] | 22 | #include "l3_2xxx.h" |
Tony Lindgren | 70606b1 | 2012-09-20 11:42:07 -0700 | [diff] [blame] | 23 | #include "l4_2xxx.h" |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 24 | |
Paul Walmsley | 43b4099 | 2010-02-22 22:09:34 -0700 | [diff] [blame] | 25 | #include "omap_hwmod_common_data.h" |
| 26 | |
Varadarajan, Charulatha | a714b9c | 2010-09-23 20:02:39 +0530 | [diff] [blame] | 27 | #include "cm-regbits-24xx.h" |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 28 | #include "prm-regbits-24xx.h" |
Tony Lindgren | 3a8761c | 2012-10-08 09:11:22 -0700 | [diff] [blame] | 29 | #include "i2c.h" |
Tony Lindgren | 68f39e7 | 2012-10-15 12:09:43 -0700 | [diff] [blame] | 30 | #include "mmc.h" |
Paul Walmsley | ff2516f | 2010-12-21 15:39:15 -0700 | [diff] [blame] | 31 | #include "wd_timer.h" |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 32 | |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 33 | /* |
| 34 | * OMAP2420 hardware module integration data |
| 35 | * |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 36 | * All of the data in this section should be autogeneratable from the |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 37 | * TI hardware database or other technical documentation. Data that |
| 38 | * is driver-specific or driver-kernel integration-specific belongs |
| 39 | * elsewhere. |
| 40 | */ |
| 41 | |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 42 | /* |
| 43 | * IP blocks |
| 44 | */ |
Senthilvadivu Guruswamy | 996746c | 2011-02-22 09:50:36 +0200 | [diff] [blame] | 45 | |
Paul Walmsley | 3af35fb | 2012-04-19 04:04:38 -0600 | [diff] [blame] | 46 | /* IVA1 (IVA1) */ |
| 47 | static struct omap_hwmod_class iva1_hwmod_class = { |
| 48 | .name = "iva1", |
| 49 | }; |
| 50 | |
| 51 | static struct omap_hwmod_rst_info omap2420_iva_resets[] = { |
| 52 | { .name = "iva", .rst_shift = 8 }, |
| 53 | }; |
| 54 | |
Paul Walmsley | 08072ac | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 55 | static struct omap_hwmod omap2420_iva_hwmod = { |
| 56 | .name = "iva", |
Paul Walmsley | 3af35fb | 2012-04-19 04:04:38 -0600 | [diff] [blame] | 57 | .class = &iva1_hwmod_class, |
| 58 | .clkdm_name = "iva1_clkdm", |
| 59 | .rst_lines = omap2420_iva_resets, |
| 60 | .rst_lines_cnt = ARRAY_SIZE(omap2420_iva_resets), |
| 61 | .main_clk = "iva1_ifck", |
| 62 | }; |
| 63 | |
| 64 | /* DSP */ |
| 65 | static struct omap_hwmod_class dsp_hwmod_class = { |
| 66 | .name = "dsp", |
| 67 | }; |
| 68 | |
| 69 | static struct omap_hwmod_rst_info omap2420_dsp_resets[] = { |
| 70 | { .name = "logic", .rst_shift = 0 }, |
| 71 | { .name = "mmu", .rst_shift = 1 }, |
| 72 | }; |
| 73 | |
| 74 | static struct omap_hwmod omap2420_dsp_hwmod = { |
| 75 | .name = "dsp", |
| 76 | .class = &dsp_hwmod_class, |
| 77 | .clkdm_name = "dsp_clkdm", |
| 78 | .rst_lines = omap2420_dsp_resets, |
| 79 | .rst_lines_cnt = ARRAY_SIZE(omap2420_dsp_resets), |
| 80 | .main_clk = "dsp_fck", |
Paul Walmsley | 08072ac | 2010-07-26 16:34:33 -0600 | [diff] [blame] | 81 | }; |
| 82 | |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 83 | /* I2C common */ |
| 84 | static struct omap_hwmod_class_sysconfig i2c_sysc = { |
| 85 | .rev_offs = 0x00, |
| 86 | .sysc_offs = 0x20, |
| 87 | .syss_offs = 0x10, |
Avinash.H.M | d73d65f | 2011-03-03 14:22:46 -0700 | [diff] [blame] | 88 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 89 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 90 | }; |
| 91 | |
| 92 | static struct omap_hwmod_class i2c_class = { |
| 93 | .name = "i2c", |
| 94 | .sysc = &i2c_sysc, |
Andy Green | db791a7 | 2011-07-10 05:27:15 -0600 | [diff] [blame] | 95 | .rev = OMAP_I2C_IP_VERSION_1, |
Avinash.H.M | 6d3c55f | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 96 | .reset = &omap_i2c_reset, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 97 | }; |
| 98 | |
Andy Green | 4d4441a | 2011-07-10 05:27:16 -0600 | [diff] [blame] | 99 | static struct omap_i2c_dev_attr i2c_dev_attr = { |
| 100 | .flags = OMAP_I2C_FLAG_NO_FIFO | |
| 101 | OMAP_I2C_FLAG_SIMPLE_CLOCK | |
| 102 | OMAP_I2C_FLAG_16BIT_DATA_REG | |
| 103 | OMAP_I2C_FLAG_BUS_SHIFT_2, |
| 104 | }; |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 105 | |
| 106 | /* I2C1 */ |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 107 | static struct omap_hwmod omap2420_i2c1_hwmod = { |
| 108 | .name = "i2c1", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 109 | .mpu_irqs = omap2_i2c1_mpu_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 110 | .sdma_reqs = omap2_i2c1_sdma_reqs, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 111 | .main_clk = "i2c1_fck", |
| 112 | .prcm = { |
| 113 | .omap2 = { |
| 114 | .module_offs = CORE_MOD, |
| 115 | .prcm_reg_id = 1, |
| 116 | .module_bit = OMAP2420_EN_I2C1_SHIFT, |
| 117 | .idlest_reg_id = 1, |
| 118 | .idlest_idle_bit = OMAP2420_ST_I2C1_SHIFT, |
| 119 | }, |
| 120 | }, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 121 | .class = &i2c_class, |
| 122 | .dev_attr = &i2c_dev_attr, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 123 | .flags = HWMOD_16BIT_REG, |
| 124 | }; |
| 125 | |
| 126 | /* I2C2 */ |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 127 | static struct omap_hwmod omap2420_i2c2_hwmod = { |
| 128 | .name = "i2c2", |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 129 | .mpu_irqs = omap2_i2c2_mpu_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 130 | .sdma_reqs = omap2_i2c2_sdma_reqs, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 131 | .main_clk = "i2c2_fck", |
| 132 | .prcm = { |
| 133 | .omap2 = { |
| 134 | .module_offs = CORE_MOD, |
| 135 | .prcm_reg_id = 1, |
| 136 | .module_bit = OMAP2420_EN_I2C2_SHIFT, |
| 137 | .idlest_reg_id = 1, |
| 138 | .idlest_idle_bit = OMAP2420_ST_I2C2_SHIFT, |
| 139 | }, |
| 140 | }, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 141 | .class = &i2c_class, |
| 142 | .dev_attr = &i2c_dev_attr, |
Paul Walmsley | 2004290 | 2010-09-30 02:40:12 +0530 | [diff] [blame] | 143 | .flags = HWMOD_16BIT_REG, |
| 144 | }; |
| 145 | |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 146 | /* dma attributes */ |
| 147 | static struct omap_dma_dev_attr dma_dev_attr = { |
| 148 | .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | |
| 149 | IS_CSSA_32 | IS_CDSA_32, |
| 150 | .lch_count = 32, |
| 151 | }; |
| 152 | |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 153 | static struct omap_hwmod omap2420_dma_system_hwmod = { |
| 154 | .name = "dma", |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 155 | .class = &omap2xxx_dma_hwmod_class, |
Paul Walmsley | 0d619a8 | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 156 | .mpu_irqs = omap2_dma_system_irqs, |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 157 | .main_clk = "core_l3_ck", |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 158 | .dev_attr = &dma_dev_attr, |
G, Manjunath Kondaiah | 745685df9 | 2010-12-20 18:27:18 -0800 | [diff] [blame] | 159 | .flags = HWMOD_NO_IDLEST, |
| 160 | }; |
| 161 | |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 162 | /* mailbox */ |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 163 | static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { |
Tony Lindgren | 7d7e1eb | 2012-08-27 17:43:01 -0700 | [diff] [blame] | 164 | { .name = "dsp", .irq = 26 + OMAP_INTC_START, }, |
| 165 | { .name = "iva", .irq = 34 + OMAP_INTC_START, }, |
| 166 | { .irq = -1 }, |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 167 | }; |
| 168 | |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 169 | static struct omap_hwmod omap2420_mailbox_hwmod = { |
| 170 | .name = "mailbox", |
Paul Walmsley | 273b946 | 2011-07-09 19:14:08 -0600 | [diff] [blame] | 171 | .class = &omap2xxx_mailbox_hwmod_class, |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 172 | .mpu_irqs = omap2420_mailbox_irqs, |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 173 | .main_clk = "mailboxes_ick", |
| 174 | .prcm = { |
| 175 | .omap2 = { |
| 176 | .prcm_reg_id = 1, |
| 177 | .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT, |
| 178 | .module_offs = CORE_MOD, |
| 179 | .idlest_reg_id = 1, |
| 180 | .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, |
| 181 | }, |
| 182 | }, |
Omar Ramirez Luna | fca1ab5 | 2011-02-24 12:51:32 -0800 | [diff] [blame] | 183 | }; |
| 184 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 185 | /* |
| 186 | * 'mcbsp' class |
| 187 | * multi channel buffered serial port controller |
| 188 | */ |
| 189 | |
| 190 | static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { |
| 191 | .name = "mcbsp", |
| 192 | }; |
| 193 | |
Peter Ujfalusi | b315310 | 2012-06-18 16:18:42 -0600 | [diff] [blame] | 194 | static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = { |
| 195 | { .role = "pad_fck", .clk = "mcbsp_clks" }, |
| 196 | { .role = "prcm_fck", .clk = "func_96m_ck" }, |
| 197 | }; |
| 198 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 199 | /* mcbsp1 */ |
| 200 | static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { |
Tony Lindgren | 7d7e1eb | 2012-08-27 17:43:01 -0700 | [diff] [blame] | 201 | { .name = "tx", .irq = 59 + OMAP_INTC_START, }, |
| 202 | { .name = "rx", .irq = 60 + OMAP_INTC_START, }, |
| 203 | { .irq = -1 }, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 204 | }; |
| 205 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 206 | static struct omap_hwmod omap2420_mcbsp1_hwmod = { |
| 207 | .name = "mcbsp1", |
| 208 | .class = &omap2420_mcbsp_hwmod_class, |
| 209 | .mpu_irqs = omap2420_mcbsp1_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 210 | .sdma_reqs = omap2_mcbsp1_sdma_reqs, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 211 | .main_clk = "mcbsp1_fck", |
| 212 | .prcm = { |
| 213 | .omap2 = { |
| 214 | .prcm_reg_id = 1, |
| 215 | .module_bit = OMAP24XX_EN_MCBSP1_SHIFT, |
| 216 | .module_offs = CORE_MOD, |
| 217 | .idlest_reg_id = 1, |
| 218 | .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, |
| 219 | }, |
| 220 | }, |
Peter Ujfalusi | b315310 | 2012-06-18 16:18:42 -0600 | [diff] [blame] | 221 | .opt_clks = mcbsp_opt_clks, |
| 222 | .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 223 | }; |
| 224 | |
| 225 | /* mcbsp2 */ |
| 226 | static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { |
Tony Lindgren | 7d7e1eb | 2012-08-27 17:43:01 -0700 | [diff] [blame] | 227 | { .name = "tx", .irq = 62 + OMAP_INTC_START, }, |
| 228 | { .name = "rx", .irq = 63 + OMAP_INTC_START, }, |
| 229 | { .irq = -1 }, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 230 | }; |
| 231 | |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 232 | static struct omap_hwmod omap2420_mcbsp2_hwmod = { |
| 233 | .name = "mcbsp2", |
| 234 | .class = &omap2420_mcbsp_hwmod_class, |
| 235 | .mpu_irqs = omap2420_mcbsp2_irqs, |
Paul Walmsley | d826ebf | 2011-07-09 19:14:07 -0600 | [diff] [blame] | 236 | .sdma_reqs = omap2_mcbsp2_sdma_reqs, |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 237 | .main_clk = "mcbsp2_fck", |
| 238 | .prcm = { |
| 239 | .omap2 = { |
| 240 | .prcm_reg_id = 1, |
| 241 | .module_bit = OMAP24XX_EN_MCBSP2_SHIFT, |
| 242 | .module_offs = CORE_MOD, |
| 243 | .idlest_reg_id = 1, |
| 244 | .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, |
| 245 | }, |
| 246 | }, |
Peter Ujfalusi | b315310 | 2012-06-18 16:18:42 -0600 | [diff] [blame] | 247 | .opt_clks = mcbsp_opt_clks, |
| 248 | .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), |
Charulatha V | 3cb72fa | 2011-02-24 12:51:46 -0800 | [diff] [blame] | 249 | }; |
| 250 | |
Tony Lindgren | ad1b666 | 2012-05-08 17:23:33 -0600 | [diff] [blame] | 251 | static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = { |
| 252 | .rev_offs = 0x3c, |
| 253 | .sysc_offs = 0x64, |
| 254 | .syss_offs = 0x68, |
| 255 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), |
| 256 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 257 | }; |
| 258 | |
| 259 | static struct omap_hwmod_class omap2420_msdi_hwmod_class = { |
| 260 | .name = "msdi", |
| 261 | .sysc = &omap2420_msdi_sysc, |
| 262 | .reset = &omap_msdi_reset, |
| 263 | }; |
| 264 | |
| 265 | /* msdi1 */ |
| 266 | static struct omap_hwmod_irq_info omap2420_msdi1_irqs[] = { |
Tony Lindgren | 7d7e1eb | 2012-08-27 17:43:01 -0700 | [diff] [blame] | 267 | { .irq = 83 + OMAP_INTC_START, }, |
| 268 | { .irq = -1 }, |
Tony Lindgren | ad1b666 | 2012-05-08 17:23:33 -0600 | [diff] [blame] | 269 | }; |
| 270 | |
| 271 | static struct omap_hwmod_dma_info omap2420_msdi1_sdma_reqs[] = { |
| 272 | { .name = "tx", .dma_req = 61 }, /* OMAP24XX_DMA_MMC1_TX */ |
| 273 | { .name = "rx", .dma_req = 62 }, /* OMAP24XX_DMA_MMC1_RX */ |
| 274 | { .dma_req = -1 } |
| 275 | }; |
| 276 | |
| 277 | static struct omap_hwmod omap2420_msdi1_hwmod = { |
| 278 | .name = "msdi1", |
| 279 | .class = &omap2420_msdi_hwmod_class, |
| 280 | .mpu_irqs = omap2420_msdi1_irqs, |
| 281 | .sdma_reqs = omap2420_msdi1_sdma_reqs, |
| 282 | .main_clk = "mmc_fck", |
| 283 | .prcm = { |
| 284 | .omap2 = { |
| 285 | .prcm_reg_id = 1, |
| 286 | .module_bit = OMAP2420_EN_MMC_SHIFT, |
| 287 | .module_offs = CORE_MOD, |
| 288 | .idlest_reg_id = 1, |
| 289 | .idlest_idle_bit = OMAP2420_ST_MMC_SHIFT, |
| 290 | }, |
| 291 | }, |
| 292 | .flags = HWMOD_16BIT_REG, |
| 293 | }; |
| 294 | |
Paul Walmsley | f32bd77 | 2012-05-08 11:34:28 -0600 | [diff] [blame] | 295 | /* HDQ1W/1-wire */ |
| 296 | static struct omap_hwmod omap2420_hdq1w_hwmod = { |
| 297 | .name = "hdq1w", |
| 298 | .mpu_irqs = omap2_hdq1w_mpu_irqs, |
| 299 | .main_clk = "hdq_fck", |
| 300 | .prcm = { |
| 301 | .omap2 = { |
| 302 | .module_offs = CORE_MOD, |
| 303 | .prcm_reg_id = 1, |
| 304 | .module_bit = OMAP24XX_EN_HDQ_SHIFT, |
| 305 | .idlest_reg_id = 1, |
| 306 | .idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT, |
| 307 | }, |
| 308 | }, |
| 309 | .class = &omap2_hdq1w_class, |
| 310 | }; |
| 311 | |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 312 | /* |
| 313 | * interfaces |
| 314 | */ |
| 315 | |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 316 | /* L4 CORE -> I2C1 interface */ |
| 317 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 318 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 319 | .slave = &omap2420_i2c1_hwmod, |
| 320 | .clk = "i2c1_ick", |
| 321 | .addr = omap2_i2c1_addr_space, |
| 322 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 323 | }; |
| 324 | |
| 325 | /* L4 CORE -> I2C2 interface */ |
| 326 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 327 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 328 | .slave = &omap2420_i2c2_hwmod, |
| 329 | .clk = "i2c2_ick", |
| 330 | .addr = omap2_i2c2_addr_space, |
| 331 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 332 | }; |
| 333 | |
| 334 | /* IVA <- L3 interface */ |
| 335 | static struct omap_hwmod_ocp_if omap2420_l3__iva = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 336 | .master = &omap2xxx_l3_main_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 337 | .slave = &omap2420_iva_hwmod, |
Paul Walmsley | 3af35fb | 2012-04-19 04:04:38 -0600 | [diff] [blame] | 338 | .clk = "core_l3_ck", |
| 339 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 340 | }; |
| 341 | |
| 342 | /* DSP <- L3 interface */ |
| 343 | static struct omap_hwmod_ocp_if omap2420_l3__dsp = { |
| 344 | .master = &omap2xxx_l3_main_hwmod, |
| 345 | .slave = &omap2420_dsp_hwmod, |
| 346 | .clk = "dsp_ick", |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 347 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 348 | }; |
| 349 | |
| 350 | static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { |
| 351 | { |
| 352 | .pa_start = 0x48028000, |
| 353 | .pa_end = 0x48028000 + SZ_1K - 1, |
| 354 | .flags = ADDR_TYPE_RT |
| 355 | }, |
| 356 | { } |
| 357 | }; |
| 358 | |
| 359 | /* l4_wkup -> timer1 */ |
| 360 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 361 | .master = &omap2xxx_l4_wkup_hwmod, |
| 362 | .slave = &omap2xxx_timer1_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 363 | .clk = "gpt1_ick", |
| 364 | .addr = omap2420_timer1_addrs, |
| 365 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 366 | }; |
| 367 | |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 368 | /* l4_wkup -> wd_timer2 */ |
| 369 | static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { |
| 370 | { |
| 371 | .pa_start = 0x48022000, |
| 372 | .pa_end = 0x4802207f, |
| 373 | .flags = ADDR_TYPE_RT |
| 374 | }, |
| 375 | { } |
| 376 | }; |
| 377 | |
| 378 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 379 | .master = &omap2xxx_l4_wkup_hwmod, |
| 380 | .slave = &omap2xxx_wd_timer2_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 381 | .clk = "mpu_wdt_ick", |
| 382 | .addr = omap2420_wd_timer2_addrs, |
| 383 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 384 | }; |
| 385 | |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 386 | /* l4_wkup -> gpio1 */ |
| 387 | static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = { |
| 388 | { |
| 389 | .pa_start = 0x48018000, |
| 390 | .pa_end = 0x480181ff, |
| 391 | .flags = ADDR_TYPE_RT |
| 392 | }, |
| 393 | { } |
| 394 | }; |
| 395 | |
| 396 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 397 | .master = &omap2xxx_l4_wkup_hwmod, |
| 398 | .slave = &omap2xxx_gpio1_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 399 | .clk = "gpios_ick", |
| 400 | .addr = omap2420_gpio1_addr_space, |
| 401 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 402 | }; |
| 403 | |
| 404 | /* l4_wkup -> gpio2 */ |
| 405 | static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = { |
| 406 | { |
| 407 | .pa_start = 0x4801a000, |
| 408 | .pa_end = 0x4801a1ff, |
| 409 | .flags = ADDR_TYPE_RT |
| 410 | }, |
| 411 | { } |
| 412 | }; |
| 413 | |
| 414 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 415 | .master = &omap2xxx_l4_wkup_hwmod, |
| 416 | .slave = &omap2xxx_gpio2_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 417 | .clk = "gpios_ick", |
| 418 | .addr = omap2420_gpio2_addr_space, |
| 419 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 420 | }; |
| 421 | |
| 422 | /* l4_wkup -> gpio3 */ |
| 423 | static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = { |
| 424 | { |
| 425 | .pa_start = 0x4801c000, |
| 426 | .pa_end = 0x4801c1ff, |
| 427 | .flags = ADDR_TYPE_RT |
| 428 | }, |
| 429 | { } |
| 430 | }; |
| 431 | |
| 432 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 433 | .master = &omap2xxx_l4_wkup_hwmod, |
| 434 | .slave = &omap2xxx_gpio3_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 435 | .clk = "gpios_ick", |
| 436 | .addr = omap2420_gpio3_addr_space, |
| 437 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 438 | }; |
| 439 | |
| 440 | /* l4_wkup -> gpio4 */ |
| 441 | static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = { |
| 442 | { |
| 443 | .pa_start = 0x4801e000, |
| 444 | .pa_end = 0x4801e1ff, |
| 445 | .flags = ADDR_TYPE_RT |
| 446 | }, |
| 447 | { } |
| 448 | }; |
| 449 | |
| 450 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 451 | .master = &omap2xxx_l4_wkup_hwmod, |
| 452 | .slave = &omap2xxx_gpio4_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 453 | .clk = "gpios_ick", |
| 454 | .addr = omap2420_gpio4_addr_space, |
| 455 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 456 | }; |
| 457 | |
| 458 | /* dma_system -> L3 */ |
| 459 | static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { |
| 460 | .master = &omap2420_dma_system_hwmod, |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 461 | .slave = &omap2xxx_l3_main_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 462 | .clk = "core_l3_ck", |
| 463 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 464 | }; |
| 465 | |
| 466 | /* l4_core -> dma_system */ |
| 467 | static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 468 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 469 | .slave = &omap2420_dma_system_hwmod, |
| 470 | .clk = "sdma_ick", |
| 471 | .addr = omap2_dma_system_addrs, |
| 472 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 473 | }; |
| 474 | |
| 475 | /* l4_core -> mailbox */ |
| 476 | static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 477 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 478 | .slave = &omap2420_mailbox_hwmod, |
| 479 | .addr = omap2_mailbox_addrs, |
| 480 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 481 | }; |
| 482 | |
| 483 | /* l4_core -> mcbsp1 */ |
| 484 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 485 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 486 | .slave = &omap2420_mcbsp1_hwmod, |
| 487 | .clk = "mcbsp1_ick", |
| 488 | .addr = omap2_mcbsp1_addrs, |
| 489 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 490 | }; |
| 491 | |
| 492 | /* l4_core -> mcbsp2 */ |
| 493 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { |
Paul Walmsley | cb48427 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 494 | .master = &omap2xxx_l4_core_hwmod, |
Paul Walmsley | 844a3b6 | 2012-04-19 04:04:33 -0600 | [diff] [blame] | 495 | .slave = &omap2420_mcbsp2_hwmod, |
| 496 | .clk = "mcbsp2_ick", |
| 497 | .addr = omap2xxx_mcbsp2_addrs, |
| 498 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 499 | }; |
| 500 | |
Tony Lindgren | ad1b666 | 2012-05-08 17:23:33 -0600 | [diff] [blame] | 501 | static struct omap_hwmod_addr_space omap2420_msdi1_addrs[] = { |
| 502 | { |
| 503 | .pa_start = 0x4809c000, |
| 504 | .pa_end = 0x4809c000 + SZ_128 - 1, |
| 505 | .flags = ADDR_TYPE_RT, |
| 506 | }, |
| 507 | { } |
| 508 | }; |
| 509 | |
| 510 | /* l4_core -> msdi1 */ |
| 511 | static struct omap_hwmod_ocp_if omap2420_l4_core__msdi1 = { |
| 512 | .master = &omap2xxx_l4_core_hwmod, |
| 513 | .slave = &omap2420_msdi1_hwmod, |
| 514 | .clk = "mmc_ick", |
| 515 | .addr = omap2420_msdi1_addrs, |
| 516 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 517 | }; |
| 518 | |
Paul Walmsley | f32bd77 | 2012-05-08 11:34:28 -0600 | [diff] [blame] | 519 | /* l4_core -> hdq1w interface */ |
| 520 | static struct omap_hwmod_ocp_if omap2420_l4_core__hdq1w = { |
| 521 | .master = &omap2xxx_l4_core_hwmod, |
| 522 | .slave = &omap2420_hdq1w_hwmod, |
| 523 | .clk = "hdq_ick", |
| 524 | .addr = omap2_hdq1w_addr_space, |
| 525 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 526 | .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, |
| 527 | }; |
| 528 | |
| 529 | |
Vaibhav Hiremath | c8d82ff | 2012-05-08 11:34:30 -0600 | [diff] [blame] | 530 | /* l4_wkup -> 32ksync_counter */ |
| 531 | static struct omap_hwmod_addr_space omap2420_counter_32k_addrs[] = { |
| 532 | { |
| 533 | .pa_start = 0x48004000, |
| 534 | .pa_end = 0x4800401f, |
| 535 | .flags = ADDR_TYPE_RT |
| 536 | }, |
| 537 | { } |
| 538 | }; |
| 539 | |
Afzal Mohammed | 49484a6 | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 540 | static struct omap_hwmod_addr_space omap2420_gpmc_addrs[] = { |
| 541 | { |
| 542 | .pa_start = 0x6800a000, |
| 543 | .pa_end = 0x6800afff, |
| 544 | .flags = ADDR_TYPE_RT |
| 545 | }, |
| 546 | { } |
| 547 | }; |
| 548 | |
Vaibhav Hiremath | c8d82ff | 2012-05-08 11:34:30 -0600 | [diff] [blame] | 549 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = { |
| 550 | .master = &omap2xxx_l4_wkup_hwmod, |
| 551 | .slave = &omap2xxx_counter_32k_hwmod, |
| 552 | .clk = "sync_32k_ick", |
| 553 | .addr = omap2420_counter_32k_addrs, |
| 554 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 555 | }; |
| 556 | |
Afzal Mohammed | 49484a6 | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 557 | static struct omap_hwmod_ocp_if omap2420_l3__gpmc = { |
| 558 | .master = &omap2xxx_l3_main_hwmod, |
| 559 | .slave = &omap2xxx_gpmc_hwmod, |
| 560 | .clk = "core_l3_ck", |
| 561 | .addr = omap2420_gpmc_addrs, |
| 562 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
| 563 | }; |
| 564 | |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 565 | static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { |
Paul Walmsley | 6a29755 | 2012-04-19 04:04:34 -0600 | [diff] [blame] | 566 | &omap2xxx_l3_main__l4_core, |
| 567 | &omap2xxx_mpu__l3_main, |
| 568 | &omap2xxx_dss__l3, |
| 569 | &omap2xxx_l4_core__mcspi1, |
| 570 | &omap2xxx_l4_core__mcspi2, |
| 571 | &omap2xxx_l4_core__l4_wkup, |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 572 | &omap2_l4_core__uart1, |
| 573 | &omap2_l4_core__uart2, |
| 574 | &omap2_l4_core__uart3, |
| 575 | &omap2420_l4_core__i2c1, |
| 576 | &omap2420_l4_core__i2c2, |
| 577 | &omap2420_l3__iva, |
Paul Walmsley | 3af35fb | 2012-04-19 04:04:38 -0600 | [diff] [blame] | 578 | &omap2420_l3__dsp, |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 579 | &omap2420_l4_wkup__timer1, |
Paul Walmsley | 6a29755 | 2012-04-19 04:04:34 -0600 | [diff] [blame] | 580 | &omap2xxx_l4_core__timer2, |
| 581 | &omap2xxx_l4_core__timer3, |
| 582 | &omap2xxx_l4_core__timer4, |
| 583 | &omap2xxx_l4_core__timer5, |
| 584 | &omap2xxx_l4_core__timer6, |
| 585 | &omap2xxx_l4_core__timer7, |
| 586 | &omap2xxx_l4_core__timer8, |
| 587 | &omap2xxx_l4_core__timer9, |
| 588 | &omap2xxx_l4_core__timer10, |
| 589 | &omap2xxx_l4_core__timer11, |
| 590 | &omap2xxx_l4_core__timer12, |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 591 | &omap2420_l4_wkup__wd_timer2, |
Paul Walmsley | 6a29755 | 2012-04-19 04:04:34 -0600 | [diff] [blame] | 592 | &omap2xxx_l4_core__dss, |
| 593 | &omap2xxx_l4_core__dss_dispc, |
| 594 | &omap2xxx_l4_core__dss_rfbi, |
| 595 | &omap2xxx_l4_core__dss_venc, |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 596 | &omap2420_l4_wkup__gpio1, |
| 597 | &omap2420_l4_wkup__gpio2, |
| 598 | &omap2420_l4_wkup__gpio3, |
| 599 | &omap2420_l4_wkup__gpio4, |
| 600 | &omap2420_dma_system__l3, |
| 601 | &omap2420_l4_core__dma_system, |
| 602 | &omap2420_l4_core__mailbox, |
| 603 | &omap2420_l4_core__mcbsp1, |
| 604 | &omap2420_l4_core__mcbsp2, |
Tony Lindgren | ad1b666 | 2012-05-08 17:23:33 -0600 | [diff] [blame] | 605 | &omap2420_l4_core__msdi1, |
Paul Walmsley | e9b0a2f | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 606 | &omap2xxx_l4_core__rng, |
Paul Walmsley | f32bd77 | 2012-05-08 11:34:28 -0600 | [diff] [blame] | 607 | &omap2420_l4_core__hdq1w, |
Vaibhav Hiremath | c8d82ff | 2012-05-08 11:34:30 -0600 | [diff] [blame] | 608 | &omap2420_l4_wkup__counter_32k, |
Afzal Mohammed | 49484a6 | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 609 | &omap2420_l3__gpmc, |
Paul Walmsley | 02bfc03 | 2009-09-03 20:14:05 +0300 | [diff] [blame] | 610 | NULL, |
| 611 | }; |
| 612 | |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 613 | int __init omap2420_hwmod_init(void) |
| 614 | { |
Kevin Hilman | 9ebfd28 | 2012-06-18 12:12:23 -0600 | [diff] [blame] | 615 | omap_hwmod_init(); |
Paul Walmsley | 0a78c5c | 2012-04-19 04:04:31 -0600 | [diff] [blame] | 616 | return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs); |
Paul Walmsley | 7359154 | 2010-02-22 22:09:32 -0700 | [diff] [blame] | 617 | } |