Russell King | 862184f | 2005-11-07 21:05:42 +0000 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-realview/platsmp.c |
| 3 | * |
| 4 | * Copyright (C) 2002 ARM Ltd. |
| 5 | * All Rights Reserved |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #include <linux/init.h> |
| 12 | #include <linux/errno.h> |
| 13 | #include <linux/delay.h> |
| 14 | #include <linux/device.h> |
| 15 | #include <linux/smp.h> |
| 16 | |
| 17 | #include <asm/cacheflush.h> |
| 18 | #include <asm/hardware/arm_scu.h> |
| 19 | #include <asm/hardware.h> |
| 20 | |
| 21 | #include "core.h" |
| 22 | |
| 23 | extern void realview_secondary_startup(void); |
| 24 | |
| 25 | /* |
| 26 | * control for which core is the next to come out of the secondary |
| 27 | * boot "holding pen" |
| 28 | */ |
| 29 | volatile int __cpuinitdata pen_release = -1; |
| 30 | |
| 31 | static unsigned int __init get_core_count(void) |
| 32 | { |
| 33 | unsigned int ncores; |
| 34 | |
Russell King | 5d43045 | 2005-11-08 10:44:46 +0000 | [diff] [blame] | 35 | ncores = __raw_readl(__io_address(REALVIEW_MPCORE_SCU_BASE) + SCU_CONFIG); |
Russell King | 862184f | 2005-11-07 21:05:42 +0000 | [diff] [blame] | 36 | |
| 37 | return (ncores & 0x03) + 1; |
| 38 | } |
| 39 | |
| 40 | static DEFINE_SPINLOCK(boot_lock); |
| 41 | |
| 42 | void __cpuinit platform_secondary_init(unsigned int cpu) |
| 43 | { |
| 44 | /* |
| 45 | * the primary core may have used a "cross call" soft interrupt |
| 46 | * to get this processor out of WFI in the BootMonitor - make |
| 47 | * sure that we are no longer being sent this soft interrupt |
| 48 | */ |
| 49 | smp_cross_call_done(cpumask_of_cpu(cpu)); |
| 50 | |
| 51 | /* |
| 52 | * if any interrupts are already enabled for the primary |
| 53 | * core (e.g. timer irq), then they will not have been enabled |
| 54 | * for us: do so |
| 55 | */ |
| 56 | gic_cpu_init(__io_address(REALVIEW_GIC_CPU_BASE)); |
| 57 | |
| 58 | /* |
| 59 | * let the primary processor know we're out of the |
| 60 | * pen, then head off into the C entry point |
| 61 | */ |
| 62 | pen_release = -1; |
| 63 | |
| 64 | /* |
| 65 | * Synchronise with the boot thread. |
| 66 | */ |
| 67 | spin_lock(&boot_lock); |
| 68 | spin_unlock(&boot_lock); |
| 69 | } |
| 70 | |
| 71 | int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) |
| 72 | { |
| 73 | unsigned long timeout; |
| 74 | |
| 75 | /* |
| 76 | * set synchronisation state between this boot processor |
| 77 | * and the secondary one |
| 78 | */ |
| 79 | spin_lock(&boot_lock); |
| 80 | |
| 81 | /* |
| 82 | * The secondary processor is waiting to be released from |
| 83 | * the holding pen - release it, then wait for it to flag |
| 84 | * that it has been released by resetting pen_release. |
| 85 | * |
| 86 | * Note that "pen_release" is the hardware CPU ID, whereas |
| 87 | * "cpu" is Linux's internal ID. |
| 88 | */ |
| 89 | pen_release = cpu; |
| 90 | flush_cache_all(); |
| 91 | |
| 92 | /* |
| 93 | * XXX |
| 94 | * |
| 95 | * This is a later addition to the booting protocol: the |
| 96 | * bootMonitor now puts secondary cores into WFI, so |
| 97 | * poke_milo() no longer gets the cores moving; we need |
| 98 | * to send a soft interrupt to wake the secondary core. |
| 99 | * Use smp_cross_call() for this, since there's little |
| 100 | * point duplicating the code here |
| 101 | */ |
| 102 | smp_cross_call(cpumask_of_cpu(cpu)); |
| 103 | |
| 104 | timeout = jiffies + (1 * HZ); |
| 105 | while (time_before(jiffies, timeout)) { |
| 106 | if (pen_release == -1) |
| 107 | break; |
| 108 | |
| 109 | udelay(10); |
| 110 | } |
| 111 | |
| 112 | /* |
| 113 | * now the secondary core is starting up let it run its |
| 114 | * calibrations, then wait for it to finish |
| 115 | */ |
| 116 | spin_unlock(&boot_lock); |
| 117 | |
| 118 | return pen_release != -1 ? -ENOSYS : 0; |
| 119 | } |
| 120 | |
| 121 | static void __init poke_milo(void) |
| 122 | { |
| 123 | extern void secondary_startup(void); |
| 124 | |
| 125 | /* nobody is to be released from the pen yet */ |
| 126 | pen_release = -1; |
| 127 | |
| 128 | /* |
| 129 | * write the address of secondary startup into the system-wide |
| 130 | * flags register, then clear the bottom two bits, which is what |
| 131 | * BootMonitor is waiting for |
| 132 | */ |
| 133 | #if 1 |
| 134 | #define REALVIEW_SYS_FLAGSS_OFFSET 0x30 |
| 135 | __raw_writel(virt_to_phys(realview_secondary_startup), |
Russell King | 5d43045 | 2005-11-08 10:44:46 +0000 | [diff] [blame] | 136 | __io_address(REALVIEW_SYS_BASE) + |
| 137 | REALVIEW_SYS_FLAGSS_OFFSET); |
Russell King | 862184f | 2005-11-07 21:05:42 +0000 | [diff] [blame] | 138 | #define REALVIEW_SYS_FLAGSC_OFFSET 0x34 |
| 139 | __raw_writel(3, |
Russell King | 5d43045 | 2005-11-08 10:44:46 +0000 | [diff] [blame] | 140 | __io_address(REALVIEW_SYS_BASE) + |
| 141 | REALVIEW_SYS_FLAGSC_OFFSET); |
Russell King | 862184f | 2005-11-07 21:05:42 +0000 | [diff] [blame] | 142 | #endif |
| 143 | |
| 144 | mb(); |
| 145 | } |
| 146 | |
| 147 | void __init smp_prepare_cpus(unsigned int max_cpus) |
| 148 | { |
| 149 | unsigned int ncores = get_core_count(); |
| 150 | unsigned int cpu = smp_processor_id(); |
| 151 | int i; |
| 152 | |
| 153 | /* sanity check */ |
| 154 | if (ncores == 0) { |
| 155 | printk(KERN_ERR |
| 156 | "Realview: strange CM count of 0? Default to 1\n"); |
| 157 | |
| 158 | ncores = 1; |
| 159 | } |
| 160 | |
| 161 | if (ncores > NR_CPUS) { |
| 162 | printk(KERN_WARNING |
| 163 | "Realview: no. of cores (%d) greater than configured " |
| 164 | "maximum of %d - clipping\n", |
| 165 | ncores, NR_CPUS); |
| 166 | ncores = NR_CPUS; |
| 167 | } |
| 168 | |
| 169 | smp_store_cpu_info(cpu); |
| 170 | |
| 171 | /* |
| 172 | * are we trying to boot more cores than exist? |
| 173 | */ |
| 174 | if (max_cpus > ncores) |
| 175 | max_cpus = ncores; |
| 176 | |
| 177 | /* |
| 178 | * Initialise the possible/present maps. |
| 179 | * cpu_possible_map describes the set of CPUs which may be present |
| 180 | * cpu_present_map describes the set of CPUs populated |
| 181 | */ |
| 182 | for (i = 0; i < max_cpus; i++) { |
| 183 | cpu_set(i, cpu_possible_map); |
| 184 | cpu_set(i, cpu_present_map); |
| 185 | } |
| 186 | |
| 187 | /* |
| 188 | * Do we need any more CPUs? If so, then let them know where |
| 189 | * to start. Note that, on modern versions of MILO, the "poke" |
| 190 | * doesn't actually do anything until each individual core is |
| 191 | * sent a soft interrupt to get it out of WFI |
| 192 | */ |
| 193 | if (max_cpus > 1) |
| 194 | poke_milo(); |
| 195 | } |