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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * cpu-sa1100.c: clock scaling for the SA1100
3 *
4 * Copyright (C) 2000 2001, The Delft University of Technology
5 *
Kristoffer Ericson93982532008-11-26 20:58:43 +01006 * Authors:
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version
8 * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl):
9 * - major rewrite for linux-2.3.99
Kristoffer Ericson93982532008-11-26 20:58:43 +010010 * - rewritten for the more generic power management scheme in
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 * linux-2.4.5-rmk1
12 *
13 * This software has been developed while working on the LART
Erik Mouwc8c4b932006-03-27 15:32:30 +010014 * computing board (http://www.lartmaker.nl/), which is
Linus Torvalds1da177e2005-04-16 15:20:36 -070015 * sponsored by the Mobile Multi-media Communications
Justin P. Mattock50a23e62010-10-16 10:36:23 -070016 * (http://www.mobimedia.org/) and Ubiquitous Communications
Linus Torvalds1da177e2005-04-16 15:20:36 -070017 * (http://www.ubicom.tudelft.nl/) projects.
18 *
19 * The authors can be reached at:
20 *
21 * Erik Mouw
22 * Information and Communication Theory Group
23 * Faculty of Information Technology and Systems
24 * Delft University of Technology
25 * P.O. Box 5031
26 * 2600 GA Delft
27 * The Netherlands
28 *
29 *
30 * This program is free software; you can redistribute it and/or modify
31 * it under the terms of the GNU General Public License as published by
32 * the Free Software Foundation; either version 2 of the License, or
33 * (at your option) any later version.
34 *
35 * This program is distributed in the hope that it will be useful,
36 * but WITHOUT ANY WARRANTY; without even the implied warranty of
37 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
38 * GNU General Public License for more details.
Kristoffer Ericson93982532008-11-26 20:58:43 +010039 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070040 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
43 *
44 *
45 * Theory of operations
46 * ====================
Kristoffer Ericson93982532008-11-26 20:58:43 +010047 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070048 * Clock scaling can be used to lower the power consumption of the CPU
49 * core. This will give you a somewhat longer running time.
50 *
51 * The SA-1100 has a single register to change the core clock speed:
52 *
53 * PPCR 0x90020014 PLL config
54 *
55 * However, the DRAM timings are closely related to the core clock
56 * speed, so we need to change these, too. The used registers are:
57 *
58 * MDCNFG 0xA0000000 DRAM config
59 * MDCAS0 0xA0000004 Access waveform
60 * MDCAS1 0xA0000008 Access waveform
Kristoffer Ericson93982532008-11-26 20:58:43 +010061 * MDCAS2 0xA000000C Access waveform
Linus Torvalds1da177e2005-04-16 15:20:36 -070062 *
63 * Care must be taken to change the DRAM parameters the correct way,
64 * because otherwise the DRAM becomes unusable and the kernel will
Kristoffer Ericson93982532008-11-26 20:58:43 +010065 * crash.
Linus Torvalds1da177e2005-04-16 15:20:36 -070066 *
67 * The simple solution to avoid a kernel crash is to put the actual
68 * clock change in ROM and jump to that code from the kernel. The main
69 * disadvantage is that the ROM has to be modified, which is not
70 * possible on all SA-1100 platforms. Another disadvantage is that
Lucas De Marchi25985ed2011-03-30 22:57:33 -030071 * jumping to ROM makes clock switching unnecessary complicated.
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 *
73 * The idea behind this driver is that the memory configuration can be
74 * changed while running from DRAM (even with interrupts turned on!)
75 * as long as all re-configuration steps yield a valid DRAM
76 * configuration. The advantages are clear: it will run on all SA-1100
77 * platforms, and the code is very simple.
Kristoffer Ericson93982532008-11-26 20:58:43 +010078 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070079 * If you really want to understand what is going on in
80 * sa1100_update_dram_timings(), you'll have to read sections 8.2,
81 * 9.5.7.3, and 10.2 from the "Intel StrongARM SA-1100 Microprocessor
82 * Developers Manual" (available for free from Intel).
83 *
84 */
85
86#include <linux/kernel.h>
87#include <linux/types.h>
88#include <linux/init.h>
89#include <linux/cpufreq.h>
Russell King31696632012-06-06 11:42:36 +010090#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070091
Russell King0ba8b9b2008-08-10 18:08:10 +010092#include <asm/cputype.h>
93
Russell Kinga09e64f2008-08-05 16:14:15 +010094#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070095
96#include "generic.h"
97
Marcelo Roberto Jimenezd03f3222010-10-18 22:31:26 +010098struct sa1100_dram_regs {
Linus Torvalds1da177e2005-04-16 15:20:36 -070099 int speed;
100 u32 mdcnfg;
Kristoffer Ericson93982532008-11-26 20:58:43 +0100101 u32 mdcas0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102 u32 mdcas1;
103 u32 mdcas2;
Marcelo Roberto Jimenezd03f3222010-10-18 22:31:26 +0100104};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105
106
107static struct cpufreq_driver sa1100_driver;
108
Marcelo Roberto Jimenezd03f3222010-10-18 22:31:26 +0100109static struct sa1100_dram_regs sa1100_dram_settings[] = {
110 /*speed, mdcnfg, mdcas0, mdcas1, mdcas2, clock freq */
111 { 59000, 0x00dc88a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 59.0 MHz */
112 { 73700, 0x011490a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 73.7 MHz */
113 { 88500, 0x014e90a3, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 88.5 MHz */
114 {103200, 0x01889923, 0xcccccccf, 0xfffffffc, 0xffffffff},/* 103.2 MHz */
115 {118000, 0x01c29923, 0x9999998f, 0xfffffff9, 0xffffffff},/* 118.0 MHz */
116 {132700, 0x01fb2123, 0x9999998f, 0xfffffff9, 0xffffffff},/* 132.7 MHz */
117 {147500, 0x02352123, 0x3333330f, 0xfffffff3, 0xffffffff},/* 147.5 MHz */
118 {162200, 0x026b29a3, 0x38e38e1f, 0xfff8e38e, 0xffffffff},/* 162.2 MHz */
119 {176900, 0x02a329a3, 0x71c71c1f, 0xfff1c71c, 0xffffffff},/* 176.9 MHz */
120 {191700, 0x02dd31a3, 0xe38e383f, 0xffe38e38, 0xffffffff},/* 191.7 MHz */
121 {206400, 0x03153223, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 206.4 MHz */
122 {221200, 0x034fba23, 0xc71c703f, 0xffc71c71, 0xffffffff},/* 221.2 MHz */
123 {235900, 0x03853a23, 0xe1e1e07f, 0xe1e1e1e1, 0xffffffe1},/* 235.9 MHz */
124 {250700, 0x03bf3aa3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 250.7 MHz */
125 {265400, 0x03f7c2a3, 0xc3c3c07f, 0xc3c3c3c3, 0xffffffc3},/* 265.4 MHz */
126 {280200, 0x0431c2a3, 0x878780ff, 0x87878787, 0xffffff87},/* 280.2 MHz */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127 { 0, 0, 0, 0, 0 } /* last entry */
128};
129
130static void sa1100_update_dram_timings(int current_speed, int new_speed)
131{
Marcelo Roberto Jimenezd03f3222010-10-18 22:31:26 +0100132 struct sa1100_dram_regs *settings = sa1100_dram_settings;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133
134 /* find speed */
135 while (settings->speed != 0) {
Marcelo Roberto Jimenezd03f3222010-10-18 22:31:26 +0100136 if (new_speed == settings->speed)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137 break;
Marcelo Roberto Jimenezd03f3222010-10-18 22:31:26 +0100138
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139 settings++;
140 }
141
142 if (settings->speed == 0) {
143 panic("%s: couldn't find dram setting for speed %d\n",
Harvey Harrison8e86f422008-03-04 15:08:02 -0800144 __func__, new_speed);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145 }
146
147 /* No risk, no fun: run with interrupts on! */
148 if (new_speed > current_speed) {
149 /* We're going FASTER, so first relax the memory
Kristoffer Ericson93982532008-11-26 20:58:43 +0100150 * timings before changing the core frequency
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151 */
Marcelo Roberto Jimenezd03f3222010-10-18 22:31:26 +0100152
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 /* Half the memory access clock */
154 MDCNFG |= MDCNFG_CDB2;
155
156 /* The order of these statements IS important, keep 8
157 * pulses!!
158 */
159 MDCAS2 = settings->mdcas2;
160 MDCAS1 = settings->mdcas1;
161 MDCAS0 = settings->mdcas0;
162 MDCNFG = settings->mdcnfg;
163 } else {
164 /* We're going SLOWER: first decrease the core
165 * frequency and then tighten the memory settings.
166 */
167
168 /* Half the memory access clock */
169 MDCNFG |= MDCNFG_CDB2;
170
171 /* The order of these statements IS important, keep 8
172 * pulses!!
173 */
174 MDCAS0 = settings->mdcas0;
175 MDCAS1 = settings->mdcas1;
176 MDCAS2 = settings->mdcas2;
177 MDCNFG = settings->mdcnfg;
178 }
179}
180
181static int sa1100_target(struct cpufreq_policy *policy,
182 unsigned int target_freq,
183 unsigned int relation)
184{
185 unsigned int cur = sa11x0_getspeed(0);
186 unsigned int new_ppcr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 struct cpufreq_freqs freqs;
Marcelo Roberto Jimenez521e9542010-10-18 22:30:21 +0100188
189 new_ppcr = sa11x0_freq_to_ppcr(target_freq);
Marcelo Roberto Jimenezd03f3222010-10-18 22:31:26 +0100190 switch (relation) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191 case CPUFREQ_RELATION_L:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192 if (sa11x0_ppcr_to_freq(new_ppcr) > policy->max)
193 new_ppcr--;
194 break;
195 case CPUFREQ_RELATION_H:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196 if ((sa11x0_ppcr_to_freq(new_ppcr) > target_freq) &&
197 (sa11x0_ppcr_to_freq(new_ppcr - 1) >= policy->min))
198 new_ppcr--;
199 break;
200 }
201
202 freqs.old = cur;
203 freqs.new = sa11x0_ppcr_to_freq(new_ppcr);
204 freqs.cpu = 0;
205
206 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
207
208 if (freqs.new > cur)
209 sa1100_update_dram_timings(cur, freqs.new);
210
211 PPCR = new_ppcr;
212
213 if (freqs.new < cur)
214 sa1100_update_dram_timings(cur, freqs.new);
215
216 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
217
218 return 0;
219}
220
221static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
222{
223 if (policy->cpu != 0)
224 return -EINVAL;
225 policy->cur = policy->min = policy->max = sa11x0_getspeed(0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226 policy->cpuinfo.min_freq = 59000;
227 policy->cpuinfo.max_freq = 287000;
228 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
229 return 0;
230}
231
Russell King7a28b5a2012-01-18 23:45:55 +0000232static struct cpufreq_driver sa1100_driver __refdata = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233 .flags = CPUFREQ_STICKY,
234 .verify = sa11x0_verify_speed,
235 .target = sa1100_target,
236 .get = sa11x0_getspeed,
237 .init = sa1100_cpu_init,
238 .name = "sa1100",
239};
240
241static int __init sa1100_dram_init(void)
242{
Russell King0ba8b9b2008-08-10 18:08:10 +0100243 if (cpu_is_sa1100())
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244 return cpufreq_register_driver(&sa1100_driver);
245 else
246 return -ENODEV;
247}
248
249arch_initcall(sa1100_dram_init);