blob: 6743ff7dccfa30b2997d2529d97747d5261d5ad9 [file] [log] [blame]
Eric Anholt673a3942008-07-30 12:06:12 -07001/**************************************************************************
2 *
3 * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27/*
28 * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
29 */
30
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040031#include <linux/export.h>
David Howells760285e2012-10-02 18:01:07 +010032#include <drm/drmP.h>
Eric Anholt673a3942008-07-30 12:06:12 -070033
34#if defined(CONFIG_X86)
Ben Widawskyb04d4a32014-12-15 12:26:46 -080035#include <asm/smp.h>
Ross Zwisler2a0c7722014-02-26 12:06:51 -070036
37/*
38 * clflushopt is an unordered instruction which needs fencing with mfence or
39 * sfence to avoid ordering issues. For drm_clflush_page this fencing happens
40 * in the caller.
41 */
Eric Anholt673a3942008-07-30 12:06:12 -070042static void
43drm_clflush_page(struct page *page)
44{
45 uint8_t *page_virtual;
46 unsigned int i;
Dave Airlie87229ad2012-09-19 11:12:41 +100047 const int size = boot_cpu_data.x86_clflush_size;
Eric Anholt673a3942008-07-30 12:06:12 -070048
49 if (unlikely(page == NULL))
50 return;
51
Cong Wang1c9c20f2011-11-25 23:14:20 +080052 page_virtual = kmap_atomic(page);
Dave Airlie87229ad2012-09-19 11:12:41 +100053 for (i = 0; i < PAGE_SIZE; i += size)
Ross Zwisler2a0c7722014-02-26 12:06:51 -070054 clflushopt(page_virtual + i);
Cong Wang1c9c20f2011-11-25 23:14:20 +080055 kunmap_atomic(page_virtual);
Eric Anholt673a3942008-07-30 12:06:12 -070056}
Eric Anholt673a3942008-07-30 12:06:12 -070057
Dave Airliec9c97b82009-08-27 09:53:47 +100058static void drm_cache_flush_clflush(struct page *pages[],
59 unsigned long num_pages)
60{
61 unsigned long i;
62
63 mb();
64 for (i = 0; i < num_pages; i++)
65 drm_clflush_page(*pages++);
66 mb();
67}
Dave Airliec9c97b82009-08-27 09:53:47 +100068#endif
Dave Airlieed017d92009-09-02 09:41:13 +100069
Eric Anholt673a3942008-07-30 12:06:12 -070070void
71drm_clflush_pages(struct page *pages[], unsigned long num_pages)
72{
73
74#if defined(CONFIG_X86)
75 if (cpu_has_clflush) {
Dave Airliec9c97b82009-08-27 09:53:47 +100076 drm_cache_flush_clflush(pages, num_pages);
Eric Anholt673a3942008-07-30 12:06:12 -070077 return;
78 }
Eric Anholt673a3942008-07-30 12:06:12 -070079
Ben Widawskyb04d4a32014-12-15 12:26:46 -080080 if (wbinvd_on_all_cpus())
Dave Airliec9c97b82009-08-27 09:53:47 +100081 printk(KERN_ERR "Timed out waiting for cache flush.\n");
82
83#elif defined(__powerpc__)
84 unsigned long i;
85 for (i = 0; i < num_pages; i++) {
86 struct page *page = pages[i];
87 void *page_virtual;
88
89 if (unlikely(page == NULL))
90 continue;
91
Cong Wang1c9c20f2011-11-25 23:14:20 +080092 page_virtual = kmap_atomic(page);
Dave Airliec9c97b82009-08-27 09:53:47 +100093 flush_dcache_range((unsigned long)page_virtual,
94 (unsigned long)page_virtual + PAGE_SIZE);
Cong Wang1c9c20f2011-11-25 23:14:20 +080095 kunmap_atomic(page_virtual);
Dave Airliec9c97b82009-08-27 09:53:47 +100096 }
97#else
Dave Airlieed017d92009-09-02 09:41:13 +100098 printk(KERN_ERR "Architecture has no drm_cache.c support\n");
99 WARN_ON_ONCE(1);
Dave Airliee0f07542008-10-07 13:41:49 +1000100#endif
Eric Anholt673a3942008-07-30 12:06:12 -0700101}
102EXPORT_SYMBOL(drm_clflush_pages);
Daniel Vetter6d5cd9c2012-03-25 19:47:30 +0200103
104void
Chris Wilson9da3da62012-06-01 15:20:22 +0100105drm_clflush_sg(struct sg_table *st)
106{
107#if defined(CONFIG_X86)
108 if (cpu_has_clflush) {
Imre Deakf5ddf692013-02-18 19:28:01 +0200109 struct sg_page_iter sg_iter;
Chris Wilson9da3da62012-06-01 15:20:22 +0100110
111 mb();
Imre Deakf5ddf692013-02-18 19:28:01 +0200112 for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)
Imre Deak2db76d72013-03-26 15:14:18 +0200113 drm_clflush_page(sg_page_iter_page(&sg_iter));
Chris Wilson9da3da62012-06-01 15:20:22 +0100114 mb();
115
116 return;
117 }
118
Ben Widawskyb04d4a32014-12-15 12:26:46 -0800119 if (wbinvd_on_all_cpus())
Chris Wilson9da3da62012-06-01 15:20:22 +0100120 printk(KERN_ERR "Timed out waiting for cache flush.\n");
121#else
122 printk(KERN_ERR "Architecture has no drm_cache.c support\n");
123 WARN_ON_ONCE(1);
124#endif
125}
126EXPORT_SYMBOL(drm_clflush_sg);
127
128void
Ville Syrjäläc2d15352014-04-01 12:59:08 +0300129drm_clflush_virt_range(void *addr, unsigned long length)
Daniel Vetter6d5cd9c2012-03-25 19:47:30 +0200130{
131#if defined(CONFIG_X86)
132 if (cpu_has_clflush) {
Chris Wilsonafcd9502015-06-10 15:58:01 +0100133 const int size = boot_cpu_data.x86_clflush_size;
Ville Syrjäläc2d15352014-04-01 12:59:08 +0300134 void *end = addr + length;
Chris Wilsonafcd9502015-06-10 15:58:01 +0100135 addr = (void *)(((unsigned long)addr) & -size);
Daniel Vetter6d5cd9c2012-03-25 19:47:30 +0200136 mb();
Chris Wilsonafcd9502015-06-10 15:58:01 +0100137 for (; addr < end; addr += size)
Ross Zwisler79270962014-05-14 09:41:12 -0600138 clflushopt(addr);
Daniel Vetter6d5cd9c2012-03-25 19:47:30 +0200139 mb();
140 return;
141 }
142
Ben Widawskyb04d4a32014-12-15 12:26:46 -0800143 if (wbinvd_on_all_cpus())
Daniel Vetter6d5cd9c2012-03-25 19:47:30 +0200144 printk(KERN_ERR "Timed out waiting for cache flush.\n");
145#else
146 printk(KERN_ERR "Architecture has no drm_cache.c support\n");
147 WARN_ON_ONCE(1);
148#endif
149}
150EXPORT_SYMBOL(drm_clflush_virt_range);