Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Red Hat Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Ben Skeggs |
| 23 | */ |
| 24 | |
Ben Skeggs | fdb751e | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 25 | #include <nvif/os.h> |
| 26 | #include <nvif/class.h> |
Ben Skeggs | f58ddf9 | 2015-08-20 14:54:16 +1000 | [diff] [blame] | 27 | #include <nvif/ioctl.h> |
Ben Skeggs | fdb751e | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 28 | |
| 29 | /*XXX*/ |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 30 | #include <core/client.h> |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 31 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 32 | #include "nouveau_drm.h" |
| 33 | #include "nouveau_dma.h" |
| 34 | #include "nouveau_bo.h" |
| 35 | #include "nouveau_chan.h" |
| 36 | #include "nouveau_fence.h" |
| 37 | #include "nouveau_abi16.h" |
| 38 | |
| 39 | MODULE_PARM_DESC(vram_pushbuf, "Create DMA push buffers in VRAM"); |
Pierre Moreau | 703fa26 | 2014-08-18 22:43:24 +0200 | [diff] [blame] | 40 | int nouveau_vram_pushbuf; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 41 | module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400); |
| 42 | |
| 43 | int |
| 44 | nouveau_channel_idle(struct nouveau_channel *chan) |
| 45 | { |
Ben Skeggs | fbd58eb | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 46 | if (likely(chan && chan->fence)) { |
| 47 | struct nouveau_cli *cli = (void *)chan->user.client; |
| 48 | struct nouveau_fence *fence = NULL; |
| 49 | int ret; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 50 | |
Ben Skeggs | fbd58eb | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 51 | ret = nouveau_fence_new(chan, false, &fence); |
| 52 | if (!ret) { |
| 53 | ret = nouveau_fence_wait(fence, false, false); |
| 54 | nouveau_fence_unref(&fence); |
| 55 | } |
| 56 | |
| 57 | if (ret) { |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 58 | NV_PRINTK(err, cli, "failed to idle channel %d [%s]\n", |
| 59 | chan->chid, nvxx_client(&cli->base)->name); |
Ben Skeggs | fbd58eb | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 60 | return ret; |
| 61 | } |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 62 | } |
Ben Skeggs | fbd58eb | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 63 | return 0; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | void |
| 67 | nouveau_channel_del(struct nouveau_channel **pchan) |
| 68 | { |
| 69 | struct nouveau_channel *chan = *pchan; |
| 70 | if (chan) { |
Ben Skeggs | fbd58eb | 2015-08-20 14:54:22 +1000 | [diff] [blame] | 71 | if (chan->fence) |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 72 | nouveau_fence(chan->drm)->context_del(chan); |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 73 | nvif_object_fini(&chan->nvsw); |
| 74 | nvif_object_fini(&chan->gart); |
| 75 | nvif_object_fini(&chan->vram); |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 76 | nvif_object_fini(&chan->user); |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 77 | nvif_object_fini(&chan->push.ctxdma); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 78 | nouveau_bo_vma_del(chan->push.buffer, &chan->push.vma); |
| 79 | nouveau_bo_unmap(chan->push.buffer); |
Marcin Slusarz | 124ea29 | 2012-11-25 23:02:28 +0100 | [diff] [blame] | 80 | if (chan->push.buffer && chan->push.buffer->pin_refcnt) |
| 81 | nouveau_bo_unpin(chan->push.buffer); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 82 | nouveau_bo_ref(NULL, &chan->push.buffer); |
| 83 | kfree(chan); |
| 84 | } |
| 85 | *pchan = NULL; |
| 86 | } |
| 87 | |
| 88 | static int |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 89 | nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device, |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 90 | u32 size, struct nouveau_channel **pchan) |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 91 | { |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 92 | struct nouveau_cli *cli = (void *)device->object.client; |
Ben Skeggs | be83cd4 | 2015-01-14 15:36:34 +1000 | [diff] [blame] | 93 | struct nvkm_mmu *mmu = nvxx_mmu(device); |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 94 | struct nv_dma_v0 args = {}; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 95 | struct nouveau_channel *chan; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 96 | u32 target; |
| 97 | int ret; |
| 98 | |
| 99 | chan = *pchan = kzalloc(sizeof(*chan), GFP_KERNEL); |
| 100 | if (!chan) |
| 101 | return -ENOMEM; |
| 102 | |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 103 | chan->device = device; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 104 | chan->drm = drm; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 105 | |
| 106 | /* allocate memory for dma push buffer */ |
Alexandre Courbot | a81349a | 2014-10-27 18:49:18 +0900 | [diff] [blame] | 107 | target = TTM_PL_FLAG_TT | TTM_PL_FLAG_UNCACHED; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 108 | if (nouveau_vram_pushbuf) |
| 109 | target = TTM_PL_FLAG_VRAM; |
| 110 | |
Maarten Lankhorst | bb6178b | 2014-01-09 11:03:15 +0100 | [diff] [blame] | 111 | ret = nouveau_bo_new(drm->dev, size, 0, target, 0, 0, NULL, NULL, |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 112 | &chan->push.buffer); |
| 113 | if (ret == 0) { |
Ben Skeggs | ad76b3f | 2014-11-10 11:24:27 +1000 | [diff] [blame] | 114 | ret = nouveau_bo_pin(chan->push.buffer, target, false); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 115 | if (ret == 0) |
| 116 | ret = nouveau_bo_map(chan->push.buffer); |
| 117 | } |
| 118 | |
| 119 | if (ret) { |
| 120 | nouveau_channel_del(pchan); |
| 121 | return ret; |
| 122 | } |
| 123 | |
| 124 | /* create dma object covering the *entire* memory space that the |
| 125 | * pushbuf lives in, this is because the GEM code requires that |
| 126 | * we be able to call out to other (indirect) push buffers |
| 127 | */ |
| 128 | chan->push.vma.offset = chan->push.buffer->bo.offset; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 129 | |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 130 | if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 131 | ret = nouveau_bo_vma_add(chan->push.buffer, cli->vm, |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 132 | &chan->push.vma); |
| 133 | if (ret) { |
| 134 | nouveau_channel_del(pchan); |
| 135 | return ret; |
| 136 | } |
| 137 | |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 138 | args.target = NV_DMA_V0_TARGET_VM; |
| 139 | args.access = NV_DMA_V0_ACCESS_VM; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 140 | args.start = 0; |
Ben Skeggs | 5ce3bf3 | 2015-01-14 09:57:36 +1000 | [diff] [blame] | 141 | args.limit = cli->vm->mmu->limit - 1; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 142 | } else |
| 143 | if (chan->push.buffer->bo.mem.mem_type == TTM_PL_VRAM) { |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 144 | if (device->info.family == NV_DEVICE_INFO_V0_TNT) { |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 145 | /* nv04 vram pushbuf hack, retarget to its location in |
| 146 | * the framebuffer bar rather than direct vram access.. |
| 147 | * nfi why this exists, it came from the -nv ddx. |
| 148 | */ |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 149 | args.target = NV_DMA_V0_TARGET_PCI; |
| 150 | args.access = NV_DMA_V0_ACCESS_RDWR; |
Ben Skeggs | 7e8820f | 2015-08-20 14:54:23 +1000 | [diff] [blame] | 151 | args.start = nvxx_device(device)->func-> |
| 152 | resource_addr(nvxx_device(device), 1); |
Ben Skeggs | f392ec4 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 153 | args.limit = args.start + device->info.ram_user - 1; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 154 | } else { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 155 | args.target = NV_DMA_V0_TARGET_VRAM; |
| 156 | args.access = NV_DMA_V0_ACCESS_RDWR; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 157 | args.start = 0; |
Ben Skeggs | f392ec4 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 158 | args.limit = device->info.ram_user - 1; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 159 | } |
| 160 | } else { |
Ben Skeggs | 340b0e7c | 2015-08-20 14:54:23 +1000 | [diff] [blame] | 161 | if (chan->drm->agp.bridge) { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 162 | args.target = NV_DMA_V0_TARGET_AGP; |
| 163 | args.access = NV_DMA_V0_ACCESS_RDWR; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 164 | args.start = chan->drm->agp.base; |
| 165 | args.limit = chan->drm->agp.base + |
| 166 | chan->drm->agp.size - 1; |
| 167 | } else { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 168 | args.target = NV_DMA_V0_TARGET_VM; |
| 169 | args.access = NV_DMA_V0_ACCESS_RDWR; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 170 | args.start = 0; |
Ben Skeggs | 5ce3bf3 | 2015-01-14 09:57:36 +1000 | [diff] [blame] | 171 | args.limit = mmu->limit - 1; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 172 | } |
| 173 | } |
| 174 | |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 175 | ret = nvif_object_init(&device->object, 0, NV_DMA_FROM_MEMORY, |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 176 | &args, sizeof(args), &chan->push.ctxdma); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 177 | if (ret) { |
| 178 | nouveau_channel_del(pchan); |
| 179 | return ret; |
| 180 | } |
| 181 | |
| 182 | return 0; |
| 183 | } |
| 184 | |
Marcin Slusarz | 5b8a43a | 2012-08-19 23:00:00 +0200 | [diff] [blame] | 185 | static int |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 186 | nouveau_channel_ind(struct nouveau_drm *drm, struct nvif_device *device, |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 187 | u32 engine, struct nouveau_channel **pchan) |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 188 | { |
Ben Skeggs | a1020af | 2015-04-14 11:47:24 +1000 | [diff] [blame] | 189 | static const u16 oclasses[] = { MAXWELL_CHANNEL_GPFIFO_A, |
| 190 | KEPLER_CHANNEL_GPFIFO_A, |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 191 | FERMI_CHANNEL_GPFIFO, |
| 192 | G82_CHANNEL_GPFIFO, |
| 193 | NV50_CHANNEL_GPFIFO, |
Ben Skeggs | c97f8c9 | 2012-08-19 16:03:00 +1000 | [diff] [blame] | 194 | 0 }; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 195 | const u16 *oclass = oclasses; |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 196 | union { |
| 197 | struct nv50_channel_gpfifo_v0 nv50; |
Ben Skeggs | 159045c | 2015-08-20 14:54:16 +1000 | [diff] [blame] | 198 | struct fermi_channel_gpfifo_v0 fermi; |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 199 | struct kepler_channel_gpfifo_a_v0 kepler; |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 200 | } args; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 201 | struct nouveau_channel *chan; |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 202 | u32 size; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 203 | int ret; |
| 204 | |
| 205 | /* allocate dma push buffer */ |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 206 | ret = nouveau_channel_prep(drm, device, 0x12000, &chan); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 207 | *pchan = chan; |
| 208 | if (ret) |
| 209 | return ret; |
| 210 | |
| 211 | /* create channel object */ |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 212 | do { |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 213 | if (oclass[0] >= KEPLER_CHANNEL_GPFIFO_A) { |
| 214 | args.kepler.version = 0; |
| 215 | args.kepler.engine = engine; |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 216 | args.kepler.ilength = 0x02000; |
| 217 | args.kepler.ioffset = 0x10000 + chan->push.vma.offset; |
Ben Skeggs | 159045c | 2015-08-20 14:54:16 +1000 | [diff] [blame] | 218 | args.kepler.vm = 0; |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 219 | size = sizeof(args.kepler); |
Ben Skeggs | 159045c | 2015-08-20 14:54:16 +1000 | [diff] [blame] | 220 | } else |
| 221 | if (oclass[0] >= FERMI_CHANNEL_GPFIFO) { |
| 222 | args.fermi.version = 0; |
| 223 | args.fermi.ilength = 0x02000; |
| 224 | args.fermi.ioffset = 0x10000 + chan->push.vma.offset; |
| 225 | args.fermi.vm = 0; |
| 226 | size = sizeof(args.fermi); |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 227 | } else { |
| 228 | args.nv50.version = 0; |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 229 | args.nv50.ilength = 0x02000; |
| 230 | args.nv50.ioffset = 0x10000 + chan->push.vma.offset; |
Ben Skeggs | 159045c | 2015-08-20 14:54:16 +1000 | [diff] [blame] | 231 | args.nv50.pushbuf = nvif_handle(&chan->push.ctxdma); |
| 232 | args.nv50.vm = 0; |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 233 | size = sizeof(args.nv50); |
| 234 | } |
| 235 | |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 236 | ret = nvif_object_init(&device->object, 0, *oclass++, |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 237 | &args, size, &chan->user); |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 238 | if (ret == 0) { |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 239 | if (chan->user.oclass >= KEPLER_CHANNEL_GPFIFO_A) |
| 240 | chan->chid = args.kepler.chid; |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 241 | else |
Ben Skeggs | 159045c | 2015-08-20 14:54:16 +1000 | [diff] [blame] | 242 | if (chan->user.oclass >= FERMI_CHANNEL_GPFIFO) |
| 243 | chan->chid = args.fermi.chid; |
| 244 | else |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 245 | chan->chid = args.nv50.chid; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 246 | return ret; |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 247 | } |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 248 | } while (*oclass); |
| 249 | |
| 250 | nouveau_channel_del(pchan); |
| 251 | return ret; |
| 252 | } |
| 253 | |
| 254 | static int |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 255 | nouveau_channel_dma(struct nouveau_drm *drm, struct nvif_device *device, |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 256 | struct nouveau_channel **pchan) |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 257 | { |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 258 | static const u16 oclasses[] = { NV40_CHANNEL_DMA, |
| 259 | NV17_CHANNEL_DMA, |
| 260 | NV10_CHANNEL_DMA, |
| 261 | NV03_CHANNEL_DMA, |
Ben Skeggs | c97f8c9 | 2012-08-19 16:03:00 +1000 | [diff] [blame] | 262 | 0 }; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 263 | const u16 *oclass = oclasses; |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 264 | struct nv03_channel_dma_v0 args; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 265 | struct nouveau_channel *chan; |
| 266 | int ret; |
| 267 | |
| 268 | /* allocate dma push buffer */ |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 269 | ret = nouveau_channel_prep(drm, device, 0x10000, &chan); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 270 | *pchan = chan; |
| 271 | if (ret) |
| 272 | return ret; |
| 273 | |
| 274 | /* create channel object */ |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 275 | args.version = 0; |
Ben Skeggs | bf81df9 | 2015-08-20 14:54:16 +1000 | [diff] [blame] | 276 | args.pushbuf = nvif_handle(&chan->push.ctxdma); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 277 | args.offset = chan->push.vma.offset; |
| 278 | |
| 279 | do { |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 280 | ret = nvif_object_init(&device->object, 0, *oclass++, |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 281 | &args, sizeof(args), &chan->user); |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 282 | if (ret == 0) { |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 283 | chan->chid = args.chid; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 284 | return ret; |
Ben Skeggs | bbf8906 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 285 | } |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 286 | } while (ret && *oclass); |
| 287 | |
| 288 | nouveau_channel_del(pchan); |
| 289 | return ret; |
| 290 | } |
| 291 | |
| 292 | static int |
| 293 | nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart) |
| 294 | { |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 295 | struct nvif_device *device = chan->device; |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 296 | struct nouveau_cli *cli = (void *)chan->user.client; |
Ben Skeggs | be83cd4 | 2015-01-14 15:36:34 +1000 | [diff] [blame] | 297 | struct nvkm_mmu *mmu = nvxx_mmu(device); |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 298 | struct nv_dma_v0 args = {}; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 299 | int ret, i; |
| 300 | |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 301 | nvif_object_map(&chan->user); |
Ben Skeggs | 6c6ae06 | 2014-08-10 04:10:25 +1000 | [diff] [blame] | 302 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 303 | /* allocate dma objects to cover all allowed vram, and gart */ |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 304 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
| 305 | if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 306 | args.target = NV_DMA_V0_TARGET_VM; |
| 307 | args.access = NV_DMA_V0_ACCESS_VM; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 308 | args.start = 0; |
Ben Skeggs | 5ce3bf3 | 2015-01-14 09:57:36 +1000 | [diff] [blame] | 309 | args.limit = cli->vm->mmu->limit - 1; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 310 | } else { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 311 | args.target = NV_DMA_V0_TARGET_VRAM; |
| 312 | args.access = NV_DMA_V0_ACCESS_RDWR; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 313 | args.start = 0; |
Ben Skeggs | f392ec4 | 2014-08-10 04:10:28 +1000 | [diff] [blame] | 314 | args.limit = device->info.ram_user - 1; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 315 | } |
| 316 | |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 317 | ret = nvif_object_init(&chan->user, vram, NV_DMA_IN_MEMORY, |
| 318 | &args, sizeof(args), &chan->vram); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 319 | if (ret) |
| 320 | return ret; |
| 321 | |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 322 | if (device->info.family >= NV_DEVICE_INFO_V0_TESLA) { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 323 | args.target = NV_DMA_V0_TARGET_VM; |
| 324 | args.access = NV_DMA_V0_ACCESS_VM; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 325 | args.start = 0; |
Ben Skeggs | 5ce3bf3 | 2015-01-14 09:57:36 +1000 | [diff] [blame] | 326 | args.limit = cli->vm->mmu->limit - 1; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 327 | } else |
Ben Skeggs | 340b0e7c | 2015-08-20 14:54:23 +1000 | [diff] [blame] | 328 | if (chan->drm->agp.bridge) { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 329 | args.target = NV_DMA_V0_TARGET_AGP; |
| 330 | args.access = NV_DMA_V0_ACCESS_RDWR; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 331 | args.start = chan->drm->agp.base; |
| 332 | args.limit = chan->drm->agp.base + |
| 333 | chan->drm->agp.size - 1; |
| 334 | } else { |
Ben Skeggs | 4acfd70 | 2014-08-10 04:10:24 +1000 | [diff] [blame] | 335 | args.target = NV_DMA_V0_TARGET_VM; |
| 336 | args.access = NV_DMA_V0_ACCESS_RDWR; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 337 | args.start = 0; |
Ben Skeggs | 5ce3bf3 | 2015-01-14 09:57:36 +1000 | [diff] [blame] | 338 | args.limit = mmu->limit - 1; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 339 | } |
| 340 | |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 341 | ret = nvif_object_init(&chan->user, gart, NV_DMA_IN_MEMORY, |
| 342 | &args, sizeof(args), &chan->gart); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 343 | if (ret) |
| 344 | return ret; |
| 345 | } |
| 346 | |
| 347 | /* initialise dma tracking parameters */ |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 348 | switch (chan->user.oclass & 0x00ff) { |
Ben Skeggs | 503b0f1 | 2012-08-14 14:53:51 +1000 | [diff] [blame] | 349 | case 0x006b: |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 350 | case 0x006e: |
| 351 | chan->user_put = 0x40; |
| 352 | chan->user_get = 0x44; |
| 353 | chan->dma.max = (0x10000 / 4) - 2; |
| 354 | break; |
| 355 | default: |
| 356 | chan->user_put = 0x40; |
| 357 | chan->user_get = 0x44; |
| 358 | chan->user_get_hi = 0x60; |
| 359 | chan->dma.ib_base = 0x10000 / 4; |
| 360 | chan->dma.ib_max = (0x02000 / 8) - 1; |
| 361 | chan->dma.ib_put = 0; |
| 362 | chan->dma.ib_free = chan->dma.ib_max - chan->dma.ib_put; |
| 363 | chan->dma.max = chan->dma.ib_base; |
| 364 | break; |
| 365 | } |
| 366 | |
| 367 | chan->dma.put = 0; |
| 368 | chan->dma.cur = chan->dma.put; |
| 369 | chan->dma.free = chan->dma.max - chan->dma.cur; |
| 370 | |
| 371 | ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS); |
| 372 | if (ret) |
| 373 | return ret; |
| 374 | |
| 375 | for (i = 0; i < NOUVEAU_DMA_SKIPS; i++) |
| 376 | OUT_RING(chan, 0x00000000); |
| 377 | |
Ben Skeggs | 69a6146 | 2013-11-13 10:58:51 +1000 | [diff] [blame] | 378 | /* allocate software object class (used for fences on <= nv05) */ |
Ben Skeggs | 967e7bd | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 379 | if (device->info.family < NV_DEVICE_INFO_V0_CELSIUS) { |
Ben Skeggs | f58ddf9 | 2015-08-20 14:54:16 +1000 | [diff] [blame] | 380 | ret = nvif_object_init(&chan->user, 0x006e, |
| 381 | NVIF_IOCTL_NEW_V0_SW_NV04, |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 382 | NULL, 0, &chan->nvsw); |
Ben Skeggs | 4998104 | 2012-08-06 19:38:25 +1000 | [diff] [blame] | 383 | if (ret) |
| 384 | return ret; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 385 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 386 | ret = RING_SPACE(chan, 2); |
| 387 | if (ret) |
| 388 | return ret; |
| 389 | |
| 390 | BEGIN_NV04(chan, NvSubSw, 0x0000, 1); |
Ben Skeggs | f45f55c | 2014-08-10 04:10:23 +1000 | [diff] [blame] | 391 | OUT_RING (chan, chan->nvsw.handle); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 392 | FIRE_RING (chan); |
| 393 | } |
| 394 | |
| 395 | /* initialise synchronisation */ |
Ben Skeggs | 4894f66 | 2014-10-20 15:49:33 +1000 | [diff] [blame] | 396 | return nouveau_fence(chan->drm)->context_new(chan); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 397 | } |
| 398 | |
| 399 | int |
Ben Skeggs | 0ad7286 | 2014-08-10 04:10:22 +1000 | [diff] [blame] | 400 | nouveau_channel_new(struct nouveau_drm *drm, struct nvif_device *device, |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 401 | u32 arg0, u32 arg1, struct nouveau_channel **pchan) |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 402 | { |
Ben Skeggs | a01ca78 | 2015-08-20 14:54:15 +1000 | [diff] [blame] | 403 | struct nouveau_cli *cli = (void *)device->object.client; |
Ben Skeggs | 67e26e4 | 2014-10-20 15:49:33 +1000 | [diff] [blame] | 404 | bool super; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 405 | int ret; |
| 406 | |
Ben Skeggs | 67e26e4 | 2014-10-20 15:49:33 +1000 | [diff] [blame] | 407 | /* hack until fencenv50 is fixed, and agp access relaxed */ |
| 408 | super = cli->base.super; |
| 409 | cli->base.super = true; |
| 410 | |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 411 | ret = nouveau_channel_ind(drm, device, arg0, pchan); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 412 | if (ret) { |
Ben Skeggs | 9ad97ed | 2015-08-20 14:54:13 +1000 | [diff] [blame] | 413 | NV_PRINTK(dbg, cli, "ib channel create, %d\n", ret); |
Ben Skeggs | fcf3f91 | 2015-09-04 14:40:32 +1000 | [diff] [blame] | 414 | ret = nouveau_channel_dma(drm, device, pchan); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 415 | if (ret) { |
Ben Skeggs | 9ad97ed | 2015-08-20 14:54:13 +1000 | [diff] [blame] | 416 | NV_PRINTK(dbg, cli, "dma channel create, %d\n", ret); |
Ben Skeggs | 67e26e4 | 2014-10-20 15:49:33 +1000 | [diff] [blame] | 417 | goto done; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 418 | } |
| 419 | } |
| 420 | |
Ben Skeggs | 4998104 | 2012-08-06 19:38:25 +1000 | [diff] [blame] | 421 | ret = nouveau_channel_init(*pchan, arg0, arg1); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 422 | if (ret) { |
Ben Skeggs | 9ad97ed | 2015-08-20 14:54:13 +1000 | [diff] [blame] | 423 | NV_PRINTK(err, cli, "channel failed to initialise, %d\n", ret); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 424 | nouveau_channel_del(pchan); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 425 | } |
| 426 | |
Ben Skeggs | 67e26e4 | 2014-10-20 15:49:33 +1000 | [diff] [blame] | 427 | done: |
| 428 | cli->base.super = super; |
| 429 | return ret; |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 430 | } |