blob: 952e0f857ac9d9545750bbd5f197df6034a99913 [file] [log] [blame]
Robert P. J. Day96532ba2008-02-03 15:06:26 +02001#ifndef _LINUX_DMA_MAPPING_H
2#define _LINUX_DMA_MAPPING_H
Linus Torvalds1da177e2005-04-16 15:20:36 -07003
4#include <linux/device.h>
5#include <linux/err.h>
6
7/* These definitions mirror those in pci.h, so they can be used
8 * interchangeably with their PCI_ counterparts */
9enum dma_data_direction {
10 DMA_BIDIRECTIONAL = 0,
11 DMA_TO_DEVICE = 1,
12 DMA_FROM_DEVICE = 2,
13 DMA_NONE = 3,
14};
15
Andrew Morton8f286c32007-10-18 03:05:07 -070016#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
Borislav Petkov34c65382007-10-18 03:05:06 -070017
Andrew Morton8f286c32007-10-18 03:05:07 -070018/*
19 * NOTE: do not use the below macros in new code and do not add new definitions
20 * here.
21 *
22 * Instead, just open-code DMA_BIT_MASK(n) within your driver
23 */
24#define DMA_64BIT_MASK DMA_BIT_MASK(64)
Borislav Petkov34c65382007-10-18 03:05:06 -070025#define DMA_48BIT_MASK DMA_BIT_MASK(48)
26#define DMA_47BIT_MASK DMA_BIT_MASK(47)
27#define DMA_40BIT_MASK DMA_BIT_MASK(40)
28#define DMA_39BIT_MASK DMA_BIT_MASK(39)
29#define DMA_35BIT_MASK DMA_BIT_MASK(35)
30#define DMA_32BIT_MASK DMA_BIT_MASK(32)
31#define DMA_31BIT_MASK DMA_BIT_MASK(31)
32#define DMA_30BIT_MASK DMA_BIT_MASK(30)
33#define DMA_29BIT_MASK DMA_BIT_MASK(29)
34#define DMA_28BIT_MASK DMA_BIT_MASK(28)
35#define DMA_24BIT_MASK DMA_BIT_MASK(24)
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
James Bottomley32e8f702007-10-16 01:23:55 -070037#define DMA_MASK_NONE 0x0ULL
38
Rolf Eike Beerd6bd3a32006-09-29 01:59:48 -070039static inline int valid_dma_direction(int dma_direction)
40{
41 return ((dma_direction == DMA_BIDIRECTIONAL) ||
42 (dma_direction == DMA_TO_DEVICE) ||
43 (dma_direction == DMA_FROM_DEVICE));
44}
45
James Bottomley32e8f702007-10-16 01:23:55 -070046static inline int is_device_dma_capable(struct device *dev)
47{
48 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
49}
50
Dan Williams1b0fac42007-07-15 23:40:26 -070051#ifdef CONFIG_HAS_DMA
Linus Torvalds1da177e2005-04-16 15:20:36 -070052#include <asm/dma-mapping.h>
Dan Williams1b0fac42007-07-15 23:40:26 -070053#else
54#include <asm-generic/dma-mapping-broken.h>
55#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070056
57/* Backwards compat, remove in 2.7.x */
58#define dma_sync_single dma_sync_single_for_cpu
59#define dma_sync_sg dma_sync_sg_for_cpu
60
61extern u64 dma_get_required_mask(struct device *dev);
62
FUJITA Tomonori6b7b6512008-02-04 22:27:55 -080063static inline unsigned int dma_get_max_seg_size(struct device *dev)
64{
65 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
66}
67
68static inline unsigned int dma_set_max_seg_size(struct device *dev,
69 unsigned int size)
70{
71 if (dev->dma_parms) {
72 dev->dma_parms->max_segment_size = size;
73 return 0;
74 } else
75 return -EIO;
76}
77
FUJITA Tomonorid22a6962008-02-04 22:28:13 -080078static inline unsigned long dma_get_seg_boundary(struct device *dev)
79{
80 return dev->dma_parms ?
81 dev->dma_parms->segment_boundary_mask : 0xffffffff;
82}
83
84static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
85{
86 if (dev->dma_parms) {
87 dev->dma_parms->segment_boundary_mask = mask;
88 return 0;
89 } else
90 return -EIO;
91}
92
Linus Torvalds1da177e2005-04-16 15:20:36 -070093/* flags for the coherent memory api */
94#define DMA_MEMORY_MAP 0x01
95#define DMA_MEMORY_IO 0x02
96#define DMA_MEMORY_INCLUDES_CHILDREN 0x04
97#define DMA_MEMORY_EXCLUSIVE 0x08
98
99#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
100static inline int
101dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
102 dma_addr_t device_addr, size_t size, int flags)
103{
104 return 0;
105}
106
107static inline void
108dma_release_declared_memory(struct device *dev)
109{
110}
111
112static inline void *
113dma_mark_declared_memory_occupied(struct device *dev,
114 dma_addr_t device_addr, size_t size)
115{
116 return ERR_PTR(-EBUSY);
117}
118#endif
119
Tejun Heo9ac78492007-01-20 16:00:26 +0900120/*
121 * Managed DMA API
122 */
123extern void *dmam_alloc_coherent(struct device *dev, size_t size,
124 dma_addr_t *dma_handle, gfp_t gfp);
125extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
126 dma_addr_t dma_handle);
127extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
128 dma_addr_t *dma_handle, gfp_t gfp);
129extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
130 dma_addr_t dma_handle);
131#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
132extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
133 dma_addr_t device_addr, size_t size,
134 int flags);
135extern void dmam_release_declared_memory(struct device *dev);
136#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
137static inline int dmam_declare_coherent_memory(struct device *dev,
138 dma_addr_t bus_addr, dma_addr_t device_addr,
139 size_t size, gfp_t gfp)
140{
141 return 0;
142}
143
144static inline void dmam_release_declared_memory(struct device *dev)
145{
146}
147#endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
148
Arthur Kepner74bc7ce2008-04-29 01:00:30 -0700149#ifndef CONFIG_HAVE_DMA_ATTRS
150struct dma_attrs;
151
152#define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
153 dma_map_single(dev, cpu_addr, size, dir)
154
155#define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
156 dma_unmap_single(dev, dma_addr, size, dir)
157
158#define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
159 dma_map_sg(dev, sgl, nents, dir)
160
161#define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
162 dma_unmap_sg(dev, sgl, nents, dir)
163
164#endif /* CONFIG_HAVE_DMA_ATTRS */
165
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166#endif