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Pete Popov26a940e2005-09-15 08:03:12 +00001/*
Pete Popov26a940e2005-09-15 08:03:12 +00002 * BRIEF MODULE DESCRIPTION
3 * AMD Alchemy Au1xxx IDE interface routines over the Static Bus
4 *
5 * Copyright (c) 2003-2005 AMD, Personal Connectivity Solutions
6 *
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License as published by the Free Software
9 * Foundation; either version 2 of the License, or (at your option) any later
10 * version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
13 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
14 * FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR
15 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
16 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
17 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
18 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
19 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
20 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
21 * POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along with
24 * this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 *
27 * Note: for more information, please refer "AMD Alchemy Au1200/Au1550 IDE
28 * Interface and Linux Device Driver" Application Note.
29 */
Pete Popov26a940e2005-09-15 08:03:12 +000030#include <linux/types.h>
31#include <linux/module.h>
32#include <linux/kernel.h>
33#include <linux/delay.h>
Jordan Crouse8f29e652005-12-15 02:17:46 +010034#include <linux/platform_device.h>
Pete Popov26a940e2005-09-15 08:03:12 +000035#include <linux/init.h>
36#include <linux/ide.h>
Sergei Shtylyovfabd3a22008-04-17 01:14:33 +020037#include <linux/scatterlist.h>
Pete Popov26a940e2005-09-15 08:03:12 +000038
Pete Popov26a940e2005-09-15 08:03:12 +000039#include <asm/mach-au1x00/au1xxx.h>
40#include <asm/mach-au1x00/au1xxx_dbdma.h>
Pete Popov26a940e2005-09-15 08:03:12 +000041#include <asm/mach-au1x00/au1xxx_ide.h>
42
43#define DRV_NAME "au1200-ide"
Jordan Crouse8f29e652005-12-15 02:17:46 +010044#define DRV_AUTHOR "Enrico Walther <enrico.walther@amd.com> / Pete Popov <ppopov@embeddedalley.com>"
45
46/* enable the burstmode in the dbdma */
47#define IDE_AU1XXX_BURSTMODE 1
Pete Popov26a940e2005-09-15 08:03:12 +000048
49static _auide_hwif auide_hwif;
Pete Popov26a940e2005-09-15 08:03:12 +000050
Jordan Crouse8f29e652005-12-15 02:17:46 +010051#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA)
Pete Popov26a940e2005-09-15 08:03:12 +000052
53void auide_insw(unsigned long port, void *addr, u32 count)
54{
Jordan Crouse8f29e652005-12-15 02:17:46 +010055 _auide_hwif *ahwif = &auide_hwif;
56 chan_tab_t *ctp;
57 au1x_ddma_desc_t *dp;
Pete Popov26a940e2005-09-15 08:03:12 +000058
Jordan Crouse8f29e652005-12-15 02:17:46 +010059 if(!put_dest_flags(ahwif->rx_chan, (void*)addr, count << 1,
60 DDMA_FLAGS_NOIE)) {
Harvey Harrisoneb639632008-04-26 22:25:20 +020061 printk(KERN_ERR "%s failed %d\n", __func__, __LINE__);
Jordan Crouse8f29e652005-12-15 02:17:46 +010062 return;
63 }
64 ctp = *((chan_tab_t **)ahwif->rx_chan);
65 dp = ctp->cur_ptr;
66 while (dp->dscr_cmd0 & DSCR_CMD0_V)
67 ;
68 ctp->cur_ptr = au1xxx_ddma_get_nextptr_virt(dp);
Pete Popov26a940e2005-09-15 08:03:12 +000069}
70
71void auide_outsw(unsigned long port, void *addr, u32 count)
72{
Jordan Crouse8f29e652005-12-15 02:17:46 +010073 _auide_hwif *ahwif = &auide_hwif;
74 chan_tab_t *ctp;
75 au1x_ddma_desc_t *dp;
Pete Popov26a940e2005-09-15 08:03:12 +000076
Jordan Crouse8f29e652005-12-15 02:17:46 +010077 if(!put_source_flags(ahwif->tx_chan, (void*)addr,
78 count << 1, DDMA_FLAGS_NOIE)) {
Harvey Harrisoneb639632008-04-26 22:25:20 +020079 printk(KERN_ERR "%s failed %d\n", __func__, __LINE__);
Jordan Crouse8f29e652005-12-15 02:17:46 +010080 return;
81 }
82 ctp = *((chan_tab_t **)ahwif->tx_chan);
83 dp = ctp->cur_ptr;
84 while (dp->dscr_cmd0 & DSCR_CMD0_V)
85 ;
86 ctp->cur_ptr = au1xxx_ddma_get_nextptr_virt(dp);
87}
88
Bartlomiej Zolnierkiewicz70f91e02008-04-28 23:44:37 +020089static void au1xxx_input_data(ide_drive_t *drive, struct request *rq,
90 void *buf, unsigned int len)
91{
92 auide_insw(drive->hwif->io_ports.data_addr, buf, (len + 1) / 2);
93}
94
95static void au1xxx_output_data(ide_drive_t *drive, struct request *rq,
96 void *buf, unsigned int len)
97{
98 auide_outsw(drive->hwif->io_ports.data_addr, buf, (len + 1) / 2);
99}
Pete Popov26a940e2005-09-15 08:03:12 +0000100#endif
Pete Popov26a940e2005-09-15 08:03:12 +0000101
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200102static void au1xxx_set_pio_mode(ide_drive_t *drive, const u8 pio)
Pete Popov26a940e2005-09-15 08:03:12 +0000103{
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200104 int mem_sttime = 0, mem_stcfg = au_readl(MEM_STCFG2);
Pete Popov26a940e2005-09-15 08:03:12 +0000105
Jordan Crouse8f29e652005-12-15 02:17:46 +0100106 /* set pio mode! */
107 switch(pio) {
108 case 0:
109 mem_sttime = SBC_IDE_TIMING(PIO0);
Pete Popov26a940e2005-09-15 08:03:12 +0000110
Jordan Crouse8f29e652005-12-15 02:17:46 +0100111 /* set configuration for RCS2# */
112 mem_stcfg |= TS_MASK;
113 mem_stcfg &= ~TCSOE_MASK;
114 mem_stcfg &= ~TOECS_MASK;
115 mem_stcfg |= SBC_IDE_PIO0_TCSOE | SBC_IDE_PIO0_TOECS;
116 break;
Pete Popov26a940e2005-09-15 08:03:12 +0000117
Jordan Crouse8f29e652005-12-15 02:17:46 +0100118 case 1:
119 mem_sttime = SBC_IDE_TIMING(PIO1);
Pete Popov26a940e2005-09-15 08:03:12 +0000120
Jordan Crouse8f29e652005-12-15 02:17:46 +0100121 /* set configuration for RCS2# */
122 mem_stcfg |= TS_MASK;
123 mem_stcfg &= ~TCSOE_MASK;
124 mem_stcfg &= ~TOECS_MASK;
125 mem_stcfg |= SBC_IDE_PIO1_TCSOE | SBC_IDE_PIO1_TOECS;
126 break;
Pete Popov26a940e2005-09-15 08:03:12 +0000127
Jordan Crouse8f29e652005-12-15 02:17:46 +0100128 case 2:
129 mem_sttime = SBC_IDE_TIMING(PIO2);
Pete Popov26a940e2005-09-15 08:03:12 +0000130
Jordan Crouse8f29e652005-12-15 02:17:46 +0100131 /* set configuration for RCS2# */
132 mem_stcfg &= ~TS_MASK;
133 mem_stcfg &= ~TCSOE_MASK;
134 mem_stcfg &= ~TOECS_MASK;
135 mem_stcfg |= SBC_IDE_PIO2_TCSOE | SBC_IDE_PIO2_TOECS;
136 break;
Pete Popov26a940e2005-09-15 08:03:12 +0000137
Jordan Crouse8f29e652005-12-15 02:17:46 +0100138 case 3:
139 mem_sttime = SBC_IDE_TIMING(PIO3);
Pete Popov26a940e2005-09-15 08:03:12 +0000140
Jordan Crouse8f29e652005-12-15 02:17:46 +0100141 /* set configuration for RCS2# */
142 mem_stcfg &= ~TS_MASK;
143 mem_stcfg &= ~TCSOE_MASK;
144 mem_stcfg &= ~TOECS_MASK;
145 mem_stcfg |= SBC_IDE_PIO3_TCSOE | SBC_IDE_PIO3_TOECS;
Pete Popov26a940e2005-09-15 08:03:12 +0000146
Jordan Crouse8f29e652005-12-15 02:17:46 +0100147 break;
Pete Popov26a940e2005-09-15 08:03:12 +0000148
Jordan Crouse8f29e652005-12-15 02:17:46 +0100149 case 4:
150 mem_sttime = SBC_IDE_TIMING(PIO4);
Pete Popov26a940e2005-09-15 08:03:12 +0000151
Jordan Crouse8f29e652005-12-15 02:17:46 +0100152 /* set configuration for RCS2# */
153 mem_stcfg &= ~TS_MASK;
154 mem_stcfg &= ~TCSOE_MASK;
155 mem_stcfg &= ~TOECS_MASK;
156 mem_stcfg |= SBC_IDE_PIO4_TCSOE | SBC_IDE_PIO4_TOECS;
157 break;
158 }
159
160 au_writel(mem_sttime,MEM_STTIME2);
161 au_writel(mem_stcfg,MEM_STCFG2);
Pete Popov26a940e2005-09-15 08:03:12 +0000162}
163
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200164static void auide_set_dma_mode(ide_drive_t *drive, const u8 speed)
Pete Popov26a940e2005-09-15 08:03:12 +0000165{
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200166 int mem_sttime = 0, mem_stcfg = au_readl(MEM_STCFG2);
Pete Popov26a940e2005-09-15 08:03:12 +0000167
Jordan Crouse8f29e652005-12-15 02:17:46 +0100168 switch(speed) {
Pete Popov26a940e2005-09-15 08:03:12 +0000169#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
Jordan Crouse8f29e652005-12-15 02:17:46 +0100170 case XFER_MW_DMA_2:
171 mem_sttime = SBC_IDE_TIMING(MDMA2);
Pete Popov26a940e2005-09-15 08:03:12 +0000172
Jordan Crouse8f29e652005-12-15 02:17:46 +0100173 /* set configuration for RCS2# */
174 mem_stcfg &= ~TS_MASK;
175 mem_stcfg &= ~TCSOE_MASK;
176 mem_stcfg &= ~TOECS_MASK;
177 mem_stcfg |= SBC_IDE_MDMA2_TCSOE | SBC_IDE_MDMA2_TOECS;
Pete Popov26a940e2005-09-15 08:03:12 +0000178
Jordan Crouse8f29e652005-12-15 02:17:46 +0100179 break;
180 case XFER_MW_DMA_1:
181 mem_sttime = SBC_IDE_TIMING(MDMA1);
Pete Popov26a940e2005-09-15 08:03:12 +0000182
Jordan Crouse8f29e652005-12-15 02:17:46 +0100183 /* set configuration for RCS2# */
184 mem_stcfg &= ~TS_MASK;
185 mem_stcfg &= ~TCSOE_MASK;
186 mem_stcfg &= ~TOECS_MASK;
187 mem_stcfg |= SBC_IDE_MDMA1_TCSOE | SBC_IDE_MDMA1_TOECS;
188
Jordan Crouse8f29e652005-12-15 02:17:46 +0100189 break;
190 case XFER_MW_DMA_0:
191 mem_sttime = SBC_IDE_TIMING(MDMA0);
192
193 /* set configuration for RCS2# */
194 mem_stcfg |= TS_MASK;
195 mem_stcfg &= ~TCSOE_MASK;
196 mem_stcfg &= ~TOECS_MASK;
197 mem_stcfg |= SBC_IDE_MDMA0_TCSOE | SBC_IDE_MDMA0_TOECS;
198
Jordan Crouse8f29e652005-12-15 02:17:46 +0100199 break;
Pete Popov26a940e2005-09-15 08:03:12 +0000200#endif
Jordan Crouse8f29e652005-12-15 02:17:46 +0100201 }
Bartlomiej Zolnierkiewicza523a172007-02-17 02:40:23 +0100202
Jordan Crouse8f29e652005-12-15 02:17:46 +0100203 au_writel(mem_sttime,MEM_STTIME2);
204 au_writel(mem_stcfg,MEM_STCFG2);
Pete Popov26a940e2005-09-15 08:03:12 +0000205}
206
207/*
208 * Multi-Word DMA + DbDMA functions
209 */
Pete Popov26a940e2005-09-15 08:03:12 +0000210
Jordan Crouse8f29e652005-12-15 02:17:46 +0100211#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
Pete Popov26a940e2005-09-15 08:03:12 +0000212static int auide_build_dmatable(ide_drive_t *drive)
213{
Jordan Crouse8f29e652005-12-15 02:17:46 +0100214 int i, iswrite, count = 0;
215 ide_hwif_t *hwif = HWIF(drive);
Jordan Crouse8f29e652005-12-15 02:17:46 +0100216 struct request *rq = HWGROUP(drive)->rq;
Bartlomiej Zolnierkiewicza536f322008-07-16 20:33:40 +0200217 _auide_hwif *ahwif = &auide_hwif;
Jordan Crouse8f29e652005-12-15 02:17:46 +0100218 struct scatterlist *sg;
Pete Popov26a940e2005-09-15 08:03:12 +0000219
Jordan Crouse8f29e652005-12-15 02:17:46 +0100220 iswrite = (rq_data_dir(rq) == WRITE);
221 /* Save for interrupt context */
222 ahwif->drive = drive;
Pete Popov26a940e2005-09-15 08:03:12 +0000223
Bartlomiej Zolnierkiewicz062f9f02008-02-01 23:09:32 +0100224 hwif->sg_nents = i = ide_build_sglist(drive, rq);
Pete Popov26a940e2005-09-15 08:03:12 +0000225
Jordan Crouse8f29e652005-12-15 02:17:46 +0100226 if (!i)
227 return 0;
Pete Popov26a940e2005-09-15 08:03:12 +0000228
Jordan Crouse8f29e652005-12-15 02:17:46 +0100229 /* fill the descriptors */
230 sg = hwif->sg_table;
231 while (i && sg_dma_len(sg)) {
232 u32 cur_addr;
233 u32 cur_len;
Pete Popov26a940e2005-09-15 08:03:12 +0000234
Jordan Crouse8f29e652005-12-15 02:17:46 +0100235 cur_addr = sg_dma_address(sg);
236 cur_len = sg_dma_len(sg);
Pete Popov26a940e2005-09-15 08:03:12 +0000237
Jordan Crouse8f29e652005-12-15 02:17:46 +0100238 while (cur_len) {
239 u32 flags = DDMA_FLAGS_NOIE;
240 unsigned int tc = (cur_len < 0xfe00)? cur_len: 0xfe00;
Pete Popov26a940e2005-09-15 08:03:12 +0000241
Jordan Crouse8f29e652005-12-15 02:17:46 +0100242 if (++count >= PRD_ENTRIES) {
243 printk(KERN_WARNING "%s: DMA table too small\n",
244 drive->name);
245 goto use_pio_instead;
246 }
Pete Popov26a940e2005-09-15 08:03:12 +0000247
Jordan Crouse8f29e652005-12-15 02:17:46 +0100248 /* Lets enable intr for the last descriptor only */
249 if (1==i)
250 flags = DDMA_FLAGS_IE;
251 else
252 flags = DDMA_FLAGS_NOIE;
Pete Popov26a940e2005-09-15 08:03:12 +0000253
Jordan Crouse8f29e652005-12-15 02:17:46 +0100254 if (iswrite) {
255 if(!put_source_flags(ahwif->tx_chan,
Jens Axboe45711f12007-10-22 21:19:53 +0200256 (void*) sg_virt(sg),
Jordan Crouse8f29e652005-12-15 02:17:46 +0100257 tc, flags)) {
258 printk(KERN_ERR "%s failed %d\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200259 __func__, __LINE__);
Pete Popov26a940e2005-09-15 08:03:12 +0000260 }
Jordan Crouse8f29e652005-12-15 02:17:46 +0100261 } else
Pete Popov26a940e2005-09-15 08:03:12 +0000262 {
Jordan Crouse8f29e652005-12-15 02:17:46 +0100263 if(!put_dest_flags(ahwif->rx_chan,
Jens Axboe45711f12007-10-22 21:19:53 +0200264 (void*) sg_virt(sg),
Jordan Crouse8f29e652005-12-15 02:17:46 +0100265 tc, flags)) {
266 printk(KERN_ERR "%s failed %d\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200267 __func__, __LINE__);
Pete Popov26a940e2005-09-15 08:03:12 +0000268 }
Jordan Crouse8f29e652005-12-15 02:17:46 +0100269 }
Pete Popov26a940e2005-09-15 08:03:12 +0000270
Jordan Crouse8f29e652005-12-15 02:17:46 +0100271 cur_addr += tc;
272 cur_len -= tc;
273 }
Jens Axboe55c16a72007-07-25 08:13:56 +0200274 sg = sg_next(sg);
Jordan Crouse8f29e652005-12-15 02:17:46 +0100275 i--;
276 }
Pete Popov26a940e2005-09-15 08:03:12 +0000277
Jordan Crouse8f29e652005-12-15 02:17:46 +0100278 if (count)
279 return 1;
Pete Popov26a940e2005-09-15 08:03:12 +0000280
Jordan Crouse8f29e652005-12-15 02:17:46 +0100281 use_pio_instead:
Bartlomiej Zolnierkiewicz062f9f02008-02-01 23:09:32 +0100282 ide_destroy_dmatable(drive);
Pete Popov26a940e2005-09-15 08:03:12 +0000283
Jordan Crouse8f29e652005-12-15 02:17:46 +0100284 return 0; /* revert to PIO for this request */
Pete Popov26a940e2005-09-15 08:03:12 +0000285}
286
287static int auide_dma_end(ide_drive_t *drive)
288{
Jordan Crouse8f29e652005-12-15 02:17:46 +0100289 ide_hwif_t *hwif = HWIF(drive);
Pete Popov26a940e2005-09-15 08:03:12 +0000290
Jordan Crouse8f29e652005-12-15 02:17:46 +0100291 if (hwif->sg_nents) {
Bartlomiej Zolnierkiewicz062f9f02008-02-01 23:09:32 +0100292 ide_destroy_dmatable(drive);
Jordan Crouse8f29e652005-12-15 02:17:46 +0100293 hwif->sg_nents = 0;
294 }
Pete Popov26a940e2005-09-15 08:03:12 +0000295
Jordan Crouse8f29e652005-12-15 02:17:46 +0100296 return 0;
Pete Popov26a940e2005-09-15 08:03:12 +0000297}
298
299static void auide_dma_start(ide_drive_t *drive )
300{
Pete Popov26a940e2005-09-15 08:03:12 +0000301}
302
Pete Popov26a940e2005-09-15 08:03:12 +0000303
304static void auide_dma_exec_cmd(ide_drive_t *drive, u8 command)
305{
Jordan Crouse8f29e652005-12-15 02:17:46 +0100306 /* issue cmd to drive */
307 ide_execute_command(drive, command, &ide_dma_intr,
308 (2*WAIT_CMD), NULL);
Pete Popov26a940e2005-09-15 08:03:12 +0000309}
310
311static int auide_dma_setup(ide_drive_t *drive)
Jordan Crouse8f29e652005-12-15 02:17:46 +0100312{
313 struct request *rq = HWGROUP(drive)->rq;
Pete Popov26a940e2005-09-15 08:03:12 +0000314
Jordan Crouse8f29e652005-12-15 02:17:46 +0100315 if (!auide_build_dmatable(drive)) {
316 ide_map_sg(drive, rq);
317 return 1;
318 }
Pete Popov26a940e2005-09-15 08:03:12 +0000319
Jordan Crouse8f29e652005-12-15 02:17:46 +0100320 drive->waiting_for_dma = 1;
321 return 0;
Pete Popov26a940e2005-09-15 08:03:12 +0000322}
323
Pete Popov26a940e2005-09-15 08:03:12 +0000324static int auide_dma_test_irq(ide_drive_t *drive)
Bartlomiej Zolnierkiewiczc67c2162008-10-13 21:39:38 +0200325{
Jordan Crouse8f29e652005-12-15 02:17:46 +0100326 /* If dbdma didn't execute the STOP command yet, the
327 * active bit is still set
Pete Popov26a940e2005-09-15 08:03:12 +0000328 */
Jordan Crouse8f29e652005-12-15 02:17:46 +0100329 drive->waiting_for_dma++;
330 if (drive->waiting_for_dma >= DMA_WAIT_TIMEOUT) {
331 printk(KERN_WARNING "%s: timeout waiting for ddma to \
Pete Popov26a940e2005-09-15 08:03:12 +0000332 complete\n", drive->name);
Jordan Crouse8f29e652005-12-15 02:17:46 +0100333 return 1;
334 }
335 udelay(10);
336 return 0;
Pete Popov26a940e2005-09-15 08:03:12 +0000337}
338
Bartlomiej Zolnierkiewicz15ce9262008-01-26 20:13:03 +0100339static void auide_dma_host_set(ide_drive_t *drive, int on)
Pete Popov26a940e2005-09-15 08:03:12 +0000340{
Pete Popov26a940e2005-09-15 08:03:12 +0000341}
342
Ralf Baechle53e62d32006-09-25 23:32:10 -0700343static void auide_ddma_tx_callback(int irq, void *param)
Pete Popov26a940e2005-09-15 08:03:12 +0000344{
Jordan Crouse8f29e652005-12-15 02:17:46 +0100345 _auide_hwif *ahwif = (_auide_hwif*)param;
346 ahwif->drive->waiting_for_dma = 0;
Pete Popov26a940e2005-09-15 08:03:12 +0000347}
348
Ralf Baechle53e62d32006-09-25 23:32:10 -0700349static void auide_ddma_rx_callback(int irq, void *param)
Pete Popov26a940e2005-09-15 08:03:12 +0000350{
Jordan Crouse8f29e652005-12-15 02:17:46 +0100351 _auide_hwif *ahwif = (_auide_hwif*)param;
352 ahwif->drive->waiting_for_dma = 0;
Pete Popov26a940e2005-09-15 08:03:12 +0000353}
354
Jordan Crouse8f29e652005-12-15 02:17:46 +0100355#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA */
356
357static void auide_init_dbdma_dev(dbdev_tab_t *dev, u32 dev_id, u32 tsize, u32 devwidth, u32 flags)
358{
359 dev->dev_id = dev_id;
Sergei Shtylyovfcbd3b42008-04-28 19:54:38 +0400360 dev->dev_physaddr = (u32)IDE_PHYS_ADDR;
Jordan Crouse8f29e652005-12-15 02:17:46 +0100361 dev->dev_intlevel = 0;
362 dev->dev_intpolarity = 0;
363 dev->dev_tsize = tsize;
364 dev->dev_devwidth = devwidth;
365 dev->dev_flags = flags;
366}
Jordan Crouse8f29e652005-12-15 02:17:46 +0100367
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200368#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
Bartlomiej Zolnierkiewiczf37afda2008-04-26 22:25:24 +0200369static const struct ide_dma_ops au1xxx_dma_ops = {
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200370 .dma_host_set = auide_dma_host_set,
371 .dma_setup = auide_dma_setup,
372 .dma_exec_cmd = auide_dma_exec_cmd,
373 .dma_start = auide_dma_start,
374 .dma_end = auide_dma_end,
375 .dma_test_irq = auide_dma_test_irq,
Bartlomiej Zolnierkiewiczde23ec92008-10-13 21:39:46 +0200376 .dma_lost_irq = ide_dma_lost_irq,
Bartlomiej Zolnierkiewiczffa15a62008-10-13 21:39:46 +0200377 .dma_timeout = ide_dma_timeout,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200378};
379
Bartlomiej Zolnierkiewicz85528652008-04-26 22:25:23 +0200380static int auide_ddma_init(ide_hwif_t *hwif, const struct ide_port_info *d)
381{
Bartlomiej Zolnierkiewicza536f322008-07-16 20:33:40 +0200382 _auide_hwif *auide = &auide_hwif;
Jordan Crouse8f29e652005-12-15 02:17:46 +0100383 dbdev_tab_t source_dev_tab, target_dev_tab;
384 u32 dev_id, tsize, devwidth, flags;
Pete Popov26a940e2005-09-15 08:03:12 +0000385
Sergei Shtylyovfcbd3b42008-04-28 19:54:38 +0400386 dev_id = IDE_DDMA_REQ;
Jordan Crouse8f29e652005-12-15 02:17:46 +0100387
Bartlomiej Zolnierkiewiczf629b382008-04-26 22:25:22 +0200388 tsize = 8; /* 1 */
389 devwidth = 32; /* 16 */
Jordan Crouse8f29e652005-12-15 02:17:46 +0100390
391#ifdef IDE_AU1XXX_BURSTMODE
392 flags = DEV_FLAGS_SYNC | DEV_FLAGS_BURSTABLE;
393#else
394 flags = DEV_FLAGS_SYNC;
395#endif
396
397 /* setup dev_tab for tx channel */
398 auide_init_dbdma_dev( &source_dev_tab,
399 dev_id,
400 tsize, devwidth, DEV_FLAGS_OUT | flags);
401 auide->tx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
402
403 auide_init_dbdma_dev( &source_dev_tab,
404 dev_id,
405 tsize, devwidth, DEV_FLAGS_IN | flags);
406 auide->rx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
407
408 /* We also need to add a target device for the DMA */
409 auide_init_dbdma_dev( &target_dev_tab,
410 (u32)DSCR_CMD0_ALWAYS,
411 tsize, devwidth, DEV_FLAGS_ANYUSE);
412 auide->target_dev_id = au1xxx_ddma_add_device(&target_dev_tab);
413
414 /* Get a channel for TX */
415 auide->tx_chan = au1xxx_dbdma_chan_alloc(auide->target_dev_id,
416 auide->tx_dev_id,
417 auide_ddma_tx_callback,
418 (void*)auide);
419
420 /* Get a channel for RX */
421 auide->rx_chan = au1xxx_dbdma_chan_alloc(auide->rx_dev_id,
422 auide->target_dev_id,
423 auide_ddma_rx_callback,
424 (void*)auide);
425
426 auide->tx_desc_head = (void*)au1xxx_dbdma_ring_alloc(auide->tx_chan,
427 NUM_DESCRIPTORS);
428 auide->rx_desc_head = (void*)au1xxx_dbdma_ring_alloc(auide->rx_chan,
429 NUM_DESCRIPTORS);
Bartlomiej Zolnierkiewicz2bbd57c2008-10-13 21:39:47 +0200430
431 /* FIXME: check return value */
432 (void)ide_allocate_dma_engine(hwif);
Jordan Crouse8f29e652005-12-15 02:17:46 +0100433
434 au1xxx_dbdma_start( auide->tx_chan );
435 au1xxx_dbdma_start( auide->rx_chan );
436
437 return 0;
438}
439#else
Bartlomiej Zolnierkiewicz85528652008-04-26 22:25:23 +0200440static int auide_ddma_init(ide_hwif_t *hwif, const struct ide_port_info *d)
Pete Popov26a940e2005-09-15 08:03:12 +0000441{
Bartlomiej Zolnierkiewicza536f322008-07-16 20:33:40 +0200442 _auide_hwif *auide = &auide_hwif;
Jordan Crouse8f29e652005-12-15 02:17:46 +0100443 dbdev_tab_t source_dev_tab;
444 int flags;
Pete Popov26a940e2005-09-15 08:03:12 +0000445
Jordan Crouse8f29e652005-12-15 02:17:46 +0100446#ifdef IDE_AU1XXX_BURSTMODE
447 flags = DEV_FLAGS_SYNC | DEV_FLAGS_BURSTABLE;
Pete Popov26a940e2005-09-15 08:03:12 +0000448#else
Jordan Crouse8f29e652005-12-15 02:17:46 +0100449 flags = DEV_FLAGS_SYNC;
Pete Popov26a940e2005-09-15 08:03:12 +0000450#endif
451
Jordan Crouse8f29e652005-12-15 02:17:46 +0100452 /* setup dev_tab for tx channel */
453 auide_init_dbdma_dev( &source_dev_tab,
454 (u32)DSCR_CMD0_ALWAYS,
455 8, 32, DEV_FLAGS_OUT | flags);
456 auide->tx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
Pete Popov26a940e2005-09-15 08:03:12 +0000457
Jordan Crouse8f29e652005-12-15 02:17:46 +0100458 auide_init_dbdma_dev( &source_dev_tab,
459 (u32)DSCR_CMD0_ALWAYS,
460 8, 32, DEV_FLAGS_IN | flags);
461 auide->rx_dev_id = au1xxx_ddma_add_device( &source_dev_tab );
462
463 /* Get a channel for TX */
464 auide->tx_chan = au1xxx_dbdma_chan_alloc(DSCR_CMD0_ALWAYS,
465 auide->tx_dev_id,
466 NULL,
467 (void*)auide);
468
469 /* Get a channel for RX */
470 auide->rx_chan = au1xxx_dbdma_chan_alloc(auide->rx_dev_id,
471 DSCR_CMD0_ALWAYS,
472 NULL,
473 (void*)auide);
474
475 auide->tx_desc_head = (void*)au1xxx_dbdma_ring_alloc(auide->tx_chan,
476 NUM_DESCRIPTORS);
477 auide->rx_desc_head = (void*)au1xxx_dbdma_ring_alloc(auide->rx_chan,
478 NUM_DESCRIPTORS);
479
480 au1xxx_dbdma_start( auide->tx_chan );
481 au1xxx_dbdma_start( auide->rx_chan );
482
483 return 0;
Pete Popov26a940e2005-09-15 08:03:12 +0000484}
Jordan Crouse8f29e652005-12-15 02:17:46 +0100485#endif
Pete Popov26a940e2005-09-15 08:03:12 +0000486
487static void auide_setup_ports(hw_regs_t *hw, _auide_hwif *ahwif)
488{
Jordan Crouse8f29e652005-12-15 02:17:46 +0100489 int i;
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200490 unsigned long *ata_regs = hw->io_ports_array;
Pete Popov26a940e2005-09-15 08:03:12 +0000491
Jordan Crouse8f29e652005-12-15 02:17:46 +0100492 /* FIXME? */
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200493 for (i = 0; i < 8; i++)
Sergei Shtylyovfcbd3b42008-04-28 19:54:38 +0400494 *ata_regs++ = ahwif->regbase + (i << IDE_REG_SHIFT);
Pete Popov26a940e2005-09-15 08:03:12 +0000495
Jordan Crouse8f29e652005-12-15 02:17:46 +0100496 /* set the Alternative Status register */
Sergei Shtylyovfcbd3b42008-04-28 19:54:38 +0400497 *ata_regs = ahwif->regbase + (14 << IDE_REG_SHIFT);
Pete Popov26a940e2005-09-15 08:03:12 +0000498}
499
Bartlomiej Zolnierkiewicz374e0422008-07-23 19:55:56 +0200500#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA
501static const struct ide_tp_ops au1xxx_tp_ops = {
502 .exec_command = ide_exec_command,
503 .read_status = ide_read_status,
504 .read_altstatus = ide_read_altstatus,
505 .read_sff_dma_status = ide_read_sff_dma_status,
506
507 .set_irq = ide_set_irq,
508
509 .tf_load = ide_tf_load,
510 .tf_read = ide_tf_read,
511
512 .input_data = au1xxx_input_data,
513 .output_data = au1xxx_output_data,
514};
515#endif
516
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200517static const struct ide_port_ops au1xxx_port_ops = {
518 .set_pio_mode = au1xxx_set_pio_mode,
519 .set_dma_mode = auide_set_dma_mode,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200520};
521
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +0100522static const struct ide_port_info au1xxx_port_info = {
Bartlomiej Zolnierkiewicz85528652008-04-26 22:25:23 +0200523 .init_dma = auide_ddma_init,
Bartlomiej Zolnierkiewicz374e0422008-07-23 19:55:56 +0200524#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA
525 .tp_ops = &au1xxx_tp_ops,
526#endif
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200527 .port_ops = &au1xxx_port_ops,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200528#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
529 .dma_ops = &au1xxx_dma_ops,
530#endif
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +0100531 .host_flags = IDE_HFLAG_POST_SET_MODE |
Bartlomiej Zolnierkiewicz807b90d2008-02-02 19:56:40 +0100532 IDE_HFLAG_NO_IO_32BIT |
Bartlomiej Zolnierkiewiczc413b9b2008-02-02 19:56:31 +0100533 IDE_HFLAG_UNMASK_IRQS,
534 .pio_mask = ATA_PIO4,
535#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
536 .mwdma_mask = ATA_MWDMA2,
537#endif
538};
539
Pete Popov26a940e2005-09-15 08:03:12 +0000540static int au_ide_probe(struct device *dev)
541{
542 struct platform_device *pdev = to_platform_device(dev);
Jordan Crouse8f29e652005-12-15 02:17:46 +0100543 _auide_hwif *ahwif = &auide_hwif;
Pete Popov26a940e2005-09-15 08:03:12 +0000544 struct resource *res;
Bartlomiej Zolnierkiewicz48c3c102008-07-23 19:55:57 +0200545 struct ide_host *host;
Pete Popov26a940e2005-09-15 08:03:12 +0000546 int ret = 0;
Bartlomiej Zolnierkiewiczc97c6ac2008-07-23 19:55:50 +0200547 hw_regs_t hw, *hws[] = { &hw, NULL, NULL, NULL };
Pete Popov26a940e2005-09-15 08:03:12 +0000548
549#if defined(CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA)
Jordan Crouse8f29e652005-12-15 02:17:46 +0100550 char *mode = "MWDMA2";
Pete Popov26a940e2005-09-15 08:03:12 +0000551#elif defined(CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA)
Jordan Crouse8f29e652005-12-15 02:17:46 +0100552 char *mode = "PIO+DDMA(offload)";
Pete Popov26a940e2005-09-15 08:03:12 +0000553#endif
554
Jordan Crouse8f29e652005-12-15 02:17:46 +0100555 memset(&auide_hwif, 0, sizeof(_auide_hwif));
Pete Popov26a940e2005-09-15 08:03:12 +0000556 ahwif->irq = platform_get_irq(pdev, 0);
557
558 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
559
560 if (res == NULL) {
561 pr_debug("%s %d: no base address\n", DRV_NAME, pdev->id);
562 ret = -ENODEV;
563 goto out;
564 }
David Vrabel48944732006-01-19 17:56:29 +0000565 if (ahwif->irq < 0) {
566 pr_debug("%s %d: no IRQ\n", DRV_NAME, pdev->id);
567 ret = -ENODEV;
568 goto out;
569 }
Pete Popov26a940e2005-09-15 08:03:12 +0000570
Sergei Shtylyovb4dcaea2008-04-17 01:14:33 +0200571 if (!request_mem_region(res->start, res->end - res->start + 1,
572 pdev->name)) {
Pete Popov26a940e2005-09-15 08:03:12 +0000573 pr_debug("%s: request_mem_region failed\n", DRV_NAME);
Jordan Crouse8f29e652005-12-15 02:17:46 +0100574 ret = -EBUSY;
Pete Popov26a940e2005-09-15 08:03:12 +0000575 goto out;
Jordan Crouse8f29e652005-12-15 02:17:46 +0100576 }
Pete Popov26a940e2005-09-15 08:03:12 +0000577
Sergei Shtylyovb4dcaea2008-04-17 01:14:33 +0200578 ahwif->regbase = (u32)ioremap(res->start, res->end - res->start + 1);
Pete Popov26a940e2005-09-15 08:03:12 +0000579 if (ahwif->regbase == 0) {
580 ret = -ENOMEM;
581 goto out;
582 }
583
Bartlomiej Zolnierkiewicz9239b332007-10-20 00:32:33 +0200584 memset(&hw, 0, sizeof(hw));
585 auide_setup_ports(&hw, ahwif);
Bartlomiej Zolnierkiewiczaa79a2f2008-01-26 20:13:08 +0100586 hw.irq = ahwif->irq;
Bartlomiej Zolnierkiewiczed1f7882008-02-01 23:09:32 +0100587 hw.dev = dev;
Bartlomiej Zolnierkiewiczaa79a2f2008-01-26 20:13:08 +0100588 hw.chipset = ide_au1xxx;
589
Bartlomiej Zolnierkiewicz6f904d02008-07-23 19:55:57 +0200590 ret = ide_host_add(&au1xxx_port_info, hws, &host);
591 if (ret)
Bartlomiej Zolnierkiewicz48c3c102008-07-23 19:55:57 +0200592 goto out;
Bartlomiej Zolnierkiewicz5cbf79c2007-05-10 00:01:11 +0200593
Bartlomiej Zolnierkiewicz48c3c102008-07-23 19:55:57 +0200594 auide_hwif.hwif = host->ports[0];
Bartlomiej Zolnierkiewicz5cbf79c2007-05-10 00:01:11 +0200595
Bartlomiej Zolnierkiewicz48c3c102008-07-23 19:55:57 +0200596 dev_set_drvdata(dev, host);
Pete Popov26a940e2005-09-15 08:03:12 +0000597
Jordan Crouse8f29e652005-12-15 02:17:46 +0100598 printk(KERN_INFO "Au1xxx IDE(builtin) configured for %s\n", mode );
Pete Popov26a940e2005-09-15 08:03:12 +0000599
Jordan Crouse8f29e652005-12-15 02:17:46 +0100600 out:
601 return ret;
Pete Popov26a940e2005-09-15 08:03:12 +0000602}
603
604static int au_ide_remove(struct device *dev)
605{
606 struct platform_device *pdev = to_platform_device(dev);
607 struct resource *res;
Bartlomiej Zolnierkiewicz48c3c102008-07-23 19:55:57 +0200608 struct ide_host *host = dev_get_drvdata(dev);
Jordan Crouse8f29e652005-12-15 02:17:46 +0100609 _auide_hwif *ahwif = &auide_hwif;
Pete Popov26a940e2005-09-15 08:03:12 +0000610
Bartlomiej Zolnierkiewicz48c3c102008-07-23 19:55:57 +0200611 ide_host_remove(host);
Pete Popov26a940e2005-09-15 08:03:12 +0000612
613 iounmap((void *)ahwif->regbase);
614
615 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Sergei Shtylyovb4dcaea2008-04-17 01:14:33 +0200616 release_mem_region(res->start, res->end - res->start + 1);
Pete Popov26a940e2005-09-15 08:03:12 +0000617
618 return 0;
619}
620
621static struct device_driver au1200_ide_driver = {
622 .name = "au1200-ide",
623 .bus = &platform_bus_type,
624 .probe = au_ide_probe,
625 .remove = au_ide_remove,
626};
627
628static int __init au_ide_init(void)
629{
630 return driver_register(&au1200_ide_driver);
631}
632
Jordan Crouse8f29e652005-12-15 02:17:46 +0100633static void __exit au_ide_exit(void)
Pete Popov26a940e2005-09-15 08:03:12 +0000634{
635 driver_unregister(&au1200_ide_driver);
636}
637
Pete Popov26a940e2005-09-15 08:03:12 +0000638MODULE_LICENSE("GPL");
639MODULE_DESCRIPTION("AU1200 IDE driver");
640
641module_init(au_ide_init);
642module_exit(au_ide_exit);