Mauro Carvalho Chehab | 2c3fb08 | 2012-08-14 17:31:16 -0300 | [diff] [blame^] | 1 | /* drivers/media/platform/s5p-tv/regs-sdo.h |
Tomasz Stanislawski | 9a49840 | 2011-02-02 05:40:08 -0300 | [diff] [blame] | 2 | * |
| 3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com/ |
| 5 | * |
| 6 | * SDO register description file |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #ifndef SAMSUNG_REGS_SDO_H |
| 14 | #define SAMSUNG_REGS_SDO_H |
| 15 | |
| 16 | /* |
| 17 | * Register part |
| 18 | */ |
| 19 | |
| 20 | #define SDO_CLKCON 0x0000 |
| 21 | #define SDO_CONFIG 0x0008 |
| 22 | #define SDO_VBI 0x0014 |
| 23 | #define SDO_DAC 0x003C |
| 24 | #define SDO_CCCON 0x0180 |
| 25 | #define SDO_IRQ 0x0280 |
| 26 | #define SDO_IRQMASK 0x0284 |
| 27 | #define SDO_VERSION 0x03D8 |
| 28 | |
| 29 | /* |
| 30 | * Bit definition part |
| 31 | */ |
| 32 | |
| 33 | /* SDO Clock Control Register (SDO_CLKCON) */ |
| 34 | #define SDO_TVOUT_SW_RESET (1 << 4) |
| 35 | #define SDO_TVOUT_CLOCK_READY (1 << 1) |
| 36 | #define SDO_TVOUT_CLOCK_ON (1 << 0) |
| 37 | |
| 38 | /* SDO Video Standard Configuration Register (SDO_CONFIG) */ |
| 39 | #define SDO_PROGRESSIVE (1 << 4) |
| 40 | #define SDO_NTSC_M 0 |
| 41 | #define SDO_PAL_M 1 |
| 42 | #define SDO_PAL_BGHID 2 |
| 43 | #define SDO_PAL_N 3 |
| 44 | #define SDO_PAL_NC 4 |
| 45 | #define SDO_NTSC_443 8 |
| 46 | #define SDO_PAL_60 9 |
| 47 | #define SDO_STANDARD_MASK 0xf |
| 48 | |
| 49 | /* SDO VBI Configuration Register (SDO_VBI) */ |
| 50 | #define SDO_CVBS_WSS_INS (1 << 14) |
| 51 | #define SDO_CVBS_CLOSED_CAPTION_MASK (3 << 12) |
| 52 | |
| 53 | /* SDO DAC Configuration Register (SDO_DAC) */ |
| 54 | #define SDO_POWER_ON_DAC (1 << 0) |
| 55 | |
| 56 | /* SDO Color Compensation On/Off Control (SDO_CCCON) */ |
| 57 | #define SDO_COMPENSATION_BHS_ADJ_OFF (1 << 4) |
| 58 | #define SDO_COMPENSATION_CVBS_COMP_OFF (1 << 0) |
| 59 | |
| 60 | /* SDO Interrupt Request Register (SDO_IRQ) */ |
| 61 | #define SDO_VSYNC_IRQ_PEND (1 << 0) |
| 62 | |
| 63 | #endif /* SAMSUNG_REGS_SDO_H */ |