Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 1 | /******************************************************************************* |
| 2 | |
| 3 | Intel 82599 Virtual Function driver |
| 4 | Copyright(c) 1999 - 2009 Intel Corporation. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify it |
| 7 | under the terms and conditions of the GNU General Public License, |
| 8 | version 2, as published by the Free Software Foundation. |
| 9 | |
| 10 | This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License along with |
| 16 | this program; if not, write to the Free Software Foundation, Inc., |
| 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | |
| 19 | The full GNU General Public License is included in this distribution in |
| 20 | the file called "COPYING". |
| 21 | |
| 22 | Contact Information: |
| 23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
| 24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 25 | |
| 26 | *******************************************************************************/ |
| 27 | |
| 28 | #include "vf.h" |
| 29 | |
| 30 | /** |
| 31 | * ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx |
| 32 | * @hw: pointer to hardware structure |
| 33 | * |
| 34 | * Starts the hardware by filling the bus info structure and media type, clears |
| 35 | * all on chip counters, initializes receive address registers, multicast |
| 36 | * table, VLAN filter table, calls routine to set up link and flow control |
| 37 | * settings, and leaves transmit and receive units disabled and uninitialized |
| 38 | **/ |
| 39 | static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw) |
| 40 | { |
| 41 | /* Clear adapter stopped flag */ |
| 42 | hw->adapter_stopped = false; |
| 43 | |
| 44 | return 0; |
| 45 | } |
| 46 | |
| 47 | /** |
| 48 | * ixgbevf_init_hw_vf - virtual function hardware initialization |
| 49 | * @hw: pointer to hardware structure |
| 50 | * |
| 51 | * Initialize the hardware by resetting the hardware and then starting |
| 52 | * the hardware |
| 53 | **/ |
| 54 | static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw) |
| 55 | { |
| 56 | s32 status = hw->mac.ops.start_hw(hw); |
| 57 | |
| 58 | hw->mac.ops.get_mac_addr(hw, hw->mac.addr); |
| 59 | |
| 60 | return status; |
| 61 | } |
| 62 | |
| 63 | /** |
| 64 | * ixgbevf_reset_hw_vf - Performs hardware reset |
| 65 | * @hw: pointer to hardware structure |
| 66 | * |
| 67 | * Resets the hardware by reseting the transmit and receive units, masks and |
| 68 | * clears all interrupts. |
| 69 | **/ |
| 70 | static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw) |
| 71 | { |
| 72 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 73 | u32 timeout = IXGBE_VF_INIT_TIMEOUT; |
| 74 | s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; |
| 75 | u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; |
| 76 | u8 *addr = (u8 *)(&msgbuf[1]); |
| 77 | |
| 78 | /* Call adapter stop to disable tx/rx and clear interrupts */ |
| 79 | hw->mac.ops.stop_adapter(hw); |
| 80 | |
| 81 | IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); |
| 82 | IXGBE_WRITE_FLUSH(hw); |
| 83 | |
| 84 | /* we cannot reset while the RSTI / RSTD bits are asserted */ |
| 85 | while (!mbx->ops.check_for_rst(hw) && timeout) { |
| 86 | timeout--; |
| 87 | udelay(5); |
| 88 | } |
| 89 | |
| 90 | if (!timeout) |
| 91 | return IXGBE_ERR_RESET_FAILED; |
| 92 | |
| 93 | /* mailbox timeout can now become active */ |
| 94 | mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; |
| 95 | |
| 96 | msgbuf[0] = IXGBE_VF_RESET; |
| 97 | mbx->ops.write_posted(hw, msgbuf, 1); |
| 98 | |
| 99 | msleep(10); |
| 100 | |
| 101 | /* set our "perm_addr" based on info provided by PF */ |
| 102 | /* also set up the mc_filter_type which is piggy backed |
| 103 | * on the mac address in word 3 */ |
| 104 | ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN); |
| 105 | if (ret_val) |
| 106 | return ret_val; |
| 107 | |
| 108 | if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK)) |
| 109 | return IXGBE_ERR_INVALID_MAC_ADDR; |
| 110 | |
| 111 | memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); |
| 112 | hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; |
| 113 | |
| 114 | return 0; |
| 115 | } |
| 116 | |
| 117 | /** |
| 118 | * ixgbevf_stop_hw_vf - Generic stop Tx/Rx units |
| 119 | * @hw: pointer to hardware structure |
| 120 | * |
| 121 | * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, |
| 122 | * disables transmit and receive units. The adapter_stopped flag is used by |
| 123 | * the shared code and drivers to determine if the adapter is in a stopped |
| 124 | * state and should not touch the hardware. |
| 125 | **/ |
| 126 | static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw) |
| 127 | { |
| 128 | u32 number_of_queues; |
| 129 | u32 reg_val; |
| 130 | u16 i; |
| 131 | |
| 132 | /* |
| 133 | * Set the adapter_stopped flag so other driver functions stop touching |
| 134 | * the hardware |
| 135 | */ |
| 136 | hw->adapter_stopped = true; |
| 137 | |
| 138 | /* Disable the receive unit by stopped each queue */ |
| 139 | number_of_queues = hw->mac.max_rx_queues; |
| 140 | for (i = 0; i < number_of_queues; i++) { |
| 141 | reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i)); |
| 142 | if (reg_val & IXGBE_RXDCTL_ENABLE) { |
| 143 | reg_val &= ~IXGBE_RXDCTL_ENABLE; |
| 144 | IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); |
| 145 | } |
| 146 | } |
| 147 | |
| 148 | IXGBE_WRITE_FLUSH(hw); |
| 149 | |
| 150 | /* Clear interrupt mask to stop from interrupts being generated */ |
| 151 | IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); |
| 152 | |
| 153 | /* Clear any pending interrupts */ |
| 154 | IXGBE_READ_REG(hw, IXGBE_VTEICR); |
| 155 | |
| 156 | /* Disable the transmit unit. Each queue must be disabled. */ |
| 157 | number_of_queues = hw->mac.max_tx_queues; |
| 158 | for (i = 0; i < number_of_queues; i++) { |
| 159 | reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i)); |
| 160 | if (reg_val & IXGBE_TXDCTL_ENABLE) { |
| 161 | reg_val &= ~IXGBE_TXDCTL_ENABLE; |
| 162 | IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val); |
| 163 | } |
| 164 | } |
| 165 | |
| 166 | return 0; |
| 167 | } |
| 168 | |
| 169 | /** |
| 170 | * ixgbevf_mta_vector - Determines bit-vector in multicast table to set |
| 171 | * @hw: pointer to hardware structure |
| 172 | * @mc_addr: the multicast address |
| 173 | * |
| 174 | * Extracts the 12 bits, from a multicast address, to determine which |
| 175 | * bit-vector to set in the multicast table. The hardware uses 12 bits, from |
| 176 | * incoming rx multicast addresses, to determine the bit-vector to check in |
| 177 | * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set |
| 178 | * by the MO field of the MCSTCTRL. The MO field is set during initialization |
| 179 | * to mc_filter_type. |
| 180 | **/ |
| 181 | static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) |
| 182 | { |
| 183 | u32 vector = 0; |
| 184 | |
| 185 | switch (hw->mac.mc_filter_type) { |
| 186 | case 0: /* use bits [47:36] of the address */ |
| 187 | vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); |
| 188 | break; |
| 189 | case 1: /* use bits [46:35] of the address */ |
| 190 | vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); |
| 191 | break; |
| 192 | case 2: /* use bits [45:34] of the address */ |
| 193 | vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); |
| 194 | break; |
| 195 | case 3: /* use bits [43:32] of the address */ |
| 196 | vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); |
| 197 | break; |
| 198 | default: /* Invalid mc_filter_type */ |
| 199 | break; |
| 200 | } |
| 201 | |
| 202 | /* vector can only be 12-bits or boundary will be exceeded */ |
| 203 | vector &= 0xFFF; |
| 204 | return vector; |
| 205 | } |
| 206 | |
| 207 | /** |
| 208 | * ixgbevf_get_mac_addr_vf - Read device MAC address |
| 209 | * @hw: pointer to the HW structure |
| 210 | * @mac_addr: pointer to storage for retrieved MAC address |
| 211 | **/ |
| 212 | static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) |
| 213 | { |
| 214 | memcpy(mac_addr, hw->mac.perm_addr, IXGBE_ETH_LENGTH_OF_ADDRESS); |
| 215 | |
| 216 | return 0; |
| 217 | } |
| 218 | |
| 219 | /** |
| 220 | * ixgbevf_set_rar_vf - set device MAC address |
| 221 | * @hw: pointer to hardware structure |
| 222 | * @index: Receive address register to write |
| 223 | * @addr: Address to put into receive address register |
| 224 | * @vmdq: Unused in this implementation |
| 225 | **/ |
| 226 | static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, |
| 227 | u32 vmdq) |
| 228 | { |
| 229 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 230 | u32 msgbuf[3]; |
| 231 | u8 *msg_addr = (u8 *)(&msgbuf[1]); |
| 232 | s32 ret_val; |
| 233 | |
| 234 | memset(msgbuf, 0, sizeof(msgbuf)); |
| 235 | msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; |
| 236 | memcpy(msg_addr, addr, 6); |
| 237 | ret_val = mbx->ops.write_posted(hw, msgbuf, 3); |
| 238 | |
| 239 | if (!ret_val) |
| 240 | ret_val = mbx->ops.read_posted(hw, msgbuf, 3); |
| 241 | |
| 242 | msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; |
| 243 | |
| 244 | /* if nacked the address was rejected, use "perm_addr" */ |
| 245 | if (!ret_val && |
| 246 | (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) |
| 247 | ixgbevf_get_mac_addr_vf(hw, hw->mac.addr); |
| 248 | |
| 249 | return ret_val; |
| 250 | } |
| 251 | |
| 252 | /** |
| 253 | * ixgbevf_update_mc_addr_list_vf - Update Multicast addresses |
| 254 | * @hw: pointer to the HW structure |
Jiri Pirko | 5c58c47 | 2010-03-23 22:58:20 +0000 | [diff] [blame] | 255 | * @netdev: pointer to net device structure |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 256 | * |
| 257 | * Updates the Multicast Table Array. |
| 258 | **/ |
Jiri Pirko | 5c58c47 | 2010-03-23 22:58:20 +0000 | [diff] [blame] | 259 | static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw, |
| 260 | struct net_device *netdev) |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 261 | { |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 262 | struct netdev_hw_addr *ha; |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 263 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 264 | u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; |
| 265 | u16 *vector_list = (u16 *)&msgbuf[1]; |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 266 | u32 cnt, i; |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 267 | |
| 268 | /* Each entry in the list uses 1 16 bit word. We have 30 |
| 269 | * 16 bit words available in our HW msg buffer (minus 1 for the |
| 270 | * msg type). That's 30 hash values if we pack 'em right. If |
| 271 | * there are more than 30 MC addresses to add then punt the |
| 272 | * extras for now and then add code to handle more than 30 later. |
| 273 | * It would be unusual for a server to request that many multi-cast |
| 274 | * addresses except for in large enterprise network environments. |
| 275 | */ |
| 276 | |
Jiri Pirko | 5c58c47 | 2010-03-23 22:58:20 +0000 | [diff] [blame] | 277 | cnt = netdev_mc_count(netdev); |
| 278 | if (cnt > 30) |
| 279 | cnt = 30; |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 280 | msgbuf[0] = IXGBE_VF_SET_MULTICAST; |
| 281 | msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; |
| 282 | |
Jiri Pirko | 5c58c47 | 2010-03-23 22:58:20 +0000 | [diff] [blame] | 283 | i = 0; |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 284 | netdev_for_each_mc_addr(ha, netdev) { |
Jiri Pirko | 5c58c47 | 2010-03-23 22:58:20 +0000 | [diff] [blame] | 285 | if (i == cnt) |
| 286 | break; |
Jiri Pirko | 22bedad3 | 2010-04-01 21:22:57 +0000 | [diff] [blame] | 287 | vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr); |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 288 | } |
| 289 | |
| 290 | mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE); |
| 291 | |
| 292 | return 0; |
| 293 | } |
| 294 | |
| 295 | /** |
| 296 | * ixgbevf_set_vfta_vf - Set/Unset vlan filter table address |
| 297 | * @hw: pointer to the HW structure |
| 298 | * @vlan: 12 bit VLAN ID |
| 299 | * @vind: unused by VF drivers |
| 300 | * @vlan_on: if true then set bit, else clear bit |
| 301 | **/ |
| 302 | static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, |
| 303 | bool vlan_on) |
| 304 | { |
| 305 | struct ixgbe_mbx_info *mbx = &hw->mbx; |
| 306 | u32 msgbuf[2]; |
| 307 | |
| 308 | msgbuf[0] = IXGBE_VF_SET_VLAN; |
| 309 | msgbuf[1] = vlan; |
| 310 | /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ |
| 311 | msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; |
| 312 | |
| 313 | return mbx->ops.write_posted(hw, msgbuf, 2); |
| 314 | } |
| 315 | |
| 316 | /** |
| 317 | * ixgbevf_setup_mac_link_vf - Setup MAC link settings |
| 318 | * @hw: pointer to hardware structure |
| 319 | * @speed: Unused in this implementation |
| 320 | * @autoneg: Unused in this implementation |
| 321 | * @autoneg_wait_to_complete: Unused in this implementation |
| 322 | * |
| 323 | * Do nothing and return success. VF drivers are not allowed to change |
| 324 | * global settings. Maintained for driver compatibility. |
| 325 | **/ |
| 326 | static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw, |
| 327 | ixgbe_link_speed speed, bool autoneg, |
| 328 | bool autoneg_wait_to_complete) |
| 329 | { |
| 330 | return 0; |
| 331 | } |
| 332 | |
| 333 | /** |
| 334 | * ixgbevf_check_mac_link_vf - Get link/speed status |
| 335 | * @hw: pointer to hardware structure |
| 336 | * @speed: pointer to link speed |
| 337 | * @link_up: true is link is up, false otherwise |
| 338 | * @autoneg_wait_to_complete: true when waiting for completion is needed |
| 339 | * |
| 340 | * Reads the links register to determine if link is up and the current speed |
| 341 | **/ |
| 342 | static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw, |
| 343 | ixgbe_link_speed *speed, |
| 344 | bool *link_up, |
| 345 | bool autoneg_wait_to_complete) |
| 346 | { |
| 347 | u32 links_reg; |
| 348 | |
| 349 | if (!(hw->mbx.ops.check_for_rst(hw))) { |
| 350 | *link_up = false; |
| 351 | *speed = 0; |
| 352 | return -1; |
| 353 | } |
| 354 | |
| 355 | links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); |
| 356 | |
| 357 | if (links_reg & IXGBE_LINKS_UP) |
| 358 | *link_up = true; |
| 359 | else |
| 360 | *link_up = false; |
| 361 | |
Greg Rose | 3203df0 | 2010-04-27 11:31:45 +0000 | [diff] [blame] | 362 | if ((links_reg & IXGBE_LINKS_SPEED_82599) == |
| 363 | IXGBE_LINKS_SPEED_10G_82599) |
Greg Rose | 3047f90 | 2010-01-09 02:23:31 +0000 | [diff] [blame] | 364 | *speed = IXGBE_LINK_SPEED_10GB_FULL; |
| 365 | else |
| 366 | *speed = IXGBE_LINK_SPEED_1GB_FULL; |
| 367 | |
| 368 | return 0; |
| 369 | } |
| 370 | |
| 371 | struct ixgbe_mac_operations ixgbevf_mac_ops = { |
| 372 | .init_hw = ixgbevf_init_hw_vf, |
| 373 | .reset_hw = ixgbevf_reset_hw_vf, |
| 374 | .start_hw = ixgbevf_start_hw_vf, |
| 375 | .get_mac_addr = ixgbevf_get_mac_addr_vf, |
| 376 | .stop_adapter = ixgbevf_stop_hw_vf, |
| 377 | .setup_link = ixgbevf_setup_mac_link_vf, |
| 378 | .check_link = ixgbevf_check_mac_link_vf, |
| 379 | .set_rar = ixgbevf_set_rar_vf, |
| 380 | .update_mc_addr_list = ixgbevf_update_mc_addr_list_vf, |
| 381 | .set_vfta = ixgbevf_set_vfta_vf, |
| 382 | }; |
| 383 | |
| 384 | struct ixgbevf_info ixgbevf_vf_info = { |
| 385 | .mac = ixgbe_mac_82599_vf, |
| 386 | .mac_ops = &ixgbevf_mac_ops, |
| 387 | }; |
| 388 | |