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Antonino A. Daplas74f6ae82005-09-09 13:10:04 -07001 /*-*- linux-c -*-
2 * linux/drivers/video/i810-i2c.c -- Intel 810/815 I2C support
3 *
4 * Copyright (C) 2004 Antonino Daplas<adaplas@pol.net>
5 * All Rights Reserved
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
9 * more details.
10 */
11#include <linux/config.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/sched.h>
15#include <linux/delay.h>
16#include <linux/pci.h>
17#include <linux/fb.h>
18#include "i810.h"
19#include "i810_regs.h"
20#include "../edid.h"
21
22#define I810_DDC 0x50
23/* bit locations in the registers */
24#define SCL_DIR_MASK 0x0001
25#define SCL_DIR 0x0002
26#define SCL_VAL_MASK 0x0004
27#define SCL_VAL_OUT 0x0008
28#define SCL_VAL_IN 0x0010
29#define SDA_DIR_MASK 0x0100
30#define SDA_DIR 0x0200
31#define SDA_VAL_MASK 0x0400
32#define SDA_VAL_OUT 0x0800
33#define SDA_VAL_IN 0x1000
34
35#define DEBUG /* define this for verbose EDID parsing output */
36
37#ifdef DEBUG
38#define DPRINTK(fmt, args...) printk(fmt,## args)
39#else
40#define DPRINTK(fmt, args...)
41#endif
42
43static void i810i2c_setscl(void *data, int state)
44{
45 struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data;
46 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +010047 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070048
49 i810_writel(mmio, GPIOB, (state ? SCL_VAL_OUT : 0) | SCL_DIR |
50 SCL_DIR_MASK | SCL_VAL_MASK);
51 i810_readl(mmio, GPIOB); /* flush posted write */
52}
53
54static void i810i2c_setsda(void *data, int state)
55{
56 struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data;
57 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +010058 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070059
60 i810_writel(mmio, GPIOB, (state ? SDA_VAL_OUT : 0) | SDA_DIR |
61 SDA_DIR_MASK | SDA_VAL_MASK);
62 i810_readl(mmio, GPIOB); /* flush posted write */
63}
64
65static int i810i2c_getscl(void *data)
66{
67 struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data;
68 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +010069 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070070
71 i810_writel(mmio, GPIOB, SCL_DIR_MASK);
72 i810_writel(mmio, GPIOB, 0);
73 return (0 != (i810_readl(mmio, GPIOB) & SCL_VAL_IN));
74}
75
76static int i810i2c_getsda(void *data)
77{
78 struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data;
79 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +010080 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070081
82 i810_writel(mmio, GPIOB, SDA_DIR_MASK);
83 i810_writel(mmio, GPIOB, 0);
84 return (0 != (i810_readl(mmio, GPIOB) & SDA_VAL_IN));
85}
86
87static void i810ddc_setscl(void *data, int state)
88{
89 struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data;
90 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +010091 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -070092
93 i810_writel(mmio, GPIOA, (state ? SCL_VAL_OUT : 0) | SCL_DIR |
94 SCL_DIR_MASK | SCL_VAL_MASK);
95 i810_readl(mmio, GPIOA); /* flush posted write */
96}
97
98static void i810ddc_setsda(void *data, int state)
99{
100 struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data;
101 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +0100102 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700103
104 i810_writel(mmio, GPIOA, (state ? SDA_VAL_OUT : 0) | SDA_DIR |
105 SDA_DIR_MASK | SDA_VAL_MASK);
106 i810_readl(mmio, GPIOA); /* flush posted write */
107}
108
109static int i810ddc_getscl(void *data)
110{
111 struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data;
112 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +0100113 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700114
115 i810_writel(mmio, GPIOA, SCL_DIR_MASK);
116 i810_writel(mmio, GPIOA, 0);
117 return (0 != (i810_readl(mmio, GPIOA) & SCL_VAL_IN));
118}
119
120static int i810ddc_getsda(void *data)
121{
122 struct i810fb_i2c_chan *chan = (struct i810fb_i2c_chan *)data;
123 struct i810fb_par *par = chan->par;
Al Virobe88ec72005-09-29 00:36:10 +0100124 u8 __iomem *mmio = par->mmio_start_virtual;
Antonino A. Daplas74f6ae82005-09-09 13:10:04 -0700125
126 i810_writel(mmio, GPIOA, SDA_DIR_MASK);
127 i810_writel(mmio, GPIOA, 0);
128 return (0 != (i810_readl(mmio, GPIOA) & SDA_VAL_IN));
129}
130
131#define I2C_ALGO_DDC_I810 0x0e0000
132#define I2C_ALGO_I2C_I810 0x0f0000
133static int i810_setup_i2c_bus(struct i810fb_i2c_chan *chan, const char *name,
134 int conn)
135{
136 int rc;
137
138 strcpy(chan->adapter.name, name);
139 chan->adapter.owner = THIS_MODULE;
140 chan->adapter.algo_data = &chan->algo;
141 chan->adapter.dev.parent = &chan->par->dev->dev;
142 switch (conn) {
143 case 1:
144 chan->adapter.id = I2C_ALGO_DDC_I810;
145 chan->algo.setsda = i810ddc_setsda;
146 chan->algo.setscl = i810ddc_setscl;
147 chan->algo.getsda = i810ddc_getsda;
148 chan->algo.getscl = i810ddc_getscl;
149 break;
150 case 2:
151 chan->adapter.id = I2C_ALGO_I2C_I810;
152 chan->algo.setsda = i810i2c_setsda;
153 chan->algo.setscl = i810i2c_setscl;
154 chan->algo.getsda = i810i2c_getsda;
155 chan->algo.getscl = i810i2c_getscl;
156 break;
157 }
158 chan->algo.udelay = 10;
159 chan->algo.mdelay = 10;
160 chan->algo.timeout = (HZ/2);
161 chan->algo.data = chan;
162
163 i2c_set_adapdata(&chan->adapter, chan);
164
165 /* Raise SCL and SDA */
166 chan->algo.setsda(chan, 1);
167 chan->algo.setscl(chan, 1);
168 udelay(20);
169
170 rc = i2c_bit_add_bus(&chan->adapter);
171 if (rc == 0)
172 dev_dbg(&chan->par->dev->dev, "I2C bus %s registered.\n",name);
173 else
174 dev_warn(&chan->par->dev->dev, "Failed to register I2C bus "
175 "%s.\n", name);
176 return rc;
177}
178
179void i810_create_i2c_busses(struct i810fb_par *par)
180{
181 par->chan[0].par = par;
182 par->chan[1].par = par;
183 i810_setup_i2c_bus(&par->chan[0], "I810-DDC", 1);
184 i810_setup_i2c_bus(&par->chan[1], "I810-I2C", 2);
185}
186
187void i810_delete_i2c_busses(struct i810fb_par *par)
188{
189 if (par->chan[0].par)
190 i2c_bit_del_bus(&par->chan[0].adapter);
191 par->chan[0].par = NULL;
192 if (par->chan[1].par)
193 i2c_bit_del_bus(&par->chan[1].adapter);
194 par->chan[1].par = NULL;
195}
196
197static u8 *i810_do_probe_i2c_edid(struct i810fb_i2c_chan *chan)
198{
199 u8 start = 0x0;
200 struct i2c_msg msgs[] = {
201 {
202 .addr = I810_DDC,
203 .len = 1,
204 .buf = &start,
205 }, {
206 .addr = I810_DDC,
207 .flags = I2C_M_RD,
208 .len = EDID_LENGTH,
209 },
210 };
211 u8 *buf;
212
213 buf = kmalloc(EDID_LENGTH, GFP_KERNEL);
214 if (!buf) {
215 DPRINTK("i810-i2c: Failed to allocate memory\n");
216 return NULL;
217 }
218 msgs[1].buf = buf;
219
220 if (i2c_transfer(&chan->adapter, msgs, 2) == 2) {
221 DPRINTK("i810-i2c: I2C Transfer successful\n");
222 return buf;
223 }
224 DPRINTK("i810-i2c: Unable to read EDID block.\n");
225 kfree(buf);
226 return NULL;
227}
228
229int i810_probe_i2c_connector(struct fb_info *info, u8 **out_edid, int conn)
230{
231 struct i810fb_par *par = info->par;
232 u8 *edid = NULL;
233 int i;
234
235 DPRINTK("i810-i2c: Probe DDC%i Bus\n", conn);
236 if (conn < 3) {
237 for (i = 0; i < 3; i++) {
238 /* Do the real work */
239 edid = i810_do_probe_i2c_edid(&par->chan[conn-1]);
240 if (edid)
241 break;
242 }
243 } else {
244 DPRINTK("i810-i2c: Getting EDID from BIOS\n");
245 edid = kmalloc(EDID_LENGTH, GFP_KERNEL);
246 if (edid)
247 memcpy(edid, fb_firmware_edid(info->device),
248 EDID_LENGTH);
249 }
250
251 if (out_edid)
252 *out_edid = edid;
253
254 return (edid) ? 0 : 1;
255}
256
257